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Asutosh Das33a4ff52012-12-18 16:14:02 +05301Qualcomm Standard Secure Digital Host Controller (SDHC)
2
3Secure Digital Host Controller provides standard host interface to SD/MMC/SDIO cards.
4
5Required properties:
6 - compatible : should be "qcom,sdhci-msm"
7 - reg : should contain SDHC, SD Core register map.
8 - reg-names : indicates various resources passed to driver (via reg proptery) by name.
9 Required "reg-names" are "hc_mem" and "core_mem"
10 - interrupts : should contain SDHC interrupts.
11 - interrupt-names : indicates interrupts passed to driver (via interrupts property) by name.
12 Required "interrupt-names" are "hc_irq" and "pwr_irq".
13 - <supply-name>-supply: phandle to the regulator device tree node
14 Required "supply-name" are "vdd" and "vdd-io".
15
16Required alias:
17- The slot number is specified via an alias with the following format
18 'sdhc{n}' where n is the slot number.
19
20Optional Properties:
21 - interrupt-names - "status_irq". This status_irq will be used for card
22 detection.
Sahitya Tummala62448d92013-03-12 14:57:46 +053023 - cd-gpios: specify GPIO for card detection. If this property is
24 defined, then it means SDHC device has more than one interrupt
25 parent and hence, it is required to define the following properties
26 to configure interrupts from multiple parents -
27
28 interrupt-parent - This must provide reference to the current
29 device node.
30 #address-cells - Should provide a value of 0.
31 interrupts - Should be <0 1 2> and it is an index to the
32 interrupt-map.
33 #interrupt-cells - should provide a value of 1.
34 #interrupt-mask - should provide a value of 0xffffffff.
35 interrupt-map - Must create mapping for the number of interrupts
36 that are defined in above interrupts property.
37 For SDHC device node, it must define 3 mappings for
38 hc_irq, pwr_irq and status_irq in the format
39 mentioned in below example node of sdhc_2.
40
Asutosh Das33a4ff52012-12-18 16:14:02 +053041 - qcom,bus-width - defines the bus I/O width that controller supports.
42 Units - number of bits. The valid bus-width values are
43 1, 4 and 8.
44 - qcom,nonremovable - specifies whether the card in slot is
45 hot pluggable or hard wired.
46 - qcom,bus-speed-mode - specifies supported bus speed modes by host.
47 The supported bus speed modes are :
48 "HS200_1p8v" - indicates that host can support HS200 at 1.8v.
49 "HS200_1p2v" - indicates that host can support HS200 at 1.2v.
50 "DDR_1p8v" - indicates that host can support DDR mode at 1.8v.
51 "DDR_1p2v" - indicates that host can support DDR mode at 1.2v.
Sahitya Tummalab4e84042013-03-10 07:03:17 +053052 - qcom,cpu-dma-latency-us: specifies acceptable DMA latency in microseconds. There is
53 no default value that the driver assumes if this property
54 is not specified. So if this property is not specified,
55 then SDHC driver will not vote for PM QOS.
Asutosh Das33a4ff52012-12-18 16:14:02 +053056
57In the following, <supply> can be vdd (flash core voltage) or vdd-io (I/O voltage).
58 - qcom,<supply>-always-on - specifies whether supply should be kept "on" always.
59 - qcom,<supply>-lpm_sup - specifies whether supply can be kept in low power mode (lpm).
60 - qcom,<supply>-voltage_level - specifies voltage levels for supply. Should be
61 specified in pairs (min, max), units uV.
62 - qcom,<supply>-current_level - specifies load levels for supply in lpm or
63 high power mode (hpm). Should be specified in
64 pairs (lpm, hpm), units uA.
65
66 - gpios - specifies gpios assigned for sdhc slot.
67 - qcom,gpio-names - a list of strings that map in order to the list of gpios
68
Asutosh Das390519d2012-12-21 12:21:42 +053069 A slot has either gpios or dedicated tlmm pins as represented below.
70 - qcom,pad-pull-on - Active pull configuration for sdc tlmm pins
71 - qcom,pad-pull-off - Suspend pull configuration for sdc tlmm pins.
72 - qcom,pad-drv-on - Active drive strength configuration for sdc tlmm pins.
73 - qcom,pad-drv-off - Suspend drive strength configuration for sdc tlmm pins.
74 Tlmm pins are specified as <clk cmd data>
75
Sahitya Tummala9f5cbb82013-03-10 14:12:52 +053076 - qcom,bus-bw-vectors-bps: specifies array of throughput values in
77 Bytes/sec. The values in the array are determined according to
78 supported bus speed modes. For example, if host supports SDR12 mode,
79 value is 13631488 Bytes/sec.
80 - Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for
81 below optional properties:
82 - qcom,msm-bus,name
83 - qcom,msm-bus,num-cases
84 - qcom,msm-bus,active-only
85 - qcom,msm-bus,num-paths
86 - qcom,msm-bus,vectors-KBps
87
Asutosh Das33a4ff52012-12-18 16:14:02 +053088Example:
89
90 aliases {
91 sdhc1 = &sdhc_1;
Asutosh Das390519d2012-12-21 12:21:42 +053092 sdhc2 = &sdhc_2;
Asutosh Das33a4ff52012-12-18 16:14:02 +053093 };
94
95 sdhc_1: qcom,sdhc@f9824900 {
96 compatible = "qcom,sdhci-msm";
97 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
98 reg-names = "hc_mem", "core_mem";
99 interrupts = <0 123 0>, <0 138 0>;
100 interrupt-names = "hc_irq", "pwr_irq";
101
102 vdd-supply = <&pm8941_l21>;
103 vdd-io-supply = <&pm8941_l13>;
104 qcom,vdd-voltage-level = <2950000 2950000>;
105 qcom,vdd-current-level = <9000 800000>;
106
107 qcom,vdd-io-always-on;
108 qcom,vdd-io-lpm-sup;
109 qcom,vdd-io-voltage-level = <1800000 2950000>;
110 qcom,vdd-io-current-level = <6 22000>;
111
112 qcom,bus-width = <4>;
113 qcom,nonremovable;
114 qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
115
116 gpios = <&msmgpio 40 0>, /* CLK */
117 <&msmgpio 39 0>, /* CMD */
118 <&msmgpio 38 0>, /* DATA0 */
119 <&msmgpio 37 0>, /* DATA1 */
120 <&msmgpio 36 0>, /* DATA2 */
121 <&msmgpio 35 0>; /* DATA3 */
122 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
Sahitya Tummalab4e84042013-03-10 07:03:17 +0530123 qcom,cpu-dma-latency-us = <200>;
Asutosh Das33a4ff52012-12-18 16:14:02 +0530124 };
Asutosh Das390519d2012-12-21 12:21:42 +0530125
126 sdhc_2: qcom,sdhc@f98a4900 {
127 compatible = "qcom,sdhci-msm";
128 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
129 reg-names = "hc_mem", "core_mem";
Sahitya Tummala62448d92013-03-12 14:57:46 +0530130
131 #address-cells = <0>;
132 interrupt-parent = <&sdhc_2>;
133 interrupts = <0 1 2>;
134 #interrupt-cells = <1>;
135 interrupt-map-mask = <0xffffffff>;
136 interrupt-map = <0 &intc 0 125 0
137 1 &intc 0 221 0
138 2 &msmgpio 62 0x3>;
139 interrupt-names = "hc_irq", "pwr_irq", "status_irq";
140 cd-gpios = <&msmgpio 62 0x1>;
Asutosh Das390519d2012-12-21 12:21:42 +0530141
142 vdd-supply = <&pm8941_l21>;
143 vdd-io-supply = <&pm8941_l13>;
144
145 qcom,bus-width = <4>;
146
147 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
148 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
149 qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
150 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Sahitya Tummalab4e84042013-03-10 07:03:17 +0530151
152 qcom,cpu-dma-latency-us = <200>;
Sahitya Tummala9f5cbb82013-03-10 14:12:52 +0530153 qcom,msm-bus,name = "sdhc2";
154 qcom,msm-bus,num-cases = <7>;
155 qcom,msm-bus,active-only = <0>;
156 qcom,msm-bus,num-paths = <1>;
157 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
158 <81 512 6656 13312>, /* 13 MB/s*/
159 <81 512 13312 26624>, /* 26 MB/s */
160 <81 512 26624 53248>, /* 52 MB/s */
161 <81 512 53248 106496>, /* 104 MB/s */
162 <81 512 106496 212992>, /* 208 MB/s */
163 <81 512 2147483647 4294967295>; /* Max. bandwidth */
164 qcom,bus-bw-vectors-bps = <0 13631488 27262976 54525952 109051904 218103808 4294967295>;
Asutosh Das390519d2012-12-21 12:21:42 +0530165 };