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gerrit-public.fairphone.software / kernel / msm / ea2c51da25e76c7f16a26b7931232bcc39f23405 / . / arch / arm / boot / dts / msm8226.dtsi
blob: c49f9fedd8995d4fa28e869e1c9f0f0b7bbb9213 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -0700[diff] [blame]14/include/ "msm8226-ion.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]15/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]16/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]17/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -0700[diff] [blame]18/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -0700[diff] [blame]19/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -0700[diff] [blame]20/include/ "msm8226-bus.dtsi"
Sree Sesha Aravind Vadrevu82a171d2013-02-26 20:17:01 -0800[diff] [blame]21/include/ "msm8226-mdss.dtsi"
Aparna Dasbbee0842013-02-28 21:35:15 -0800[diff] [blame]22/include/ "msm8226-coresight.dtsi"
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]23/include/ "msm8226-iommu-domains.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]24/ {
25 model = "Qualcomm MSM 8226";
26 compatible = "qcom,msm8226";
27 interrupt-parent = <&intc>;
28
29 intc: interrupt-controller@f9000000 {
30 compatible = "qcom,msm-qgic2";
31 interrupt-controller;
32 #interrupt-cells = <3>;
33 reg = <0xF9000000 0x1000>,
34 <0xF9002000 0x1000>;
35 };
36
37 msmgpio: gpio@fd510000 {
38 compatible = "qcom,msm-gpio";
39 interrupt-controller;
40 #interrupt-cells = <2>;
41 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -0800[diff] [blame]42 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]43 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -0800[diff] [blame]44 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -0800[diff] [blame]45 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -0800[diff] [blame]46 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]47 };
48
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]49 aliases {
50 spi0 = &spi_0;
51 };
52
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]53 memory {
54 secure_mem: secure_region {
55 linux,contiguous-region;
56 reg = <0 0x3800000>;
57 label = "secure_mem";
58 };
59 };
60
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]61 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]62 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]63 interrupts = <1 2 0 1 3 0>;
64 clock-frequency = <19200000>;
65 };
66
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]67 qcom,vidc@fdc00000 {
68 compatible = "qcom,msm-vidc";
69 reg = <0xfdc00000 0xff000>;
70 interrupts = <0 44 0>;
71 qcom,load-freq-tbl = <352800 160000000>,
72 <244800 133330000>,
73 <108000 66700000>;
74 qcom,hfi = "venus";
75 qcom,bus-ports = <1>;
76 qcom,reg-presets = <0xE0024 0x0>,
77 <0x80124 0x3>,
78 <0xE0020 0x5555556>,
79 <0x800B0 0x10101001>,
80 <0x800B4 0x00101010>,
81 <0x800C0 0x1010100f>,
82 <0x800C4 0x00101010>,
83 <0x800D0 0x00000010>,
84 <0x800D4 0x00000010>,
85 <0x800D8 0x00000707>;
86 qcom,enc-ddr-ab-ib = <0 0>,
87 <129000 142000>,
88 <384000 422000>,
89 <866000 953000>;
90 qcom,dec-ddr-ab-ib = <0 0>,
91 <103000 134000>,
92 <268000 348000>,
93 <505000 657000>;
94 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
95 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
96 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
97 <0x1fe 0x2>;
98 };
99
100 qcom,wfd {
101 compatible = "qcom,msm-wfd";
102 };
103
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]104 serial@f991f000 {
105 compatible = "qcom,msm-lsuart-v14";
106 reg = <0xf991f000 0x1000>;
107 interrupts = <0 109 0>;
108 status = "disabled";
109 };
110
111 serial@f995e000 {
112 compatible = "qcom,msm-lsuart-v14";
113 reg = <0xf995e000 0x1000>;
114 interrupts = <0 114 0>;
115 status = "disabled";
116 };
117
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]118 qcom,msm-imem@fe805000 {
119 compatible = "qcom,msm-imem";
120 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
121 };
122
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]123 qcom,sps@f9984000 {
124 compatible = "qcom,msm_sps";
125 reg = <0xf9984000 0x15000>,
126 <0xf9999000 0xb000>;
127 interrupts = <0 94 0>;
128 };
129
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]130 usb@f9a55000 {
131 compatible = "qcom,hsusb-otg";
132 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]133 interrupts = <0 134 0>, <0 140 0>;
134 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]135 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]136 HSUSB_1p8-supply = <&pm8226_l10>;
137 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]138 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]139
140 qcom,hsusb-otg-phy-type = <2>;
141 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]142 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]143 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]144 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]145
146 qcom,msm-bus,name = "usb2";
147 qcom,msm-bus,num-cases = <2>;
148 qcom,msm-bus,active-only = <0>;
149 qcom,msm-bus,num-paths = <1>;
150 qcom,msm-bus,vectors-KBps =
151 <87 512 0 0>,
152 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]153 };
154
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]155 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]156 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]157 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]158 };
159
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]160 wcd9xxx_intc: wcd9xxx-irq {
161 compatible = "qcom,wcd9xxx-irq";
162 interrupt-controller;
163 #interrupt-cells = <1>;
164 interrupt-parent = <&msmgpio>;
165 interrupts = <68 0>;
166 interrupt-names = "cdc-int";
167 };
168
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]169 slim@fe12f000 {
170 cell-index = <1>;
171 compatible = "qcom,slim-ngd";
172 reg = <0xfe12f000 0x35000>,
173 <0xfe104000 0x20000>;
174 reg-names = "slimbus_physical", "slimbus_bam_physical";
175 interrupts = <0 163 0>, <0 164 0>;
176 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]177
178 tapan_codec {
179 compatible = "qcom,tapan-slim-pgd";
180 elemental-addr = [00 01 E0 00 17 02];
181
182 interrupt-parent = <&wcd9xxx_intc>;
183 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
184 17 18 19 20 21 22 23 24 25 26 27 28>;
185 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
186
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]187 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]188 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
189 qcom,cdc-vdd-buck-current = <650000>;
190
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]191 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]192 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
193 qcom,cdc-vdd-h-current = <25000>;
194
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]195 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]196 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
197 qcom,cdc-vdd-px-current = <25000>;
198
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]199 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]200 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
201 qcom,cdc-vdd-a-1p2v-current = <10000>;
202
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]203 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]204 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
205 qcom,cdc-vdd-cx-current = <10000>;
206
207 qcom,cdc-micbias-ldoh-v = <0x3>;
208 qcom,cdc-micbias-cfilt1-mv = <1800>;
209 qcom,cdc-micbias-cfilt2-mv = <1800>;
210 qcom,cdc-micbias-cfilt3-mv = <1800>;
211
212 qcom,cdc-micbias1-cfilt-sel = <0x0>;
213 qcom,cdc-micbias2-cfilt-sel = <0x1>;
214 qcom,cdc-micbias3-cfilt-sel = <0x2>;
215
216 qcom,cdc-mclk-clk-rate = <9600000>;
217 qcom,cdc-slim-ifd = "tapan-slim-ifd";
218 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
219 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]220 };
221
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]222 qcom,msm-adsp-loader {
223 compatible = "qcom,adsp-loader";
224 qcom,adsp-state = <0>;
225 };
226
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]227 sound {
228 compatible = "qcom,msm8226-audio-tapan";
229 qcom,model = "msm8226-tapan-snd-card";
230
231 qcom,audio-routing =
232 "RX_BIAS", "MCLK",
233 "LDO_H", "MCLK",
Bhalchandra Gajareb5120842013-03-14 17:50:39 -0700[diff] [blame]234 "SPK_OUT", "MCLK",
235 "SPK_OUT", "EXT_VDD_SPKR",
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]236 "AMIC1", "MIC BIAS1 Internal1",
237 "MIC BIAS1 Internal1", "Handset Mic",
238 "AMIC2", "MIC BIAS2 External",
239 "MIC BIAS2 External", "Headset Mic",
240 "AMIC3", "MIC BIAS2 External",
241 "MIC BIAS2 External", "ANCRight Headset Mic",
242 "AMIC4", "MIC BIAS2 External",
243 "MIC BIAS2 External", "ANCLeft Headset Mic",
244 "DMIC1", "MIC BIAS1 External",
245 "MIC BIAS1 External", "Digital Mic1",
246 "DMIC2", "MIC BIAS1 External",
247 "MIC BIAS1 External", "Digital Mic2",
248 "DMIC3", "MIC BIAS3 External",
249 "MIC BIAS3 External", "Digital Mic3",
250 "DMIC4", "MIC BIAS3 External",
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]251 "MIC BIAS3 External", "Digital Mic4";
252
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]253 qcom,tapan-mclk-clk-freq = <9600000>;
254 };
255
256 qcom,msm-pcm {
257 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]258 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]259 };
260
261 qcom,msm-pcm-routing {
262 compatible = "qcom,msm-pcm-routing";
263 };
264
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]265 qcom,msm-pcm-low-latency {
266 compatible = "qcom,msm-pcm-dsp";
267 qcom,msm-pcm-dsp-id = <1>;
268 qcom,msm-pcm-low-latency;
269 };
270
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]271 qcom,msm-pcm-lpa {
272 compatible = "qcom,msm-pcm-lpa";
273 };
274
275 qcom,msm-compr-dsp {
276 compatible = "qcom,msm-compr-dsp";
277 };
278
279 qcom,msm-voip-dsp {
280 compatible = "qcom,msm-voip-dsp";
281 };
282
283 qcom,msm-pcm-voice {
284 compatible = "qcom,msm-pcm-voice";
285 };
286
287 qcom,msm-stub-codec {
288 compatible = "qcom,msm-stub-codec";
289 };
290
291 qcom,msm-dai-fe {
292 compatible = "qcom,msm-dai-fe";
293 };
294
295 qcom,msm-pcm-afe {
296 compatible = "qcom,msm-pcm-afe";
297 };
298
299 qcom,msm-dai-q6-hdmi {
300 compatible = "qcom,msm-dai-q6-hdmi";
301 qcom,msm-dai-q6-dev-id = <8>;
302 };
303
304 qcom,msm-dai-q6 {
305 compatible = "qcom,msm-dai-q6";
306 qcom,msm-dai-q6-sb-0-rx {
307 compatible = "qcom,msm-dai-q6-dev";
308 qcom,msm-dai-q6-dev-id = <16384>;
309 };
310
311 qcom,msm-dai-q6-sb-0-tx {
312 compatible = "qcom,msm-dai-q6-dev";
313 qcom,msm-dai-q6-dev-id = <16385>;
314 };
315
316 qcom,msm-dai-q6-sb-1-rx {
317 compatible = "qcom,msm-dai-q6-dev";
318 qcom,msm-dai-q6-dev-id = <16386>;
319 };
320
321 qcom,msm-dai-q6-sb-1-tx {
322 compatible = "qcom,msm-dai-q6-dev";
323 qcom,msm-dai-q6-dev-id = <16387>;
324 };
325
326 qcom,msm-dai-q6-sb-3-rx {
327 compatible = "qcom,msm-dai-q6-dev";
328 qcom,msm-dai-q6-dev-id = <16390>;
329 };
330
331 qcom,msm-dai-q6-sb-3-tx {
332 compatible = "qcom,msm-dai-q6-dev";
333 qcom,msm-dai-q6-dev-id = <16391>;
334 };
335
336 qcom,msm-dai-q6-sb-4-rx {
337 compatible = "qcom,msm-dai-q6-dev";
338 qcom,msm-dai-q6-dev-id = <16392>;
339 };
340
341 qcom,msm-dai-q6-sb-4-tx {
342 compatible = "qcom,msm-dai-q6-dev";
343 qcom,msm-dai-q6-dev-id = <16393>;
344 };
345
346 qcom,msm-dai-q6-bt-sco-rx {
347 compatible = "qcom,msm-dai-q6-dev";
348 qcom,msm-dai-q6-dev-id = <12288>;
349 };
350
351 qcom,msm-dai-q6-bt-sco-tx {
352 compatible = "qcom,msm-dai-q6-dev";
353 qcom,msm-dai-q6-dev-id = <12289>;
354 };
355
356 qcom,msm-dai-q6-int-fm-rx {
357 compatible = "qcom,msm-dai-q6-dev";
358 qcom,msm-dai-q6-dev-id = <12292>;
359 };
360
361 qcom,msm-dai-q6-int-fm-tx {
362 compatible = "qcom,msm-dai-q6-dev";
363 qcom,msm-dai-q6-dev-id = <12293>;
364 };
365
366 qcom,msm-dai-q6-be-afe-pcm-rx {
367 compatible = "qcom,msm-dai-q6-dev";
368 qcom,msm-dai-q6-dev-id = <224>;
369 };
370
371 qcom,msm-dai-q6-be-afe-pcm-tx {
372 compatible = "qcom,msm-dai-q6-dev";
373 qcom,msm-dai-q6-dev-id = <225>;
374 };
375
376 qcom,msm-dai-q6-afe-proxy-rx {
377 compatible = "qcom,msm-dai-q6-dev";
378 qcom,msm-dai-q6-dev-id = <241>;
379 };
380
381 qcom,msm-dai-q6-afe-proxy-tx {
382 compatible = "qcom,msm-dai-q6-dev";
383 qcom,msm-dai-q6-dev-id = <240>;
384 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]385
386 qcom,msm-dai-q6-incall-record-rx {
387 compatible = "qcom,msm-dai-q6-dev";
388 qcom,msm-dai-q6-dev-id = <32771>;
389 };
390
391 qcom,msm-dai-q6-incall-record-tx {
392 compatible = "qcom,msm-dai-q6-dev";
393 qcom,msm-dai-q6-dev-id = <32772>;
394 };
395
396 qcom,msm-dai-q6-incall-music-rx {
397 compatible = "qcom,msm-dai-q6-dev";
398 qcom,msm-dai-q6-dev-id = <32773>;
399 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]400 };
401
402 qcom,msm-pcm-hostless {
403 compatible = "qcom,msm-pcm-hostless";
404 };
405
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]406 qcom,wdt@f9017000 {
407 compatible = "qcom,msm-watchdog";
408 reg = <0xf9017000 0x1000>;
409 interrupts = <0 3 0>, <0 4 0>;
410 qcom,bark-time = <11000>;
411 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]412 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]413 };
414
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]415 qcom,smem@fa00000 {
416 compatible = "qcom,smem";
417 reg = <0xfa00000 0x200000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]418 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]419 <0xfc428000 0x4000>;
420 reg-names = "smem", "irq-reg-base", "aux-mem1";
421
422 qcom,smd-modem {
423 compatible = "qcom,smd";
424 qcom,smd-edge = <0>;
425 qcom,smd-irq-offset = <0x8>;
426 qcom,smd-irq-bitmask = <0x1000>;
427 qcom,pil-string = "modem";
428 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]429 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]430
431 qcom,smsm-modem {
432 compatible = "qcom,smsm";
433 qcom,smsm-edge = <0>;
434 qcom,smsm-irq-offset = <0x8>;
435 qcom,smsm-irq-bitmask = <0x2000>;
436 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]437 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]438
439 qcom,smd-adsp {
440 compatible = "qcom,smd";
441 qcom,smd-edge = <1>;
442 qcom,smd-irq-offset = <0x8>;
443 qcom,smd-irq-bitmask = <0x100>;
444 qcom,pil-string = "adsp";
445 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]446 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]447
448 qcom,smsm-adsp {
449 compatible = "qcom,smsm";
450 qcom,smsm-edge = <1>;
451 qcom,smsm-irq-offset = <0x8>;
452 qcom,smsm-irq-bitmask = <0x200>;
453 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]454 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]455
456 qcom,smd-wcnss {
457 compatible = "qcom,smd";
458 qcom,smd-edge = <6>;
459 qcom,smd-irq-offset = <0x8>;
460 qcom,smd-irq-bitmask = <0x20000>;
461 qcom,pil-string = "wcnss";
462 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]463 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]464
465 qcom,smsm-wcnss {
466 compatible = "qcom,smsm";
467 qcom,smsm-edge = <6>;
468 qcom,smsm-irq-offset = <0x8>;
469 qcom,smsm-irq-bitmask = <0x80000>;
470 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]471 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]472
473 qcom,smd-rpm {
474 compatible = "qcom,smd";
475 qcom,smd-edge = <15>;
476 qcom,smd-irq-offset = <0x8>;
477 qcom,smd-irq-bitmask = <0x1>;
478 interrupts = <0 168 1>;
479 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]480 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]481 };
482
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]483 rpm_bus: qcom,rpm-smd {
484 compatible = "qcom,rpm-smd";
485 rpm-channel-name = "rpm_requests";
486 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]487 };
488
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]489 sdcc1: qcom,sdcc@f9824000 {
490 cell-index = <1>; /* SDC1 eMMC slot */
491 compatible = "qcom,msm-sdcc";
492
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]493 reg = <0xf9824000 0x800>,
494 <0xf9824800 0x100>,
495 <0xf9804000 0x7000>;
496 reg-names = "core_mem", "dml_mem", "bam_mem";
497 interrupts = <0 123 0>, <0 137 0>;
498 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]499
500 qcom,bus-width = <8>;
501 status = "disabled";
502 };
503
504 sdcc2: qcom,sdcc@f98a4000 {
505 cell-index = <2>; /* SDC2 SD card slot */
506 compatible = "qcom,msm-sdcc";
507
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]508 reg = <0xf98a4000 0x800>,
509 <0xf98a4800 0x100>,
510 <0xf9884000 0x7000>;
511 reg-names = "core_mem", "dml_mem", "bam_mem";
512 interrupts = <0 125 0>, <0 220 0>;
513 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]514
515 qcom,bus-width = <4>;
516 status = "disabled";
517 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]518
519 spmi_bus: qcom,spmi@fc4c0000 {
520 cell-index = <0>;
521 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]522 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]523 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]524 <0Xfc4cb000 0x1000>,
525 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]526 /* 190,ee0_krait_hlos_spmi_periph_irq */
527 /* 187,channel_0_krait_hlos_trans_done_irq */
528 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]529 qcom,pmic-arb-ee = <0>;
530 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]531 };
532
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]533 i2c@f9926000 { /* BLSP-1 QUP-4 */
534 cell-index = <0>;
535 compatible = "qcom,i2c-qup";
536 reg = <0xf9926000 0x1000>;
537 #address-cells = <1>;
538 #size-cells = <0>;
539 reg-names = "qup_phys_addr";
540 interrupts = <0 98 0>;
541 interrupt-names = "qup_err_intr";
542 qcom,i2c-bus-freq = <100000>;
543 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]544
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]545 i2c@f9927000 { /* BLSP1 QUP5 */
546 cell-index = <5>;
547 compatible = "qcom,i2c-qup";
548 #address-cells = <1>;
549 #size-cells = <0>;
550 reg-names = "qup_phys_addr";
551 reg = <0xf9927000 0x1000>;
552 interrupt-names = "qup_err_intr";
553 interrupts = <0 99 0>;
554 qcom,i2c-bus-freq = <100000>;
555 qcom,i2c-src-freq = <19200000>;
556 };
557
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]558 qcom,acpuclk@f9011050 {
559 compatible = "qcom,acpuclk-a7";
560 reg = <0xf9011050 0x8>;
561 reg-names = "rcg_base";
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]562 a7_cpu-supply = <&pm8226_s2>;
563 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]564 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]565
566 qcom,ocmem@fdd00000 {
567 compatible = "qcom,msm-ocmem";
568 reg = <0xfdd00000 0x2000>,
569 <0xfdd02000 0x2000>,
570 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]571 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]572 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
573 interrupts = <0 76 0 0 77 0>;
574 interrupt-names = "ocmem_irq", "dm_irq";
575 qcom,ocmem-num-regions = <0x1>;
576 qcom,ocmem-num-macros = <0x2>;
577 qcom,resource-type = <0x706d636f>;
578 #address-cells = <1>;
579 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]580 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]581
582 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]583 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]584 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]585 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]586 };
587 };
588
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]589 qcom,venus@fdce0000 {
590 compatible = "qcom,pil-venus";
591 reg = <0xfdce0000 0x4000>,
592 <0xfdc80000 0x400>;
593 reg-names = "wrapper_base", "vbif_base";
594 vdd-supply = <&gdsc_venus>;
595
596 qcom,firmware-name = "venus";
597 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]598
599 qcom,pronto@fb21b000 {
600 compatible = "qcom,pil-pronto";
601 reg = <0xfb21b000 0x3000>,
602 <0xfc401700 0x4>,
603 <0xfd485300 0xc>;
604 reg-names = "pmu_base", "clk_base", "halt_base";
605 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]606 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]607
608 qcom,firmware-name = "wcnss";
609 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]610
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]611 qcom,lpass@fe200000 {
612 compatible = "qcom,pil-q6v5-lpass";
613 reg = <0xfe200000 0x00100>,
614 <0xfd485100 0x00010>;
615 reg-names = "qdsp6_base", "halt_base";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]616 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]617 interrupts = <0 162 1>;
618
619 qcom,firmware-name = "adsp";
620 };
621
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]622 qcom,mss@fc880000 {
623 compatible = "qcom,pil-q6v5-mss";
624 reg = <0xfc880000 0x100>,
625 <0xfd485000 0x400>,
626 <0xfc820000 0x020>,
627 <0xfc401680 0x004>,
628 <0x0d1fc000 0x4000>,
629 <0xfd485194 0x4>;
630 reg-names = "qdsp6_base", "halt_base", "rmb_base",
631 "restart_reg", "metadata_base", "cxrail_bhs_reg";
632
633 interrupts = <0 24 1>;
634 vdd_mss-supply = <&pm8226_s1>;
635 vdd_cx-supply = <&pm8226_s1_corner>;
636 vdd_mx-supply = <&pm8226_l3>;
637 vdd_pll-supply = <&pm8226_l8>;
638 qcom,vdd_pll = <1800000>;
639
640 qcom,is-loadable;
641 qcom,firmware-name = "mba";
642 qcom,pil-self-auth;
643 };
644
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]645 qcom,msm-mem-hole {
646 compatible = "qcom,msm-mem-hole";
Neeti Desaif5756012013-02-25 17:56:35 -0800[diff] [blame]647 qcom,memblock-remove = <0x8400000 0x7b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]648 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]649
650 tsens: tsens@fc4a8000 {
651 compatible = "qcom,msm-tsens";
652 reg = <0xfc4a8000 0x2000>,
653 <0xfc4b8000 0x1000>;
654 reg-names = "tsens_physical", "tsens_eeprom_physical";
655 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]656 qcom,sensors = <4>;
657 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]658 qcom,calib-mode = "fuse_map2";
659 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]660
661 qcom,msm-thermal {
662 compatible = "qcom,msm-thermal";
663 qcom,sensor-id = <0>;
664 qcom,poll-ms = <250>;
665 qcom,limit-temp = <60>;
666 qcom,temp-hysteresis = <10>;
667 qcom,freq-step = <2>;
668 };
669
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]670 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
671 compatible = "qcom,spi-qup-v2";
672 #address-cells = <1>;
673 #size-cells = <0>;
674 reg-names = "spi_physical", "spi_bam_physical";
675 reg = <0xf9923000 0x1000>,
676 <0xf9904000 0xF000>;
677 interrupt-names = "spi_irq", "spi_bam_irq";
678 interrupts = <0 95 0>, <0 238 0>;
679 spi-max-frequency = <19200000>;
680
681 gpios = <&msmgpio 3 0>, /* CLK */
682 <&msmgpio 1 0>, /* MISO */
683 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]684 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]685
686 qcom,infinite-mode = <0>;
687 qcom,use-bam;
688 qcom,ver-reg-exists;
689 qcom,bam-consumer-pipe-index = <12>;
690 qcom,bam-producer-pipe-index = <13>;
691 };
692
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]693 qcom,bam_dmux@fc834000 {
694 compatible = "qcom,bam_dmux";
695 reg = <0xfc834000 0x7000>;
696 interrupts = <0 29 1>;
697 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]698
699 qcom,msm-rtb {
700 compatible = "qcom,msm-rtb";
701 qcom,memory-reservation-type = "EBI1";
702 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
703 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]704
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]705 qcom,msm-rng@f9bff000 {
706 compatible = "qcom,msm-rng";
707 reg = <0xf9bff000 0x200>;
708 qcom,msm-rng-iface-clk;
709 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]710
711 qcom,tz-log@fc5b82c {
712 compatible = "qcom,tz-log";
713 reg = <0x0fc5b82c 0x1000>;
714 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]715
716 jtag_mm0: jtagmm@fc33c000 {
717 compatible = "qcom,jtag-mm";
718 reg = <0xfc33c000 0x1000>,
719 <0xfc330000 0x1000>;
720 reg-names = "etm-base","debug-base";
721 };
722
723 jtag_mm1: jtagmm@fc33d000 {
724 compatible = "qcom,jtag-mm";
725 reg = <0xfc33d000 0x1000>,
726 <0xfc332000 0x1000>;
727 reg-names = "etm-base","debug-base";
728 };
729
730 jtag_mm2: jtagmm@fc33e000 {
731 compatible = "qcom,jtag-mm";
732 reg = <0xfc33e000 0x1000>,
733 <0xfc334000 0x1000>;
734 reg-names = "etm-base","debug-base";
735 };
736
737 jtag_mm3: jtagmm@fc33f000 {
738 compatible = "qcom,jtag-mm";
739 reg = <0xfc33f000 0x1000>,
740 <0xfc336000 0x1000>;
741 reg-names = "etm-base","debug-base";
742 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]743
744 qcom,ipc-spinlock@fd484000 {
745 compatible = "qcom,ipc-spinlock-sfpb";
746 reg = <0xfd484000 0x400>;
747 qcom,num-locks = <8>;
748 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]749};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]750
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]751&gdsc_venus {
752 status = "ok";
753};
754
755&gdsc_mdss {
756 status = "ok";
757};
758
759&gdsc_jpeg {
760 status = "ok";
761};
762
763&gdsc_vfe {
764 status = "ok";
765};
766
767&gdsc_oxili_cx {
768 status = "ok";
769};
770
771&gdsc_usb_hsic {
772 status = "ok";
773};
774
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]775/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]776/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]777/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]778
779&pm8226_vadc {
780 chan@0 {
781 label = "usb_in";
782 reg = <0>;
783 qcom,decimation = <0>;
784 qcom,pre-div-channel-scaling = <4>;
785 qcom,calibration-type = "absolute";
786 qcom,scale-function = <0>;
787 qcom,hw-settle-time = <0>;
788 qcom,fast-avg-setup = <0>;
789 };
790
791 chan@2 {
792 label = "vchg_sns";
793 reg = <2>;
794 qcom,decimation = <0>;
795 qcom,pre-div-channel-scaling = <3>;
796 qcom,calibration-type = "absolute";
797 qcom,scale-function = <0>;
798 qcom,hw-settle-time = <0>;
799 qcom,fast-avg-setup = <0>;
800 };
801
802 chan@5 {
803 label = "vcoin";
804 reg = <5>;
805 qcom,decimation = <0>;
806 qcom,pre-div-channel-scaling = <1>;
807 qcom,calibration-type = "absolute";
808 qcom,scale-function = <0>;
809 qcom,hw-settle-time = <0>;
810 qcom,fast-avg-setup = <0>;
811 };
812
813 chan@6 {
814 label = "vbat_sns";
815 reg = <6>;
816 qcom,decimation = <0>;
817 qcom,pre-div-channel-scaling = <1>;
818 qcom,calibration-type = "absolute";
819 qcom,scale-function = <0>;
820 qcom,hw-settle-time = <0>;
821 qcom,fast-avg-setup = <0>;
822 };
823
824 chan@7 {
825 label = "vph_pwr";
826 reg = <7>;
827 qcom,decimation = <0>;
828 qcom,pre-div-channel-scaling = <1>;
829 qcom,calibration-type = "absolute";
830 qcom,scale-function = <0>;
831 qcom,hw-settle-time = <0>;
832 qcom,fast-avg-setup = <0>;
833 };
834
835 chan@30 {
836 label = "batt_therm";
837 reg = <0x30>;
838 qcom,decimation = <0>;
839 qcom,pre-div-channel-scaling = <0>;
840 qcom,calibration-type = "ratiometric";
841 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]842 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]843 qcom,fast-avg-setup = <0>;
844 };
845
846 chan@31 {
847 label = "batt_id";
848 reg = <0x31>;
849 qcom,decimation = <0>;
850 qcom,pre-div-channel-scaling = <0>;
851 qcom,calibration-type = "ratiometric";
852 qcom,scale-function = <0>;
853 qcom,hw-settle-time = <2>;
854 qcom,fast-avg-setup = <0>;
855 };
856
857 chan@b2 {
858 label = "xo_therm_pu2";
859 reg = <0xb2>;
860 qcom,decimation = <0>;
861 qcom,pre-div-channel-scaling = <0>;
862 qcom,calibration-type = "ratiometric";
863 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]864 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]865 qcom,fast-avg-setup = <0>;
866 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]867
868};
869
870&pm8226_chg {
871 status = "ok";
872
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]873 qcom,chg-chgr@1000 {
874 status = "ok";
875 };
876
877 qcom,chg-buck@1100 {
878 status = "ok";
879 };
880
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]881 qcom,chg-bat-if@1200 {
882 status = "ok";
883 };
884
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]885 qcom,chg-usb-chgpth@1300 {
886 status = "ok";
887 };
888
889 qcom,chg-boost@1500 {
890 status = "ok";
891 };
892
893 qcom,chg-misc@1600 {
894 status = "ok";
895 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]896};