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Jon Smirl20d0e152009-05-26 08:34:10 -04001/*
2 * linux/sound/mpc5200-ac97.c -- AC97 support for the Freescale MPC52xx chip.
3 *
4 * Copyright (C) 2009 Jon Smirl, Digispeaker
5 * Author: Jon Smirl <jonsmirl@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/of_device.h>
14#include <linux/of_platform.h>
15
16#include <sound/pcm.h>
17#include <sound/pcm_params.h>
18#include <sound/soc.h>
19
20#include <asm/time.h>
21#include <asm/delay.h>
22#include <asm/mpc52xx_psc.h>
23
24#include "mpc5200_dma.h"
25#include "mpc5200_psc_ac97.h"
26
27#define DRV_NAME "mpc5200-psc-ac97"
28
29/* ALSA only supports a single AC97 device so static is recommend here */
30static struct psc_dma *psc_dma;
31
32static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
33{
Jon Smirlea8b27a2009-05-27 01:06:19 -040034 int status;
Jon Smirl20d0e152009-05-26 08:34:10 -040035 unsigned int val;
36
37 /* Wait for command send status zero = ready */
Jon Smirlea8b27a2009-05-27 01:06:19 -040038 status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
39 MPC52xx_PSC_SR_CMDSEND), 100, 0);
40 if (status == 0) {
Jon Smirl20d0e152009-05-26 08:34:10 -040041 pr_err("timeout on ac97 bus (rdy)\n");
42 return -ENODEV;
43 }
44 /* Send the read */
45 out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
46
47 /* Wait for the answer */
Jon Smirlea8b27a2009-05-27 01:06:19 -040048 status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) &
49 MPC52xx_PSC_SR_DATA_VAL), 100, 0);
50 if (status == 0) {
Jon Smirl20d0e152009-05-26 08:34:10 -040051 pr_err("timeout on ac97 read (val) %x\n",
52 in_be16(&psc_dma->psc_regs->sr_csr.status));
53 return -ENODEV;
54 }
55 /* Get the data */
56 val = in_be32(&psc_dma->psc_regs->ac97_data);
57 if (((val >> 24) & 0x7f) != reg) {
58 pr_err("reg echo error on ac97 read\n");
59 return -ENODEV;
60 }
61 val = (val >> 8) & 0xffff;
62
63 return (unsigned short) val;
64}
65
66static void psc_ac97_write(struct snd_ac97 *ac97,
67 unsigned short reg, unsigned short val)
68{
Jon Smirlea8b27a2009-05-27 01:06:19 -040069 int status;
Jon Smirl20d0e152009-05-26 08:34:10 -040070
71 /* Wait for command status zero = ready */
Jon Smirlea8b27a2009-05-27 01:06:19 -040072 status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
73 MPC52xx_PSC_SR_CMDSEND), 100, 0);
74 if (status == 0) {
Jon Smirl20d0e152009-05-26 08:34:10 -040075 pr_err("timeout on ac97 bus (write)\n");
76 return;
77 }
78 /* Write data */
79 out_be32(&psc_dma->psc_regs->ac97_cmd,
80 ((reg & 0x7f) << 24) | (val << 8));
81}
82
83static void psc_ac97_warm_reset(struct snd_ac97 *ac97)
84{
Jon Smirl20d0e152009-05-26 08:34:10 -040085 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
86
87 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
Jon Smirlea8b27a2009-05-27 01:06:19 -040088 udelay(3);
Jon Smirl20d0e152009-05-26 08:34:10 -040089 out_be32(&regs->sicr, psc_dma->sicr);
90}
91
92static void psc_ac97_cold_reset(struct snd_ac97 *ac97)
93{
Jon Smirl20d0e152009-05-26 08:34:10 -040094 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
95
96 /* Do a cold reset */
97 out_8(&regs->op1, MPC52xx_PSC_OP_RES);
Jon Smirlea8b27a2009-05-27 01:06:19 -040098 udelay(10);
Jon Smirl20d0e152009-05-26 08:34:10 -040099 out_8(&regs->op0, MPC52xx_PSC_OP_RES);
Jon Smirlea8b27a2009-05-27 01:06:19 -0400100 udelay(50);
Jon Smirl20d0e152009-05-26 08:34:10 -0400101 psc_ac97_warm_reset(ac97);
102}
103
104struct snd_ac97_bus_ops soc_ac97_ops = {
105 .read = psc_ac97_read,
106 .write = psc_ac97_write,
107 .reset = psc_ac97_cold_reset,
108 .warm_reset = psc_ac97_warm_reset,
109};
110EXPORT_SYMBOL_GPL(soc_ac97_ops);
111
112static int psc_ac97_hw_analog_params(struct snd_pcm_substream *substream,
113 struct snd_pcm_hw_params *params,
114 struct snd_soc_dai *cpu_dai)
115{
116 struct psc_dma *psc_dma = cpu_dai->private_data;
117
118 dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
119 " periods=%i buffer_size=%i buffer_bytes=%i channels=%i"
120 " rate=%i format=%i\n",
121 __func__, substream, params_period_size(params),
122 params_period_bytes(params), params_periods(params),
123 params_buffer_size(params), params_buffer_bytes(params),
124 params_channels(params), params_rate(params),
125 params_format(params));
126
127
128 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) {
129 if (params_channels(params) == 1)
130 psc_dma->slots |= 0x00000100;
131 else
132 psc_dma->slots |= 0x00000300;
133 } else {
134 if (params_channels(params) == 1)
135 psc_dma->slots |= 0x01000000;
136 else
137 psc_dma->slots |= 0x03000000;
138 }
139 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
140
141 return 0;
142}
143
144static int psc_ac97_hw_digital_params(struct snd_pcm_substream *substream,
145 struct snd_pcm_hw_params *params,
146 struct snd_soc_dai *cpu_dai)
147{
148 struct psc_dma *psc_dma = cpu_dai->private_data;
149
150 if (params_channels(params) == 1)
151 out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000);
152 else
153 out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000);
154
155 return 0;
156}
157
158static int psc_ac97_trigger(struct snd_pcm_substream *substream, int cmd,
159 struct snd_soc_dai *dai)
160{
161 struct snd_soc_pcm_runtime *rtd = substream->private_data;
162 struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
163
164 switch (cmd) {
165 case SNDRV_PCM_TRIGGER_STOP:
166 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
167 psc_dma->slots &= 0xFFFF0000;
168 else
169 psc_dma->slots &= 0x0000FFFF;
170
171 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
172 break;
173 }
174 return 0;
175}
176
177static int psc_ac97_probe(struct platform_device *pdev,
178 struct snd_soc_dai *cpu_dai)
179{
180 struct psc_dma *psc_dma = cpu_dai->private_data;
181 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
182
183 /* Go */
184 out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
185 return 0;
186}
187
188/* ---------------------------------------------------------------------
189 * ALSA SoC Bindings
190 *
191 * - Digital Audio Interface (DAI) template
192 * - create/destroy dai hooks
193 */
194
195/**
196 * psc_ac97_dai_template: template CPU Digital Audio Interface
197 */
198static struct snd_soc_dai_ops psc_ac97_analog_ops = {
199 .hw_params = psc_ac97_hw_analog_params,
200 .trigger = psc_ac97_trigger,
201};
202
203static struct snd_soc_dai_ops psc_ac97_digital_ops = {
204 .hw_params = psc_ac97_hw_digital_params,
205};
206
207struct snd_soc_dai psc_ac97_dai[] = {
208{
209 .name = "AC97",
210 .ac97_control = 1,
211 .probe = psc_ac97_probe,
212 .playback = {
213 .channels_min = 1,
214 .channels_max = 6,
215 .rates = SNDRV_PCM_RATE_8000_48000,
216 .formats = SNDRV_PCM_FMTBIT_S32_BE,
217 },
218 .capture = {
219 .channels_min = 1,
220 .channels_max = 2,
221 .rates = SNDRV_PCM_RATE_8000_48000,
222 .formats = SNDRV_PCM_FMTBIT_S32_BE,
223 },
224 .ops = &psc_ac97_analog_ops,
225},
226{
227 .name = "SPDIF",
228 .ac97_control = 1,
229 .playback = {
230 .channels_min = 1,
231 .channels_max = 2,
232 .rates = SNDRV_PCM_RATE_32000 | \
233 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
234 .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE,
235 },
236 .ops = &psc_ac97_digital_ops,
237} };
238EXPORT_SYMBOL_GPL(psc_ac97_dai);
239
240
241
242/* ---------------------------------------------------------------------
243 * OF platform bus binding code:
244 * - Probe/remove operations
245 * - OF device match table
246 */
247static int __devinit psc_ac97_of_probe(struct of_device *op,
248 const struct of_device_id *match)
249{
250 int rc, i;
251 struct snd_ac97 ac97;
252 struct mpc52xx_psc __iomem *regs;
253
254 rc = mpc5200_audio_dma_create(op);
255 if (rc != 0)
256 return rc;
257
258 for (i = 0; i < ARRAY_SIZE(psc_ac97_dai); i++)
259 psc_ac97_dai[i].dev = &op->dev;
260
261 rc = snd_soc_register_dais(psc_ac97_dai, ARRAY_SIZE(psc_ac97_dai));
262 if (rc != 0) {
263 dev_err(&op->dev, "Failed to register DAI\n");
264 return rc;
265 }
266
267 psc_dma = dev_get_drvdata(&op->dev);
268 regs = psc_dma->psc_regs;
269 ac97.private_data = psc_dma;
270
271 for (i = 0; i < ARRAY_SIZE(psc_ac97_dai); i++)
272 psc_ac97_dai[i].private_data = psc_dma;
273
274 psc_dma->imr = 0;
275 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
276
277 /* Configure the serial interface mode to AC97 */
278 psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97;
279 out_be32(&regs->sicr, psc_dma->sicr);
280
281 /* No slots active */
282 out_be32(&regs->ac97_slots, 0x00000000);
283
284 return 0;
285}
286
287static int __devexit psc_ac97_of_remove(struct of_device *op)
288{
289 return mpc5200_audio_dma_destroy(op);
290}
291
292/* Match table for of_platform binding */
293static struct of_device_id psc_ac97_match[] __devinitdata = {
294 { .compatible = "fsl,mpc5200-psc-ac97", },
295 { .compatible = "fsl,mpc5200b-psc-ac97", },
296 {}
297};
298MODULE_DEVICE_TABLE(of, psc_ac97_match);
299
300static struct of_platform_driver psc_ac97_driver = {
301 .match_table = psc_ac97_match,
302 .probe = psc_ac97_of_probe,
303 .remove = __devexit_p(psc_ac97_of_remove),
304 .driver = {
305 .name = "mpc5200-psc-ac97",
306 .owner = THIS_MODULE,
307 },
308};
309
310/* ---------------------------------------------------------------------
311 * Module setup and teardown; simply register the of_platform driver
312 * for the PSC in AC97 mode.
313 */
314static int __init psc_ac97_init(void)
315{
316 return of_register_platform_driver(&psc_ac97_driver);
317}
318module_init(psc_ac97_init);
319
320static void __exit psc_ac97_exit(void)
321{
322 of_unregister_platform_driver(&psc_ac97_driver);
323}
324module_exit(psc_ac97_exit);
325
326MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
327MODULE_DESCRIPTION("mpc5200 AC97 module");
328MODULE_LICENSE("GPL");
329