blob: dccdde96cfed289379266b0aed54b004075aa75a [file] [log] [blame]
Russell Kinga09e64f2008-08-05 16:14:15 +01001/* arch/arm/mach-msm/include/mach/board.h
2 *
3 * Copyright (C) 2007 Google, Inc.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
Russell Kinga09e64f2008-08-05 16:14:15 +01005 * Author: Brian Swetland <swetland@google.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#ifndef __ASM_ARCH_MSM_BOARD_H
19#define __ASM_ARCH_MSM_BOARD_H
20
21#include <linux/types.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/input.h>
23#include <linux/usb.h>
24#include <linux/leds-pmic8058.h>
25#include <linux/clkdev.h>
26#include <linux/msm_ssbi.h>
27#ifdef CONFIG_MSM_BUS_SCALING
28#include <mach/msm_bus.h>
29#endif
Russell Kinga09e64f2008-08-05 16:14:15 +010030
31/* platform device data structures */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070032struct msm_acpu_clock_platform_data {
Daniel Walker43b39f92010-03-03 08:54:11 -080033 uint32_t acpu_switch_time_us;
34 uint32_t max_speed_delta_khz;
35 uint32_t vdd_switch_time_us;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070036 unsigned int max_axi_khz;
37 unsigned int max_vdd;
38 int (*acpu_set_vdd) (int mvolts);
Daniel Walker43b39f92010-03-03 08:54:11 -080039};
40
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070041struct msm_camera_io_ext {
42 uint32_t mdcphy;
43 uint32_t mdcsz;
44 uint32_t appphy;
45 uint32_t appsz;
46 uint32_t camifpadphy;
47 uint32_t camifpadsz;
48 uint32_t csiphy;
49 uint32_t csisz;
50 uint32_t csiirq;
51 uint32_t csiphyphy;
52 uint32_t csiphysz;
53 uint32_t csiphyirq;
54 uint32_t ispifphy;
55 uint32_t ispifsz;
56 uint32_t ispifirq;
57};
58
59struct msm_camera_io_clk {
60 uint32_t mclk_clk_rate;
61 uint32_t vfe_clk_rate;
62};
63
64struct msm_camera_device_platform_data {
65 int (*camera_gpio_on) (void);
66 void (*camera_gpio_off)(void);
67 struct msm_camera_io_ext ioext;
68 struct msm_camera_io_clk ioclk;
69 uint8_t csid_core;
70#ifdef CONFIG_MSM_BUS_SCALING
71 struct msm_bus_scale_pdata *cam_bus_scale_table;
72#endif
73};
74enum msm_camera_csi_data_format {
75 CSI_8BIT,
76 CSI_10BIT,
77 CSI_12BIT,
78};
79struct msm_camera_csi_params {
80 enum msm_camera_csi_data_format data_format;
81 uint8_t lane_cnt;
82 uint8_t lane_assign;
83 uint8_t settle_cnt;
84 uint8_t dpcm_scheme;
85};
86
87#ifdef CONFIG_SENSORS_MT9T013
88struct msm_camera_legacy_device_platform_data {
89 int sensor_reset;
90 int sensor_pwd;
91 int vcm_pwd;
92 void (*config_gpio_on) (void);
93 void (*config_gpio_off)(void);
94};
95#endif
96
97#define MSM_CAMERA_FLASH_NONE 0
98#define MSM_CAMERA_FLASH_LED 1
99
100#define MSM_CAMERA_FLASH_SRC_PMIC (0x00000001<<0)
101#define MSM_CAMERA_FLASH_SRC_PWM (0x00000001<<1)
102#define MSM_CAMERA_FLASH_SRC_CURRENT_DRIVER (0x00000001<<2)
103
104struct msm_camera_sensor_flash_pmic {
105 uint8_t num_of_src;
106 uint32_t low_current;
107 uint32_t high_current;
108 enum pmic8058_leds led_src_1;
109 enum pmic8058_leds led_src_2;
110 int (*pmic_set_current)(enum pmic8058_leds id, unsigned mA);
111};
112
113struct msm_camera_sensor_flash_pwm {
114 uint32_t freq;
115 uint32_t max_load;
116 uint32_t low_load;
117 uint32_t high_load;
118 uint32_t channel;
119};
120
121struct pmic8058_leds_platform_data;
122struct msm_camera_sensor_flash_current_driver {
123 uint32_t low_current;
124 uint32_t high_current;
125 const struct pmic8058_leds_platform_data *driver_channel;
126 uint32_t led1;
127 uint32_t led2;
128};
129
130struct msm_camera_sensor_flash_src {
131 int flash_sr_type;
132
133 union {
134 struct msm_camera_sensor_flash_pmic pmic_src;
135 struct msm_camera_sensor_flash_pwm pwm_src;
136 struct msm_camera_sensor_flash_current_driver
137 current_driver_src;
138 } _fsrc;
139};
140
141struct msm_camera_sensor_flash_data {
142 int flash_type;
143 struct msm_camera_sensor_flash_src *flash_src;
144};
145
146struct msm_camera_sensor_strobe_flash_data {
147 uint8_t flash_trigger;
148 uint8_t flash_charge; /* pin for charge */
149 uint8_t flash_charge_done;
150 uint32_t flash_recharge_duration;
151 uint32_t irq;
152 spinlock_t spin_lock;
153 spinlock_t timer_lock;
154 int state;
155};
156
157struct msm_camera_sensor_platform_info {
158 int mount_angle;
159};
160
161struct msm_camera_sensor_info {
162 const char *sensor_name;
163 int sensor_reset_enable;
164 int sensor_reset;
165 int sensor_pwd;
166 int vcm_pwd;
167 int vcm_enable;
168 int mclk;
169 int flash_type;
170 struct msm_camera_sensor_platform_info *sensor_platform_info;
171 struct msm_camera_device_platform_data *pdata;
172 struct resource *resource;
173 uint8_t num_resources;
174 struct msm_camera_sensor_flash_data *flash_data;
175 int csi_if;
176 struct msm_camera_csi_params csi_params;
177 struct msm_camera_sensor_strobe_flash_data *strobe_flash_data;
178 char *eeprom_data;
179};
180
181int __init msm_get_cam_resources(struct msm_camera_sensor_info *);
182
Stephen Boydbd323442011-02-23 09:37:42 -0800183struct clk_lookup;
Daniel Walker5e96da52010-05-12 13:43:28 -0700184
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700185struct snd_endpoint {
186 int id;
187 const char *name;
188};
Steve Mucklea55df6e2010-01-07 12:43:24 -0800189
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700190struct msm_snd_endpoints {
191 struct snd_endpoint *endpoints;
192 unsigned num;
193};
194
195#define MSM_MAX_DEC_CNT 14
196/* 7k target ADSP information */
197/* Bit 23:0, for codec identification like mp3, wav etc *
198 * Bit 27:24, for mode identification like tunnel, non tunnel*
199 * bit 31:28, for operation support like DM, DMA */
200enum msm_adspdec_concurrency {
201 MSM_ADSP_CODEC_WAV = 0,
202 MSM_ADSP_CODEC_ADPCM = 1,
203 MSM_ADSP_CODEC_MP3 = 2,
204 MSM_ADSP_CODEC_REALAUDIO = 3,
205 MSM_ADSP_CODEC_WMA = 4,
206 MSM_ADSP_CODEC_AAC = 5,
207 MSM_ADSP_CODEC_RESERVED = 6,
208 MSM_ADSP_CODEC_MIDI = 7,
209 MSM_ADSP_CODEC_YADPCM = 8,
210 MSM_ADSP_CODEC_QCELP = 9,
211 MSM_ADSP_CODEC_AMRNB = 10,
212 MSM_ADSP_CODEC_AMRWB = 11,
213 MSM_ADSP_CODEC_EVRC = 12,
214 MSM_ADSP_CODEC_WMAPRO = 13,
215 MSM_ADSP_MODE_TUNNEL = 24,
216 MSM_ADSP_MODE_NONTUNNEL = 25,
217 MSM_ADSP_MODE_LP = 26,
218 MSM_ADSP_OP_DMA = 28,
219 MSM_ADSP_OP_DM = 29,
220};
221
222struct msm_adspdec_info {
223 const char *module_name;
224 unsigned module_queueid;
225 int module_decid; /* objid */
226 unsigned nr_codec_support;
227};
228
229/* Carries information about number codec
230 * supported if same codec or different codecs
231 */
232struct dec_instance_table {
233 uint8_t max_instances_same_dec;
234 uint8_t max_instances_diff_dec;
235};
236
237struct msm_adspdec_database {
238 unsigned num_dec;
239 unsigned num_concurrency_support;
240 unsigned int *dec_concurrency_table; /* Bit masked entry to *
241 * represents codec, mode etc */
242 struct msm_adspdec_info *dec_info_list;
243 struct dec_instance_table *dec_instance_list;
244};
245
246enum msm_mdp_hw_revision {
247 MDP_REV_20 = 1,
248 MDP_REV_22,
249 MDP_REV_30,
250 MDP_REV_303,
251 MDP_REV_31,
252 MDP_REV_40,
253 MDP_REV_41,
254 MDP_REV_42,
255};
256
257struct msm_panel_common_pdata {
258 uintptr_t hw_revision_addr;
259 int gpio;
260 int (*backlight_level)(int level, int max, int min);
261 int (*pmic_backlight)(int level);
262 int (*panel_num)(void);
263 void (*panel_config_gpio)(int);
264 int (*vga_switch)(int select_vga);
265 int *gpio_num;
266 int mdp_core_clk_rate;
267 unsigned num_mdp_clk;
268 int *mdp_core_clk_table;
269#ifdef CONFIG_MSM_BUS_SCALING
270 struct msm_bus_scale_pdata *mdp_bus_scale_table;
271#endif
272 int mdp_rev;
273};
274
275struct lcdc_platform_data {
276 int (*lcdc_gpio_config)(int on);
277 int (*lcdc_power_save)(int);
278 unsigned int (*lcdc_get_clk)(void);
279#ifdef CONFIG_MSM_BUS_SCALING
280 struct msm_bus_scale_pdata *bus_scale_table;
281#endif
282};
283
284struct tvenc_platform_data {
285 int poll;
286 int (*pm_vid_en)(int on);
287#ifdef CONFIG_MSM_BUS_SCALING
288 struct msm_bus_scale_pdata *bus_scale_table;
289#endif
290};
291
292struct mddi_platform_data {
293 int (*mddi_power_save)(int on);
294 int (*mddi_sel_clk)(u32 *clk_rate);
295 int (*mddi_client_power)(u32 client_id);
296};
297
298struct mipi_dsi_platform_data {
299 int vsync_gpio;
300 int (*dsi_power_save)(int on);
301 int (*dsi_client_reset)(void);
302 int (*get_lane_config)(void);
303 int target_type;
304};
305
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -0700306struct mipi_dsi_panel_platform_data {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700307 int fpga_3d_config_addr;
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -0700308 int *gpio;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700309};
310
311struct msm_fb_platform_data {
312 int (*detect_client)(const char *name);
313 int mddi_prescan;
314 int (*allow_set_offset)(void);
315};
316
317struct msm_hdmi_platform_data {
318 int irq;
319 int (*cable_detect)(int insert);
320 int (*comm_power)(int on, int show);
321 int (*enable_5v)(int on);
322 int (*core_power)(int on, int show);
323 int (*cec_power)(int on);
324 int (*init_irq)(void);
325 bool (*check_hdcp_hw_support)(void);
326};
327
328struct msm_i2c_platform_data {
329 int clk_freq;
330 uint32_t rmutex;
331 const char *rsl_id;
332 uint32_t pm_lat;
333 int pri_clk;
334 int pri_dat;
335 int aux_clk;
336 int aux_dat;
337 const char *clk;
338 const char *pclk;
339 int src_clk_rate;
340 int use_gsbi_shared_mode;
341 void (*msm_i2c_config_gpio)(int iface, int config_type);
342};
343
344struct msm_i2c_ssbi_platform_data {
345 const char *rsl_id;
346 enum msm_ssbi_controller_type controller_type;
347};
348
349struct msm_vidc_platform_data {
350 int memtype;
351#ifdef CONFIG_MSM_BUS_SCALING
352 struct msm_bus_scale_pdata *vidc_bus_client_pdata;
353#endif
354};
355
356#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
357struct isp1763_platform_data {
358 unsigned reset_gpio;
359 int (*setup_gpio)(int enable);
360};
361#endif
Russell Kinga09e64f2008-08-05 16:14:15 +0100362/* common init routines for use by arch/arm/mach-msm/board-*.c */
363
364void __init msm_add_devices(void);
365void __init msm_map_common_io(void);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700366void __init msm_map_qsd8x50_io(void);
367void __init msm_map_msm8x60_io(void);
368void __init msm_map_msm8960_io(void);
369void __init msm_map_apq8064_io(void);
370void __init msm_map_msm7x30_io(void);
371void __init msm_map_fsm9xxx_io(void);
Russell Kinga09e64f2008-08-05 16:14:15 +0100372void __init msm_init_irq(void);
Daniel Walker43b39f92010-03-03 08:54:11 -0800373void __init msm_acpu_clock_init(struct msm_acpu_clock_platform_data *);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700374
375struct mmc_platform_data;
Sahitya Tummalab5d643d2010-07-29 16:55:34 +0530376int __init msm_add_sdcc(unsigned int controller,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700377 struct mmc_platform_data *plat);
378
379struct msm_usb_host_platform_data;
380int __init msm_add_host(unsigned int host,
381 struct msm_usb_host_platform_data *plat);
382#if defined(CONFIG_USB_FUNCTION_MSM_HSUSB) \
383 || defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_MSM_72K_MODULE)
384void msm_hsusb_set_vbus_state(int online);
385#else
386static inline void msm_hsusb_set_vbus_state(int online) {}
387#endif
388
389void __init msm_snddev_init(void);
390void __init msm_snddev_init_timpani(void);
391void msm_snddev_poweramp_on(void);
392void msm_snddev_poweramp_off(void);
393void msm_snddev_hsed_voltage_on(void);
394void msm_snddev_hsed_voltage_off(void);
395void msm_snddev_tx_route_config(void);
396void msm_snddev_tx_route_deconfig(void);
397
398extern unsigned int msm_shared_ram_phys; /* defined in arch/arm/mach-msm/io.c */
399
Russell Kinga09e64f2008-08-05 16:14:15 +0100400
401#endif