Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Philips UCB1400 touchscreen driver |
| 3 | * |
| 4 | * Author: Nicolas Pitre |
| 5 | * Created: September 25, 2006 |
| 6 | * Copyright: MontaVista Software, Inc. |
| 7 | * |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 8 | * Spliting done by: Marek Vasut <marek.vasut@gmail.com> |
| 9 | * If something doesnt work and it worked before spliting, e-mail me, |
| 10 | * dont bother Nicolas please ;-) |
| 11 | * |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 12 | * This program is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of the GNU General Public License version 2 as |
| 14 | * published by the Free Software Foundation. |
| 15 | * |
| 16 | * This code is heavily based on ucb1x00-*.c copyrighted by Russell King |
| 17 | * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has |
| 18 | * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request. |
| 19 | */ |
| 20 | |
| 21 | #include <linux/module.h> |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 22 | #include <linux/init.h> |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 23 | #include <linux/completion.h> |
| 24 | #include <linux/delay.h> |
| 25 | #include <linux/input.h> |
| 26 | #include <linux/device.h> |
| 27 | #include <linux/interrupt.h> |
| 28 | #include <linux/suspend.h> |
| 29 | #include <linux/slab.h> |
| 30 | #include <linux/kthread.h> |
Dmitry Torokhov | bff19b1 | 2006-12-08 01:37:03 -0500 | [diff] [blame] | 31 | #include <linux/freezer.h> |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 32 | #include <linux/ucb1400.h> |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 33 | |
| 34 | static int adcsync; |
Cliff Brake | b5b16c5 | 2007-04-12 01:35:43 -0400 | [diff] [blame] | 35 | static int ts_delay = 55; /* us */ |
| 36 | static int ts_delay_pressure; /* us */ |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 37 | |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 38 | /* Switch to interrupt mode. */ |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 39 | static inline void ucb1400_ts_mode_int(struct snd_ac97 *ac97) |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 40 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 41 | ucb1400_reg_write(ac97, UCB_TS_CR, |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 42 | UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | |
| 43 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | |
| 44 | UCB_TS_CR_MODE_INT); |
| 45 | } |
| 46 | |
| 47 | /* |
| 48 | * Switch to pressure mode, and read pressure. We don't need to wait |
| 49 | * here, since both plates are being driven. |
| 50 | */ |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 51 | static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400_ts *ucb) |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 52 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 53 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 54 | UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | |
| 55 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | |
| 56 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
Cliff Brake | b5b16c5 | 2007-04-12 01:35:43 -0400 | [diff] [blame] | 57 | udelay(ts_delay_pressure); |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 58 | return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 59 | } |
| 60 | |
| 61 | /* |
| 62 | * Switch to X position mode and measure Y plate. We switch the plate |
| 63 | * configuration in pressure mode, then switch to position mode. This |
| 64 | * gives a faster response time. Even so, we need to wait about 55us |
| 65 | * for things to stabilise. |
| 66 | */ |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 67 | static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400_ts *ucb) |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 68 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 69 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 70 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | |
| 71 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 72 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 73 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | |
| 74 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 75 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 76 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | |
| 77 | UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); |
| 78 | |
Cliff Brake | b5b16c5 | 2007-04-12 01:35:43 -0400 | [diff] [blame] | 79 | udelay(ts_delay); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 80 | |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 81 | return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 82 | } |
| 83 | |
| 84 | /* |
| 85 | * Switch to Y position mode and measure X plate. We switch the plate |
| 86 | * configuration in pressure mode, then switch to position mode. This |
| 87 | * gives a faster response time. Even so, we need to wait about 55us |
| 88 | * for things to stabilise. |
| 89 | */ |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 90 | static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400_ts *ucb) |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 91 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 92 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 93 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | |
| 94 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 95 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 96 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | |
| 97 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 98 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 99 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | |
| 100 | UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); |
| 101 | |
Cliff Brake | b5b16c5 | 2007-04-12 01:35:43 -0400 | [diff] [blame] | 102 | udelay(ts_delay); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 103 | |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 104 | return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPX, adcsync); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 105 | } |
| 106 | |
| 107 | /* |
| 108 | * Switch to X plate resistance mode. Set MX to ground, PX to |
| 109 | * supply. Measure current. |
| 110 | */ |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 111 | static inline unsigned int ucb1400_ts_read_xres(struct ucb1400_ts *ucb) |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 112 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 113 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 114 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | |
| 115 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 116 | return ucb1400_adc_read(ucb->ac97, 0, adcsync); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 117 | } |
| 118 | |
| 119 | /* |
| 120 | * Switch to Y plate resistance mode. Set MY to ground, PY to |
| 121 | * supply. Measure current. |
| 122 | */ |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 123 | static inline unsigned int ucb1400_ts_read_yres(struct ucb1400_ts *ucb) |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 124 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 125 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 126 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | |
| 127 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 128 | return ucb1400_adc_read(ucb->ac97, 0, adcsync); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 129 | } |
| 130 | |
Hans J. Koch | f9c2273 | 2009-07-12 20:51:25 -0700 | [diff] [blame] | 131 | static inline int ucb1400_ts_pen_up(struct snd_ac97 *ac97) |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 132 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 133 | unsigned short val = ucb1400_reg_read(ac97, UCB_TS_CR); |
Hans J. Koch | f9c2273 | 2009-07-12 20:51:25 -0700 | [diff] [blame] | 134 | |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 135 | return val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 136 | } |
| 137 | |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 138 | static inline void ucb1400_ts_irq_enable(struct snd_ac97 *ac97) |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 139 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 140 | ucb1400_reg_write(ac97, UCB_IE_CLEAR, UCB_IE_TSPX); |
| 141 | ucb1400_reg_write(ac97, UCB_IE_CLEAR, 0); |
| 142 | ucb1400_reg_write(ac97, UCB_IE_FAL, UCB_IE_TSPX); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 143 | } |
| 144 | |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 145 | static inline void ucb1400_ts_irq_disable(struct snd_ac97 *ac97) |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 146 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 147 | ucb1400_reg_write(ac97, UCB_IE_FAL, 0); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 148 | } |
| 149 | |
| 150 | static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y) |
| 151 | { |
| 152 | input_report_abs(idev, ABS_X, x); |
| 153 | input_report_abs(idev, ABS_Y, y); |
| 154 | input_report_abs(idev, ABS_PRESSURE, pressure); |
Mike Rapoport | cd2d64b | 2009-03-04 01:12:49 -0800 | [diff] [blame] | 155 | input_report_key(idev, BTN_TOUCH, 1); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 156 | input_sync(idev); |
| 157 | } |
| 158 | |
| 159 | static void ucb1400_ts_event_release(struct input_dev *idev) |
| 160 | { |
| 161 | input_report_abs(idev, ABS_PRESSURE, 0); |
Mike Rapoport | cd2d64b | 2009-03-04 01:12:49 -0800 | [diff] [blame] | 162 | input_report_key(idev, BTN_TOUCH, 0); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 163 | input_sync(idev); |
| 164 | } |
| 165 | |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 166 | static void ucb1400_handle_pending_irq(struct ucb1400_ts *ucb) |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 167 | { |
| 168 | unsigned int isr; |
| 169 | |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 170 | isr = ucb1400_reg_read(ucb->ac97, UCB_IE_STATUS); |
| 171 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, isr); |
| 172 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 173 | |
Pavel Revak | 9b2fb2d | 2009-08-20 22:30:54 -0700 | [diff] [blame] | 174 | if (isr & UCB_IE_TSPX) |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 175 | ucb1400_ts_irq_disable(ucb->ac97); |
Pavel Revak | 9b2fb2d | 2009-08-20 22:30:54 -0700 | [diff] [blame] | 176 | else |
| 177 | dev_dbg(&ucb->ts_idev->dev, "ucb1400: unexpected IE_STATUS = %#x\n", isr); |
| 178 | enable_irq(ucb->irq); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 179 | } |
| 180 | |
| 181 | static int ucb1400_ts_thread(void *_ucb) |
| 182 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 183 | struct ucb1400_ts *ucb = _ucb; |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 184 | struct task_struct *tsk = current; |
| 185 | int valid = 0; |
Satoru Takeuchi | c130bdb | 2007-05-14 23:52:07 -0400 | [diff] [blame] | 186 | struct sched_param param = { .sched_priority = 1 }; |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 187 | |
Satoru Takeuchi | c130bdb | 2007-05-14 23:52:07 -0400 | [diff] [blame] | 188 | sched_setscheduler(tsk, SCHED_FIFO, ¶m); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 189 | |
Rafael J. Wysocki | 8314418 | 2007-07-17 04:03:35 -0700 | [diff] [blame] | 190 | set_freezable(); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 191 | while (!kthread_should_stop()) { |
| 192 | unsigned int x, y, p; |
| 193 | long timeout; |
| 194 | |
| 195 | ucb->ts_restart = 0; |
| 196 | |
| 197 | if (ucb->irq_pending) { |
| 198 | ucb->irq_pending = 0; |
| 199 | ucb1400_handle_pending_irq(ucb); |
| 200 | } |
| 201 | |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 202 | ucb1400_adc_enable(ucb->ac97); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 203 | x = ucb1400_ts_read_xpos(ucb); |
| 204 | y = ucb1400_ts_read_ypos(ucb); |
| 205 | p = ucb1400_ts_read_pressure(ucb); |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 206 | ucb1400_adc_disable(ucb->ac97); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 207 | |
| 208 | /* Switch back to interrupt mode. */ |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 209 | ucb1400_ts_mode_int(ucb->ac97); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 210 | |
| 211 | msleep(10); |
| 212 | |
Hans J. Koch | f9c2273 | 2009-07-12 20:51:25 -0700 | [diff] [blame] | 213 | if (ucb1400_ts_pen_up(ucb->ac97)) { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 214 | ucb1400_ts_irq_enable(ucb->ac97); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 215 | |
| 216 | /* |
| 217 | * If we spat out a valid sample set last time, |
| 218 | * spit out a "pen off" sample here. |
| 219 | */ |
| 220 | if (valid) { |
| 221 | ucb1400_ts_event_release(ucb->ts_idev); |
| 222 | valid = 0; |
| 223 | } |
| 224 | |
| 225 | timeout = MAX_SCHEDULE_TIMEOUT; |
| 226 | } else { |
| 227 | valid = 1; |
| 228 | ucb1400_ts_evt_add(ucb->ts_idev, p, x, y); |
| 229 | timeout = msecs_to_jiffies(10); |
| 230 | } |
| 231 | |
Rafael J. Wysocki | e42837b | 2007-10-18 03:04:45 -0700 | [diff] [blame] | 232 | wait_event_freezable_timeout(ucb->ts_wait, |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 233 | ucb->irq_pending || ucb->ts_restart || |
| 234 | kthread_should_stop(), timeout); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 235 | } |
| 236 | |
| 237 | /* Send the "pen off" if we are stopping with the pen still active */ |
| 238 | if (valid) |
| 239 | ucb1400_ts_event_release(ucb->ts_idev); |
| 240 | |
| 241 | ucb->ts_task = NULL; |
| 242 | return 0; |
| 243 | } |
| 244 | |
| 245 | /* |
| 246 | * A restriction with interrupts exists when using the ucb1400, as |
| 247 | * the codec read/write routines may sleep while waiting for codec |
| 248 | * access completion and uses semaphores for access control to the |
| 249 | * AC97 bus. A complete codec read cycle could take anywhere from |
| 250 | * 60 to 100uSec so we *definitely* don't want to spin inside the |
| 251 | * interrupt handler waiting for codec access. So, we handle the |
| 252 | * interrupt by scheduling a RT kernel thread to run in process |
| 253 | * context instead of interrupt context. |
| 254 | */ |
| 255 | static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid) |
| 256 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 257 | struct ucb1400_ts *ucb = devid; |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 258 | |
| 259 | if (irqnr == ucb->irq) { |
Ben Nizette | 3deb649 | 2009-04-17 20:35:58 -0700 | [diff] [blame] | 260 | disable_irq_nosync(ucb->irq); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 261 | ucb->irq_pending = 1; |
| 262 | wake_up(&ucb->ts_wait); |
| 263 | return IRQ_HANDLED; |
| 264 | } |
| 265 | return IRQ_NONE; |
| 266 | } |
| 267 | |
| 268 | static int ucb1400_ts_open(struct input_dev *idev) |
| 269 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 270 | struct ucb1400_ts *ucb = input_get_drvdata(idev); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 271 | int ret = 0; |
| 272 | |
| 273 | BUG_ON(ucb->ts_task); |
| 274 | |
| 275 | ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts"); |
| 276 | if (IS_ERR(ucb->ts_task)) { |
| 277 | ret = PTR_ERR(ucb->ts_task); |
| 278 | ucb->ts_task = NULL; |
| 279 | } |
| 280 | |
| 281 | return ret; |
| 282 | } |
| 283 | |
| 284 | static void ucb1400_ts_close(struct input_dev *idev) |
| 285 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 286 | struct ucb1400_ts *ucb = input_get_drvdata(idev); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 287 | |
| 288 | if (ucb->ts_task) |
| 289 | kthread_stop(ucb->ts_task); |
| 290 | |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 291 | ucb1400_ts_irq_disable(ucb->ac97); |
| 292 | ucb1400_reg_write(ucb->ac97, UCB_TS_CR, 0); |
| 293 | } |
| 294 | |
| 295 | #ifndef NO_IRQ |
| 296 | #define NO_IRQ 0 |
| 297 | #endif |
| 298 | |
| 299 | /* |
| 300 | * Try to probe our interrupt, rather than relying on lots of |
| 301 | * hard-coded machine dependencies. |
| 302 | */ |
| 303 | static int ucb1400_ts_detect_irq(struct ucb1400_ts *ucb) |
| 304 | { |
| 305 | unsigned long mask, timeout; |
| 306 | |
| 307 | mask = probe_irq_on(); |
| 308 | |
| 309 | /* Enable the ADC interrupt. */ |
| 310 | ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, UCB_IE_ADC); |
| 311 | ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_ADC); |
| 312 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff); |
| 313 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); |
| 314 | |
| 315 | /* Cause an ADC interrupt. */ |
| 316 | ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA); |
| 317 | ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START); |
| 318 | |
| 319 | /* Wait for the conversion to complete. */ |
| 320 | timeout = jiffies + HZ/2; |
| 321 | while (!(ucb1400_reg_read(ucb->ac97, UCB_ADC_DATA) & |
| 322 | UCB_ADC_DAT_VALID)) { |
| 323 | cpu_relax(); |
| 324 | if (time_after(jiffies, timeout)) { |
| 325 | printk(KERN_ERR "ucb1400: timed out in IRQ probe\n"); |
| 326 | probe_irq_off(mask); |
| 327 | return -ENODEV; |
| 328 | } |
| 329 | } |
| 330 | ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, 0); |
| 331 | |
| 332 | /* Disable and clear interrupt. */ |
| 333 | ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, 0); |
| 334 | ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0); |
| 335 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff); |
| 336 | ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); |
| 337 | |
| 338 | /* Read triggered interrupt. */ |
| 339 | ucb->irq = probe_irq_off(mask); |
| 340 | if (ucb->irq < 0 || ucb->irq == NO_IRQ) |
| 341 | return -ENODEV; |
| 342 | |
| 343 | return 0; |
| 344 | } |
| 345 | |
| 346 | static int ucb1400_ts_probe(struct platform_device *dev) |
| 347 | { |
| 348 | int error, x_res, y_res; |
Marek Vasut | 1700f5f | 2009-08-20 22:05:53 -0700 | [diff] [blame] | 349 | u16 fcsr; |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 350 | struct ucb1400_ts *ucb = dev->dev.platform_data; |
| 351 | |
| 352 | ucb->ts_idev = input_allocate_device(); |
| 353 | if (!ucb->ts_idev) { |
| 354 | error = -ENOMEM; |
| 355 | goto err; |
| 356 | } |
| 357 | |
| 358 | error = ucb1400_ts_detect_irq(ucb); |
| 359 | if (error) { |
| 360 | printk(KERN_ERR "UCB1400: IRQ probe failed\n"); |
| 361 | goto err_free_devs; |
| 362 | } |
| 363 | |
| 364 | init_waitqueue_head(&ucb->ts_wait); |
| 365 | |
| 366 | error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING, |
| 367 | "UCB1400", ucb); |
| 368 | if (error) { |
| 369 | printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n", |
| 370 | ucb->irq, error); |
| 371 | goto err_free_devs; |
| 372 | } |
| 373 | printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq); |
| 374 | |
| 375 | input_set_drvdata(ucb->ts_idev, ucb); |
| 376 | |
| 377 | ucb->ts_idev->dev.parent = &dev->dev; |
| 378 | ucb->ts_idev->name = "UCB1400 touchscreen interface"; |
| 379 | ucb->ts_idev->id.vendor = ucb1400_reg_read(ucb->ac97, |
| 380 | AC97_VENDOR_ID1); |
| 381 | ucb->ts_idev->id.product = ucb->id; |
| 382 | ucb->ts_idev->open = ucb1400_ts_open; |
| 383 | ucb->ts_idev->close = ucb1400_ts_close; |
Mike Rapoport | cd2d64b | 2009-03-04 01:12:49 -0800 | [diff] [blame] | 384 | ucb->ts_idev->evbit[0] = BIT_MASK(EV_ABS) | BIT_MASK(EV_KEY); |
| 385 | ucb->ts_idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 386 | |
Marek Vasut | 1700f5f | 2009-08-20 22:05:53 -0700 | [diff] [blame] | 387 | /* |
| 388 | * Enable ADC filter to prevent horrible jitter on Colibri. |
| 389 | * This also further reduces jitter on boards where ADCSYNC |
| 390 | * pin is connected. |
| 391 | */ |
| 392 | fcsr = ucb1400_reg_read(ucb->ac97, UCB_FCSR); |
| 393 | ucb1400_reg_write(ucb->ac97, UCB_FCSR, fcsr | UCB_FCSR_AVE); |
| 394 | |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 395 | ucb1400_adc_enable(ucb->ac97); |
| 396 | x_res = ucb1400_ts_read_xres(ucb); |
| 397 | y_res = ucb1400_ts_read_yres(ucb); |
| 398 | ucb1400_adc_disable(ucb->ac97); |
| 399 | printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res); |
| 400 | |
| 401 | input_set_abs_params(ucb->ts_idev, ABS_X, 0, x_res, 0, 0); |
| 402 | input_set_abs_params(ucb->ts_idev, ABS_Y, 0, y_res, 0, 0); |
| 403 | input_set_abs_params(ucb->ts_idev, ABS_PRESSURE, 0, 0, 0, 0); |
| 404 | |
| 405 | error = input_register_device(ucb->ts_idev); |
| 406 | if (error) |
| 407 | goto err_free_irq; |
| 408 | |
| 409 | return 0; |
| 410 | |
| 411 | err_free_irq: |
| 412 | free_irq(ucb->irq, ucb); |
| 413 | err_free_devs: |
| 414 | input_free_device(ucb->ts_idev); |
| 415 | err: |
| 416 | return error; |
| 417 | |
| 418 | } |
| 419 | |
| 420 | static int ucb1400_ts_remove(struct platform_device *dev) |
| 421 | { |
| 422 | struct ucb1400_ts *ucb = dev->dev.platform_data; |
| 423 | |
| 424 | free_irq(ucb->irq, ucb); |
| 425 | input_unregister_device(ucb->ts_idev); |
| 426 | return 0; |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 427 | } |
| 428 | |
| 429 | #ifdef CONFIG_PM |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 430 | static int ucb1400_ts_resume(struct platform_device *dev) |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 431 | { |
Manuel Traut | 346a850 | 2009-05-27 06:20:05 -0700 | [diff] [blame] | 432 | struct ucb1400_ts *ucb = dev->dev.platform_data; |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 433 | |
| 434 | if (ucb->ts_task) { |
| 435 | /* |
| 436 | * Restart the TS thread to ensure the |
| 437 | * TS interrupt mode is set up again |
| 438 | * after sleep. |
| 439 | */ |
| 440 | ucb->ts_restart = 1; |
| 441 | wake_up(&ucb->ts_wait); |
| 442 | } |
| 443 | return 0; |
| 444 | } |
| 445 | #else |
| 446 | #define ucb1400_ts_resume NULL |
| 447 | #endif |
| 448 | |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 449 | static struct platform_driver ucb1400_ts_driver = { |
| 450 | .probe = ucb1400_ts_probe, |
| 451 | .remove = ucb1400_ts_remove, |
| 452 | .resume = ucb1400_ts_resume, |
| 453 | .driver = { |
| 454 | .name = "ucb1400_ts", |
| 455 | }, |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 456 | }; |
| 457 | |
| 458 | static int __init ucb1400_ts_init(void) |
| 459 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 460 | return platform_driver_register(&ucb1400_ts_driver); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 461 | } |
| 462 | |
| 463 | static void __exit ucb1400_ts_exit(void) |
| 464 | { |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 465 | platform_driver_unregister(&ucb1400_ts_driver); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 466 | } |
| 467 | |
Cliff Brake | b5b16c5 | 2007-04-12 01:35:43 -0400 | [diff] [blame] | 468 | module_param(adcsync, bool, 0444); |
| 469 | MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin."); |
| 470 | |
| 471 | module_param(ts_delay, int, 0444); |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 472 | MODULE_PARM_DESC(ts_delay, "Delay between panel setup and" |
| 473 | " position read. Default = 55us."); |
Cliff Brake | b5b16c5 | 2007-04-12 01:35:43 -0400 | [diff] [blame] | 474 | |
| 475 | module_param(ts_delay_pressure, int, 0444); |
| 476 | MODULE_PARM_DESC(ts_delay_pressure, |
Marek Vašut | d9105c2 | 2008-08-03 21:34:08 +0100 | [diff] [blame] | 477 | "delay between panel setup and pressure read." |
| 478 | " Default = 0us."); |
Nicolas Pitre | f40219b | 2006-11-17 01:07:26 -0500 | [diff] [blame] | 479 | |
| 480 | module_init(ucb1400_ts_init); |
| 481 | module_exit(ucb1400_ts_exit); |
| 482 | |
| 483 | MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver"); |
| 484 | MODULE_LICENSE("GPL"); |