Ian Molton | 1f19201 | 2008-07-15 15:09:43 +0100 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * Toshiba T7L66XB core mfd support |
| 4 | * |
| 5 | * Copyright (c) 2005, 2007, 2008 Ian Molton |
| 6 | * Copyright (c) 2008 Dmitry Baryshkov |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * T7L66 features: |
| 13 | * |
| 14 | * Supported in this driver: |
| 15 | * SD/MMC |
| 16 | * SM/NAND flash controller |
| 17 | * |
| 18 | * As yet not supported |
| 19 | * GPIO interface (on NAND pins) |
| 20 | * Serial interface |
| 21 | * TFT 'interface converter' |
| 22 | * PCMCIA interface logic |
| 23 | */ |
| 24 | |
| 25 | #include <linux/kernel.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/io.h> |
| 28 | #include <linux/irq.h> |
| 29 | #include <linux/platform_device.h> |
| 30 | #include <linux/mfd/core.h> |
| 31 | #include <linux/mfd/tmio.h> |
| 32 | #include <linux/mfd/t7l66xb.h> |
| 33 | |
| 34 | enum { |
| 35 | T7L66XB_CELL_NAND, |
| 36 | T7L66XB_CELL_MMC, |
| 37 | }; |
| 38 | |
| 39 | #define SCR_REVID 0x08 /* b Revision ID */ |
| 40 | #define SCR_IMR 0x42 /* b Interrupt Mask */ |
| 41 | #define SCR_DEV_CTL 0xe0 /* b Device control */ |
| 42 | #define SCR_ISR 0xe1 /* b Interrupt Status */ |
| 43 | #define SCR_GPO_OC 0xf0 /* b GPO output control */ |
| 44 | #define SCR_GPO_OS 0xf1 /* b GPO output enable */ |
| 45 | #define SCR_GPI_S 0xf2 /* w GPI status */ |
| 46 | #define SCR_APDC 0xf8 /* b Active pullup down ctrl */ |
| 47 | |
| 48 | #define SCR_DEV_CTL_USB BIT(0) /* USB enable */ |
| 49 | #define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */ |
| 50 | |
| 51 | /*--------------------------------------------------------------------------*/ |
| 52 | |
| 53 | struct t7l66xb { |
| 54 | void __iomem *scr; |
| 55 | /* Lock to protect registers requiring read/modify/write ops. */ |
| 56 | spinlock_t lock; |
| 57 | |
| 58 | struct resource rscr; |
| 59 | int irq; |
| 60 | int irq_base; |
| 61 | }; |
| 62 | |
| 63 | /*--------------------------------------------------------------------------*/ |
| 64 | |
| 65 | static int t7l66xb_mmc_enable(struct platform_device *mmc) |
| 66 | { |
| 67 | struct platform_device *dev = to_platform_device(mmc->dev.parent); |
| 68 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; |
| 69 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
| 70 | unsigned long flags; |
| 71 | u8 dev_ctl; |
| 72 | |
| 73 | if (pdata->enable_clk32k) |
| 74 | pdata->enable_clk32k(dev); |
| 75 | |
| 76 | spin_lock_irqsave(&t7l66xb->lock, flags); |
| 77 | |
| 78 | dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); |
| 79 | dev_ctl |= SCR_DEV_CTL_MMC; |
| 80 | tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); |
| 81 | |
| 82 | spin_unlock_irqrestore(&t7l66xb->lock, flags); |
| 83 | |
| 84 | return 0; |
| 85 | } |
| 86 | |
| 87 | static int t7l66xb_mmc_disable(struct platform_device *mmc) |
| 88 | { |
| 89 | struct platform_device *dev = to_platform_device(mmc->dev.parent); |
| 90 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; |
| 91 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
| 92 | unsigned long flags; |
| 93 | u8 dev_ctl; |
| 94 | |
| 95 | spin_lock_irqsave(&t7l66xb->lock, flags); |
| 96 | |
| 97 | dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); |
| 98 | dev_ctl &= ~SCR_DEV_CTL_MMC; |
| 99 | tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); |
| 100 | |
| 101 | spin_unlock_irqrestore(&t7l66xb->lock, flags); |
| 102 | |
| 103 | if (pdata->disable_clk32k) |
| 104 | pdata->disable_clk32k(dev); |
| 105 | |
| 106 | return 0; |
| 107 | } |
| 108 | |
| 109 | /*--------------------------------------------------------------------------*/ |
| 110 | |
| 111 | const static struct resource t7l66xb_mmc_resources[] = { |
| 112 | { |
| 113 | .start = 0x800, |
| 114 | .end = 0x9ff, |
| 115 | .flags = IORESOURCE_MEM, |
| 116 | }, |
| 117 | { |
| 118 | .start = 0x200, |
| 119 | .end = 0x2ff, |
| 120 | .flags = IORESOURCE_MEM, |
| 121 | }, |
| 122 | { |
| 123 | .start = IRQ_T7L66XB_MMC, |
| 124 | .end = IRQ_T7L66XB_MMC, |
| 125 | .flags = IORESOURCE_IRQ, |
| 126 | }, |
| 127 | }; |
| 128 | |
| 129 | const static struct resource t7l66xb_nand_resources[] = { |
| 130 | { |
| 131 | .start = 0xc00, |
| 132 | .end = 0xc07, |
| 133 | .flags = IORESOURCE_MEM, |
| 134 | }, |
| 135 | { |
| 136 | .start = 0x0100, |
| 137 | .end = 0x01ff, |
| 138 | .flags = IORESOURCE_MEM, |
| 139 | }, |
| 140 | { |
| 141 | .start = IRQ_T7L66XB_NAND, |
| 142 | .end = IRQ_T7L66XB_NAND, |
| 143 | .flags = IORESOURCE_IRQ, |
| 144 | }, |
| 145 | }; |
| 146 | |
| 147 | static struct mfd_cell t7l66xb_cells[] = { |
| 148 | [T7L66XB_CELL_MMC] = { |
| 149 | .name = "tmio-mmc", |
| 150 | .enable = t7l66xb_mmc_enable, |
| 151 | .disable = t7l66xb_mmc_disable, |
| 152 | .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources), |
| 153 | .resources = t7l66xb_mmc_resources, |
| 154 | }, |
| 155 | [T7L66XB_CELL_NAND] = { |
| 156 | .name = "tmio-nand", |
| 157 | .num_resources = ARRAY_SIZE(t7l66xb_nand_resources), |
| 158 | .resources = t7l66xb_nand_resources, |
| 159 | }, |
| 160 | }; |
| 161 | |
| 162 | /*--------------------------------------------------------------------------*/ |
| 163 | |
| 164 | /* Handle the T7L66XB interrupt mux */ |
| 165 | static void t7l66xb_irq(unsigned int irq, struct irq_desc *desc) |
| 166 | { |
| 167 | struct t7l66xb *t7l66xb = get_irq_data(irq); |
| 168 | unsigned int isr; |
| 169 | unsigned int i, irq_base; |
| 170 | |
| 171 | irq_base = t7l66xb->irq_base; |
| 172 | |
| 173 | while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) & |
| 174 | ~tmio_ioread8(t7l66xb->scr + SCR_IMR))) |
| 175 | for (i = 0; i < T7L66XB_NR_IRQS; i++) |
| 176 | if (isr & (1 << i)) |
| 177 | generic_handle_irq(irq_base + i); |
| 178 | } |
| 179 | |
| 180 | static void t7l66xb_irq_mask(unsigned int irq) |
| 181 | { |
| 182 | struct t7l66xb *t7l66xb = get_irq_chip_data(irq); |
| 183 | unsigned long flags; |
| 184 | u8 imr; |
| 185 | |
| 186 | spin_lock_irqsave(&t7l66xb->lock, flags); |
| 187 | imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); |
| 188 | imr |= 1 << (irq - t7l66xb->irq_base); |
| 189 | tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); |
| 190 | spin_unlock_irqrestore(&t7l66xb->lock, flags); |
| 191 | } |
| 192 | |
| 193 | static void t7l66xb_irq_unmask(unsigned int irq) |
| 194 | { |
| 195 | struct t7l66xb *t7l66xb = get_irq_chip_data(irq); |
| 196 | unsigned long flags; |
| 197 | u8 imr; |
| 198 | |
| 199 | spin_lock_irqsave(&t7l66xb->lock, flags); |
| 200 | imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); |
| 201 | imr &= ~(1 << (irq - t7l66xb->irq_base)); |
| 202 | tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); |
| 203 | spin_unlock_irqrestore(&t7l66xb->lock, flags); |
| 204 | } |
| 205 | |
| 206 | static struct irq_chip t7l66xb_chip = { |
| 207 | .name = "t7l66xb", |
| 208 | .ack = t7l66xb_irq_mask, |
| 209 | .mask = t7l66xb_irq_mask, |
| 210 | .unmask = t7l66xb_irq_unmask, |
| 211 | }; |
| 212 | |
| 213 | /*--------------------------------------------------------------------------*/ |
| 214 | |
| 215 | /* Install the IRQ handler */ |
| 216 | static void t7l66xb_attach_irq(struct platform_device *dev) |
| 217 | { |
| 218 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
| 219 | unsigned int irq, irq_base; |
| 220 | |
| 221 | irq_base = t7l66xb->irq_base; |
| 222 | |
| 223 | for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { |
| 224 | set_irq_chip(irq, &t7l66xb_chip); |
| 225 | set_irq_chip_data(irq, t7l66xb); |
| 226 | set_irq_handler(irq, handle_level_irq); |
| 227 | #ifdef CONFIG_ARM |
| 228 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
| 229 | #endif |
| 230 | } |
| 231 | |
| 232 | set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING); |
| 233 | set_irq_data(t7l66xb->irq, t7l66xb); |
| 234 | set_irq_chained_handler(t7l66xb->irq, t7l66xb_irq); |
| 235 | } |
| 236 | |
| 237 | static void t7l66xb_detach_irq(struct platform_device *dev) |
| 238 | { |
| 239 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
| 240 | unsigned int irq, irq_base; |
| 241 | |
| 242 | irq_base = t7l66xb->irq_base; |
| 243 | |
| 244 | set_irq_chained_handler(t7l66xb->irq, NULL); |
| 245 | set_irq_data(t7l66xb->irq, NULL); |
| 246 | |
| 247 | for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { |
| 248 | #ifdef CONFIG_ARM |
| 249 | set_irq_flags(irq, 0); |
| 250 | #endif |
| 251 | set_irq_chip(irq, NULL); |
| 252 | set_irq_chip_data(irq, NULL); |
| 253 | } |
| 254 | } |
| 255 | |
| 256 | /*--------------------------------------------------------------------------*/ |
| 257 | |
| 258 | #ifdef CONFIG_PM |
| 259 | static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state) |
| 260 | { |
| 261 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; |
| 262 | |
| 263 | if (pdata && pdata->suspend) |
| 264 | pdata->suspend(dev); |
| 265 | |
| 266 | return 0; |
| 267 | } |
| 268 | |
| 269 | static int t7l66xb_resume(struct platform_device *dev) |
| 270 | { |
| 271 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; |
| 272 | |
| 273 | if (pdata && pdata->resume) |
| 274 | pdata->resume(dev); |
| 275 | |
| 276 | return 0; |
| 277 | } |
| 278 | #else |
| 279 | #define t7l66xb_suspend NULL |
| 280 | #define t7l66xb_resume NULL |
| 281 | #endif |
| 282 | |
| 283 | /*--------------------------------------------------------------------------*/ |
| 284 | |
| 285 | static int t7l66xb_probe(struct platform_device *dev) |
| 286 | { |
| 287 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; |
| 288 | struct t7l66xb *t7l66xb; |
| 289 | struct resource *iomem, *rscr; |
| 290 | int ret; |
| 291 | |
| 292 | iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); |
| 293 | if (!iomem) |
| 294 | return -EINVAL; |
| 295 | |
| 296 | t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL); |
| 297 | if (!t7l66xb) |
| 298 | return -ENOMEM; |
| 299 | |
| 300 | spin_lock_init(&t7l66xb->lock); |
| 301 | |
| 302 | platform_set_drvdata(dev, t7l66xb); |
| 303 | |
| 304 | ret = platform_get_irq(dev, 0); |
| 305 | if (ret >= 0) |
| 306 | t7l66xb->irq = ret; |
| 307 | else |
| 308 | goto err_noirq; |
| 309 | |
| 310 | t7l66xb->irq_base = pdata->irq_base; |
| 311 | |
| 312 | rscr = &t7l66xb->rscr; |
| 313 | rscr->name = "t7l66xb-core"; |
| 314 | rscr->start = iomem->start; |
| 315 | rscr->end = iomem->start + 0xff; |
| 316 | rscr->flags = IORESOURCE_MEM; |
| 317 | |
| 318 | ret = request_resource(iomem, rscr); |
| 319 | if (ret) |
| 320 | goto err_request_scr; |
| 321 | |
| 322 | t7l66xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1); |
| 323 | if (!t7l66xb->scr) { |
| 324 | ret = -ENOMEM; |
| 325 | goto err_ioremap; |
| 326 | } |
| 327 | |
| 328 | if (pdata && pdata->enable) |
| 329 | pdata->enable(dev); |
| 330 | |
| 331 | /* Mask all interrupts */ |
| 332 | tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR); |
| 333 | |
| 334 | printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n", |
| 335 | dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID), |
| 336 | (unsigned long)iomem->start, t7l66xb->irq); |
| 337 | |
| 338 | t7l66xb_attach_irq(dev); |
| 339 | |
| 340 | t7l66xb_cells[T7L66XB_CELL_NAND].driver_data = pdata->nand_data; |
Samuel Ortiz | 56bf2bd | 2008-08-01 00:16:13 +0200 | [diff] [blame] | 341 | t7l66xb_cells[T7L66XB_CELL_NAND].platform_data = |
| 342 | &t7l66xb_cells[T7L66XB_CELL_NAND]; |
| 343 | t7l66xb_cells[T7L66XB_CELL_NAND].data_size = |
| 344 | sizeof(t7l66xb_cells[T7L66XB_CELL_NAND]); |
Ian Molton | 1f19201 | 2008-07-15 15:09:43 +0100 | [diff] [blame] | 345 | |
Ian Molton | 8a4fbe0 | 2008-08-04 18:06:18 +0200 | [diff] [blame] | 346 | t7l66xb_cells[T7L66XB_CELL_MMC].platform_data = |
| 347 | &t7l66xb_cells[T7L66XB_CELL_MMC]; |
| 348 | t7l66xb_cells[T7L66XB_CELL_MMC].data_size = |
| 349 | sizeof(t7l66xb_cells[T7L66XB_CELL_MMC]); |
| 350 | |
Samuel Ortiz | 56bf2bd | 2008-08-01 00:16:13 +0200 | [diff] [blame] | 351 | ret = mfd_add_devices(&dev->dev, dev->id, |
| 352 | t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells), |
| 353 | iomem, t7l66xb->irq_base); |
Ian Molton | 1f19201 | 2008-07-15 15:09:43 +0100 | [diff] [blame] | 354 | |
| 355 | if (!ret) |
| 356 | return 0; |
| 357 | |
| 358 | t7l66xb_detach_irq(dev); |
| 359 | iounmap(t7l66xb->scr); |
| 360 | err_ioremap: |
| 361 | release_resource(&t7l66xb->rscr); |
| 362 | err_noirq: |
| 363 | err_request_scr: |
| 364 | kfree(t7l66xb); |
| 365 | return ret; |
| 366 | } |
| 367 | |
| 368 | static int t7l66xb_remove(struct platform_device *dev) |
| 369 | { |
| 370 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; |
| 371 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
| 372 | int ret; |
| 373 | |
| 374 | ret = pdata->disable(dev); |
| 375 | |
| 376 | t7l66xb_detach_irq(dev); |
| 377 | iounmap(t7l66xb->scr); |
| 378 | release_resource(&t7l66xb->rscr); |
Samuel Ortiz | 56bf2bd | 2008-08-01 00:16:13 +0200 | [diff] [blame] | 379 | mfd_remove_devices(&dev->dev); |
Ian Molton | 1f19201 | 2008-07-15 15:09:43 +0100 | [diff] [blame] | 380 | platform_set_drvdata(dev, NULL); |
| 381 | kfree(t7l66xb); |
| 382 | |
| 383 | return ret; |
| 384 | |
| 385 | } |
| 386 | |
| 387 | static struct platform_driver t7l66xb_platform_driver = { |
| 388 | .driver = { |
| 389 | .name = "t7l66xb", |
| 390 | .owner = THIS_MODULE, |
| 391 | }, |
| 392 | .suspend = t7l66xb_suspend, |
| 393 | .resume = t7l66xb_resume, |
| 394 | .probe = t7l66xb_probe, |
| 395 | .remove = t7l66xb_remove, |
| 396 | }; |
| 397 | |
| 398 | /*--------------------------------------------------------------------------*/ |
| 399 | |
| 400 | static int __init t7l66xb_init(void) |
| 401 | { |
| 402 | int retval = 0; |
| 403 | |
| 404 | retval = platform_driver_register(&t7l66xb_platform_driver); |
| 405 | return retval; |
| 406 | } |
| 407 | |
| 408 | static void __exit t7l66xb_exit(void) |
| 409 | { |
| 410 | platform_driver_unregister(&t7l66xb_platform_driver); |
| 411 | } |
| 412 | |
| 413 | module_init(t7l66xb_init); |
| 414 | module_exit(t7l66xb_exit); |
| 415 | |
| 416 | MODULE_DESCRIPTION("Toshiba T7L66XB core driver"); |
| 417 | MODULE_LICENSE("GPL v2"); |
| 418 | MODULE_AUTHOR("Ian Molton"); |
| 419 | MODULE_ALIAS("platform:t7l66xb"); |