blob: 8be8d71102e1ca85a7e374d397aa04306887c721 [file] [log] [blame]
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -04001/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/ {
14 qcom,dsi_v2_truly_wvga_video {
15 compatible = "qcom,dsi-panel-v2";
16 label = "Truly WVGA video mode dsi panel";
17 qcom,dsi-ctrl-phandle = <&mdss_dsi0>;
18 qcom,rst-gpio = <&msmgpio 41 0>;
19 qcom,mode-selection-gpio = <&msmgpio 7 0>;
20 vdda-supply = <&pm8110_l19>;
21 vddio-supply=<&pm8110_l14>;
22 qcom,mdss-pan-res = <480 800>;
23 qcom,mdss-pan-bpp = <24>;
24 qcom,mdss-pan-dest = "display_1";
25 qcom,mdss-pan-porch-values = <40 8 160 10 2 12>;
26 qcom,mdss-pan-underflow-clr = <0xff>;
27 qcom,mdss-pan-bl-levels = <1 255>;
28 qcom,mdss-pan-bl-ctrl = "bl_ctrl_wled";
29 qcom,mdss-pan-dsi-mode = <0>;
30 qcom,mdss-pan-dsi-h-pulse-mode = <0>;
31 qcom,mdss-pan-dsi-h-power-stop = <0 0 0>;
32 qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
33 qcom,mdss-pan-dsi-traffic-mode = <1>;
34 qcom,mdss-pan-dsi-dst-format = <3>;
35 qcom,mdss-pan-dsi-vc = <0>;
36 qcom,mdss-pan-dsi-rgb-swap = <0>;
37 qcom,mdss-pan-dsi-data-lanes = <1 1 0 0>;
38 qcom,mdss-pan-dsi-dlane-swap = <0>;
39 qcom,mdss-pan-dsi-t-clk = <0x1b 0x04>;
40 qcom,mdss-pan-dsi-stream = <0>;
41 qcom,mdss-pan-dsi-mdp-tr = <0x0>;/*todo*/
42 qcom,mdss-pan-dsi-dma-tr = <0x04>;
43 qcom,mdss-pan-dsi-frame-rate = <60>;
Xiaoming Zhou412352f2013-06-28 11:06:02 -040044 qcom,panel-phy-regulatorSettings =[02 08 05 00 20 03];
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040045 qcom,panel-phy-timingSettings = [5D 12 0C 00 33 38
46 10 16 1E 03 04 00];
47 qcom,panel-phy-strengthCtrl = [ff 06];
48 qcom,panel-phy-bistCtrl = [03 03 00 00 0f 00];
49 qcom,panel-phy-laneConfig =
50 [80 45 00 00 01 66 /*lane0**/
51 80 45 00 00 01 66 /*lane1*/
52 80 45 00 00 01 66 /*lane2*/
53 80 45 00 00 01 66 /*lane3*/
54 40 67 00 00 01 88]; /*Clk*/
55
56 qcom,on-cmds-dsi-state = "DSI_LP_MODE";
57 qcom,panel-on-cmds = [
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040058 05 01 00 00 00 02
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040059 01 00
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040060 23 01 00 00 00 02
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040061 b0 04
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040062 29 01 00 00 00 03
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040063 b3 02 00
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040064 23 01 00 00 00 02
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040065 bd 00
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040066 29 01 00 00 00 03
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040067 c0 18 66
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040068 29 01 00 00 00 10
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040069 c1 23 31 99 21 20 00 30 28 0c 0c
70 00 00 00 21 01
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040071 29 01 00 00 00 07
Xiaoming Zhou9dd08082013-07-05 11:59:21 -040072 c2 00 06 06 01 03 00
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040073 29 01 00 00 00 19
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040074 c8 04 10 18 20 2e 46 3c 28 1f 18
75 10 04 04 10 18 20 2e 46 3c 28 1f 18 10 04
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040076 29 01 00 00 00 19
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040077 c9 04 10 18 20 2e 46 3c 28 1f 18
78 10 04 04 10 18 20 2e 46 3c 28 1f 18 10 04
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040079 29 01 00 00 00 19
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040080 ca 04 10 18 20 2e 46 3c 28 1f 18
81 10 04 04 10 18 20 2e 46 3c 28 1f 18 10 04
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040082 29 01 00 00 00 11
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040083 d0 29 03 ce a6 00 43 20 10 01 00
84 01 01 00 03 01 00
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040085 29 01 00 00 00 08
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040086 d1 18 0C 23 03 75 02 50
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040087 23 01 00 00 00 02
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040088 d3 11
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040089 29 01 00 00 00 03
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040090 d5 2a 2a
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040091 29 01 00 00 00 03
Xiaoming Zhou9dd08082013-07-05 11:59:21 -040092 de 01 51
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040093 23 01 00 00 00 02
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040094 e6 51
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040095 23 01 00 00 00 02
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -040096 fa 03
97 23 01 00 00 64 02
98 d6 28
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -040099 39 01 00 00 00 05
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -0400100 2a 00 00 01 df
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -0400101 39 01 00 00 00 05
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -0400102 2b 00 00 03 1f
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -0400103 15 01 00 00 00 02
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -0400104 35 00
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -0400105 39 01 00 00 00 03
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -0400106 44 00 50
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -0400107 15 01 00 00 00 02
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -0400108 36 c1
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -0400109 15 01 00 00 00 02
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -0400110 3a 77
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -0400111 05 01 00 00 7D 02
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -0400112 11 00
Xiaoming Zhoubbc2b832013-06-06 13:31:26 -0400113 05 01 00 00 14 02
Xiaoming Zhou3727c4d2013-03-29 09:24:29 -0400114 29 00
115 ];
116 qcom,panel-off-cmds = [05 01 00 00 32 02 28 00
117 05 01 00 00 78 02 10 00];
118 qcom,off-cmds-dsi-state = "DSI_LP_MODE";
119 };
120};