| Catalin Marinas | ee8c957 | 2009-05-30 14:00:17 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * arch/arm/mach-realview/include/mach/irqs-pb1176.h |
| 3 | * |
| 4 | * Copyright (C) 2008 ARM Limited |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
| 18 | * MA 02110-1301, USA. |
| 19 | */ |
| 20 | |
| 21 | #ifndef __MACH_IRQS_PB1176_H |
| 22 | #define __MACH_IRQS_PB1176_H |
| 23 | |
| 24 | #define IRQ_DC1176_GIC_START 32 |
| 25 | #define IRQ_PB1176_GIC_START 64 |
| 26 | |
| 27 | /* |
| 28 | * ARM1176 DevChip interrupt sources (primary GIC) |
| 29 | */ |
| 30 | #define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */ |
| 31 | #define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */ |
| 32 | #define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */ |
| 33 | #define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */ |
| 34 | #define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */ |
| 35 | #define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */ |
| 36 | #define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */ |
| 37 | #define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11) |
| 38 | #define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12) |
| 39 | #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) |
| 40 | #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) |
| 41 | #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ |
| 42 | #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ |
| 43 | #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ |
| 44 | #define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */ |
| 45 | #define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */ |
| 46 | |
| 47 | #define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */ |
| 48 | #define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */ |
| 49 | |
| 50 | /* |
| 51 | * RealView PB1176 interrupt sources (secondary GIC) |
| 52 | */ |
| 53 | #define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */ |
| 54 | #define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */ |
| 55 | #define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */ |
| 56 | #define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */ |
| 57 | #define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5) |
| 58 | #define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */ |
| 59 | #define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */ |
| 60 | #define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8) |
| 61 | #define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9) |
| 62 | #define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */ |
| 63 | #define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */ |
| 64 | |
| 65 | #define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16) |
| 66 | |
| 67 | #define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */ |
| 68 | |
| 69 | #define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22) |
| 70 | #define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23) |
| 71 | #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ |
| 72 | #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ |
| 73 | |
| 74 | #define IRQ_PB1176_GPIO0 -1 |
| 75 | #define IRQ_PB1176_SSP -1 |
| 76 | #define IRQ_PB1176_SCTL -1 |
| 77 | |
| 78 | #define NR_GIC_PB1176 2 |
| 79 | |
| 80 | /* |
| 81 | * Only define NR_IRQS if less than NR_IRQS_PB1176 |
| 82 | */ |
| 83 | #define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96) |
| 84 | |
| 85 | #if defined(CONFIG_MACH_REALVIEW_PB1176) |
| 86 | |
| 87 | #if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176) |
| 88 | #undef NR_IRQS |
| 89 | #define NR_IRQS NR_IRQS_PB1176 |
| 90 | #endif |
| 91 | |
| 92 | #if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176) |
| 93 | #undef MAX_GIC_NR |
| 94 | #define MAX_GIC_NR NR_GIC_PB1176 |
| 95 | #endif |
| 96 | |
| 97 | #endif /* CONFIG_MACH_REALVIEW_PB1176 */ |
| 98 | |
| 99 | #endif /* __MACH_IRQS_PB1176_H */ |