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Rohit Vaswanie897f842012-03-19 14:19:34 -07001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15
16#include <linux/dma-mapping.h>
17#include <mach/irqs.h>
18#include <mach/msm_iomap.h>
19#include <mach/dma.h>
20#include <mach/board.h>
21
22#include "devices.h"
23#include "smd_private.h"
24#include "clock-local.h"
Rohit Vaswanie897f842012-03-19 14:19:34 -070025#include "msm_watchdog.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026
27#include <asm/mach/flash.h>
28#include <asm/mach/mmc.h>
29
30/*
31 * UARTs
32 */
33
34static struct resource resources_uart1[] = {
35 {
36 .start = INT_UART1,
37 .end = INT_UART1,
38 .flags = IORESOURCE_IRQ,
39 },
40 {
41 .start = MSM_UART1_PHYS,
42 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
43 .flags = IORESOURCE_MEM,
44 },
45};
46
47struct platform_device msm_device_uart1 = {
48 .name = "msm_serial",
49 .id = 0,
50 .num_resources = ARRAY_SIZE(resources_uart1),
51 .resource = resources_uart1,
52};
53
54static struct resource resources_uart2[] = {
55 {
56 .start = INT_UART2,
57 .end = INT_UART2,
58 .flags = IORESOURCE_IRQ,
59 },
60 {
61 .start = MSM_UART2_PHYS,
62 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
63 .flags = IORESOURCE_MEM,
64 },
65};
66
67struct platform_device msm_device_uart2 = {
68 .name = "msm_serial",
69 .id = 1,
70 .num_resources = ARRAY_SIZE(resources_uart2),
71 .resource = resources_uart2,
72};
73
74/*
75 * SSBIs
76 */
77
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053078#ifdef CONFIG_MSM_SSBI
79#define MSM_SSBI1_PHYS 0x94080000
80#define MSM_SSBI_PMIC1_PHYS MSM_SSBI1_PHYS
81static struct resource msm_ssbi_pmic1_resources[] = {
82 {
83 .start = MSM_SSBI_PMIC1_PHYS,
84 .end = MSM_SSBI_PMIC1_PHYS + SZ_4K - 1,
85 .flags = IORESOURCE_MEM,
86 },
87};
88
89struct platform_device msm_device_ssbi_pmic1 = {
90 .name = "msm_ssbi",
91 .id = 0,
92 .resource = msm_ssbi_pmic1_resources,
93 .num_resources = ARRAY_SIZE(msm_ssbi_pmic1_resources),
94};
95#endif
96
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070097#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070098#define MSM_SSBI2_PHYS 0x94090000
99#define MSM_SSBI2_SIZE SZ_4K
100
101static struct resource msm_ssbi2_resources[] = {
102 {
103 .name = "ssbi_base",
104 .start = MSM_SSBI2_PHYS,
105 .end = MSM_SSBI2_PHYS + MSM_SSBI2_SIZE - 1,
106 .flags = IORESOURCE_MEM,
107 },
108};
109
110struct platform_device msm_device_ssbi2 = {
111 .name = "i2c_ssbi",
112 .id = 1,
113 .num_resources = ARRAY_SIZE(msm_ssbi2_resources),
114 .resource = msm_ssbi2_resources,
115};
116
117#define MSM_SSBI3_PHYS 0x940c0000
118#define MSM_SSBI3_SIZE SZ_4K
119
120static struct resource msm_ssbi3_resources[] = {
121 {
122 .name = "ssbi_base",
123 .start = MSM_SSBI3_PHYS,
124 .end = MSM_SSBI3_PHYS + MSM_SSBI3_SIZE - 1,
125 .flags = IORESOURCE_MEM,
126 },
127};
128
129struct platform_device msm_device_ssbi3 = {
130 .name = "i2c_ssbi",
131 .id = 2,
132 .num_resources = ARRAY_SIZE(msm_ssbi3_resources),
133 .resource = msm_ssbi3_resources,
134};
135
136#endif /* CONFIG_I2C_SSBI */
137
138/*
139 * GSBI
140 */
141
142#ifdef CONFIG_I2C_QUP
143
144#define MSM_GSBI1_PHYS 0x81200000
145#define MSM_GSBI1_QUP_PHYS 0x81a00000
146
147static struct resource gsbi1_qup_i2c_resources[] = {
148 {
149 .name = "qup_phys_addr",
150 .start = MSM_GSBI1_QUP_PHYS,
151 .end = MSM_GSBI1_QUP_PHYS + SZ_4K - 1,
152 .flags = IORESOURCE_MEM,
153 },
154 {
155 .name = "gsbi_qup_i2c_addr",
156 .start = MSM_GSBI1_PHYS,
157 .end = MSM_GSBI1_PHYS + 4 - 1,
158 .flags = IORESOURCE_MEM,
159 },
160 {
161 .name = "qup_err_intr",
162 .start = INT_GSBI_QUP_ERROR,
163 .end = INT_GSBI_QUP_ERROR,
164 .flags = IORESOURCE_IRQ,
165 },
166};
167
168struct platform_device msm_gsbi1_qup_i2c_device = {
169 .name = "qup_i2c",
170 .id = 3,
171 .num_resources = ARRAY_SIZE(gsbi1_qup_i2c_resources),
172 .resource = gsbi1_qup_i2c_resources,
173};
174
175#endif /* CONFIG_I2C_QUP */
176
177/*
178 * NAND
179 */
180
181#define MSM_NAND_PHYS 0x81600000
182#define MSM_NAND_SIZE SZ_4K
183#define MSM_EBI2_CTRL_PHYS 0x81400000
184#define MSM_EBI2_CTRL_SIZE SZ_4K
185
186static struct resource resources_nand[] = {
187 [0] = {
188 .name = "msm_nand_dmac",
189 .start = DMOV_NAND_CHAN,
190 .end = DMOV_NAND_CHAN,
191 .flags = IORESOURCE_DMA,
192 },
193 [1] = {
194 .name = "msm_nand_phys",
195 .start = MSM_NAND_PHYS,
196 .end = MSM_NAND_PHYS + MSM_NAND_SIZE - 1,
197 .flags = IORESOURCE_MEM,
198 },
199 [3] = {
200 .name = "ebi2_reg_base",
201 .start = MSM_EBI2_CTRL_PHYS,
202 .end = MSM_EBI2_CTRL_PHYS + MSM_EBI2_CTRL_SIZE - 1,
203 .flags = IORESOURCE_MEM,
204 },
205};
206
207struct flash_platform_data msm_nand_data = {
208 .parts = NULL,
209 .nr_parts = 0,
210 .interleave = 0,
211};
212
213struct platform_device msm_device_nand = {
214 .name = "msm_nand",
215 .id = -1,
216 .num_resources = ARRAY_SIZE(resources_nand),
217 .resource = resources_nand,
218 .dev = {
219 .platform_data = &msm_nand_data,
220 },
221};
222
223/*
224 * SMD
225 */
226
227struct platform_device msm_device_smd = {
228 .name = "msm_smd",
229 .id = -1,
230};
231
232/*
233 * ADM
234 */
235
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700236static struct resource msm_dmov_resource[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700237 {
238 .start = INT_ADM_AARM,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700239 .flags = IORESOURCE_IRQ,
240 },
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700241 {
242 .start = 0x94610000,
243 .end = 0x94610000 + SZ_4K - 1,
244 .flags = IORESOURCE_MEM,
245 },
246};
247
248static struct msm_dmov_pdata msm_dmov_pdata = {
249 .sd = 3,
250 .sd_size = 0x400,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700251};
252
253struct platform_device msm_device_dmov = {
254 .name = "msm_dmov",
255 .id = -1,
256 .resource = msm_dmov_resource,
257 .num_resources = ARRAY_SIZE(msm_dmov_resource),
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700258 .dev = {
259 .platform_data = &msm_dmov_pdata,
260 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700261};
262
263/*
264 * SDC
265 */
266
267#define MSM_SDC1_PHYS 0x80A00000
268#define MSM_SDC1_SIZE SZ_4K
269
270static struct resource resources_sdc1[] = {
271 {
272 .start = MSM_SDC1_PHYS,
273 .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
274 .flags = IORESOURCE_MEM,
275 },
276 {
277 .start = INT_SDC1_0,
278 .end = INT_SDC1_1,
279 .flags = IORESOURCE_IRQ,
280 },
281 {
282 .start = DMOV_SDC1_CHAN,
283 .end = DMOV_SDC1_CHAN,
284 .flags = IORESOURCE_DMA,
285 },
286};
287
288struct platform_device msm_device_sdc1 = {
289 .name = "msm_sdcc",
290 .id = 1,
291 .num_resources = ARRAY_SIZE(resources_sdc1),
292 .resource = resources_sdc1,
293 .dev = {
294 .coherent_dma_mask = 0xffffffff,
295 },
296};
297
298static struct platform_device *msm_sdcc_devices[] __initdata = {
299 &msm_device_sdc1,
300};
301
302int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)
303{
304 struct platform_device *pdev;
305
306 if (controller != 1)
307 return -EINVAL;
308
309 pdev = msm_sdcc_devices[controller-1];
310 pdev->dev.platform_data = plat;
311 return platform_device_register(pdev);
312}
313
314/*
315 * QFEC
316 */
317
318# define QFEC_MAC_IRQ INT_SBD_IRQ
319# define QFEC_MAC_BASE 0x40000000
320# define QFEC_CLK_BASE 0x94020000
321
322# define QFEC_MAC_SIZE 0x2000
323# define QFEC_CLK_SIZE 0x18100
324
325# define QFEC_MAC_FUSE_BASE 0x80004210
326# define QFEC_MAC_FUSE_SIZE 16
327
328static struct resource qfec_resources[] = {
329 [0] = {
330 .start = QFEC_MAC_BASE,
331 .end = QFEC_MAC_BASE + QFEC_MAC_SIZE,
332 .flags = IORESOURCE_MEM,
333 },
334 [1] = {
335 .start = QFEC_MAC_IRQ,
336 .end = QFEC_MAC_IRQ,
337 .flags = IORESOURCE_IRQ,
338 },
339 [2] = {
340 .start = QFEC_CLK_BASE,
341 .end = QFEC_CLK_BASE + QFEC_CLK_SIZE,
342 .flags = IORESOURCE_IO,
343 },
344 [3] = {
345 .start = QFEC_MAC_FUSE_BASE,
346 .end = QFEC_MAC_FUSE_BASE + QFEC_MAC_FUSE_SIZE,
347 .flags = IORESOURCE_DMA,
348 },
349};
350
351struct platform_device qfec_device = {
352 .name = "qfec",
353 .id = 0,
354 .num_resources = ARRAY_SIZE(qfec_resources),
355 .resource = qfec_resources,
356};
357
358/*
359 * FUSE
360 */
361
362#if defined(CONFIG_QFP_FUSE)
363
364char fuse_regulator_name[] = "8058_lvs0";
365
366struct resource qfp_fuse_resources[] = {
367 {
368 .start = (uint32_t) MSM_QFP_FUSE_BASE,
369 .end = (uint32_t) MSM_QFP_FUSE_BASE + MSM_QFP_FUSE_SIZE,
370 .flags = IORESOURCE_MEM,
371 },
372};
373
374struct platform_device fsm_qfp_fuse_device = {
375 .name = "qfp_fuse_driver",
376 .id = 0,
377 .dev = {.platform_data = fuse_regulator_name},
378 .num_resources = ARRAY_SIZE(qfp_fuse_resources),
379 .resource = qfp_fuse_resources,
380};
381
382#endif
383
Rohit Vaswani4c0d3042011-07-13 14:19:23 -0700384/*
385 * XO
386 */
387
388struct platform_device fsm_xo_device = {
389 .name = "fsm_xo_driver",
390 .id = -1,
391};
392
Rohit Vaswanie897f842012-03-19 14:19:34 -0700393/*
394 * Watchdog
395 */
396
397static struct msm_watchdog_pdata fsm_watchdog_pdata = {
398 .pet_time = 10000,
399 .bark_time = 11000,
400 .has_secure = false,
401 .has_vic = true,
402};
403
404struct platform_device fsm9xxx_device_watchdog = {
405 .name = "msm_watchdog",
406 .id = -1,
407 .dev = {
408 .platform_data = &fsm_watchdog_pdata,
409 },
410};
411