Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 1 | #ifndef _BLACKFIN_PGTABLE_H |
| 2 | #define _BLACKFIN_PGTABLE_H |
| 3 | |
| 4 | #include <asm-generic/4level-fixup.h> |
| 5 | |
| 6 | #include <asm/page.h> |
Robin Getz | 3bebca2 | 2007-10-10 23:55:26 +0800 | [diff] [blame] | 7 | #include <asm/mach-common/def_LPBlackfin.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 8 | |
| 9 | typedef pte_t *pte_addr_t; |
| 10 | /* |
| 11 | * Trivial page table functions. |
| 12 | */ |
| 13 | #define pgd_present(pgd) (1) |
| 14 | #define pgd_none(pgd) (0) |
| 15 | #define pgd_bad(pgd) (0) |
| 16 | #define pgd_clear(pgdp) |
| 17 | #define kern_addr_valid(addr) (1) |
| 18 | |
| 19 | #define pmd_offset(a, b) ((void *)0) |
| 20 | #define pmd_none(x) (!pmd_val(x)) |
| 21 | #define pmd_present(x) (pmd_val(x)) |
| 22 | #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) |
| 23 | #define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) |
| 24 | |
| 25 | #define kern_addr_valid(addr) (1) |
| 26 | |
| 27 | #define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */ |
| 28 | #define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */ |
| 29 | #define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */ |
| 30 | #define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */ |
| 31 | #define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */ |
| 32 | |
| 33 | extern void paging_init(void); |
| 34 | |
| 35 | #define __swp_type(x) (0) |
| 36 | #define __swp_offset(x) (0) |
| 37 | #define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) |
| 38 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) |
| 39 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) |
| 40 | |
| 41 | static inline int pte_file(pte_t pte) |
| 42 | { |
| 43 | return 0; |
| 44 | } |
| 45 | |
| 46 | #define set_pte(pteptr, pteval) (*(pteptr) = pteval) |
| 47 | #define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval) |
| 48 | |
| 49 | /* |
| 50 | * Page assess control based on Blackfin CPLB management |
| 51 | */ |
| 52 | #define _PAGE_RD (CPLB_USER_RD) |
| 53 | #define _PAGE_WR (CPLB_USER_WR) |
| 54 | #define _PAGE_USER (CPLB_USER_RD | CPLB_USER_WR) |
| 55 | #define _PAGE_ACCESSED CPLB_ALL_ACCESS |
| 56 | #define _PAGE_DIRTY (CPLB_DIRTY) |
| 57 | |
| 58 | #define PTE_BIT_FUNC(fn, op) \ |
| 59 | static inline pte_t pte_##fn(pte_t _pte) { _pte.pte op; return _pte; } |
| 60 | |
| 61 | PTE_BIT_FUNC(rdprotect, &= ~_PAGE_RD); |
| 62 | PTE_BIT_FUNC(mkread, |= _PAGE_RD); |
| 63 | PTE_BIT_FUNC(wrprotect, &= ~_PAGE_WR); |
| 64 | PTE_BIT_FUNC(mkwrite, |= _PAGE_WR); |
| 65 | PTE_BIT_FUNC(exprotect, &= ~_PAGE_USER); |
| 66 | PTE_BIT_FUNC(mkexec, |= _PAGE_USER); |
| 67 | PTE_BIT_FUNC(mkclean, &= ~_PAGE_DIRTY); |
| 68 | PTE_BIT_FUNC(mkdirty, |= _PAGE_DIRTY); |
| 69 | PTE_BIT_FUNC(mkold, &= ~_PAGE_ACCESSED); |
| 70 | PTE_BIT_FUNC(mkyoung, |= _PAGE_ACCESSED); |
| 71 | |
| 72 | /* |
| 73 | * ZERO_PAGE is a global shared page that is always zero: used |
| 74 | * for zero-mapped memory areas etc.. |
| 75 | */ |
| 76 | #define ZERO_PAGE(vaddr) (virt_to_page(0)) |
| 77 | |
| 78 | extern unsigned int kobjsize(const void *objp); |
| 79 | |
| 80 | #define swapper_pg_dir ((pgd_t *) 0) |
| 81 | /* |
| 82 | * No page table caches to initialise. |
| 83 | */ |
| 84 | #define pgtable_cache_init() do { } while (0) |
| 85 | #define io_remap_pfn_range remap_pfn_range |
| 86 | |
| 87 | /* |
| 88 | * All 32bit addresses are effectively valid for vmalloc... |
| 89 | * Sort of meaningless for non-VM targets. |
| 90 | */ |
| 91 | #define VMALLOC_START 0 |
| 92 | #define VMALLOC_END 0xffffffff |
| 93 | |
| 94 | #include <asm-generic/pgtable.h> |
| 95 | |
| 96 | #endif /* _BLACKFIN_PGTABLE_H */ |