blob: aa6ce5873a40e495550e31e1d4575732e94b9e1e [file] [log] [blame]
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
Harini Jayaramaneba52672011-09-08 15:13:00 -060015#include <linux/i2c.h>
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -070016#include <linux/msm_ssbi.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070017#include <asm/mach-types.h>
18#include <asm/mach/arch.h>
Krishna Kondadd794462011-10-01 00:19:29 -070019#include <asm/mach/mmc.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070020#include <mach/board.h>
21#include <mach/msm_iomap.h>
22#include <mach/gpio.h>
23#include <mach/gpiomux.h>
Harini Jayaraman738c9312011-09-08 15:22:38 -060024#include <mach/msm_spi.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070025#include "timer.h"
26#include "devices.h"
David Collinsfb88c432011-08-25 15:12:47 -070027#include "board-9615.h"
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -060028#include "cpuidle.h"
29#include "pm.h"
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070030
Rohit Vaswani09666872011-08-23 17:41:54 -070031static struct platform_device *common_devices[] = {
Jeff Ohlsteind19bf442011-09-09 12:48:18 -070032 &msm9615_device_dmov,
Jeff Hugo56b933a2011-09-28 14:42:05 -060033 &msm_device_smd,
Rohit Vaswani09666872011-08-23 17:41:54 -070034 &msm9615_device_uart_gsbi4,
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -070035 &msm9615_device_ssbi_pmic1,
Harini Jayaramaneba52672011-09-08 15:13:00 -060036 &msm9615_device_qup_i2c_gsbi5,
Harini Jayaraman738c9312011-09-08 15:22:38 -060037 &msm9615_device_qup_spi_gsbi3,
Yan He092b7272011-09-21 15:25:03 -070038 &msm_device_sps,
Siddartha Mohanadoss5d49cec2011-09-21 10:26:15 -070039 &msm9615_device_tsens,
Sahitya Tummala38295432011-09-29 10:08:45 +053040 &msm_device_nand,
Praveen Chidambaramab3b1c42011-08-25 08:44:05 -060041 &msm_rpm_device,
Rohit Vaswani09666872011-08-23 17:41:54 -070042};
43
David Collinsfb88c432011-08-25 15:12:47 -070044static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
45 .irq_base = PM8018_IRQ_BASE,
46 .devirq = MSM_GPIO_TO_INT(87),
47 .irq_trigger_flag = IRQF_TRIGGER_LOW,
48};
49
50static struct pm8xxx_gpio_platform_data pm8xxx_gpio_pdata __devinitdata = {
51 .gpio_base = PM8018_GPIO_PM_TO_SYS(1),
52};
53
54static struct pm8xxx_mpp_platform_data pm8xxx_mpp_pdata __devinitdata = {
55 .mpp_base = PM8018_MPP_PM_TO_SYS(1),
56};
57
58static struct pm8xxx_rtc_platform_data pm8xxx_rtc_pdata __devinitdata = {
59 .rtc_write_enable = false,
60};
61
62static struct pm8xxx_pwrkey_platform_data pm8xxx_pwrkey_pdata = {
63 .pull_up = 1,
64 .kpd_trigger_delay_us = 970,
65 .wakeup = 1,
66};
67
68static struct pm8xxx_misc_platform_data pm8xxx_misc_pdata = {
69 .priority = 0,
70};
71
72static struct pm8018_platform_data pm8018_platform_data __devinitdata = {
73 .irq_pdata = &pm8xxx_irq_pdata,
74 .gpio_pdata = &pm8xxx_gpio_pdata,
75 .mpp_pdata = &pm8xxx_mpp_pdata,
76 .rtc_pdata = &pm8xxx_rtc_pdata,
77 .pwrkey_pdata = &pm8xxx_pwrkey_pdata,
78 .misc_pdata = &pm8xxx_misc_pdata,
David Collins00b31e62011-08-31 20:00:10 -070079 .regulator_pdatas = msm_pm8018_regulator_pdata,
David Collinsfb88c432011-08-25 15:12:47 -070080};
81
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -070082static struct msm_ssbi_platform_data msm9615_ssbi_pm8018_pdata __devinitdata = {
83 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
84 .slave = {
David Collinsfb88c432011-08-25 15:12:47 -070085 .name = PM8018_CORE_DEV_NAME,
86 .platform_data = &pm8018_platform_data,
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -070087 },
88};
89
Rohit Vaswani09666872011-08-23 17:41:54 -070090static struct gpiomux_setting gsbi4 = {
91 .func = GPIOMUX_FUNC_1,
92 .drv = GPIOMUX_DRV_8MA,
93 .pull = GPIOMUX_PULL_NONE,
94};
95
Harini Jayaramaneba52672011-09-08 15:13:00 -060096static struct gpiomux_setting gsbi5 = {
97 .func = GPIOMUX_FUNC_1,
98 .drv = GPIOMUX_DRV_8MA,
99 .pull = GPIOMUX_PULL_NONE,
100};
101
Harini Jayaraman738c9312011-09-08 15:22:38 -0600102static struct gpiomux_setting gsbi3 = {
103 .func = GPIOMUX_FUNC_1,
104 .drv = GPIOMUX_DRV_8MA,
105 .pull = GPIOMUX_PULL_NONE,
106};
107
108static struct gpiomux_setting gsbi3_cs1_config = {
109 .func = GPIOMUX_FUNC_4,
110 .drv = GPIOMUX_DRV_8MA,
111 .pull = GPIOMUX_PULL_NONE,
112};
113
Rohit Vaswani09666872011-08-23 17:41:54 -0700114struct msm_gpiomux_config msm9615_gsbi_configs[] __initdata = {
115 {
Harini Jayaraman738c9312011-09-08 15:22:38 -0600116 .gpio = 8, /* GSBI3 QUP SPI_CLK */
117 .settings = {
118 [GPIOMUX_SUSPENDED] = &gsbi3,
119 },
120 },
121 {
122 .gpio = 9, /* GSBI3 QUP SPI_CS_N */
123 .settings = {
124 [GPIOMUX_SUSPENDED] = &gsbi3,
125 },
126 },
127 {
128 .gpio = 10, /* GSBI3 QUP SPI_DATA_MISO */
129 .settings = {
130 [GPIOMUX_SUSPENDED] = &gsbi3,
131 },
132 },
133 {
134 .gpio = 11, /* GSBI3 QUP SPI_DATA_MOSI */
135 .settings = {
136 [GPIOMUX_SUSPENDED] = &gsbi3,
137 },
138 },
139 {
Rohit Vaswani09666872011-08-23 17:41:54 -0700140 .gpio = 12, /* GSBI4 UART */
141 .settings = {
142 [GPIOMUX_SUSPENDED] = &gsbi4,
143 },
144 },
145 {
146 .gpio = 13, /* GSBI4 UART */
147 .settings = {
148 [GPIOMUX_SUSPENDED] = &gsbi4,
149 },
150 },
151 {
152 .gpio = 14, /* GSBI4 UART */
153 .settings = {
154 [GPIOMUX_SUSPENDED] = &gsbi4,
155 },
156 },
157 {
158 .gpio = 15, /* GSBI4 UART */
159 .settings = {
160 [GPIOMUX_SUSPENDED] = &gsbi4,
161 },
162 },
Harini Jayaramaneba52672011-09-08 15:13:00 -0600163 {
164 .gpio = 16, /* GSBI5 I2C QUP SCL */
165 .settings = {
166 [GPIOMUX_SUSPENDED] = &gsbi5,
167 },
168 },
169 {
170 .gpio = 17, /* GSBI5 I2C QUP SDA */
171 .settings = {
172 [GPIOMUX_SUSPENDED] = &gsbi5,
173 },
174 },
Harini Jayaraman738c9312011-09-08 15:22:38 -0600175 {
176 /* GPIO 19 can be used for I2C/UART on GSBI5 */
177 .gpio = 19, /* GSBI3 QUP SPI_CS_1 */
178 .settings = {
179 [GPIOMUX_SUSPENDED] = &gsbi3_cs1_config,
180 },
181 },
Rohit Vaswani09666872011-08-23 17:41:54 -0700182};
183
Krishna Kondadd794462011-10-01 00:19:29 -0700184#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
185 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT))
186
187#define GPIO_SDCARD_PWR_EN 18
188
189/* MDM9x15 have 2 SDCC controllers */
190enum sdcc_controllers {
191 SDCC1,
192 SDCC2,
193 MAX_SDCC_CONTROLLER
194};
195
196#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
197/* SDC1 pad data */
198static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = {
199 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_16MA},
200 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_10MA},
201 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_10MA}
202};
203
204static struct msm_mmc_pad_drv sdc1_pad_drv_off_cfg[] = {
205 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_2MA},
206 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_2MA},
207 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_2MA}
208};
209
210static struct msm_mmc_pad_pull sdc1_pad_pull_on_cfg[] = {
211 {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
212 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP},
213 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP}
214};
215
216static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = {
217 {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
218 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_DOWN},
219 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_DOWN}
220};
221
222static struct msm_mmc_pad_pull_data mmc_pad_pull_data[MAX_SDCC_CONTROLLER] = {
223 [SDCC1] = {
224 .on = sdc1_pad_pull_on_cfg,
225 .off = sdc1_pad_pull_off_cfg,
226 .size = ARRAY_SIZE(sdc1_pad_pull_on_cfg)
227 },
228};
229
230static struct msm_mmc_pad_drv_data mmc_pad_drv_data[MAX_SDCC_CONTROLLER] = {
231 [SDCC1] = {
232 .on = sdc1_pad_drv_on_cfg,
233 .off = sdc1_pad_drv_off_cfg,
234 .size = ARRAY_SIZE(sdc1_pad_drv_on_cfg)
235 },
236};
237
238static struct msm_mmc_pad_data mmc_pad_data[MAX_SDCC_CONTROLLER] = {
239 [SDCC1] = {
240 .pull = &mmc_pad_pull_data[SDCC1],
241 .drv = &mmc_pad_drv_data[SDCC1]
242 },
243};
244#endif
245
Krishna Konda71aef182011-10-01 02:27:51 -0700246#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
247static struct gpiomux_setting sdcc2_clk_actv_cfg = {
248 .func = GPIOMUX_FUNC_1,
249 .drv = GPIOMUX_DRV_16MA,
250 .pull = GPIOMUX_PULL_NONE,
251};
252
253static struct gpiomux_setting sdcc2_cmd_data_0_3_actv_cfg = {
254 .func = GPIOMUX_FUNC_1,
255 .drv = GPIOMUX_DRV_8MA,
256 .pull = GPIOMUX_PULL_UP,
257};
258
259static struct gpiomux_setting sdcc2_suspend_cfg = {
260 .func = GPIOMUX_FUNC_1,
261 .drv = GPIOMUX_DRV_2MA,
262 .pull = GPIOMUX_PULL_DOWN,
263};
264
265static struct msm_gpiomux_config msm9615_sdcc2_configs[] __initdata = {
266 {
267 /* SDC2_DATA_0 */
268 .gpio = 25,
269 .settings = {
270 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
271 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
272 },
273 },
274 {
275 /* SDC2_DATA_1 */
276 .gpio = 26,
277 .settings = {
278 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
279 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
280 },
281 },
282 {
283 /* SDC2_DATA_2 */
284 .gpio = 27,
285 .settings = {
286 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
287 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
288 },
289 },
290 {
291 /* SDC2_DATA_3 */
292 .gpio = 28,
293 .settings = {
294 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
295 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
296 },
297 },
298 {
299 /* SDC2_CMD GSBI1 */
300 .gpio = 29,
301 .settings = {
302 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
303 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
304 },
305 },
306 {
307 /* SDC2_CLK GSBI1 */
308 .gpio = 30,
309 .settings = {
310 [GPIOMUX_ACTIVE] = &sdcc2_clk_actv_cfg,
311 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
312 },
313 },
314};
315
316static struct msm_mmc_gpio sdc2_gpio_cfg[] = {
317 {25, "sdc2_dat_0"},
318 {26, "sdc2_dat_1"},
319 {27, "sdc2_dat_2"},
320 {28, "sdc2_dat_3"},
321 {29, "sdc2_cmd"},
322 {30, "sdc2_clk"},
323};
324
325static struct msm_mmc_gpio_data mmc_gpio_data[MAX_SDCC_CONTROLLER] = {
326 [SDCC2] = {
327 .gpio = sdc2_gpio_cfg,
328 .size = ARRAY_SIZE(sdc2_gpio_cfg),
329 },
330};
331#else
332static struct msm_gpiomux_config msm9615_sdcc2_configs[0];
333#endif
334
335static struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
Krishna Kondadd794462011-10-01 00:19:29 -0700336#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
337 [SDCC1] = {
338 .is_gpio = 0,
339 .pad_data = &mmc_pad_data[SDCC1],
340 },
341#endif
Krishna Konda71aef182011-10-01 02:27:51 -0700342#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
343 [SDCC2] = {
344 .is_gpio = 1,
345 .gpio_data = &mmc_gpio_data[SDCC2],
346 },
347#endif
Krishna Kondadd794462011-10-01 00:19:29 -0700348};
349
350#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
351static unsigned int sdc1_sup_clk_rates[] = {
352 400000, 24000000, 48000000
353};
354
355static struct mmc_platform_data sdc1_data = {
356 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
357 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
358 .sup_clk_table = sdc1_sup_clk_rates,
359 .sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
360 .sdcc_v4_sup = true,
361 .pin_data = &mmc_slot_pin_data[SDCC1],
362};
363static struct mmc_platform_data *msm9615_sdc1_pdata = &sdc1_data;
364#else
365static struct mmc_platform_data *msm9615_sdc1_pdata;
366#endif
367
Krishna Konda71aef182011-10-01 02:27:51 -0700368#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
369static unsigned int sdc2_sup_clk_rates[] = {
370 400000, 24000000, 48000000
371};
372
373static struct mmc_platform_data sdc2_data = {
374 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
375 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
376 .sup_clk_table = sdc2_sup_clk_rates,
377 .sup_clk_cnt = ARRAY_SIZE(sdc2_sup_clk_rates),
378 .sdcc_v4_sup = true,
379 .pin_data = &mmc_slot_pin_data[SDCC2],
380};
381static struct mmc_platform_data *msm9615_sdc2_pdata = &sdc2_data;
382#else
383static struct mmc_platform_data *msm9615_sdc2_pdata;
384#endif
385
Krishna Kondadd794462011-10-01 00:19:29 -0700386static void __init msm9615_init_mmc(void)
387{
388 int ret;
389
390 if (msm9615_sdc1_pdata) {
391 ret = gpio_request(GPIO_SDCARD_PWR_EN, "SDCARD_PWR_EN");
392
393 if (ret) {
394 pr_err("%s: sdcc1: Error requesting GPIO "
395 "SDCARD_PWR_EN:%d\n", __func__, ret);
396 } else {
397 ret = gpio_direction_output(GPIO_SDCARD_PWR_EN, 1);
398 if (ret) {
399 pr_err("%s: sdcc1: Error setting o/p direction"
400 " for GPIO SDCARD_PWR_EN:%d\n",
401 __func__, ret);
402 gpio_free(GPIO_SDCARD_PWR_EN);
403 } else {
404 msm_add_sdcc(1, msm9615_sdc1_pdata);
405 }
406 }
407 }
Krishna Konda71aef182011-10-01 02:27:51 -0700408
409 if (msm9615_sdc2_pdata) {
410 msm_gpiomux_install(msm9615_sdcc2_configs,
411 ARRAY_SIZE(msm9615_sdcc2_configs));
412
413 /* SDC2: External card slot */
414 msm_add_sdcc(2, msm9615_sdc2_pdata);
415 }
Krishna Kondadd794462011-10-01 00:19:29 -0700416}
417#else
418static void __init msm9615_init_mmc(void) { }
419#endif
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -0600420static struct msm_cpuidle_state msm_cstates[] __initdata = {
421 {0, 0, "C0", "WFI",
422 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
423
424 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
425 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
426
427 {0, 2, "C2", "POWER_COLLAPSE",
428 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
429};
430static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR] = {
431 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
432 .idle_supported = 1,
433 .suspend_supported = 1,
434 .idle_enabled = 0,
435 .suspend_enabled = 0,
436 },
437 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
438 .idle_supported = 1,
439 .suspend_supported = 1,
440 .idle_enabled = 0,
441 .suspend_enabled = 0,
442 },
443 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
444 .idle_supported = 1,
445 .suspend_supported = 1,
446 .idle_enabled = 1,
447 .suspend_enabled = 1,
448 },
449};
Krishna Kondadd794462011-10-01 00:19:29 -0700450
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700451static int __init gpiomux_init(void)
452{
453 int rc;
454
455 rc = msm_gpiomux_init(NR_GPIO_IRQS);
456 if (rc) {
457 pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
458 return rc;
459 }
Rohit Vaswani09666872011-08-23 17:41:54 -0700460 msm_gpiomux_install(msm9615_gsbi_configs,
461 ARRAY_SIZE(msm9615_gsbi_configs));
462
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700463 return 0;
464}
465
Harini Jayaraman738c9312011-09-08 15:22:38 -0600466static struct msm_spi_platform_data msm9615_qup_spi_gsbi3_pdata = {
467 .max_clock_speed = 24000000,
468};
469
Harini Jayaramaneba52672011-09-08 15:13:00 -0600470static struct msm_i2c_platform_data msm9615_i2c_qup_gsbi5_pdata = {
471 .clk_freq = 100000,
472 .src_clk_rate = 24000000,
473};
474
475static void __init msm9615_i2c_init(void)
476{
477 msm9615_device_qup_i2c_gsbi5.dev.platform_data =
478 &msm9615_i2c_qup_gsbi5_pdata;
479}
480
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700481static void __init msm9615_common_init(void)
482{
483 msm9615_device_init();
484 gpiomux_init();
Harini Jayaramaneba52672011-09-08 15:13:00 -0600485 msm9615_i2c_init();
David Collins00b31e62011-08-31 20:00:10 -0700486 regulator_suppress_info_printing();
Harini Jayaraman738c9312011-09-08 15:22:38 -0600487 msm9615_device_qup_spi_gsbi3.dev.platform_data =
488 &msm9615_qup_spi_gsbi3_pdata;
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700489 msm9615_device_ssbi_pmic1.dev.platform_data =
490 &msm9615_ssbi_pm8018_pdata;
David Collins00b31e62011-08-31 20:00:10 -0700491 pm8018_platform_data.num_regulators = msm_pm8018_regulator_pdata_len;
Rohit Vaswani09666872011-08-23 17:41:54 -0700492 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
Krishna Kondadd794462011-10-01 00:19:29 -0700493
494 msm9615_init_mmc();
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -0600495 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
496 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
497 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
498 msm_pm_data);
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700499}
500
501static void __init msm9615_cdp_init(void)
502{
503 msm9615_common_init();
504}
505
506static void __init msm9615_mtp_init(void)
507{
508 msm9615_common_init();
509}
510
511MACHINE_START(MSM9615_CDP, "QCT MSM9615 CDP")
512 .map_io = msm9615_map_io,
513 .init_irq = msm9615_init_irq,
514 .timer = &msm_timer,
515 .init_machine = msm9615_cdp_init,
516MACHINE_END
517
518MACHINE_START(MSM9615_MTP, "QCT MSM9615 MTP")
519 .map_io = msm9615_map_io,
520 .init_irq = msm9615_init_irq,
521 .timer = &msm_timer,
522 .init_machine = msm9615_mtp_init,
523MACHINE_END