Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame^] | 1 | #ifndef __ASM_SPARC64_ELF_H |
| 2 | #define __ASM_SPARC64_ELF_H |
| 3 | |
| 4 | /* |
| 5 | * ELF register definitions.. |
| 6 | */ |
| 7 | |
| 8 | #include <asm/ptrace.h> |
| 9 | #include <asm/processor.h> |
| 10 | #include <asm/uaccess.h> |
| 11 | #include <asm/spitfire.h> |
| 12 | |
| 13 | /* |
| 14 | * Sparc section types |
| 15 | */ |
| 16 | #define STT_REGISTER 13 |
| 17 | |
| 18 | /* |
| 19 | * Sparc ELF relocation types |
| 20 | */ |
| 21 | #define R_SPARC_NONE 0 |
| 22 | #define R_SPARC_8 1 |
| 23 | #define R_SPARC_16 2 |
| 24 | #define R_SPARC_32 3 |
| 25 | #define R_SPARC_DISP8 4 |
| 26 | #define R_SPARC_DISP16 5 |
| 27 | #define R_SPARC_DISP32 6 |
| 28 | #define R_SPARC_WDISP30 7 |
| 29 | #define R_SPARC_WDISP22 8 |
| 30 | #define R_SPARC_HI22 9 |
| 31 | #define R_SPARC_22 10 |
| 32 | #define R_SPARC_13 11 |
| 33 | #define R_SPARC_LO10 12 |
| 34 | #define R_SPARC_GOT10 13 |
| 35 | #define R_SPARC_GOT13 14 |
| 36 | #define R_SPARC_GOT22 15 |
| 37 | #define R_SPARC_PC10 16 |
| 38 | #define R_SPARC_PC22 17 |
| 39 | #define R_SPARC_WPLT30 18 |
| 40 | #define R_SPARC_COPY 19 |
| 41 | #define R_SPARC_GLOB_DAT 20 |
| 42 | #define R_SPARC_JMP_SLOT 21 |
| 43 | #define R_SPARC_RELATIVE 22 |
| 44 | #define R_SPARC_UA32 23 |
| 45 | #define R_SPARC_PLT32 24 |
| 46 | #define R_SPARC_HIPLT22 25 |
| 47 | #define R_SPARC_LOPLT10 26 |
| 48 | #define R_SPARC_PCPLT32 27 |
| 49 | #define R_SPARC_PCPLT22 28 |
| 50 | #define R_SPARC_PCPLT10 29 |
| 51 | #define R_SPARC_10 30 |
| 52 | #define R_SPARC_11 31 |
| 53 | #define R_SPARC_64 32 |
| 54 | #define R_SPARC_OLO10 33 |
| 55 | #define R_SPARC_WDISP16 40 |
| 56 | #define R_SPARC_WDISP19 41 |
| 57 | #define R_SPARC_7 43 |
| 58 | #define R_SPARC_5 44 |
| 59 | #define R_SPARC_6 45 |
| 60 | |
| 61 | /* Bits present in AT_HWCAP, primarily for Sparc32. */ |
| 62 | |
| 63 | #define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ |
| 64 | #define HWCAP_SPARC_STBAR 2 |
| 65 | #define HWCAP_SPARC_SWAP 4 |
| 66 | #define HWCAP_SPARC_MULDIV 8 |
| 67 | #define HWCAP_SPARC_V9 16 |
| 68 | #define HWCAP_SPARC_ULTRA3 32 |
| 69 | #define HWCAP_SPARC_BLKINIT 64 |
| 70 | #define HWCAP_SPARC_N2 128 |
| 71 | |
| 72 | #define CORE_DUMP_USE_REGSET |
| 73 | |
| 74 | /* |
| 75 | * These are used to set parameters in the core dumps. |
| 76 | */ |
| 77 | #define ELF_ARCH EM_SPARCV9 |
| 78 | #define ELF_CLASS ELFCLASS64 |
| 79 | #define ELF_DATA ELFDATA2MSB |
| 80 | |
| 81 | /* Format of 64-bit elf_gregset_t is: |
| 82 | * G0 --> G7 |
| 83 | * O0 --> O7 |
| 84 | * L0 --> L7 |
| 85 | * I0 --> I7 |
| 86 | * TSTATE |
| 87 | * TPC |
| 88 | * TNPC |
| 89 | * Y |
| 90 | */ |
| 91 | typedef unsigned long elf_greg_t; |
| 92 | #define ELF_NGREG 36 |
| 93 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; |
| 94 | |
| 95 | typedef struct { |
| 96 | unsigned long pr_regs[32]; |
| 97 | unsigned long pr_fsr; |
| 98 | unsigned long pr_gsr; |
| 99 | unsigned long pr_fprs; |
| 100 | } elf_fpregset_t; |
| 101 | |
| 102 | /* Format of 32-bit elf_gregset_t is: |
| 103 | * G0 --> G7 |
| 104 | * O0 --> O7 |
| 105 | * L0 --> L7 |
| 106 | * I0 --> I7 |
| 107 | * PSR, PC, nPC, Y, WIM, TBR |
| 108 | */ |
| 109 | typedef unsigned int compat_elf_greg_t; |
| 110 | #define COMPAT_ELF_NGREG 38 |
| 111 | typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; |
| 112 | |
| 113 | typedef struct { |
| 114 | union { |
| 115 | unsigned int pr_regs[32]; |
| 116 | unsigned long pr_dregs[16]; |
| 117 | } pr_fr; |
| 118 | unsigned int __unused; |
| 119 | unsigned int pr_fsr; |
| 120 | unsigned char pr_qcnt; |
| 121 | unsigned char pr_q_entrysize; |
| 122 | unsigned char pr_en; |
| 123 | unsigned int pr_q[64]; |
| 124 | } compat_elf_fpregset_t; |
| 125 | |
| 126 | /* UltraSparc extensions. Still unused, but will be eventually. */ |
| 127 | typedef struct { |
| 128 | unsigned int pr_type; |
| 129 | unsigned int pr_align; |
| 130 | union { |
| 131 | struct { |
| 132 | union { |
| 133 | unsigned int pr_regs[32]; |
| 134 | unsigned long pr_dregs[16]; |
| 135 | long double pr_qregs[8]; |
| 136 | } pr_xfr; |
| 137 | } pr_v8p; |
| 138 | unsigned int pr_xfsr; |
| 139 | unsigned int pr_fprs; |
| 140 | unsigned int pr_xg[8]; |
| 141 | unsigned int pr_xo[8]; |
| 142 | unsigned long pr_tstate; |
| 143 | unsigned int pr_filler[8]; |
| 144 | } pr_un; |
| 145 | } elf_xregset_t; |
| 146 | |
| 147 | /* |
| 148 | * This is used to ensure we don't load something for the wrong architecture. |
| 149 | */ |
| 150 | #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) |
| 151 | #define compat_elf_check_arch(x) ((x)->e_machine == EM_SPARC || \ |
| 152 | (x)->e_machine == EM_SPARC32PLUS) |
| 153 | #define compat_start_thread start_thread32 |
| 154 | |
| 155 | #define USE_ELF_CORE_DUMP |
| 156 | #define ELF_EXEC_PAGESIZE PAGE_SIZE |
| 157 | |
| 158 | /* This is the location that an ET_DYN program is loaded if exec'ed. Typical |
| 159 | use of this is to invoke "./ld.so someprog" to test out a new version of |
| 160 | the loader. We need to make sure that it is out of the way of the program |
| 161 | that it will "exec", and that there is sufficient room for the brk. */ |
| 162 | |
| 163 | #define ELF_ET_DYN_BASE 0x0000010000000000UL |
| 164 | #define COMPAT_ELF_ET_DYN_BASE 0x0000000070000000UL |
| 165 | |
| 166 | |
| 167 | /* This yields a mask that user programs can use to figure out what |
| 168 | instruction set this cpu supports. */ |
| 169 | |
| 170 | /* On Ultra, we support all of the v8 capabilities. */ |
| 171 | static inline unsigned int sparc64_elf_hwcap(void) |
| 172 | { |
| 173 | unsigned int cap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | |
| 174 | HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV | |
| 175 | HWCAP_SPARC_V9); |
| 176 | |
| 177 | if (tlb_type == cheetah || tlb_type == cheetah_plus) |
| 178 | cap |= HWCAP_SPARC_ULTRA3; |
| 179 | else if (tlb_type == hypervisor) { |
| 180 | if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || |
| 181 | sun4v_chip_type == SUN4V_CHIP_NIAGARA2) |
| 182 | cap |= HWCAP_SPARC_BLKINIT; |
| 183 | if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2) |
| 184 | cap |= HWCAP_SPARC_N2; |
| 185 | } |
| 186 | |
| 187 | return cap; |
| 188 | } |
| 189 | |
| 190 | #define ELF_HWCAP sparc64_elf_hwcap(); |
| 191 | |
| 192 | /* This yields a string that ld.so will use to load implementation |
| 193 | specific libraries for optimization. This is more specific in |
| 194 | intent than poking at uname or /proc/cpuinfo. */ |
| 195 | |
| 196 | #define ELF_PLATFORM (NULL) |
| 197 | |
| 198 | #define SET_PERSONALITY(ex, ibcs2) \ |
| 199 | do { unsigned long new_flags = current_thread_info()->flags; \ |
| 200 | new_flags &= _TIF_32BIT; \ |
| 201 | if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ |
| 202 | new_flags |= _TIF_32BIT; \ |
| 203 | else \ |
| 204 | new_flags &= ~_TIF_32BIT; \ |
| 205 | if ((current_thread_info()->flags & _TIF_32BIT) \ |
| 206 | != new_flags) \ |
| 207 | set_thread_flag(TIF_ABI_PENDING); \ |
| 208 | else \ |
| 209 | clear_thread_flag(TIF_ABI_PENDING); \ |
| 210 | /* flush_thread will update pgd cache */ \ |
| 211 | if (ibcs2) \ |
| 212 | set_personality(PER_SVR4); \ |
| 213 | else if (current->personality != PER_LINUX32) \ |
| 214 | set_personality(PER_LINUX); \ |
| 215 | } while (0) |
| 216 | |
| 217 | #endif /* !(__ASM_SPARC64_ELF_H) */ |