Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * |
| 3 | * Support for the mpeg transport stream transfers |
| 4 | * PCI function #2 of the cx2388x. |
| 5 | * |
| 6 | * (c) 2004 Jelle Foks <jelle@foks.8m.com> |
| 7 | * (c) 2004 Chris Pascoe <c.pascoe@itee.uq.edu.au> |
| 8 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 23 | */ |
| 24 | |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/moduleparam.h> |
| 27 | #include <linux/init.h> |
| 28 | #include <linux/device.h> |
| 29 | #include <linux/interrupt.h> |
| 30 | #include <asm/delay.h> |
| 31 | |
| 32 | #include "cx88.h" |
| 33 | |
| 34 | /* ------------------------------------------------------------------ */ |
| 35 | |
| 36 | MODULE_DESCRIPTION("mpeg driver for cx2388x based TV cards"); |
| 37 | MODULE_AUTHOR("Jelle Foks <jelle@foks.8m.com>"); |
| 38 | MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); |
| 39 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
| 40 | MODULE_LICENSE("GPL"); |
| 41 | |
| 42 | static unsigned int debug = 0; |
| 43 | module_param(debug,int,0644); |
| 44 | MODULE_PARM_DESC(debug,"enable debug messages [mpeg]"); |
| 45 | |
| 46 | #define dprintk(level,fmt, arg...) if (debug >= level) \ |
| 47 | printk(KERN_DEBUG "%s/2: " fmt, dev->core->name , ## arg) |
| 48 | |
| 49 | /* ------------------------------------------------------------------ */ |
| 50 | |
| 51 | static int cx8802_start_dma(struct cx8802_dev *dev, |
| 52 | struct cx88_dmaqueue *q, |
| 53 | struct cx88_buffer *buf) |
| 54 | { |
| 55 | struct cx88_core *core = dev->core; |
| 56 | |
Trent Piepho | 76d313b | 2006-04-10 09:27:08 -0300 | [diff] [blame] | 57 | dprintk(1, "cx8802_start_dma w: %d, h: %d, f: %d\n", dev->width, dev->height, buf->vb.field); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 58 | |
| 59 | /* setup fifo + format */ |
| 60 | cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH28], |
| 61 | dev->ts_packet_size, buf->risc.dma); |
| 62 | |
| 63 | /* write TS length to chip */ |
| 64 | cx_write(MO_TS_LNGTH, buf->vb.width); |
| 65 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | /* FIXME: this needs a review. |
| 67 | * also: move to cx88-blackbird + cx88-dvb source files? */ |
| 68 | |
| 69 | if (cx88_boards[core->board].dvb) { |
| 70 | /* negedge driven & software reset */ |
Michael Krufky | f179849 | 2005-07-07 17:58:39 -0700 | [diff] [blame] | 71 | cx_write(TS_GEN_CNTRL, 0x0040 | dev->ts_gen_cntrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | udelay(100); |
| 73 | cx_write(MO_PINMUX_IO, 0x00); |
Michael Krufky | 0d723c0 | 2005-07-07 17:58:42 -0700 | [diff] [blame] | 74 | cx_write(TS_HW_SOP_CNTRL,0x47<<16|188<<4|0x01); |
Mauro Carvalho Chehab | e52e98a | 2005-09-09 13:03:41 -0700 | [diff] [blame] | 75 | switch (core->board) { |
| 76 | case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q: |
| 77 | case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T: |
| 78 | case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD: |
Rusty Scott | da215d2 | 2006-04-07 02:21:31 -0300 | [diff] [blame] | 79 | case CX88_BOARD_PCHDTV_HD5500: |
Mauro Carvalho Chehab | 41ef7c1 | 2005-07-12 13:58:44 -0700 | [diff] [blame] | 80 | cx_write(TS_SOP_STAT, 1<<13); |
Mauro Carvalho Chehab | e52e98a | 2005-09-09 13:03:41 -0700 | [diff] [blame] | 81 | break; |
Steven Toth | 0fa14aa | 2006-01-09 15:25:02 -0200 | [diff] [blame] | 82 | case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1: |
| 83 | case CX88_BOARD_HAUPPAUGE_NOVASE2_S1: |
| 84 | cx_write(MO_PINMUX_IO, 0x88); /* Enable MPEG parallel IO and video signal pins */ |
| 85 | udelay(100); |
| 86 | break; |
Mauro Carvalho Chehab | e52e98a | 2005-09-09 13:03:41 -0700 | [diff] [blame] | 87 | default: |
Mauro Carvalho Chehab | 41ef7c1 | 2005-07-12 13:58:44 -0700 | [diff] [blame] | 88 | cx_write(TS_SOP_STAT, 0x00); |
Mauro Carvalho Chehab | e52e98a | 2005-09-09 13:03:41 -0700 | [diff] [blame] | 89 | break; |
Michael Krufky | f179849 | 2005-07-07 17:58:39 -0700 | [diff] [blame] | 90 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | cx_write(TS_GEN_CNTRL, dev->ts_gen_cntrl); |
| 92 | udelay(100); |
| 93 | } |
| 94 | |
| 95 | if (cx88_boards[core->board].blackbird) { |
| 96 | cx_write(MO_PINMUX_IO, 0x88); /* enable MPEG parallel IO */ |
| 97 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | cx_write(TS_GEN_CNTRL, 0x46); /* punctured clock TS & posedge driven & software reset */ |
| 99 | udelay(100); |
| 100 | |
| 101 | cx_write(TS_HW_SOP_CNTRL, 0x408); /* mpeg start byte */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | cx_write(TS_VALERR_CNTRL, 0x2000); |
| 103 | |
| 104 | cx_write(TS_GEN_CNTRL, 0x06); /* punctured clock TS & posedge driven */ |
| 105 | udelay(100); |
| 106 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 107 | |
| 108 | /* reset counter */ |
| 109 | cx_write(MO_TS_GPCNTRL, GP_COUNT_CONTROL_RESET); |
| 110 | q->count = 1; |
| 111 | |
| 112 | /* enable irqs */ |
Trent Piepho | 76d313b | 2006-04-10 09:27:08 -0300 | [diff] [blame] | 113 | dprintk( 1, "setting the interrupt mask\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 114 | cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x04); |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 115 | cx_set(MO_TS_INTMSK, 0x1f0011); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 116 | |
| 117 | /* start dma */ |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 118 | cx_set(MO_DEV_CNTRL2, (1<<5)); |
| 119 | cx_set(MO_TS_DMACNTRL, 0x11); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | return 0; |
| 121 | } |
| 122 | |
| 123 | static int cx8802_stop_dma(struct cx8802_dev *dev) |
| 124 | { |
| 125 | struct cx88_core *core = dev->core; |
Trent Piepho | 76d313b | 2006-04-10 09:27:08 -0300 | [diff] [blame] | 126 | dprintk( 1, "cx8802_stop_dma\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | |
| 128 | /* stop dma */ |
| 129 | cx_clear(MO_TS_DMACNTRL, 0x11); |
| 130 | |
| 131 | /* disable irqs */ |
| 132 | cx_clear(MO_PCI_INTMSK, 0x000004); |
| 133 | cx_clear(MO_TS_INTMSK, 0x1f0011); |
| 134 | |
| 135 | /* Reset the controller */ |
| 136 | cx_write(TS_GEN_CNTRL, 0xcd); |
| 137 | return 0; |
| 138 | } |
| 139 | |
| 140 | static int cx8802_restart_queue(struct cx8802_dev *dev, |
| 141 | struct cx88_dmaqueue *q) |
| 142 | { |
| 143 | struct cx88_buffer *buf; |
| 144 | struct list_head *item; |
| 145 | |
Jelle Foks | f14ac0b | 2006-03-09 17:44:07 -0300 | [diff] [blame] | 146 | dprintk( 1, "cx8802_restart_queue\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | if (list_empty(&q->active)) |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 148 | { |
Jelle Foks | f14ac0b | 2006-03-09 17:44:07 -0300 | [diff] [blame] | 149 | struct cx88_buffer *prev; |
| 150 | prev = NULL; |
| 151 | |
| 152 | dprintk(1, "cx8802_restart_queue: queue is empty\n" ); |
| 153 | |
| 154 | for (;;) { |
| 155 | if (list_empty(&q->queued)) |
| 156 | return 0; |
| 157 | buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue); |
| 158 | if (NULL == prev) { |
| 159 | list_del(&buf->vb.queue); |
| 160 | list_add_tail(&buf->vb.queue,&q->active); |
| 161 | cx8802_start_dma(dev, q, buf); |
| 162 | buf->vb.state = STATE_ACTIVE; |
| 163 | buf->count = q->count++; |
| 164 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); |
| 165 | dprintk(1,"[%p/%d] restart_queue - first active\n", |
| 166 | buf,buf->vb.i); |
| 167 | |
| 168 | } else if (prev->vb.width == buf->vb.width && |
| 169 | prev->vb.height == buf->vb.height && |
| 170 | prev->fmt == buf->fmt) { |
| 171 | list_del(&buf->vb.queue); |
| 172 | list_add_tail(&buf->vb.queue,&q->active); |
| 173 | buf->vb.state = STATE_ACTIVE; |
| 174 | buf->count = q->count++; |
| 175 | prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); |
| 176 | dprintk(1,"[%p/%d] restart_queue - move to active\n", |
| 177 | buf,buf->vb.i); |
| 178 | } else { |
| 179 | return 0; |
| 180 | } |
| 181 | prev = buf; |
| 182 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 183 | return 0; |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 184 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | |
| 186 | buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); |
| 187 | dprintk(2,"restart_queue [%p/%d]: restart dma\n", |
| 188 | buf, buf->vb.i); |
| 189 | cx8802_start_dma(dev, q, buf); |
| 190 | list_for_each(item,&q->active) { |
| 191 | buf = list_entry(item, struct cx88_buffer, vb.queue); |
| 192 | buf->count = q->count++; |
| 193 | } |
| 194 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); |
| 195 | return 0; |
| 196 | } |
| 197 | |
| 198 | /* ------------------------------------------------------------------ */ |
| 199 | |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 200 | int cx8802_buf_prepare(struct videobuf_queue *q, struct cx8802_dev *dev, |
| 201 | struct cx88_buffer *buf, enum v4l2_field field) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | { |
| 203 | int size = dev->ts_packet_size * dev->ts_packet_count; |
| 204 | int rc; |
| 205 | |
| 206 | dprintk(1, "%s: %p\n", __FUNCTION__, buf); |
| 207 | if (0 != buf->vb.baddr && buf->vb.bsize < size) |
| 208 | return -EINVAL; |
| 209 | |
| 210 | if (STATE_NEEDS_INIT == buf->vb.state) { |
| 211 | buf->vb.width = dev->ts_packet_size; |
| 212 | buf->vb.height = dev->ts_packet_count; |
| 213 | buf->vb.size = size; |
Catalin Climov | 3162942 | 2005-11-08 21:36:17 -0800 | [diff] [blame] | 214 | buf->vb.field = field /*V4L2_FIELD_TOP*/; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 215 | |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 216 | if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL))) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 217 | goto fail; |
| 218 | cx88_risc_databuffer(dev->pci, &buf->risc, |
| 219 | buf->vb.dma.sglist, |
| 220 | buf->vb.width, buf->vb.height); |
| 221 | } |
| 222 | buf->vb.state = STATE_PREPARED; |
| 223 | return 0; |
| 224 | |
| 225 | fail: |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 226 | cx88_free_buffer(q,buf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | return rc; |
| 228 | } |
| 229 | |
| 230 | void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf) |
| 231 | { |
| 232 | struct cx88_buffer *prev; |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 233 | struct cx88_dmaqueue *cx88q = &dev->mpegq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 235 | dprintk( 1, "cx8802_buf_queue\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 236 | /* add jump to stopper */ |
| 237 | buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC); |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 238 | buf->risc.jmp[1] = cpu_to_le32(cx88q->stopper.dma); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 239 | |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 240 | if (list_empty(&cx88q->active)) { |
Trent Piepho | 76d313b | 2006-04-10 09:27:08 -0300 | [diff] [blame] | 241 | dprintk( 1, "queue is empty - first active\n" ); |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 242 | list_add_tail(&buf->vb.queue,&cx88q->active); |
| 243 | cx8802_start_dma(dev, cx88q, buf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 244 | buf->vb.state = STATE_ACTIVE; |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 245 | buf->count = cx88q->count++; |
| 246 | mod_timer(&cx88q->timeout, jiffies+BUFFER_TIMEOUT); |
Trent Piepho | 76d313b | 2006-04-10 09:27:08 -0300 | [diff] [blame] | 247 | dprintk(1,"[%p/%d] %s - first active\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 248 | buf, buf->vb.i, __FUNCTION__); |
| 249 | |
| 250 | } else { |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 251 | dprintk( 1, "queue is not empty - append to active\n" ); |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 252 | prev = list_entry(cx88q->active.prev, struct cx88_buffer, vb.queue); |
| 253 | list_add_tail(&buf->vb.queue,&cx88q->active); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 254 | buf->vb.state = STATE_ACTIVE; |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 255 | buf->count = cx88q->count++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 257 | dprintk( 1, "[%p/%d] %s - append to active\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | buf, buf->vb.i, __FUNCTION__); |
| 259 | } |
| 260 | } |
| 261 | |
| 262 | /* ----------------------------------------------------------- */ |
| 263 | |
| 264 | static void do_cancel_buffers(struct cx8802_dev *dev, char *reason, int restart) |
| 265 | { |
| 266 | struct cx88_dmaqueue *q = &dev->mpegq; |
| 267 | struct cx88_buffer *buf; |
| 268 | unsigned long flags; |
| 269 | |
| 270 | spin_lock_irqsave(&dev->slock,flags); |
| 271 | while (!list_empty(&q->active)) { |
| 272 | buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); |
| 273 | list_del(&buf->vb.queue); |
| 274 | buf->vb.state = STATE_ERROR; |
| 275 | wake_up(&buf->vb.done); |
| 276 | dprintk(1,"[%p/%d] %s - dma=0x%08lx\n", |
| 277 | buf, buf->vb.i, reason, (unsigned long)buf->risc.dma); |
| 278 | } |
| 279 | if (restart) |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 280 | { |
Trent Piepho | 76d313b | 2006-04-10 09:27:08 -0300 | [diff] [blame] | 281 | dprintk(1, "restarting queue\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | cx8802_restart_queue(dev,q); |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 283 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | spin_unlock_irqrestore(&dev->slock,flags); |
| 285 | } |
| 286 | |
| 287 | void cx8802_cancel_buffers(struct cx8802_dev *dev) |
| 288 | { |
| 289 | struct cx88_dmaqueue *q = &dev->mpegq; |
| 290 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 291 | dprintk( 1, "cx8802_cancel_buffers" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 292 | del_timer_sync(&q->timeout); |
| 293 | cx8802_stop_dma(dev); |
| 294 | do_cancel_buffers(dev,"cancel",0); |
| 295 | } |
| 296 | |
| 297 | static void cx8802_timeout(unsigned long data) |
| 298 | { |
| 299 | struct cx8802_dev *dev = (struct cx8802_dev*)data; |
| 300 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 301 | dprintk(0, "%s\n",__FUNCTION__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | |
| 303 | if (debug) |
| 304 | cx88_sram_channel_dump(dev->core, &cx88_sram_channels[SRAM_CH28]); |
| 305 | cx8802_stop_dma(dev); |
| 306 | do_cancel_buffers(dev,"timeout",1); |
| 307 | } |
| 308 | |
Mauro Carvalho Chehab | 41ef7c1 | 2005-07-12 13:58:44 -0700 | [diff] [blame] | 309 | static char *cx88_mpeg_irqs[32] = { |
| 310 | "ts_risci1", NULL, NULL, NULL, |
| 311 | "ts_risci2", NULL, NULL, NULL, |
| 312 | "ts_oflow", NULL, NULL, NULL, |
| 313 | "ts_sync", NULL, NULL, NULL, |
| 314 | "opc_err", "par_err", "rip_err", "pci_abort", |
| 315 | "ts_err?", |
| 316 | }; |
| 317 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 318 | static void cx8802_mpeg_irq(struct cx8802_dev *dev) |
| 319 | { |
| 320 | struct cx88_core *core = dev->core; |
| 321 | u32 status, mask, count; |
| 322 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 323 | dprintk( 1, "cx8802_mpeg_irq\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 324 | status = cx_read(MO_TS_INTSTAT); |
| 325 | mask = cx_read(MO_TS_INTMSK); |
| 326 | if (0 == (status & mask)) |
| 327 | return; |
| 328 | |
| 329 | cx_write(MO_TS_INTSTAT, status); |
Mauro Carvalho Chehab | 41ef7c1 | 2005-07-12 13:58:44 -0700 | [diff] [blame] | 330 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 331 | if (debug || (status & mask & ~0xff)) |
| 332 | cx88_print_irqbits(core->name, "irq mpeg ", |
| 333 | cx88_mpeg_irqs, status, mask); |
| 334 | |
| 335 | /* risc op code error */ |
| 336 | if (status & (1 << 16)) { |
| 337 | printk(KERN_WARNING "%s: mpeg risc op code error\n",core->name); |
| 338 | cx_clear(MO_TS_DMACNTRL, 0x11); |
| 339 | cx88_sram_channel_dump(dev->core, &cx88_sram_channels[SRAM_CH28]); |
| 340 | } |
| 341 | |
| 342 | /* risc1 y */ |
| 343 | if (status & 0x01) { |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 344 | dprintk( 1, "wake up\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 345 | spin_lock(&dev->slock); |
| 346 | count = cx_read(MO_TS_GPCNT); |
| 347 | cx88_wakeup(dev->core, &dev->mpegq, count); |
| 348 | spin_unlock(&dev->slock); |
| 349 | } |
| 350 | |
| 351 | /* risc2 y */ |
| 352 | if (status & 0x10) { |
| 353 | spin_lock(&dev->slock); |
| 354 | cx8802_restart_queue(dev,&dev->mpegq); |
| 355 | spin_unlock(&dev->slock); |
| 356 | } |
| 357 | |
Mauro Carvalho Chehab | 4ac9791 | 2005-11-08 21:37:43 -0800 | [diff] [blame] | 358 | /* other general errors */ |
| 359 | if (status & 0x1f0100) { |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 360 | dprintk( 0, "general errors: 0x%08x\n", status & 0x1f0100 ); |
Mauro Carvalho Chehab | 4ac9791 | 2005-11-08 21:37:43 -0800 | [diff] [blame] | 361 | spin_lock(&dev->slock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 362 | cx8802_stop_dma(dev); |
Mauro Carvalho Chehab | 4ac9791 | 2005-11-08 21:37:43 -0800 | [diff] [blame] | 363 | cx8802_restart_queue(dev,&dev->mpegq); |
| 364 | spin_unlock(&dev->slock); |
| 365 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 366 | } |
| 367 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 368 | #define MAX_IRQ_LOOP 10 |
| 369 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | static irqreturn_t cx8802_irq(int irq, void *dev_id, struct pt_regs *regs) |
| 371 | { |
| 372 | struct cx8802_dev *dev = dev_id; |
| 373 | struct cx88_core *core = dev->core; |
| 374 | u32 status; |
| 375 | int loop, handled = 0; |
| 376 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 377 | for (loop = 0; loop < MAX_IRQ_LOOP; loop++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 378 | status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x04); |
| 379 | if (0 == status) |
| 380 | goto out; |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 381 | dprintk( 1, "cx8802_irq\n" ); |
| 382 | dprintk( 1, " loop: %d/%d\n", loop, MAX_IRQ_LOOP ); |
| 383 | dprintk( 1, " status: %d\n", status ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 384 | handled = 1; |
| 385 | cx_write(MO_PCI_INTSTAT, status); |
| 386 | |
| 387 | if (status & core->pci_irqmask) |
| 388 | cx88_core_irq(core,status); |
| 389 | if (status & 0x04) |
| 390 | cx8802_mpeg_irq(dev); |
| 391 | }; |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 392 | if (MAX_IRQ_LOOP == loop) { |
| 393 | dprintk( 0, "clearing mask\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 394 | printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n", |
| 395 | core->name); |
| 396 | cx_write(MO_PCI_INTMSK,0); |
| 397 | } |
| 398 | |
| 399 | out: |
| 400 | return IRQ_RETVAL(handled); |
| 401 | } |
| 402 | |
| 403 | /* ----------------------------------------------------------- */ |
| 404 | /* exported stuff */ |
| 405 | |
| 406 | int cx8802_init_common(struct cx8802_dev *dev) |
| 407 | { |
| 408 | struct cx88_core *core = dev->core; |
| 409 | int err; |
| 410 | |
| 411 | /* pci init */ |
| 412 | if (pci_enable_device(dev->pci)) |
| 413 | return -EIO; |
| 414 | pci_set_master(dev->pci); |
| 415 | if (!pci_dma_supported(dev->pci,0xffffffff)) { |
| 416 | printk("%s/2: Oops: no 32bit PCI DMA ???\n",dev->core->name); |
| 417 | return -EIO; |
| 418 | } |
| 419 | |
| 420 | pci_read_config_byte(dev->pci, PCI_CLASS_REVISION, &dev->pci_rev); |
Mauro Carvalho Chehab | 4ac9791 | 2005-11-08 21:37:43 -0800 | [diff] [blame] | 421 | pci_read_config_byte(dev->pci, PCI_LATENCY_TIMER, &dev->pci_lat); |
| 422 | printk(KERN_INFO "%s/2: found at %s, rev: %d, irq: %d, " |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | "latency: %d, mmio: 0x%lx\n", dev->core->name, |
| 424 | pci_name(dev->pci), dev->pci_rev, dev->pci->irq, |
| 425 | dev->pci_lat,pci_resource_start(dev->pci,0)); |
| 426 | |
| 427 | /* initialize driver struct */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 428 | spin_lock_init(&dev->slock); |
| 429 | |
| 430 | /* init dma queue */ |
| 431 | INIT_LIST_HEAD(&dev->mpegq.active); |
| 432 | INIT_LIST_HEAD(&dev->mpegq.queued); |
| 433 | dev->mpegq.timeout.function = cx8802_timeout; |
| 434 | dev->mpegq.timeout.data = (unsigned long)dev; |
| 435 | init_timer(&dev->mpegq.timeout); |
| 436 | cx88_risc_stopper(dev->pci,&dev->mpegq.stopper, |
| 437 | MO_TS_DMACNTRL,0x11,0x00); |
| 438 | |
| 439 | /* get irq */ |
| 440 | err = request_irq(dev->pci->irq, cx8802_irq, |
| 441 | SA_SHIRQ | SA_INTERRUPT, dev->core->name, dev); |
| 442 | if (err < 0) { |
| 443 | printk(KERN_ERR "%s: can't get IRQ %d\n", |
| 444 | dev->core->name, dev->pci->irq); |
| 445 | return err; |
| 446 | } |
| 447 | cx_set(MO_PCI_INTMSK, core->pci_irqmask); |
| 448 | |
| 449 | /* everything worked */ |
| 450 | pci_set_drvdata(dev->pci,dev); |
| 451 | return 0; |
| 452 | } |
| 453 | |
| 454 | void cx8802_fini_common(struct cx8802_dev *dev) |
| 455 | { |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 456 | dprintk( 2, "cx8802_fini_common\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | cx8802_stop_dma(dev); |
| 458 | pci_disable_device(dev->pci); |
| 459 | |
| 460 | /* unregister stuff */ |
| 461 | free_irq(dev->pci->irq, dev); |
| 462 | pci_set_drvdata(dev->pci, NULL); |
| 463 | |
| 464 | /* free memory */ |
| 465 | btcx_riscmem_free(dev->pci,&dev->mpegq.stopper); |
| 466 | } |
| 467 | |
| 468 | /* ----------------------------------------------------------- */ |
| 469 | |
| 470 | int cx8802_suspend_common(struct pci_dev *pci_dev, pm_message_t state) |
| 471 | { |
Mauro Carvalho Chehab | 4ac9791 | 2005-11-08 21:37:43 -0800 | [diff] [blame] | 472 | struct cx8802_dev *dev = pci_get_drvdata(pci_dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | struct cx88_core *core = dev->core; |
| 474 | |
| 475 | /* stop mpeg dma */ |
| 476 | spin_lock(&dev->slock); |
| 477 | if (!list_empty(&dev->mpegq.active)) { |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 478 | dprintk( 2, "suspend\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | printk("%s: suspend mpeg\n", core->name); |
| 480 | cx8802_stop_dma(dev); |
| 481 | del_timer(&dev->mpegq.timeout); |
| 482 | } |
| 483 | spin_unlock(&dev->slock); |
| 484 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 485 | /* FIXME -- shutdown device */ |
| 486 | cx88_shutdown(dev->core); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 487 | |
| 488 | pci_save_state(pci_dev); |
| 489 | if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) { |
| 490 | pci_disable_device(pci_dev); |
| 491 | dev->state.disabled = 1; |
| 492 | } |
| 493 | return 0; |
| 494 | } |
| 495 | |
| 496 | int cx8802_resume_common(struct pci_dev *pci_dev) |
| 497 | { |
Mauro Carvalho Chehab | 08adb9e | 2005-09-09 13:03:55 -0700 | [diff] [blame] | 498 | struct cx8802_dev *dev = pci_get_drvdata(pci_dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 499 | struct cx88_core *core = dev->core; |
Mauro Carvalho Chehab | 08adb9e | 2005-09-09 13:03:55 -0700 | [diff] [blame] | 500 | int err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | |
| 502 | if (dev->state.disabled) { |
Mauro Carvalho Chehab | 08adb9e | 2005-09-09 13:03:55 -0700 | [diff] [blame] | 503 | err=pci_enable_device(pci_dev); |
| 504 | if (err) { |
| 505 | printk(KERN_ERR "%s: can't enable device\n", |
| 506 | dev->core->name); |
| 507 | return err; |
| 508 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 509 | dev->state.disabled = 0; |
| 510 | } |
Mauro Carvalho Chehab | 08adb9e | 2005-09-09 13:03:55 -0700 | [diff] [blame] | 511 | err=pci_set_power_state(pci_dev, PCI_D0); |
| 512 | if (err) { |
| 513 | printk(KERN_ERR "%s: can't enable device\n", |
| 514 | dev->core->name); |
| 515 | pci_disable_device(pci_dev); |
| 516 | dev->state.disabled = 1; |
| 517 | |
| 518 | return err; |
| 519 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | pci_restore_state(pci_dev); |
| 521 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | /* FIXME: re-initialize hardware */ |
| 523 | cx88_reset(dev->core); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | |
| 525 | /* restart video+vbi capture */ |
| 526 | spin_lock(&dev->slock); |
| 527 | if (!list_empty(&dev->mpegq.active)) { |
| 528 | printk("%s: resume mpeg\n", core->name); |
| 529 | cx8802_restart_queue(dev,&dev->mpegq); |
| 530 | } |
| 531 | spin_unlock(&dev->slock); |
| 532 | |
| 533 | return 0; |
| 534 | } |
| 535 | |
| 536 | /* ----------------------------------------------------------- */ |
| 537 | |
| 538 | EXPORT_SYMBOL(cx8802_buf_prepare); |
| 539 | EXPORT_SYMBOL(cx8802_buf_queue); |
| 540 | EXPORT_SYMBOL(cx8802_cancel_buffers); |
| 541 | |
| 542 | EXPORT_SYMBOL(cx8802_init_common); |
| 543 | EXPORT_SYMBOL(cx8802_fini_common); |
| 544 | |
| 545 | EXPORT_SYMBOL(cx8802_suspend_common); |
| 546 | EXPORT_SYMBOL(cx8802_resume_common); |
| 547 | |
| 548 | /* ----------------------------------------------------------- */ |
| 549 | /* |
| 550 | * Local variables: |
| 551 | * c-basic-offset: 8 |
| 552 | * End: |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 553 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 554 | */ |