| john stultz | 539eb11 | 2006-06-26 00:25:10 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/include/asm-i386/tsc.h |
| 3 | * |
| 4 | * i386 TSC related functions |
| 5 | */ |
| 6 | #ifndef _ASM_i386_TSC_H |
| 7 | #define _ASM_i386_TSC_H |
| 8 | |
| 9 | #include <linux/config.h> |
| 10 | #include <asm/processor.h> |
| 11 | |
| 12 | /* |
| 13 | * Standard way to access the cycle counter on i586+ CPUs. |
| 14 | * Currently only used on SMP. |
| 15 | * |
| 16 | * If you really have a SMP machine with i486 chips or older, |
| 17 | * compile for that, and this will just always return zero. |
| 18 | * That's ok, it just means that the nicer scheduling heuristics |
| 19 | * won't work for you. |
| 20 | * |
| 21 | * We only use the low 32 bits, and we'd simply better make sure |
| 22 | * that we reschedule before that wraps. Scheduling at least every |
| 23 | * four billion cycles just basically sounds like a good idea, |
| 24 | * regardless of how fast the machine is. |
| 25 | */ |
| 26 | typedef unsigned long long cycles_t; |
| 27 | |
| 28 | extern unsigned int cpu_khz; |
| 29 | extern unsigned int tsc_khz; |
| 30 | |
| 31 | static inline cycles_t get_cycles(void) |
| 32 | { |
| 33 | unsigned long long ret = 0; |
| 34 | |
| 35 | #ifndef CONFIG_X86_TSC |
| 36 | if (!cpu_has_tsc) |
| 37 | return 0; |
| 38 | #endif |
| 39 | |
| 40 | #if defined(CONFIG_X86_GENERIC) || defined(CONFIG_X86_TSC) |
| 41 | rdtscll(ret); |
| 42 | #endif |
| 43 | return ret; |
| 44 | } |
| 45 | |
| 46 | extern void tsc_init(void); |
| 47 | extern void mark_tsc_unstable(void); |
| 48 | |
| 49 | #endif |