Marek Szyprowski | 5b696a6 | 2010-05-20 08:13:04 +0200 | [diff] [blame] | 1 | /* linux/arch/arm/plat-s5pv210/setup-fb-24bpp.c |
| 2 | * |
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com/ |
| 5 | * |
| 6 | * Base s5pv210 setup information for 24bpp LCD framebuffer |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/types.h> |
| 15 | #include <linux/fb.h> |
Kukjin Kim | 1c739c7 | 2010-08-05 07:54:49 +0900 | [diff] [blame] | 16 | #include <linux/gpio.h> |
Marek Szyprowski | 5b696a6 | 2010-05-20 08:13:04 +0200 | [diff] [blame] | 17 | |
| 18 | #include <mach/regs-fb.h> |
Marek Szyprowski | 5b696a6 | 2010-05-20 08:13:04 +0200 | [diff] [blame] | 19 | #include <mach/map.h> |
| 20 | #include <plat/fb.h> |
| 21 | #include <mach/regs-clock.h> |
| 22 | #include <plat/gpio-cfg.h> |
| 23 | |
Ben Dooks | 53134a7 | 2010-05-27 17:02:32 +0900 | [diff] [blame] | 24 | static void s5pv210_fb_cfg_gpios(unsigned int base, unsigned int nr) |
| 25 | { |
Kukjin Kim | a7aac9d | 2010-10-01 20:12:24 +0900 | [diff] [blame] | 26 | s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(2)); |
Ben Dooks | 53134a7 | 2010-05-27 17:02:32 +0900 | [diff] [blame] | 27 | |
| 28 | for (; nr > 0; nr--, base++) |
| 29 | s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); |
| 30 | } |
| 31 | |
| 32 | |
Marek Szyprowski | 5b696a6 | 2010-05-20 08:13:04 +0200 | [diff] [blame] | 33 | void s5pv210_fb_gpio_setup_24bpp(void) |
| 34 | { |
Ben Dooks | 53134a7 | 2010-05-27 17:02:32 +0900 | [diff] [blame] | 35 | s5pv210_fb_cfg_gpios(S5PV210_GPF0(0), 8); |
| 36 | s5pv210_fb_cfg_gpios(S5PV210_GPF1(0), 8); |
| 37 | s5pv210_fb_cfg_gpios(S5PV210_GPF2(0), 8); |
| 38 | s5pv210_fb_cfg_gpios(S5PV210_GPF3(0), 4); |
Marek Szyprowski | 5b696a6 | 2010-05-20 08:13:04 +0200 | [diff] [blame] | 39 | |
| 40 | /* Set DISPLAY_CONTROL register for Display path selection. |
| 41 | * |
| 42 | * ouput | RGB | I80 | ITU |
| 43 | * ----------------------------------- |
| 44 | * 00 | MIE | FIMD | FIMD |
| 45 | * 01 | MDNIE | MDNIE | FIMD |
| 46 | * 10 | FIMD | FIMD | FIMD |
| 47 | * 11 | FIMD | FIMD | FIMD |
| 48 | */ |
| 49 | writel(0x2, S5P_MDNIE_SEL); |
| 50 | } |