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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*****************************************************************************/
2
3/*
4 * head.S -- common startup code for ColdFire CPUs.
5 *
6 * (C) Copyright 1999-2004, Greg Ungerer (gerg@snapgear.com).
7 */
8
9/*****************************************************************************/
10
11#include <linux/config.h>
12#include <linux/sys.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/coldfire.h>
16#include <asm/mcfcache.h>
17#include <asm/mcfsim.h>
18
19/*****************************************************************************/
20
21/*
22 * Define fixed memory sizes. Configuration of a fixed memory size
23 * overrides everything else. If the user defined a size we just
24 * blindly use it (they know what they are doing right :-)
25 */
26#if defined(CONFIG_RAM32MB)
27#define MEM_SIZE 0x02000000 /* memory size 32Mb */
28#elif defined(CONFIG_RAM16MB)
29#define MEM_SIZE 0x01000000 /* memory size 16Mb */
30#elif defined(CONFIG_RAM8MB)
31#define MEM_SIZE 0x00800000 /* memory size 8Mb */
32#elif defined(CONFIG_RAM4MB)
33#define MEM_SIZE 0x00400000 /* memory size 4Mb */
34#elif defined(CONFIG_RAM1MB)
35#define MEM_SIZE 0x00100000 /* memory size 1Mb */
36#endif
37
38/*
39 * Memory size exceptions for special cases. Some boards may be set
40 * for auto memory sizing, but we can't do it that way for some reason.
41 * For example the 5206eLITE board has static RAM, and auto-detecting
Greg Ungerer029fc132005-09-02 10:42:52 +100042 * the SDRAM will do you no good at all. Same goes for the MOD5272.
Linus Torvalds1da177e2005-04-16 15:20:36 -070043 */
44#ifdef CONFIG_RAMAUTO
45#if defined(CONFIG_M5206eLITE)
Greg Ungerer029fc132005-09-02 10:42:52 +100046#define MEM_SIZE 0x00100000 /* 1MiB default memory */
47#endif
48#if defined(CONFIG_MOD5272)
49#define MEM_SIZE 0x00800000 /* 8MiB default memory */
Linus Torvalds1da177e2005-04-16 15:20:36 -070050#endif
51#endif /* CONFIG_RAMAUTO */
52
Greg Ungerer029fc132005-09-02 10:42:52 +100053
Linus Torvalds1da177e2005-04-16 15:20:36 -070054/*
55 * If we don't have a fixed memory size now, then lets build in code
56 * to auto detect the DRAM size. Obviously this is the prefered
57 * method, and should work for most boards (it won't work for those
58 * that do not have their RAM starting at address 0).
59 */
60#if defined(MEM_SIZE)
61.macro GET_MEM_SIZE
62 movel #MEM_SIZE,%d0 /* hard coded memory size */
63.endm
64
65#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
66 defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
67 defined(CONFIG_M528x) || defined(CONFIG_M5307) || \
68 defined(CONFIG_M5407)
69/*
70 * Not all these devices have exactly the same DRAM controller,
71 * but the DCMR register is virtually identical - give or take
72 * a couple of bits. The only exception is the 5272 devices, their
73 * DRAM controller is quite different.
74 */
75.macro GET_MEM_SIZE
76 movel MCF_MBAR+MCFSIM_DMR0,%d0 /* get mask for 1st bank */
77 btst #0,%d0 /* check if region enabled */
78 beq 1f
79 andl #0xfffc0000,%d0
80 beq 1f
81 addl #0x00040000,%d0 /* convert mask to size */
821:
83 movel MCF_MBAR+MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
84 btst #0,%d1 /* check if region enabled */
85 beq 2f
86 andl #0xfffc0000, %d1
87 beq 2f
88 addl #0x00040000,%d1
89 addl %d1,%d0 /* total mem size in d0 */
902:
91.endm
92
93#elif defined(CONFIG_M5272)
94.macro GET_MEM_SIZE
95 movel MCF_MBAR+MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
96 andil #0xfffff000,%d0 /* mask out chip select options */
97 negl %d0 /* negate bits */
98.endm
99
100#else
101#error "ERROR: I don't know how to determine your boards memory size?"
102#endif
103
104
105/*
106 * Most ColdFire boards have their DRAM starting at address 0.
Greg Ungerer029fc132005-09-02 10:42:52 +1000107 * Notable exception is the 5206eLITE board, another is the MOD5272.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108 */
109#if defined(CONFIG_M5206eLITE)
110#define MEM_BASE 0x30000000
111#endif
Greg Ungerer029fc132005-09-02 10:42:52 +1000112#if defined(CONFIG_MOD5272)
113#define MEM_BASE 0x02000000
114#define VBR_BASE 0x20000000 /* vectors in SRAM */
115#endif
Greg Ungerer5b3d98b2005-11-07 14:09:50 +1000116#if defined(CONFIG_M5208EVB)
117#define MEM_BASE 0x40000000
118#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119
120#ifndef MEM_BASE
121#define MEM_BASE 0x00000000 /* memory base at address 0 */
122#endif
123
124/*
125 * The default location for the vectors is at the base of RAM.
126 * Some boards might like to use internal SRAM or something like
127 * that. If no board specific header defines an alternative then
128 * use the base of RAM.
129 */
130#ifndef VBR_BASE
131#define VBR_BASE MEM_BASE /* vector address */
132#endif
133
134/*****************************************************************************/
135
136/*
137 * Boards and platforms can do specific early hardware setup if
138 * they need to. Most don't need this, define away if not required.
139 */
140#ifndef PLATFORM_SETUP
141#define PLATFORM_SETUP
142#endif
143
144/*****************************************************************************/
145
146.global _start
147.global _rambase
148.global _ramvec
149.global _ramstart
150.global _ramend
151
152/*****************************************************************************/
153
154.data
155
156/*
157 * During startup we store away the RAM setup. These are not in the
158 * bss, since their values are determined and written before the bss
159 * has been cleared.
160 */
161_rambase:
162.long 0
163_ramvec:
164.long 0
165_ramstart:
166.long 0
167_ramend:
168.long 0
169
170/*****************************************************************************/
171
172.text
173
174/*
175 * This is the codes first entry point. This is where it all
176 * begins...
177 */
178
179_start:
180 nop /* filler */
181 movew #0x2700, %sr /* no interrupts */
182
183 /*
184 * Do any platform or board specific setup now. Most boards
185 * don't need anything. Those exceptions are define this in
186 * their board specific includes.
187 */
188 PLATFORM_SETUP
189
190 /*
191 * Create basic memory configuration. Set VBR accordingly,
192 * and size memory.
193 */
194 movel #VBR_BASE,%a7
195 movec %a7,%VBR /* set vectors addr */
196 movel %a7,_ramvec
197
198 movel #MEM_BASE,%a7 /* mark the base of RAM */
199 movel %a7,_rambase
200
201 GET_MEM_SIZE /* macro code determines size */
Greg Ungerer029fc132005-09-02 10:42:52 +1000202 addl %a7,%d0
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203 movel %d0,_ramend /* set end ram addr */
204
205 /*
206 * Now that we know what the memory is, lets enable cache
207 * and get things moving. This is Coldfire CPU specific.
208 */
209 CACHE_ENABLE /* enable CPU cache */
210
211
212#ifdef CONFIG_ROMFS_FS
213 /*
214 * Move ROM filesystem above bss :-)
215 */
216 lea _sbss,%a0 /* get start of bss */
217 lea _ebss,%a1 /* set up destination */
218 movel %a0,%a2 /* copy of bss start */
219
220 movel 8(%a0),%d0 /* get size of ROMFS */
221 addql #8,%d0 /* allow for rounding */
222 andl #0xfffffffc, %d0 /* whole words */
223
224 addl %d0,%a0 /* copy from end */
225 addl %d0,%a1 /* copy from end */
226 movel %a1,_ramstart /* set start of ram */
227
228_copy_romfs:
229 movel -(%a0),%d0 /* copy dword */
230 movel %d0,-(%a1)
231 cmpl %a0,%a2 /* check if at end */
232 bne _copy_romfs
233
234#else /* CONFIG_ROMFS_FS */
235 lea _ebss,%a1
236 movel %a1,_ramstart
237#endif /* CONFIG_ROMFS_FS */
238
239
240 /*
241 * Zero out the bss region.
242 */
243 lea _sbss,%a0 /* get start of bss */
244 lea _ebss,%a1 /* get end of bss */
245 clrl %d0 /* set value */
246_clear_bss:
247 movel %d0,(%a0)+ /* clear each word */
248 cmpl %a0,%a1 /* check if at end */
249 bne _clear_bss
250
251 /*
252 * Load the current task pointer and stack.
253 */
254 lea init_thread_union,%a0
255 lea THREAD_SIZE(%a0),%sp
256
257 /*
258 * Assember start up done, start code proper.
259 */
260 jsr start_kernel /* start Linux kernel */
261
262_exit:
263 jmp _exit /* should never get here */
264
265/*****************************************************************************/