Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * |
| 3 | * Support for the mpeg transport stream transfers |
| 4 | * PCI function #2 of the cx2388x. |
| 5 | * |
| 6 | * (c) 2004 Jelle Foks <jelle@foks.8m.com> |
| 7 | * (c) 2004 Chris Pascoe <c.pascoe@itee.uq.edu.au> |
| 8 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 23 | */ |
| 24 | |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/moduleparam.h> |
| 27 | #include <linux/init.h> |
| 28 | #include <linux/device.h> |
| 29 | #include <linux/interrupt.h> |
| 30 | #include <asm/delay.h> |
| 31 | |
| 32 | #include "cx88.h" |
| 33 | |
| 34 | /* ------------------------------------------------------------------ */ |
| 35 | |
| 36 | MODULE_DESCRIPTION("mpeg driver for cx2388x based TV cards"); |
| 37 | MODULE_AUTHOR("Jelle Foks <jelle@foks.8m.com>"); |
| 38 | MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); |
| 39 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
| 40 | MODULE_LICENSE("GPL"); |
| 41 | |
| 42 | static unsigned int debug = 0; |
| 43 | module_param(debug,int,0644); |
| 44 | MODULE_PARM_DESC(debug,"enable debug messages [mpeg]"); |
| 45 | |
| 46 | #define dprintk(level,fmt, arg...) if (debug >= level) \ |
| 47 | printk(KERN_DEBUG "%s/2: " fmt, dev->core->name , ## arg) |
| 48 | |
| 49 | /* ------------------------------------------------------------------ */ |
| 50 | |
| 51 | static int cx8802_start_dma(struct cx8802_dev *dev, |
| 52 | struct cx88_dmaqueue *q, |
| 53 | struct cx88_buffer *buf) |
| 54 | { |
| 55 | struct cx88_core *core = dev->core; |
| 56 | |
Catalin Climov | 3162942 | 2005-11-08 21:36:17 -0800 | [diff] [blame] | 57 | dprintk(0, "cx8802_start_dma w: %d, h: %d, f: %d\n", dev->width, dev->height, buf->vb.field); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 58 | |
| 59 | /* setup fifo + format */ |
| 60 | cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH28], |
| 61 | dev->ts_packet_size, buf->risc.dma); |
| 62 | |
| 63 | /* write TS length to chip */ |
| 64 | cx_write(MO_TS_LNGTH, buf->vb.width); |
| 65 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | /* FIXME: this needs a review. |
| 67 | * also: move to cx88-blackbird + cx88-dvb source files? */ |
| 68 | |
| 69 | if (cx88_boards[core->board].dvb) { |
| 70 | /* negedge driven & software reset */ |
Michael Krufky | f179849 | 2005-07-07 17:58:39 -0700 | [diff] [blame] | 71 | cx_write(TS_GEN_CNTRL, 0x0040 | dev->ts_gen_cntrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | udelay(100); |
| 73 | cx_write(MO_PINMUX_IO, 0x00); |
Michael Krufky | 0d723c0 | 2005-07-07 17:58:42 -0700 | [diff] [blame] | 74 | cx_write(TS_HW_SOP_CNTRL,0x47<<16|188<<4|0x01); |
Mauro Carvalho Chehab | e52e98a | 2005-09-09 13:03:41 -0700 | [diff] [blame] | 75 | switch (core->board) { |
| 76 | case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q: |
| 77 | case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T: |
| 78 | case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD: |
Mauro Carvalho Chehab | 41ef7c1 | 2005-07-12 13:58:44 -0700 | [diff] [blame] | 79 | cx_write(TS_SOP_STAT, 1<<13); |
Mauro Carvalho Chehab | e52e98a | 2005-09-09 13:03:41 -0700 | [diff] [blame] | 80 | break; |
Steven Toth | 0fa14aa | 2006-01-09 15:25:02 -0200 | [diff] [blame] | 81 | case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1: |
| 82 | case CX88_BOARD_HAUPPAUGE_NOVASE2_S1: |
| 83 | cx_write(MO_PINMUX_IO, 0x88); /* Enable MPEG parallel IO and video signal pins */ |
| 84 | udelay(100); |
| 85 | break; |
Mauro Carvalho Chehab | e52e98a | 2005-09-09 13:03:41 -0700 | [diff] [blame] | 86 | default: |
Mauro Carvalho Chehab | 41ef7c1 | 2005-07-12 13:58:44 -0700 | [diff] [blame] | 87 | cx_write(TS_SOP_STAT, 0x00); |
Mauro Carvalho Chehab | e52e98a | 2005-09-09 13:03:41 -0700 | [diff] [blame] | 88 | break; |
Michael Krufky | f179849 | 2005-07-07 17:58:39 -0700 | [diff] [blame] | 89 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 90 | cx_write(TS_GEN_CNTRL, dev->ts_gen_cntrl); |
| 91 | udelay(100); |
| 92 | } |
| 93 | |
| 94 | if (cx88_boards[core->board].blackbird) { |
| 95 | cx_write(MO_PINMUX_IO, 0x88); /* enable MPEG parallel IO */ |
| 96 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | cx_write(TS_GEN_CNTRL, 0x46); /* punctured clock TS & posedge driven & software reset */ |
| 98 | udelay(100); |
| 99 | |
| 100 | cx_write(TS_HW_SOP_CNTRL, 0x408); /* mpeg start byte */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | cx_write(TS_VALERR_CNTRL, 0x2000); |
| 102 | |
| 103 | cx_write(TS_GEN_CNTRL, 0x06); /* punctured clock TS & posedge driven */ |
| 104 | udelay(100); |
| 105 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | |
| 107 | /* reset counter */ |
| 108 | cx_write(MO_TS_GPCNTRL, GP_COUNT_CONTROL_RESET); |
| 109 | q->count = 1; |
| 110 | |
| 111 | /* enable irqs */ |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 112 | dprintk( 0, "setting the interrupt mask\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 113 | cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x04); |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 114 | cx_set(MO_TS_INTMSK, 0x1f0011); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | |
| 116 | /* start dma */ |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 117 | cx_set(MO_DEV_CNTRL2, (1<<5)); |
| 118 | cx_set(MO_TS_DMACNTRL, 0x11); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | return 0; |
| 120 | } |
| 121 | |
| 122 | static int cx8802_stop_dma(struct cx8802_dev *dev) |
| 123 | { |
| 124 | struct cx88_core *core = dev->core; |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 125 | dprintk( 0, "cx8802_stop_dma\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 126 | |
| 127 | /* stop dma */ |
| 128 | cx_clear(MO_TS_DMACNTRL, 0x11); |
| 129 | |
| 130 | /* disable irqs */ |
| 131 | cx_clear(MO_PCI_INTMSK, 0x000004); |
| 132 | cx_clear(MO_TS_INTMSK, 0x1f0011); |
| 133 | |
| 134 | /* Reset the controller */ |
| 135 | cx_write(TS_GEN_CNTRL, 0xcd); |
| 136 | return 0; |
| 137 | } |
| 138 | |
| 139 | static int cx8802_restart_queue(struct cx8802_dev *dev, |
| 140 | struct cx88_dmaqueue *q) |
| 141 | { |
| 142 | struct cx88_buffer *buf; |
| 143 | struct list_head *item; |
| 144 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 145 | dprintk( 0, "cx8802_restart_queue\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | if (list_empty(&q->active)) |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 147 | { |
| 148 | dprintk( 0, "cx8802_restart_queue: queue is empty\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | return 0; |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 150 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | |
| 152 | buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); |
| 153 | dprintk(2,"restart_queue [%p/%d]: restart dma\n", |
| 154 | buf, buf->vb.i); |
| 155 | cx8802_start_dma(dev, q, buf); |
| 156 | list_for_each(item,&q->active) { |
| 157 | buf = list_entry(item, struct cx88_buffer, vb.queue); |
| 158 | buf->count = q->count++; |
| 159 | } |
| 160 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); |
| 161 | return 0; |
| 162 | } |
| 163 | |
| 164 | /* ------------------------------------------------------------------ */ |
| 165 | |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 166 | int cx8802_buf_prepare(struct videobuf_queue *q, struct cx8802_dev *dev, |
| 167 | struct cx88_buffer *buf, enum v4l2_field field) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 168 | { |
| 169 | int size = dev->ts_packet_size * dev->ts_packet_count; |
| 170 | int rc; |
| 171 | |
| 172 | dprintk(1, "%s: %p\n", __FUNCTION__, buf); |
| 173 | if (0 != buf->vb.baddr && buf->vb.bsize < size) |
| 174 | return -EINVAL; |
| 175 | |
| 176 | if (STATE_NEEDS_INIT == buf->vb.state) { |
| 177 | buf->vb.width = dev->ts_packet_size; |
| 178 | buf->vb.height = dev->ts_packet_count; |
| 179 | buf->vb.size = size; |
Catalin Climov | 3162942 | 2005-11-08 21:36:17 -0800 | [diff] [blame] | 180 | buf->vb.field = field /*V4L2_FIELD_TOP*/; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 182 | if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL))) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 183 | goto fail; |
| 184 | cx88_risc_databuffer(dev->pci, &buf->risc, |
| 185 | buf->vb.dma.sglist, |
| 186 | buf->vb.width, buf->vb.height); |
| 187 | } |
| 188 | buf->vb.state = STATE_PREPARED; |
| 189 | return 0; |
| 190 | |
| 191 | fail: |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 192 | cx88_free_buffer(q,buf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | return rc; |
| 194 | } |
| 195 | |
| 196 | void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf) |
| 197 | { |
| 198 | struct cx88_buffer *prev; |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 199 | struct cx88_dmaqueue *cx88q = &dev->mpegq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 200 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 201 | dprintk( 1, "cx8802_buf_queue\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | /* add jump to stopper */ |
| 203 | buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC); |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 204 | buf->risc.jmp[1] = cpu_to_le32(cx88q->stopper.dma); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 205 | |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 206 | if (list_empty(&cx88q->active)) { |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 207 | dprintk( 0, "queue is empty - first active\n" ); |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 208 | list_add_tail(&buf->vb.queue,&cx88q->active); |
| 209 | cx8802_start_dma(dev, cx88q, buf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | buf->vb.state = STATE_ACTIVE; |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 211 | buf->count = cx88q->count++; |
| 212 | mod_timer(&cx88q->timeout, jiffies+BUFFER_TIMEOUT); |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 213 | dprintk(0,"[%p/%d] %s - first active\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 214 | buf, buf->vb.i, __FUNCTION__); |
| 215 | |
| 216 | } else { |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 217 | dprintk( 1, "queue is not empty - append to active\n" ); |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 218 | prev = list_entry(cx88q->active.prev, struct cx88_buffer, vb.queue); |
| 219 | list_add_tail(&buf->vb.queue,&cx88q->active); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 220 | buf->vb.state = STATE_ACTIVE; |
Mauro Carvalho Chehab | c7b0ac0 | 2006-03-10 12:29:15 -0300 | [diff] [blame] | 221 | buf->count = cx88q->count++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 222 | prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 223 | dprintk( 1, "[%p/%d] %s - append to active\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | buf, buf->vb.i, __FUNCTION__); |
| 225 | } |
| 226 | } |
| 227 | |
| 228 | /* ----------------------------------------------------------- */ |
| 229 | |
| 230 | static void do_cancel_buffers(struct cx8802_dev *dev, char *reason, int restart) |
| 231 | { |
| 232 | struct cx88_dmaqueue *q = &dev->mpegq; |
| 233 | struct cx88_buffer *buf; |
| 234 | unsigned long flags; |
| 235 | |
| 236 | spin_lock_irqsave(&dev->slock,flags); |
| 237 | while (!list_empty(&q->active)) { |
| 238 | buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); |
| 239 | list_del(&buf->vb.queue); |
| 240 | buf->vb.state = STATE_ERROR; |
| 241 | wake_up(&buf->vb.done); |
| 242 | dprintk(1,"[%p/%d] %s - dma=0x%08lx\n", |
| 243 | buf, buf->vb.i, reason, (unsigned long)buf->risc.dma); |
| 244 | } |
| 245 | if (restart) |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 246 | { |
| 247 | dprintk(0, "restarting queue\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 248 | cx8802_restart_queue(dev,q); |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 249 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 250 | spin_unlock_irqrestore(&dev->slock,flags); |
| 251 | } |
| 252 | |
| 253 | void cx8802_cancel_buffers(struct cx8802_dev *dev) |
| 254 | { |
| 255 | struct cx88_dmaqueue *q = &dev->mpegq; |
| 256 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 257 | dprintk( 1, "cx8802_cancel_buffers" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | del_timer_sync(&q->timeout); |
| 259 | cx8802_stop_dma(dev); |
| 260 | do_cancel_buffers(dev,"cancel",0); |
| 261 | } |
| 262 | |
| 263 | static void cx8802_timeout(unsigned long data) |
| 264 | { |
| 265 | struct cx8802_dev *dev = (struct cx8802_dev*)data; |
| 266 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 267 | dprintk(0, "%s\n",__FUNCTION__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 268 | |
| 269 | if (debug) |
| 270 | cx88_sram_channel_dump(dev->core, &cx88_sram_channels[SRAM_CH28]); |
| 271 | cx8802_stop_dma(dev); |
| 272 | do_cancel_buffers(dev,"timeout",1); |
| 273 | } |
| 274 | |
Mauro Carvalho Chehab | 41ef7c1 | 2005-07-12 13:58:44 -0700 | [diff] [blame] | 275 | static char *cx88_mpeg_irqs[32] = { |
| 276 | "ts_risci1", NULL, NULL, NULL, |
| 277 | "ts_risci2", NULL, NULL, NULL, |
| 278 | "ts_oflow", NULL, NULL, NULL, |
| 279 | "ts_sync", NULL, NULL, NULL, |
| 280 | "opc_err", "par_err", "rip_err", "pci_abort", |
| 281 | "ts_err?", |
| 282 | }; |
| 283 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | static void cx8802_mpeg_irq(struct cx8802_dev *dev) |
| 285 | { |
| 286 | struct cx88_core *core = dev->core; |
| 287 | u32 status, mask, count; |
| 288 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 289 | dprintk( 1, "cx8802_mpeg_irq\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 290 | status = cx_read(MO_TS_INTSTAT); |
| 291 | mask = cx_read(MO_TS_INTMSK); |
| 292 | if (0 == (status & mask)) |
| 293 | return; |
| 294 | |
| 295 | cx_write(MO_TS_INTSTAT, status); |
Mauro Carvalho Chehab | 41ef7c1 | 2005-07-12 13:58:44 -0700 | [diff] [blame] | 296 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 297 | if (debug || (status & mask & ~0xff)) |
| 298 | cx88_print_irqbits(core->name, "irq mpeg ", |
| 299 | cx88_mpeg_irqs, status, mask); |
| 300 | |
| 301 | /* risc op code error */ |
| 302 | if (status & (1 << 16)) { |
| 303 | printk(KERN_WARNING "%s: mpeg risc op code error\n",core->name); |
| 304 | cx_clear(MO_TS_DMACNTRL, 0x11); |
| 305 | cx88_sram_channel_dump(dev->core, &cx88_sram_channels[SRAM_CH28]); |
| 306 | } |
| 307 | |
| 308 | /* risc1 y */ |
| 309 | if (status & 0x01) { |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 310 | dprintk( 1, "wake up\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 311 | spin_lock(&dev->slock); |
| 312 | count = cx_read(MO_TS_GPCNT); |
| 313 | cx88_wakeup(dev->core, &dev->mpegq, count); |
| 314 | spin_unlock(&dev->slock); |
| 315 | } |
| 316 | |
| 317 | /* risc2 y */ |
| 318 | if (status & 0x10) { |
| 319 | spin_lock(&dev->slock); |
| 320 | cx8802_restart_queue(dev,&dev->mpegq); |
| 321 | spin_unlock(&dev->slock); |
| 322 | } |
| 323 | |
Mauro Carvalho Chehab | 4ac9791 | 2005-11-08 21:37:43 -0800 | [diff] [blame] | 324 | /* other general errors */ |
| 325 | if (status & 0x1f0100) { |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 326 | dprintk( 0, "general errors: 0x%08x\n", status & 0x1f0100 ); |
Mauro Carvalho Chehab | 4ac9791 | 2005-11-08 21:37:43 -0800 | [diff] [blame] | 327 | spin_lock(&dev->slock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 328 | cx8802_stop_dma(dev); |
Mauro Carvalho Chehab | 4ac9791 | 2005-11-08 21:37:43 -0800 | [diff] [blame] | 329 | cx8802_restart_queue(dev,&dev->mpegq); |
| 330 | spin_unlock(&dev->slock); |
| 331 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | } |
| 333 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 334 | #define MAX_IRQ_LOOP 10 |
| 335 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 336 | static irqreturn_t cx8802_irq(int irq, void *dev_id, struct pt_regs *regs) |
| 337 | { |
| 338 | struct cx8802_dev *dev = dev_id; |
| 339 | struct cx88_core *core = dev->core; |
| 340 | u32 status; |
| 341 | int loop, handled = 0; |
| 342 | |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 343 | for (loop = 0; loop < MAX_IRQ_LOOP; loop++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x04); |
| 345 | if (0 == status) |
| 346 | goto out; |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 347 | dprintk( 1, "cx8802_irq\n" ); |
| 348 | dprintk( 1, " loop: %d/%d\n", loop, MAX_IRQ_LOOP ); |
| 349 | dprintk( 1, " status: %d\n", status ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 350 | handled = 1; |
| 351 | cx_write(MO_PCI_INTSTAT, status); |
| 352 | |
| 353 | if (status & core->pci_irqmask) |
| 354 | cx88_core_irq(core,status); |
| 355 | if (status & 0x04) |
| 356 | cx8802_mpeg_irq(dev); |
| 357 | }; |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 358 | if (MAX_IRQ_LOOP == loop) { |
| 359 | dprintk( 0, "clearing mask\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 360 | printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n", |
| 361 | core->name); |
| 362 | cx_write(MO_PCI_INTMSK,0); |
| 363 | } |
| 364 | |
| 365 | out: |
| 366 | return IRQ_RETVAL(handled); |
| 367 | } |
| 368 | |
| 369 | /* ----------------------------------------------------------- */ |
| 370 | /* exported stuff */ |
| 371 | |
| 372 | int cx8802_init_common(struct cx8802_dev *dev) |
| 373 | { |
| 374 | struct cx88_core *core = dev->core; |
| 375 | int err; |
| 376 | |
| 377 | /* pci init */ |
| 378 | if (pci_enable_device(dev->pci)) |
| 379 | return -EIO; |
| 380 | pci_set_master(dev->pci); |
| 381 | if (!pci_dma_supported(dev->pci,0xffffffff)) { |
| 382 | printk("%s/2: Oops: no 32bit PCI DMA ???\n",dev->core->name); |
| 383 | return -EIO; |
| 384 | } |
| 385 | |
| 386 | pci_read_config_byte(dev->pci, PCI_CLASS_REVISION, &dev->pci_rev); |
Mauro Carvalho Chehab | 4ac9791 | 2005-11-08 21:37:43 -0800 | [diff] [blame] | 387 | pci_read_config_byte(dev->pci, PCI_LATENCY_TIMER, &dev->pci_lat); |
| 388 | printk(KERN_INFO "%s/2: found at %s, rev: %d, irq: %d, " |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 389 | "latency: %d, mmio: 0x%lx\n", dev->core->name, |
| 390 | pci_name(dev->pci), dev->pci_rev, dev->pci->irq, |
| 391 | dev->pci_lat,pci_resource_start(dev->pci,0)); |
| 392 | |
| 393 | /* initialize driver struct */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 394 | spin_lock_init(&dev->slock); |
| 395 | |
| 396 | /* init dma queue */ |
| 397 | INIT_LIST_HEAD(&dev->mpegq.active); |
| 398 | INIT_LIST_HEAD(&dev->mpegq.queued); |
| 399 | dev->mpegq.timeout.function = cx8802_timeout; |
| 400 | dev->mpegq.timeout.data = (unsigned long)dev; |
| 401 | init_timer(&dev->mpegq.timeout); |
| 402 | cx88_risc_stopper(dev->pci,&dev->mpegq.stopper, |
| 403 | MO_TS_DMACNTRL,0x11,0x00); |
| 404 | |
| 405 | /* get irq */ |
| 406 | err = request_irq(dev->pci->irq, cx8802_irq, |
| 407 | SA_SHIRQ | SA_INTERRUPT, dev->core->name, dev); |
| 408 | if (err < 0) { |
| 409 | printk(KERN_ERR "%s: can't get IRQ %d\n", |
| 410 | dev->core->name, dev->pci->irq); |
| 411 | return err; |
| 412 | } |
| 413 | cx_set(MO_PCI_INTMSK, core->pci_irqmask); |
| 414 | |
| 415 | /* everything worked */ |
| 416 | pci_set_drvdata(dev->pci,dev); |
| 417 | return 0; |
| 418 | } |
| 419 | |
| 420 | void cx8802_fini_common(struct cx8802_dev *dev) |
| 421 | { |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 422 | dprintk( 2, "cx8802_fini_common\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | cx8802_stop_dma(dev); |
| 424 | pci_disable_device(dev->pci); |
| 425 | |
| 426 | /* unregister stuff */ |
| 427 | free_irq(dev->pci->irq, dev); |
| 428 | pci_set_drvdata(dev->pci, NULL); |
| 429 | |
| 430 | /* free memory */ |
| 431 | btcx_riscmem_free(dev->pci,&dev->mpegq.stopper); |
| 432 | } |
| 433 | |
| 434 | /* ----------------------------------------------------------- */ |
| 435 | |
| 436 | int cx8802_suspend_common(struct pci_dev *pci_dev, pm_message_t state) |
| 437 | { |
Mauro Carvalho Chehab | 4ac9791 | 2005-11-08 21:37:43 -0800 | [diff] [blame] | 438 | struct cx8802_dev *dev = pci_get_drvdata(pci_dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 439 | struct cx88_core *core = dev->core; |
| 440 | |
| 441 | /* stop mpeg dma */ |
| 442 | spin_lock(&dev->slock); |
| 443 | if (!list_empty(&dev->mpegq.active)) { |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 444 | dprintk( 2, "suspend\n" ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | printk("%s: suspend mpeg\n", core->name); |
| 446 | cx8802_stop_dma(dev); |
| 447 | del_timer(&dev->mpegq.timeout); |
| 448 | } |
| 449 | spin_unlock(&dev->slock); |
| 450 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 451 | /* FIXME -- shutdown device */ |
| 452 | cx88_shutdown(dev->core); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 453 | |
| 454 | pci_save_state(pci_dev); |
| 455 | if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) { |
| 456 | pci_disable_device(pci_dev); |
| 457 | dev->state.disabled = 1; |
| 458 | } |
| 459 | return 0; |
| 460 | } |
| 461 | |
| 462 | int cx8802_resume_common(struct pci_dev *pci_dev) |
| 463 | { |
Mauro Carvalho Chehab | 08adb9e | 2005-09-09 13:03:55 -0700 | [diff] [blame] | 464 | struct cx8802_dev *dev = pci_get_drvdata(pci_dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | struct cx88_core *core = dev->core; |
Mauro Carvalho Chehab | 08adb9e | 2005-09-09 13:03:55 -0700 | [diff] [blame] | 466 | int err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 467 | |
| 468 | if (dev->state.disabled) { |
Mauro Carvalho Chehab | 08adb9e | 2005-09-09 13:03:55 -0700 | [diff] [blame] | 469 | err=pci_enable_device(pci_dev); |
| 470 | if (err) { |
| 471 | printk(KERN_ERR "%s: can't enable device\n", |
| 472 | dev->core->name); |
| 473 | return err; |
| 474 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 475 | dev->state.disabled = 0; |
| 476 | } |
Mauro Carvalho Chehab | 08adb9e | 2005-09-09 13:03:55 -0700 | [diff] [blame] | 477 | err=pci_set_power_state(pci_dev, PCI_D0); |
| 478 | if (err) { |
| 479 | printk(KERN_ERR "%s: can't enable device\n", |
| 480 | dev->core->name); |
| 481 | pci_disable_device(pci_dev); |
| 482 | dev->state.disabled = 1; |
| 483 | |
| 484 | return err; |
| 485 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 486 | pci_restore_state(pci_dev); |
| 487 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 488 | /* FIXME: re-initialize hardware */ |
| 489 | cx88_reset(dev->core); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 490 | |
| 491 | /* restart video+vbi capture */ |
| 492 | spin_lock(&dev->slock); |
| 493 | if (!list_empty(&dev->mpegq.active)) { |
| 494 | printk("%s: resume mpeg\n", core->name); |
| 495 | cx8802_restart_queue(dev,&dev->mpegq); |
| 496 | } |
| 497 | spin_unlock(&dev->slock); |
| 498 | |
| 499 | return 0; |
| 500 | } |
| 501 | |
| 502 | /* ----------------------------------------------------------- */ |
| 503 | |
| 504 | EXPORT_SYMBOL(cx8802_buf_prepare); |
| 505 | EXPORT_SYMBOL(cx8802_buf_queue); |
| 506 | EXPORT_SYMBOL(cx8802_cancel_buffers); |
| 507 | |
| 508 | EXPORT_SYMBOL(cx8802_init_common); |
| 509 | EXPORT_SYMBOL(cx8802_fini_common); |
| 510 | |
| 511 | EXPORT_SYMBOL(cx8802_suspend_common); |
| 512 | EXPORT_SYMBOL(cx8802_resume_common); |
| 513 | |
| 514 | /* ----------------------------------------------------------- */ |
| 515 | /* |
| 516 | * Local variables: |
| 517 | * c-basic-offset: 8 |
| 518 | * End: |
Mauro Carvalho Chehab | b45009b | 2005-06-23 22:05:03 -0700 | [diff] [blame] | 519 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | */ |