| Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 1 | #ifndef ASM_MSIDEF_H |
| 2 | #define ASM_MSIDEF_H |
| 3 | |
| 4 | /* |
| 5 | * Constants for Intel APIC based MSI messages. |
| 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * Shifts for MSI data |
| 10 | */ |
| 11 | |
| 12 | #define MSI_DATA_VECTOR_SHIFT 0 |
| 13 | #define MSI_DATA_VECTOR_MASK 0x000000ff |
| 14 | #define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & MSI_DATA_VECTOR_MASK) |
| 15 | |
| 16 | #define MSI_DATA_DELIVERY_MODE_SHIFT 8 |
| 17 | #define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT) |
| 18 | #define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT) |
| 19 | |
| 20 | #define MSI_DATA_LEVEL_SHIFT 14 |
| 21 | #define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT) |
| 22 | #define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT) |
| 23 | |
| 24 | #define MSI_DATA_TRIGGER_SHIFT 15 |
| 25 | #define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT) |
| 26 | #define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT) |
| 27 | |
| 28 | /* |
| 29 | * Shift/mask fields for msi address |
| 30 | */ |
| 31 | |
| 32 | #define MSI_ADDR_BASE_HI 0 |
| 33 | #define MSI_ADDR_BASE_LO 0xfee00000 |
| 34 | |
| 35 | #define MSI_ADDR_DEST_MODE_SHIFT 2 |
| 36 | #define MSI_ADDR_DEST_MODE_PHYSICAL (0 << MSI_ADDR_DEST_MODE_SHIFT) |
| 37 | #define MSI_ADDR_DEST_MODE_LOGICAL (1 << MSI_ADDR_DEST_MODE_SHIFT) |
| 38 | |
| 39 | #define MSI_ADDR_REDIRECTION_SHIFT 3 |
| 40 | #define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT) /* dedicated cpu */ |
| 41 | #define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT) /* lowest priority */ |
| 42 | |
| 43 | #define MSI_ADDR_DEST_ID_SHIFT 12 |
| 44 | #define MSI_ADDR_DEST_ID_MASK 0x00ffff0 |
| 45 | #define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & MSI_ADDR_DEST_ID_MASK) |
| 46 | |
| 47 | #endif /* ASM_MSIDEF_H */ |