Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver |
| 3 | * |
| 4 | * Copyright (c) 2001-2002 Denis Oliver Kropp <dok@directfb.org> |
| 5 | * |
| 6 | * |
| 7 | * Card specific code is based on XFree86's neomagic driver. |
| 8 | * Framebuffer framework code is based on code of cyber2000fb. |
| 9 | * |
| 10 | * This file is subject to the terms and conditions of the GNU General |
| 11 | * Public License. See the file COPYING in the main directory of this |
| 12 | * archive for more details. |
| 13 | * |
| 14 | * |
| 15 | * 0.4.1 |
| 16 | * - Cosmetic changes (dok) |
| 17 | * |
| 18 | * 0.4 |
| 19 | * - Toshiba Libretto support, allow modes larger than LCD size if |
| 20 | * LCD is disabled, keep BIOS settings if internal/external display |
| 21 | * haven't been enabled explicitly |
| 22 | * (Thomas J. Moore <dark@mama.indstate.edu>) |
| 23 | * |
| 24 | * 0.3.3 |
| 25 | * - Porting over to new fbdev api. (jsimmons) |
| 26 | * |
| 27 | * 0.3.2 |
| 28 | * - got rid of all floating point (dok) |
| 29 | * |
| 30 | * 0.3.1 |
| 31 | * - added module license (dok) |
| 32 | * |
| 33 | * 0.3 |
| 34 | * - hardware accelerated clear and move for 2200 and above (dok) |
| 35 | * - maximum allowed dotclock is handled now (dok) |
| 36 | * |
| 37 | * 0.2.1 |
| 38 | * - correct panning after X usage (dok) |
| 39 | * - added module and kernel parameters (dok) |
| 40 | * - no stretching if external display is enabled (dok) |
| 41 | * |
| 42 | * 0.2 |
| 43 | * - initial version (dok) |
| 44 | * |
| 45 | * |
| 46 | * TODO |
| 47 | * - ioctl for internal/external switching |
| 48 | * - blanking |
| 49 | * - 32bit depth support, maybe impossible |
| 50 | * - disable pan-on-sync, need specs |
| 51 | * |
| 52 | * BUGS |
| 53 | * - white margin on bootup like with tdfxfb (colormap problem?) |
| 54 | * |
| 55 | */ |
| 56 | |
| 57 | #include <linux/config.h> |
| 58 | #include <linux/module.h> |
| 59 | #include <linux/kernel.h> |
| 60 | #include <linux/errno.h> |
| 61 | #include <linux/string.h> |
| 62 | #include <linux/mm.h> |
| 63 | #include <linux/tty.h> |
| 64 | #include <linux/slab.h> |
| 65 | #include <linux/delay.h> |
| 66 | #include <linux/fb.h> |
| 67 | #include <linux/pci.h> |
| 68 | #include <linux/init.h> |
| 69 | #ifdef CONFIG_TOSHIBA |
| 70 | #include <linux/toshiba.h> |
| 71 | extern int tosh_smm(SMMRegisters *regs); |
| 72 | #endif |
| 73 | |
| 74 | #include <asm/io.h> |
| 75 | #include <asm/irq.h> |
| 76 | #include <asm/pgtable.h> |
| 77 | #include <asm/system.h> |
| 78 | #include <asm/uaccess.h> |
| 79 | |
| 80 | #ifdef CONFIG_MTRR |
| 81 | #include <asm/mtrr.h> |
| 82 | #endif |
| 83 | |
| 84 | #include <video/vga.h> |
| 85 | #include <video/neomagic.h> |
| 86 | |
| 87 | #define NEOFB_VERSION "0.4.2" |
| 88 | |
| 89 | /* --------------------------------------------------------------------- */ |
| 90 | |
| 91 | static int internal; |
| 92 | static int external; |
| 93 | static int libretto; |
| 94 | static int nostretch; |
| 95 | static int nopciburst; |
| 96 | static char *mode_option __devinitdata = NULL; |
| 97 | |
| 98 | #ifdef MODULE |
| 99 | |
| 100 | MODULE_AUTHOR("(c) 2001-2002 Denis Oliver Kropp <dok@convergence.de>"); |
| 101 | MODULE_LICENSE("GPL"); |
| 102 | MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips"); |
| 103 | module_param(internal, bool, 0); |
| 104 | MODULE_PARM_DESC(internal, "Enable output on internal LCD Display."); |
| 105 | module_param(external, bool, 0); |
| 106 | MODULE_PARM_DESC(external, "Enable output on external CRT."); |
| 107 | module_param(libretto, bool, 0); |
| 108 | MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD."); |
| 109 | module_param(nostretch, bool, 0); |
| 110 | MODULE_PARM_DESC(nostretch, |
| 111 | "Disable stretching of modes smaller than LCD."); |
| 112 | module_param(nopciburst, bool, 0); |
| 113 | MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode."); |
| 114 | module_param(mode_option, charp, 0); |
| 115 | MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)"); |
| 116 | |
| 117 | #endif |
| 118 | |
| 119 | |
| 120 | /* --------------------------------------------------------------------- */ |
| 121 | |
| 122 | static biosMode bios8[] = { |
| 123 | {320, 240, 0x40}, |
| 124 | {300, 400, 0x42}, |
| 125 | {640, 400, 0x20}, |
| 126 | {640, 480, 0x21}, |
| 127 | {800, 600, 0x23}, |
| 128 | {1024, 768, 0x25}, |
| 129 | }; |
| 130 | |
| 131 | static biosMode bios16[] = { |
| 132 | {320, 200, 0x2e}, |
| 133 | {320, 240, 0x41}, |
| 134 | {300, 400, 0x43}, |
| 135 | {640, 480, 0x31}, |
| 136 | {800, 600, 0x34}, |
| 137 | {1024, 768, 0x37}, |
| 138 | }; |
| 139 | |
| 140 | static biosMode bios24[] = { |
| 141 | {640, 480, 0x32}, |
| 142 | {800, 600, 0x35}, |
| 143 | {1024, 768, 0x38} |
| 144 | }; |
| 145 | |
| 146 | #ifdef NO_32BIT_SUPPORT_YET |
| 147 | /* FIXME: guessed values, wrong */ |
| 148 | static biosMode bios32[] = { |
| 149 | {640, 480, 0x33}, |
| 150 | {800, 600, 0x36}, |
| 151 | {1024, 768, 0x39} |
| 152 | }; |
| 153 | #endif |
| 154 | |
| 155 | static inline void write_le32(int regindex, u32 val, const struct neofb_par *par) |
| 156 | { |
| 157 | writel(val, par->neo2200 + par->cursorOff + regindex); |
| 158 | } |
| 159 | |
| 160 | static int neoFindMode(int xres, int yres, int depth) |
| 161 | { |
| 162 | int xres_s; |
| 163 | int i, size; |
| 164 | biosMode *mode; |
| 165 | |
| 166 | switch (depth) { |
| 167 | case 8: |
| 168 | size = sizeof(bios8) / sizeof(biosMode); |
| 169 | mode = bios8; |
| 170 | break; |
| 171 | case 16: |
| 172 | size = sizeof(bios16) / sizeof(biosMode); |
| 173 | mode = bios16; |
| 174 | break; |
| 175 | case 24: |
| 176 | size = sizeof(bios24) / sizeof(biosMode); |
| 177 | mode = bios24; |
| 178 | break; |
| 179 | #ifdef NO_32BIT_SUPPORT_YET |
| 180 | case 32: |
| 181 | size = sizeof(bios32) / sizeof(biosMode); |
| 182 | mode = bios32; |
| 183 | break; |
| 184 | #endif |
| 185 | default: |
| 186 | return 0; |
| 187 | } |
| 188 | |
| 189 | for (i = 0; i < size; i++) { |
| 190 | if (xres <= mode[i].x_res) { |
| 191 | xres_s = mode[i].x_res; |
| 192 | for (; i < size; i++) { |
| 193 | if (mode[i].x_res != xres_s) |
| 194 | return mode[i - 1].mode; |
| 195 | if (yres <= mode[i].y_res) |
| 196 | return mode[i].mode; |
| 197 | } |
| 198 | } |
| 199 | } |
| 200 | return mode[size - 1].mode; |
| 201 | } |
| 202 | |
| 203 | /* |
| 204 | * neoCalcVCLK -- |
| 205 | * |
| 206 | * Determine the closest clock frequency to the one requested. |
| 207 | */ |
| 208 | #define REF_FREQ 0xe517 /* 14.31818 in 20.12 fixed point */ |
| 209 | #define MAX_N 127 |
| 210 | #define MAX_D 31 |
| 211 | #define MAX_F 1 |
| 212 | |
| 213 | static void neoCalcVCLK(const struct fb_info *info, |
| 214 | struct neofb_par *par, long freq) |
| 215 | { |
| 216 | int n, d, f; |
| 217 | int n_best = 0, d_best = 0, f_best = 0; |
| 218 | long f_best_diff = (0x7ffff << 12); /* 20.12 */ |
| 219 | long f_target = (freq << 12) / 1000; /* 20.12 */ |
| 220 | |
| 221 | for (f = 0; f <= MAX_F; f++) |
| 222 | for (n = 0; n <= MAX_N; n++) |
| 223 | for (d = 0; d <= MAX_D; d++) { |
| 224 | long f_out; /* 20.12 */ |
| 225 | long f_diff; /* 20.12 */ |
| 226 | |
| 227 | f_out = |
| 228 | ((((n + 1) << 12) / ((d + |
| 229 | 1) * |
| 230 | (1 << f))) >> 12) |
| 231 | * REF_FREQ; |
| 232 | f_diff = abs(f_out - f_target); |
| 233 | if (f_diff < f_best_diff) { |
| 234 | f_best_diff = f_diff; |
| 235 | n_best = n; |
| 236 | d_best = d; |
| 237 | f_best = f; |
| 238 | } |
| 239 | } |
| 240 | |
| 241 | if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 || |
| 242 | info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 || |
| 243 | info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 || |
| 244 | info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) { |
| 245 | /* NOT_DONE: We are trying the full range of the 2200 clock. |
| 246 | We should be able to try n up to 2047 */ |
| 247 | par->VCLK3NumeratorLow = n_best; |
| 248 | par->VCLK3NumeratorHigh = (f_best << 7); |
| 249 | } else |
| 250 | par->VCLK3NumeratorLow = n_best | (f_best << 7); |
| 251 | |
| 252 | par->VCLK3Denominator = d_best; |
| 253 | |
| 254 | #ifdef NEOFB_DEBUG |
| 255 | printk("neoVCLK: f:%d NumLow=%d NumHi=%d Den=%d Df=%d\n", |
| 256 | f_target >> 12, |
| 257 | par->VCLK3NumeratorLow, |
| 258 | par->VCLK3NumeratorHigh, |
| 259 | par->VCLK3Denominator, f_best_diff >> 12); |
| 260 | #endif |
| 261 | } |
| 262 | |
| 263 | /* |
| 264 | * vgaHWInit -- |
| 265 | * Handle the initialization, etc. of a screen. |
| 266 | * Return FALSE on failure. |
| 267 | */ |
| 268 | |
| 269 | static int vgaHWInit(const struct fb_var_screeninfo *var, |
| 270 | const struct fb_info *info, |
| 271 | struct neofb_par *par, struct xtimings *timings) |
| 272 | { |
| 273 | par->MiscOutReg = 0x23; |
| 274 | |
| 275 | if (!(timings->sync & FB_SYNC_HOR_HIGH_ACT)) |
| 276 | par->MiscOutReg |= 0x40; |
| 277 | |
| 278 | if (!(timings->sync & FB_SYNC_VERT_HIGH_ACT)) |
| 279 | par->MiscOutReg |= 0x80; |
| 280 | |
| 281 | /* |
| 282 | * Time Sequencer |
| 283 | */ |
| 284 | par->Sequencer[0] = 0x00; |
| 285 | par->Sequencer[1] = 0x01; |
| 286 | par->Sequencer[2] = 0x0F; |
| 287 | par->Sequencer[3] = 0x00; /* Font select */ |
| 288 | par->Sequencer[4] = 0x0E; /* Misc */ |
| 289 | |
| 290 | /* |
| 291 | * CRTC Controller |
| 292 | */ |
| 293 | par->CRTC[0] = (timings->HTotal >> 3) - 5; |
| 294 | par->CRTC[1] = (timings->HDisplay >> 3) - 1; |
| 295 | par->CRTC[2] = (timings->HDisplay >> 3) - 1; |
| 296 | par->CRTC[3] = (((timings->HTotal >> 3) - 1) & 0x1F) | 0x80; |
| 297 | par->CRTC[4] = (timings->HSyncStart >> 3); |
| 298 | par->CRTC[5] = ((((timings->HTotal >> 3) - 1) & 0x20) << 2) |
| 299 | | (((timings->HSyncEnd >> 3)) & 0x1F); |
| 300 | par->CRTC[6] = (timings->VTotal - 2) & 0xFF; |
| 301 | par->CRTC[7] = (((timings->VTotal - 2) & 0x100) >> 8) |
| 302 | | (((timings->VDisplay - 1) & 0x100) >> 7) |
| 303 | | ((timings->VSyncStart & 0x100) >> 6) |
| 304 | | (((timings->VDisplay - 1) & 0x100) >> 5) |
| 305 | | 0x10 | (((timings->VTotal - 2) & 0x200) >> 4) |
| 306 | | (((timings->VDisplay - 1) & 0x200) >> 3) |
| 307 | | ((timings->VSyncStart & 0x200) >> 2); |
| 308 | par->CRTC[8] = 0x00; |
| 309 | par->CRTC[9] = (((timings->VDisplay - 1) & 0x200) >> 4) | 0x40; |
| 310 | |
| 311 | if (timings->dblscan) |
| 312 | par->CRTC[9] |= 0x80; |
| 313 | |
| 314 | par->CRTC[10] = 0x00; |
| 315 | par->CRTC[11] = 0x00; |
| 316 | par->CRTC[12] = 0x00; |
| 317 | par->CRTC[13] = 0x00; |
| 318 | par->CRTC[14] = 0x00; |
| 319 | par->CRTC[15] = 0x00; |
| 320 | par->CRTC[16] = timings->VSyncStart & 0xFF; |
| 321 | par->CRTC[17] = (timings->VSyncEnd & 0x0F) | 0x20; |
| 322 | par->CRTC[18] = (timings->VDisplay - 1) & 0xFF; |
| 323 | par->CRTC[19] = var->xres_virtual >> 4; |
| 324 | par->CRTC[20] = 0x00; |
| 325 | par->CRTC[21] = (timings->VDisplay - 1) & 0xFF; |
| 326 | par->CRTC[22] = (timings->VTotal - 1) & 0xFF; |
| 327 | par->CRTC[23] = 0xC3; |
| 328 | par->CRTC[24] = 0xFF; |
| 329 | |
| 330 | /* |
| 331 | * are these unnecessary? |
| 332 | * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO); |
| 333 | * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO); |
| 334 | */ |
| 335 | |
| 336 | /* |
| 337 | * Graphics Display Controller |
| 338 | */ |
| 339 | par->Graphics[0] = 0x00; |
| 340 | par->Graphics[1] = 0x00; |
| 341 | par->Graphics[2] = 0x00; |
| 342 | par->Graphics[3] = 0x00; |
| 343 | par->Graphics[4] = 0x00; |
| 344 | par->Graphics[5] = 0x40; |
| 345 | par->Graphics[6] = 0x05; /* only map 64k VGA memory !!!! */ |
| 346 | par->Graphics[7] = 0x0F; |
| 347 | par->Graphics[8] = 0xFF; |
| 348 | |
| 349 | |
| 350 | par->Attribute[0] = 0x00; /* standard colormap translation */ |
| 351 | par->Attribute[1] = 0x01; |
| 352 | par->Attribute[2] = 0x02; |
| 353 | par->Attribute[3] = 0x03; |
| 354 | par->Attribute[4] = 0x04; |
| 355 | par->Attribute[5] = 0x05; |
| 356 | par->Attribute[6] = 0x06; |
| 357 | par->Attribute[7] = 0x07; |
| 358 | par->Attribute[8] = 0x08; |
| 359 | par->Attribute[9] = 0x09; |
| 360 | par->Attribute[10] = 0x0A; |
| 361 | par->Attribute[11] = 0x0B; |
| 362 | par->Attribute[12] = 0x0C; |
| 363 | par->Attribute[13] = 0x0D; |
| 364 | par->Attribute[14] = 0x0E; |
| 365 | par->Attribute[15] = 0x0F; |
| 366 | par->Attribute[16] = 0x41; |
| 367 | par->Attribute[17] = 0xFF; |
| 368 | par->Attribute[18] = 0x0F; |
| 369 | par->Attribute[19] = 0x00; |
| 370 | par->Attribute[20] = 0x00; |
| 371 | return 0; |
| 372 | } |
| 373 | |
| 374 | static void vgaHWLock(struct vgastate *state) |
| 375 | { |
| 376 | /* Protect CRTC[0-7] */ |
| 377 | vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80); |
| 378 | } |
| 379 | |
| 380 | static void vgaHWUnlock(void) |
| 381 | { |
| 382 | /* Unprotect CRTC[0-7] */ |
| 383 | vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80); |
| 384 | } |
| 385 | |
| 386 | static void neoLock(struct vgastate *state) |
| 387 | { |
| 388 | vga_wgfx(state->vgabase, 0x09, 0x00); |
| 389 | vgaHWLock(state); |
| 390 | } |
| 391 | |
| 392 | static void neoUnlock(void) |
| 393 | { |
| 394 | vgaHWUnlock(); |
| 395 | vga_wgfx(NULL, 0x09, 0x26); |
| 396 | } |
| 397 | |
| 398 | /* |
| 399 | * VGA Palette management |
| 400 | */ |
| 401 | static int paletteEnabled = 0; |
| 402 | |
| 403 | static inline void VGAenablePalette(void) |
| 404 | { |
| 405 | vga_r(NULL, VGA_IS1_RC); |
| 406 | vga_w(NULL, VGA_ATT_W, 0x00); |
| 407 | paletteEnabled = 1; |
| 408 | } |
| 409 | |
| 410 | static inline void VGAdisablePalette(void) |
| 411 | { |
| 412 | vga_r(NULL, VGA_IS1_RC); |
| 413 | vga_w(NULL, VGA_ATT_W, 0x20); |
| 414 | paletteEnabled = 0; |
| 415 | } |
| 416 | |
| 417 | static inline void VGAwATTR(u8 index, u8 value) |
| 418 | { |
| 419 | if (paletteEnabled) |
| 420 | index &= ~0x20; |
| 421 | else |
| 422 | index |= 0x20; |
| 423 | |
| 424 | vga_r(NULL, VGA_IS1_RC); |
| 425 | vga_wattr(NULL, index, value); |
| 426 | } |
| 427 | |
| 428 | static void vgaHWProtect(int on) |
| 429 | { |
| 430 | unsigned char tmp; |
| 431 | |
| 432 | if (on) { |
| 433 | /* |
| 434 | * Turn off screen and disable sequencer. |
| 435 | */ |
| 436 | tmp = vga_rseq(NULL, 0x01); |
| 437 | vga_wseq(NULL, 0x00, 0x01); /* Synchronous Reset */ |
| 438 | vga_wseq(NULL, 0x01, tmp | 0x20); /* disable the display */ |
| 439 | |
| 440 | VGAenablePalette(); |
| 441 | } else { |
| 442 | /* |
| 443 | * Reenable sequencer, then turn on screen. |
| 444 | */ |
| 445 | tmp = vga_rseq(NULL, 0x01); |
| 446 | vga_wseq(NULL, 0x01, tmp & ~0x20); /* reenable display */ |
| 447 | vga_wseq(NULL, 0x00, 0x03); /* clear synchronousreset */ |
| 448 | |
| 449 | VGAdisablePalette(); |
| 450 | } |
| 451 | } |
| 452 | |
| 453 | static void vgaHWRestore(const struct fb_info *info, |
| 454 | const struct neofb_par *par) |
| 455 | { |
| 456 | int i; |
| 457 | |
| 458 | vga_w(NULL, VGA_MIS_W, par->MiscOutReg); |
| 459 | |
| 460 | for (i = 1; i < 5; i++) |
| 461 | vga_wseq(NULL, i, par->Sequencer[i]); |
| 462 | |
| 463 | /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */ |
| 464 | vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80); |
| 465 | |
| 466 | for (i = 0; i < 25; i++) |
| 467 | vga_wcrt(NULL, i, par->CRTC[i]); |
| 468 | |
| 469 | for (i = 0; i < 9; i++) |
| 470 | vga_wgfx(NULL, i, par->Graphics[i]); |
| 471 | |
| 472 | VGAenablePalette(); |
| 473 | |
| 474 | for (i = 0; i < 21; i++) |
| 475 | VGAwATTR(i, par->Attribute[i]); |
| 476 | |
| 477 | VGAdisablePalette(); |
| 478 | } |
| 479 | |
| 480 | |
| 481 | /* -------------------- Hardware specific routines ------------------------- */ |
| 482 | |
| 483 | /* |
| 484 | * Hardware Acceleration for Neo2200+ |
| 485 | */ |
| 486 | static inline int neo2200_sync(struct fb_info *info) |
| 487 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 488 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 489 | int waitcycles; |
| 490 | |
| 491 | while (readl(&par->neo2200->bltStat) & 1) |
| 492 | waitcycles++; |
| 493 | return 0; |
| 494 | } |
| 495 | |
| 496 | static inline void neo2200_wait_fifo(struct fb_info *info, |
| 497 | int requested_fifo_space) |
| 498 | { |
| 499 | // ndev->neo.waitfifo_calls++; |
| 500 | // ndev->neo.waitfifo_sum += requested_fifo_space; |
| 501 | |
| 502 | /* FIXME: does not work |
| 503 | if (neo_fifo_space < requested_fifo_space) |
| 504 | { |
| 505 | neo_fifo_waitcycles++; |
| 506 | |
| 507 | while (1) |
| 508 | { |
| 509 | neo_fifo_space = (neo2200->bltStat >> 8); |
| 510 | if (neo_fifo_space >= requested_fifo_space) |
| 511 | break; |
| 512 | } |
| 513 | } |
| 514 | else |
| 515 | { |
| 516 | neo_fifo_cache_hits++; |
| 517 | } |
| 518 | |
| 519 | neo_fifo_space -= requested_fifo_space; |
| 520 | */ |
| 521 | |
| 522 | neo2200_sync(info); |
| 523 | } |
| 524 | |
| 525 | static inline void neo2200_accel_init(struct fb_info *info, |
| 526 | struct fb_var_screeninfo *var) |
| 527 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 528 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 529 | Neo2200 __iomem *neo2200 = par->neo2200; |
| 530 | u32 bltMod, pitch; |
| 531 | |
| 532 | neo2200_sync(info); |
| 533 | |
| 534 | switch (var->bits_per_pixel) { |
| 535 | case 8: |
| 536 | bltMod = NEO_MODE1_DEPTH8; |
| 537 | pitch = var->xres_virtual; |
| 538 | break; |
| 539 | case 15: |
| 540 | case 16: |
| 541 | bltMod = NEO_MODE1_DEPTH16; |
| 542 | pitch = var->xres_virtual * 2; |
| 543 | break; |
| 544 | case 24: |
| 545 | bltMod = NEO_MODE1_DEPTH24; |
| 546 | pitch = var->xres_virtual * 3; |
| 547 | break; |
| 548 | default: |
| 549 | printk(KERN_ERR |
| 550 | "neofb: neo2200_accel_init: unexpected bits per pixel!\n"); |
| 551 | return; |
| 552 | } |
| 553 | |
| 554 | writel(bltMod << 16, &neo2200->bltStat); |
| 555 | writel((pitch << 16) | pitch, &neo2200->pitch); |
| 556 | } |
| 557 | |
| 558 | /* --------------------------------------------------------------------- */ |
| 559 | |
| 560 | static int |
| 561 | neofb_open(struct fb_info *info, int user) |
| 562 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 563 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 564 | int cnt = atomic_read(&par->ref_count); |
| 565 | |
| 566 | if (!cnt) { |
| 567 | memset(&par->state, 0, sizeof(struct vgastate)); |
| 568 | par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS; |
| 569 | save_vga(&par->state); |
| 570 | } |
| 571 | atomic_inc(&par->ref_count); |
| 572 | return 0; |
| 573 | } |
| 574 | |
| 575 | static int |
| 576 | neofb_release(struct fb_info *info, int user) |
| 577 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 578 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 579 | int cnt = atomic_read(&par->ref_count); |
| 580 | |
| 581 | if (!cnt) |
| 582 | return -EINVAL; |
| 583 | if (cnt == 1) { |
| 584 | restore_vga(&par->state); |
| 585 | } |
| 586 | atomic_dec(&par->ref_count); |
| 587 | return 0; |
| 588 | } |
| 589 | |
| 590 | static int |
| 591 | neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
| 592 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 593 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | unsigned int pixclock = var->pixclock; |
| 595 | struct xtimings timings; |
| 596 | int memlen, vramlen; |
| 597 | int mode_ok = 0; |
| 598 | |
| 599 | DBG("neofb_check_var"); |
| 600 | |
| 601 | if (!pixclock) |
| 602 | pixclock = 10000; /* 10ns = 100MHz */ |
| 603 | timings.pixclock = 1000000000 / pixclock; |
| 604 | if (timings.pixclock < 1) |
| 605 | timings.pixclock = 1; |
| 606 | |
| 607 | if (timings.pixclock > par->maxClock) |
| 608 | return -EINVAL; |
| 609 | |
| 610 | timings.dblscan = var->vmode & FB_VMODE_DOUBLE; |
| 611 | timings.interlaced = var->vmode & FB_VMODE_INTERLACED; |
| 612 | timings.HDisplay = var->xres; |
| 613 | timings.HSyncStart = timings.HDisplay + var->right_margin; |
| 614 | timings.HSyncEnd = timings.HSyncStart + var->hsync_len; |
| 615 | timings.HTotal = timings.HSyncEnd + var->left_margin; |
| 616 | timings.VDisplay = var->yres; |
| 617 | timings.VSyncStart = timings.VDisplay + var->lower_margin; |
| 618 | timings.VSyncEnd = timings.VSyncStart + var->vsync_len; |
| 619 | timings.VTotal = timings.VSyncEnd + var->upper_margin; |
| 620 | timings.sync = var->sync; |
| 621 | |
| 622 | /* Is the mode larger than the LCD panel? */ |
| 623 | if (par->internal_display && |
| 624 | ((var->xres > par->NeoPanelWidth) || |
| 625 | (var->yres > par->NeoPanelHeight))) { |
| 626 | printk(KERN_INFO |
| 627 | "Mode (%dx%d) larger than the LCD panel (%dx%d)\n", |
| 628 | var->xres, var->yres, par->NeoPanelWidth, |
| 629 | par->NeoPanelHeight); |
| 630 | return -EINVAL; |
| 631 | } |
| 632 | |
| 633 | /* Is the mode one of the acceptable sizes? */ |
| 634 | if (!par->internal_display) |
| 635 | mode_ok = 1; |
| 636 | else { |
| 637 | switch (var->xres) { |
| 638 | case 1280: |
| 639 | if (var->yres == 1024) |
| 640 | mode_ok = 1; |
| 641 | break; |
| 642 | case 1024: |
| 643 | if (var->yres == 768) |
| 644 | mode_ok = 1; |
| 645 | break; |
| 646 | case 800: |
| 647 | if (var->yres == (par->libretto ? 480 : 600)) |
| 648 | mode_ok = 1; |
| 649 | break; |
| 650 | case 640: |
| 651 | if (var->yres == 480) |
| 652 | mode_ok = 1; |
| 653 | break; |
| 654 | } |
| 655 | } |
| 656 | |
| 657 | if (!mode_ok) { |
| 658 | printk(KERN_INFO |
| 659 | "Mode (%dx%d) won't display properly on LCD\n", |
| 660 | var->xres, var->yres); |
| 661 | return -EINVAL; |
| 662 | } |
| 663 | |
| 664 | var->red.msb_right = 0; |
| 665 | var->green.msb_right = 0; |
| 666 | var->blue.msb_right = 0; |
| 667 | |
| 668 | switch (var->bits_per_pixel) { |
| 669 | case 8: /* PSEUDOCOLOUR, 256 */ |
| 670 | var->transp.offset = 0; |
| 671 | var->transp.length = 0; |
| 672 | var->red.offset = 0; |
| 673 | var->red.length = 8; |
| 674 | var->green.offset = 0; |
| 675 | var->green.length = 8; |
| 676 | var->blue.offset = 0; |
| 677 | var->blue.length = 8; |
| 678 | break; |
| 679 | |
| 680 | case 16: /* DIRECTCOLOUR, 64k */ |
| 681 | var->transp.offset = 0; |
| 682 | var->transp.length = 0; |
| 683 | var->red.offset = 11; |
| 684 | var->red.length = 5; |
| 685 | var->green.offset = 5; |
| 686 | var->green.length = 6; |
| 687 | var->blue.offset = 0; |
| 688 | var->blue.length = 5; |
| 689 | break; |
| 690 | |
| 691 | case 24: /* TRUECOLOUR, 16m */ |
| 692 | var->transp.offset = 0; |
| 693 | var->transp.length = 0; |
| 694 | var->red.offset = 16; |
| 695 | var->red.length = 8; |
| 696 | var->green.offset = 8; |
| 697 | var->green.length = 8; |
| 698 | var->blue.offset = 0; |
| 699 | var->blue.length = 8; |
| 700 | break; |
| 701 | |
| 702 | #ifdef NO_32BIT_SUPPORT_YET |
| 703 | case 32: /* TRUECOLOUR, 16m */ |
| 704 | var->transp.offset = 24; |
| 705 | var->transp.length = 8; |
| 706 | var->red.offset = 16; |
| 707 | var->red.length = 8; |
| 708 | var->green.offset = 8; |
| 709 | var->green.length = 8; |
| 710 | var->blue.offset = 0; |
| 711 | var->blue.length = 8; |
| 712 | break; |
| 713 | #endif |
| 714 | default: |
| 715 | printk(KERN_WARNING "neofb: no support for %dbpp\n", |
| 716 | var->bits_per_pixel); |
| 717 | return -EINVAL; |
| 718 | } |
| 719 | |
| 720 | vramlen = info->fix.smem_len; |
| 721 | if (vramlen > 4 * 1024 * 1024) |
| 722 | vramlen = 4 * 1024 * 1024; |
| 723 | |
| 724 | if (var->yres_virtual < var->yres) |
| 725 | var->yres_virtual = var->yres; |
| 726 | if (var->xres_virtual < var->xres) |
| 727 | var->xres_virtual = var->xres; |
| 728 | |
| 729 | memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3; |
| 730 | |
| 731 | if (memlen > vramlen) { |
| 732 | var->yres_virtual = vramlen * 8 / (var->xres_virtual * |
| 733 | var->bits_per_pixel); |
| 734 | memlen = var->xres_virtual * var->bits_per_pixel * |
| 735 | var->yres_virtual / 8; |
| 736 | } |
| 737 | |
| 738 | /* we must round yres/xres down, we already rounded y/xres_virtual up |
| 739 | if it was possible. We should return -EINVAL, but I disagree */ |
| 740 | if (var->yres_virtual < var->yres) |
| 741 | var->yres = var->yres_virtual; |
| 742 | if (var->xres_virtual < var->xres) |
| 743 | var->xres = var->xres_virtual; |
| 744 | if (var->xoffset + var->xres > var->xres_virtual) |
| 745 | var->xoffset = var->xres_virtual - var->xres; |
| 746 | if (var->yoffset + var->yres > var->yres_virtual) |
| 747 | var->yoffset = var->yres_virtual - var->yres; |
| 748 | |
| 749 | var->nonstd = 0; |
| 750 | var->height = -1; |
| 751 | var->width = -1; |
| 752 | |
| 753 | if (var->bits_per_pixel >= 24 || !par->neo2200) |
| 754 | var->accel_flags &= ~FB_ACCELF_TEXT; |
| 755 | return 0; |
| 756 | } |
| 757 | |
| 758 | static int neofb_set_par(struct fb_info *info) |
| 759 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 760 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 761 | struct xtimings timings; |
| 762 | unsigned char temp; |
| 763 | int i, clock_hi = 0; |
| 764 | int lcd_stretch; |
| 765 | int hoffset, voffset; |
| 766 | |
| 767 | DBG("neofb_set_par"); |
| 768 | |
| 769 | neoUnlock(); |
| 770 | |
| 771 | vgaHWProtect(1); /* Blank the screen */ |
| 772 | |
| 773 | timings.dblscan = info->var.vmode & FB_VMODE_DOUBLE; |
| 774 | timings.interlaced = info->var.vmode & FB_VMODE_INTERLACED; |
| 775 | timings.HDisplay = info->var.xres; |
| 776 | timings.HSyncStart = timings.HDisplay + info->var.right_margin; |
| 777 | timings.HSyncEnd = timings.HSyncStart + info->var.hsync_len; |
| 778 | timings.HTotal = timings.HSyncEnd + info->var.left_margin; |
| 779 | timings.VDisplay = info->var.yres; |
| 780 | timings.VSyncStart = timings.VDisplay + info->var.lower_margin; |
| 781 | timings.VSyncEnd = timings.VSyncStart + info->var.vsync_len; |
| 782 | timings.VTotal = timings.VSyncEnd + info->var.upper_margin; |
| 783 | timings.sync = info->var.sync; |
| 784 | timings.pixclock = PICOS2KHZ(info->var.pixclock); |
| 785 | |
| 786 | if (timings.pixclock < 1) |
| 787 | timings.pixclock = 1; |
| 788 | |
| 789 | /* |
| 790 | * This will allocate the datastructure and initialize all of the |
| 791 | * generic VGA registers. |
| 792 | */ |
| 793 | |
| 794 | if (vgaHWInit(&info->var, info, par, &timings)) |
| 795 | return -EINVAL; |
| 796 | |
| 797 | /* |
| 798 | * The default value assigned by vgaHW.c is 0x41, but this does |
| 799 | * not work for NeoMagic. |
| 800 | */ |
| 801 | par->Attribute[16] = 0x01; |
| 802 | |
| 803 | switch (info->var.bits_per_pixel) { |
| 804 | case 8: |
| 805 | par->CRTC[0x13] = info->var.xres_virtual >> 3; |
| 806 | par->ExtCRTOffset = info->var.xres_virtual >> 11; |
| 807 | par->ExtColorModeSelect = 0x11; |
| 808 | break; |
| 809 | case 16: |
| 810 | par->CRTC[0x13] = info->var.xres_virtual >> 2; |
| 811 | par->ExtCRTOffset = info->var.xres_virtual >> 10; |
| 812 | par->ExtColorModeSelect = 0x13; |
| 813 | break; |
| 814 | case 24: |
| 815 | par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3; |
| 816 | par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11; |
| 817 | par->ExtColorModeSelect = 0x14; |
| 818 | break; |
| 819 | #ifdef NO_32BIT_SUPPORT_YET |
| 820 | case 32: /* FIXME: guessed values */ |
| 821 | par->CRTC[0x13] = info->var.xres_virtual >> 1; |
| 822 | par->ExtCRTOffset = info->var.xres_virtual >> 9; |
| 823 | par->ExtColorModeSelect = 0x15; |
| 824 | break; |
| 825 | #endif |
| 826 | default: |
| 827 | break; |
| 828 | } |
| 829 | |
| 830 | par->ExtCRTDispAddr = 0x10; |
| 831 | |
| 832 | /* Vertical Extension */ |
| 833 | par->VerticalExt = (((timings.VTotal - 2) & 0x400) >> 10) |
| 834 | | (((timings.VDisplay - 1) & 0x400) >> 9) |
| 835 | | (((timings.VSyncStart) & 0x400) >> 8) |
| 836 | | (((timings.VSyncStart) & 0x400) >> 7); |
| 837 | |
| 838 | /* Fast write bursts on unless disabled. */ |
| 839 | if (par->pci_burst) |
| 840 | par->SysIfaceCntl1 = 0x30; |
| 841 | else |
| 842 | par->SysIfaceCntl1 = 0x00; |
| 843 | |
| 844 | par->SysIfaceCntl2 = 0xc0; /* VESA Bios sets this to 0x80! */ |
| 845 | |
| 846 | /* Enable any user specified display devices. */ |
| 847 | par->PanelDispCntlReg1 = 0x00; |
| 848 | if (par->internal_display) |
| 849 | par->PanelDispCntlReg1 |= 0x02; |
| 850 | if (par->external_display) |
| 851 | par->PanelDispCntlReg1 |= 0x01; |
| 852 | |
| 853 | /* If the user did not specify any display devices, then... */ |
| 854 | if (par->PanelDispCntlReg1 == 0x00) { |
| 855 | /* Default to internal (i.e., LCD) only. */ |
Christian Trefzer | 4836f57 | 2006-01-14 13:21:21 -0800 | [diff] [blame] | 856 | par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 857 | } |
| 858 | |
| 859 | /* If we are using a fixed mode, then tell the chip we are. */ |
| 860 | switch (info->var.xres) { |
| 861 | case 1280: |
| 862 | par->PanelDispCntlReg1 |= 0x60; |
| 863 | break; |
| 864 | case 1024: |
| 865 | par->PanelDispCntlReg1 |= 0x40; |
| 866 | break; |
| 867 | case 800: |
| 868 | par->PanelDispCntlReg1 |= 0x20; |
| 869 | break; |
| 870 | case 640: |
| 871 | default: |
| 872 | break; |
| 873 | } |
| 874 | |
| 875 | /* Setup shadow register locking. */ |
| 876 | switch (par->PanelDispCntlReg1 & 0x03) { |
| 877 | case 0x01: /* External CRT only mode: */ |
| 878 | par->GeneralLockReg = 0x00; |
| 879 | /* We need to program the VCLK for external display only mode. */ |
| 880 | par->ProgramVCLK = 1; |
| 881 | break; |
| 882 | case 0x02: /* Internal LCD only mode: */ |
| 883 | case 0x03: /* Simultaneous internal/external (LCD/CRT) mode: */ |
| 884 | par->GeneralLockReg = 0x01; |
| 885 | /* Don't program the VCLK when using the LCD. */ |
| 886 | par->ProgramVCLK = 0; |
| 887 | break; |
| 888 | } |
| 889 | |
| 890 | /* |
| 891 | * If the screen is to be stretched, turn on stretching for the |
| 892 | * various modes. |
| 893 | * |
| 894 | * OPTION_LCD_STRETCH means stretching should be turned off! |
| 895 | */ |
| 896 | par->PanelDispCntlReg2 = 0x00; |
| 897 | par->PanelDispCntlReg3 = 0x00; |
| 898 | |
| 899 | if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) && /* LCD only */ |
| 900 | (info->var.xres != par->NeoPanelWidth)) { |
| 901 | switch (info->var.xres) { |
| 902 | case 320: /* Needs testing. KEM -- 24 May 98 */ |
| 903 | case 400: /* Needs testing. KEM -- 24 May 98 */ |
| 904 | case 640: |
| 905 | case 800: |
| 906 | case 1024: |
| 907 | lcd_stretch = 1; |
| 908 | par->PanelDispCntlReg2 |= 0xC6; |
| 909 | break; |
| 910 | default: |
| 911 | lcd_stretch = 0; |
| 912 | /* No stretching in these modes. */ |
| 913 | } |
| 914 | } else |
| 915 | lcd_stretch = 0; |
| 916 | |
| 917 | /* |
| 918 | * If the screen is to be centerd, turn on the centering for the |
| 919 | * various modes. |
| 920 | */ |
| 921 | par->PanelVertCenterReg1 = 0x00; |
| 922 | par->PanelVertCenterReg2 = 0x00; |
| 923 | par->PanelVertCenterReg3 = 0x00; |
| 924 | par->PanelVertCenterReg4 = 0x00; |
| 925 | par->PanelVertCenterReg5 = 0x00; |
| 926 | par->PanelHorizCenterReg1 = 0x00; |
| 927 | par->PanelHorizCenterReg2 = 0x00; |
| 928 | par->PanelHorizCenterReg3 = 0x00; |
| 929 | par->PanelHorizCenterReg4 = 0x00; |
| 930 | par->PanelHorizCenterReg5 = 0x00; |
| 931 | |
| 932 | |
| 933 | if (par->PanelDispCntlReg1 & 0x02) { |
| 934 | if (info->var.xres == par->NeoPanelWidth) { |
| 935 | /* |
| 936 | * No centering required when the requested display width |
| 937 | * equals the panel width. |
| 938 | */ |
| 939 | } else { |
| 940 | par->PanelDispCntlReg2 |= 0x01; |
| 941 | par->PanelDispCntlReg3 |= 0x10; |
| 942 | |
| 943 | /* Calculate the horizontal and vertical offsets. */ |
| 944 | if (!lcd_stretch) { |
| 945 | hoffset = |
| 946 | ((par->NeoPanelWidth - |
| 947 | info->var.xres) >> 4) - 1; |
| 948 | voffset = |
| 949 | ((par->NeoPanelHeight - |
| 950 | info->var.yres) >> 1) - 2; |
| 951 | } else { |
| 952 | /* Stretched modes cannot be centered. */ |
| 953 | hoffset = 0; |
| 954 | voffset = 0; |
| 955 | } |
| 956 | |
| 957 | switch (info->var.xres) { |
| 958 | case 320: /* Needs testing. KEM -- 24 May 98 */ |
| 959 | par->PanelHorizCenterReg3 = hoffset; |
| 960 | par->PanelVertCenterReg2 = voffset; |
| 961 | break; |
| 962 | case 400: /* Needs testing. KEM -- 24 May 98 */ |
| 963 | par->PanelHorizCenterReg4 = hoffset; |
| 964 | par->PanelVertCenterReg1 = voffset; |
| 965 | break; |
| 966 | case 640: |
| 967 | par->PanelHorizCenterReg1 = hoffset; |
| 968 | par->PanelVertCenterReg3 = voffset; |
| 969 | break; |
| 970 | case 800: |
| 971 | par->PanelHorizCenterReg2 = hoffset; |
| 972 | par->PanelVertCenterReg4 = voffset; |
| 973 | break; |
| 974 | case 1024: |
| 975 | par->PanelHorizCenterReg5 = hoffset; |
| 976 | par->PanelVertCenterReg5 = voffset; |
| 977 | break; |
| 978 | case 1280: |
| 979 | default: |
| 980 | /* No centering in these modes. */ |
| 981 | break; |
| 982 | } |
| 983 | } |
| 984 | } |
| 985 | |
| 986 | par->biosMode = |
| 987 | neoFindMode(info->var.xres, info->var.yres, |
| 988 | info->var.bits_per_pixel); |
| 989 | |
| 990 | /* |
| 991 | * Calculate the VCLK that most closely matches the requested dot |
| 992 | * clock. |
| 993 | */ |
| 994 | neoCalcVCLK(info, par, timings.pixclock); |
| 995 | |
| 996 | /* Since we program the clocks ourselves, always use VCLK3. */ |
| 997 | par->MiscOutReg |= 0x0C; |
| 998 | |
| 999 | /* alread unlocked above */ |
| 1000 | /* BOGUS vga_wgfx(NULL, 0x09, 0x26); */ |
| 1001 | |
| 1002 | /* don't know what this is, but it's 0 from bootup anyway */ |
| 1003 | vga_wgfx(NULL, 0x15, 0x00); |
| 1004 | |
| 1005 | /* was set to 0x01 by my bios in text and vesa modes */ |
| 1006 | vga_wgfx(NULL, 0x0A, par->GeneralLockReg); |
| 1007 | |
| 1008 | /* |
| 1009 | * The color mode needs to be set before calling vgaHWRestore |
| 1010 | * to ensure the DAC is initialized properly. |
| 1011 | * |
| 1012 | * NOTE: Make sure we don't change bits make sure we don't change |
| 1013 | * any reserved bits. |
| 1014 | */ |
| 1015 | temp = vga_rgfx(NULL, 0x90); |
| 1016 | switch (info->fix.accel) { |
| 1017 | case FB_ACCEL_NEOMAGIC_NM2070: |
| 1018 | temp &= 0xF0; /* Save bits 7:4 */ |
| 1019 | temp |= (par->ExtColorModeSelect & ~0xF0); |
| 1020 | break; |
| 1021 | case FB_ACCEL_NEOMAGIC_NM2090: |
| 1022 | case FB_ACCEL_NEOMAGIC_NM2093: |
| 1023 | case FB_ACCEL_NEOMAGIC_NM2097: |
| 1024 | case FB_ACCEL_NEOMAGIC_NM2160: |
| 1025 | case FB_ACCEL_NEOMAGIC_NM2200: |
| 1026 | case FB_ACCEL_NEOMAGIC_NM2230: |
| 1027 | case FB_ACCEL_NEOMAGIC_NM2360: |
| 1028 | case FB_ACCEL_NEOMAGIC_NM2380: |
| 1029 | temp &= 0x70; /* Save bits 6:4 */ |
| 1030 | temp |= (par->ExtColorModeSelect & ~0x70); |
| 1031 | break; |
| 1032 | } |
| 1033 | |
| 1034 | vga_wgfx(NULL, 0x90, temp); |
| 1035 | |
| 1036 | /* |
| 1037 | * In some rare cases a lockup might occur if we don't delay |
| 1038 | * here. (Reported by Miles Lane) |
| 1039 | */ |
| 1040 | //mdelay(200); |
| 1041 | |
| 1042 | /* |
| 1043 | * Disable horizontal and vertical graphics and text expansions so |
| 1044 | * that vgaHWRestore works properly. |
| 1045 | */ |
| 1046 | temp = vga_rgfx(NULL, 0x25); |
| 1047 | temp &= 0x39; |
| 1048 | vga_wgfx(NULL, 0x25, temp); |
| 1049 | |
| 1050 | /* |
| 1051 | * Sleep for 200ms to make sure that the two operations above have |
| 1052 | * had time to take effect. |
| 1053 | */ |
| 1054 | mdelay(200); |
| 1055 | |
| 1056 | /* |
| 1057 | * This function handles restoring the generic VGA registers. */ |
| 1058 | vgaHWRestore(info, par); |
| 1059 | |
| 1060 | /* linear colormap for non palettized modes */ |
| 1061 | switch (info->var.bits_per_pixel) { |
| 1062 | case 8: |
| 1063 | /* PseudoColor, 256 */ |
| 1064 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; |
| 1065 | break; |
| 1066 | case 16: |
| 1067 | /* TrueColor, 64k */ |
| 1068 | info->fix.visual = FB_VISUAL_TRUECOLOR; |
| 1069 | |
| 1070 | for (i = 0; i < 64; i++) { |
| 1071 | outb(i, 0x3c8); |
| 1072 | |
| 1073 | outb(i << 1, 0x3c9); |
| 1074 | outb(i, 0x3c9); |
| 1075 | outb(i << 1, 0x3c9); |
| 1076 | } |
| 1077 | break; |
| 1078 | case 24: |
| 1079 | #ifdef NO_32BIT_SUPPORT_YET |
| 1080 | case 32: |
| 1081 | #endif |
| 1082 | /* TrueColor, 16m */ |
| 1083 | info->fix.visual = FB_VISUAL_TRUECOLOR; |
| 1084 | |
| 1085 | for (i = 0; i < 256; i++) { |
| 1086 | outb(i, 0x3c8); |
| 1087 | |
| 1088 | outb(i, 0x3c9); |
| 1089 | outb(i, 0x3c9); |
| 1090 | outb(i, 0x3c9); |
| 1091 | } |
| 1092 | break; |
| 1093 | } |
| 1094 | |
| 1095 | vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr); |
| 1096 | vga_wgfx(NULL, 0x0F, par->ExtCRTOffset); |
| 1097 | temp = vga_rgfx(NULL, 0x10); |
| 1098 | temp &= 0x0F; /* Save bits 3:0 */ |
| 1099 | temp |= (par->SysIfaceCntl1 & ~0x0F); /* VESA Bios sets bit 1! */ |
| 1100 | vga_wgfx(NULL, 0x10, temp); |
| 1101 | |
| 1102 | vga_wgfx(NULL, 0x11, par->SysIfaceCntl2); |
| 1103 | vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ ); |
| 1104 | vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ ); |
| 1105 | |
| 1106 | temp = vga_rgfx(NULL, 0x20); |
| 1107 | switch (info->fix.accel) { |
| 1108 | case FB_ACCEL_NEOMAGIC_NM2070: |
| 1109 | temp &= 0xFC; /* Save bits 7:2 */ |
| 1110 | temp |= (par->PanelDispCntlReg1 & ~0xFC); |
| 1111 | break; |
| 1112 | case FB_ACCEL_NEOMAGIC_NM2090: |
| 1113 | case FB_ACCEL_NEOMAGIC_NM2093: |
| 1114 | case FB_ACCEL_NEOMAGIC_NM2097: |
| 1115 | case FB_ACCEL_NEOMAGIC_NM2160: |
| 1116 | temp &= 0xDC; /* Save bits 7:6,4:2 */ |
| 1117 | temp |= (par->PanelDispCntlReg1 & ~0xDC); |
| 1118 | break; |
| 1119 | case FB_ACCEL_NEOMAGIC_NM2200: |
| 1120 | case FB_ACCEL_NEOMAGIC_NM2230: |
| 1121 | case FB_ACCEL_NEOMAGIC_NM2360: |
| 1122 | case FB_ACCEL_NEOMAGIC_NM2380: |
| 1123 | temp &= 0x98; /* Save bits 7,4:3 */ |
| 1124 | temp |= (par->PanelDispCntlReg1 & ~0x98); |
| 1125 | break; |
| 1126 | } |
| 1127 | vga_wgfx(NULL, 0x20, temp); |
| 1128 | |
| 1129 | temp = vga_rgfx(NULL, 0x25); |
| 1130 | temp &= 0x38; /* Save bits 5:3 */ |
| 1131 | temp |= (par->PanelDispCntlReg2 & ~0x38); |
| 1132 | vga_wgfx(NULL, 0x25, temp); |
| 1133 | |
| 1134 | if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) { |
| 1135 | temp = vga_rgfx(NULL, 0x30); |
| 1136 | temp &= 0xEF; /* Save bits 7:5 and bits 3:0 */ |
| 1137 | temp |= (par->PanelDispCntlReg3 & ~0xEF); |
| 1138 | vga_wgfx(NULL, 0x30, temp); |
| 1139 | } |
| 1140 | |
| 1141 | vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1); |
| 1142 | vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2); |
| 1143 | vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3); |
| 1144 | |
| 1145 | if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) { |
| 1146 | vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4); |
| 1147 | vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1); |
| 1148 | vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2); |
| 1149 | vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3); |
| 1150 | } |
| 1151 | |
| 1152 | if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160) |
| 1153 | vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4); |
| 1154 | |
| 1155 | if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 || |
| 1156 | info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 || |
| 1157 | info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 || |
| 1158 | info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) { |
| 1159 | vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4); |
| 1160 | vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5); |
| 1161 | vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5); |
| 1162 | |
| 1163 | clock_hi = 1; |
| 1164 | } |
| 1165 | |
| 1166 | /* Program VCLK3 if needed. */ |
| 1167 | if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow) |
| 1168 | || (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator) |
| 1169 | || (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f) |
| 1170 | != (par->VCLK3NumeratorHigh & |
| 1171 | ~0x0F))))) { |
| 1172 | vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow); |
| 1173 | if (clock_hi) { |
| 1174 | temp = vga_rgfx(NULL, 0x8F); |
| 1175 | temp &= 0x0F; /* Save bits 3:0 */ |
| 1176 | temp |= (par->VCLK3NumeratorHigh & ~0x0F); |
| 1177 | vga_wgfx(NULL, 0x8F, temp); |
| 1178 | } |
| 1179 | vga_wgfx(NULL, 0x9F, par->VCLK3Denominator); |
| 1180 | } |
| 1181 | |
| 1182 | if (par->biosMode) |
| 1183 | vga_wcrt(NULL, 0x23, par->biosMode); |
| 1184 | |
| 1185 | vga_wgfx(NULL, 0x93, 0xc0); /* Gives 5x faster framebuffer writes !!! */ |
| 1186 | |
| 1187 | /* Program vertical extension register */ |
| 1188 | if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 || |
| 1189 | info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 || |
| 1190 | info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 || |
| 1191 | info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) { |
| 1192 | vga_wcrt(NULL, 0x70, par->VerticalExt); |
| 1193 | } |
| 1194 | |
| 1195 | vgaHWProtect(0); /* Turn on screen */ |
| 1196 | |
| 1197 | /* Calling this also locks offset registers required in update_start */ |
| 1198 | neoLock(&par->state); |
| 1199 | |
| 1200 | info->fix.line_length = |
| 1201 | info->var.xres_virtual * (info->var.bits_per_pixel >> 3); |
| 1202 | |
| 1203 | switch (info->fix.accel) { |
| 1204 | case FB_ACCEL_NEOMAGIC_NM2200: |
| 1205 | case FB_ACCEL_NEOMAGIC_NM2230: |
| 1206 | case FB_ACCEL_NEOMAGIC_NM2360: |
| 1207 | case FB_ACCEL_NEOMAGIC_NM2380: |
| 1208 | neo2200_accel_init(info, &info->var); |
| 1209 | break; |
| 1210 | default: |
| 1211 | break; |
| 1212 | } |
| 1213 | return 0; |
| 1214 | } |
| 1215 | |
| 1216 | static void neofb_update_start(struct fb_info *info, |
| 1217 | struct fb_var_screeninfo *var) |
| 1218 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 1219 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1220 | struct vgastate *state = &par->state; |
| 1221 | int oldExtCRTDispAddr; |
| 1222 | int Base; |
| 1223 | |
| 1224 | DBG("neofb_update_start"); |
| 1225 | |
| 1226 | Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2; |
| 1227 | Base *= (var->bits_per_pixel + 7) / 8; |
| 1228 | |
| 1229 | neoUnlock(); |
| 1230 | |
| 1231 | /* |
| 1232 | * These are the generic starting address registers. |
| 1233 | */ |
| 1234 | vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8); |
| 1235 | vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF)); |
| 1236 | |
| 1237 | /* |
| 1238 | * Make sure we don't clobber some other bits that might already |
| 1239 | * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't |
| 1240 | * be needed. |
| 1241 | */ |
| 1242 | oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E); |
| 1243 | vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0))); |
| 1244 | |
| 1245 | neoLock(state); |
| 1246 | } |
| 1247 | |
| 1248 | /* |
| 1249 | * Pan or Wrap the Display |
| 1250 | */ |
| 1251 | static int neofb_pan_display(struct fb_var_screeninfo *var, |
| 1252 | struct fb_info *info) |
| 1253 | { |
| 1254 | u_int y_bottom; |
| 1255 | |
| 1256 | y_bottom = var->yoffset; |
| 1257 | |
| 1258 | if (!(var->vmode & FB_VMODE_YWRAP)) |
| 1259 | y_bottom += var->yres; |
| 1260 | |
| 1261 | if (var->xoffset > (var->xres_virtual - var->xres)) |
| 1262 | return -EINVAL; |
| 1263 | if (y_bottom > info->var.yres_virtual) |
| 1264 | return -EINVAL; |
| 1265 | |
| 1266 | neofb_update_start(info, var); |
| 1267 | |
| 1268 | info->var.xoffset = var->xoffset; |
| 1269 | info->var.yoffset = var->yoffset; |
| 1270 | |
| 1271 | if (var->vmode & FB_VMODE_YWRAP) |
| 1272 | info->var.vmode |= FB_VMODE_YWRAP; |
| 1273 | else |
| 1274 | info->var.vmode &= ~FB_VMODE_YWRAP; |
| 1275 | return 0; |
| 1276 | } |
| 1277 | |
| 1278 | static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
| 1279 | u_int transp, struct fb_info *fb) |
| 1280 | { |
| 1281 | if (regno >= fb->cmap.len || regno > 255) |
| 1282 | return -EINVAL; |
| 1283 | |
| 1284 | switch (fb->var.bits_per_pixel) { |
| 1285 | case 8: |
| 1286 | outb(regno, 0x3c8); |
| 1287 | |
| 1288 | outb(red >> 10, 0x3c9); |
| 1289 | outb(green >> 10, 0x3c9); |
| 1290 | outb(blue >> 10, 0x3c9); |
| 1291 | break; |
| 1292 | case 16: |
| 1293 | ((u32 *) fb->pseudo_palette)[regno] = |
| 1294 | ((red & 0xf800)) | ((green & 0xfc00) >> 5) | |
| 1295 | ((blue & 0xf800) >> 11); |
| 1296 | break; |
| 1297 | case 24: |
| 1298 | ((u32 *) fb->pseudo_palette)[regno] = |
| 1299 | ((red & 0xff00) << 8) | ((green & 0xff00)) | |
| 1300 | ((blue & 0xff00) >> 8); |
| 1301 | break; |
| 1302 | #ifdef NO_32BIT_SUPPORT_YET |
| 1303 | case 32: |
| 1304 | ((u32 *) fb->pseudo_palette)[regno] = |
| 1305 | ((transp & 0xff00) << 16) | ((red & 0xff00) << 8) | |
| 1306 | ((green & 0xff00)) | ((blue & 0xff00) >> 8); |
| 1307 | break; |
| 1308 | #endif |
| 1309 | default: |
| 1310 | return 1; |
| 1311 | } |
| 1312 | return 0; |
| 1313 | } |
| 1314 | |
| 1315 | /* |
| 1316 | * (Un)Blank the display. |
| 1317 | */ |
| 1318 | static int neofb_blank(int blank_mode, struct fb_info *info) |
| 1319 | { |
| 1320 | /* |
| 1321 | * Blank the screen if blank_mode != 0, else unblank. |
| 1322 | * Return 0 if blanking succeeded, != 0 if un-/blanking failed due to |
| 1323 | * e.g. a video mode which doesn't support it. Implements VESA suspend |
| 1324 | * and powerdown modes for monitors, and backlight control on LCDs. |
| 1325 | * blank_mode == 0: unblanked (backlight on) |
| 1326 | * blank_mode == 1: blank (backlight on) |
| 1327 | * blank_mode == 2: suspend vsync (backlight off) |
| 1328 | * blank_mode == 3: suspend hsync (backlight off) |
| 1329 | * blank_mode == 4: powerdown (backlight off) |
| 1330 | * |
| 1331 | * wms...Enable VESA DPMS compatible powerdown mode |
| 1332 | * run "setterm -powersave powerdown" to take advantage |
| 1333 | */ |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 1334 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1335 | int seqflags, lcdflags, dpmsflags, reg; |
| 1336 | |
| 1337 | switch (blank_mode) { |
| 1338 | case FB_BLANK_POWERDOWN: /* powerdown - both sync lines down */ |
| 1339 | seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */ |
| 1340 | lcdflags = 0; /* LCD off */ |
| 1341 | dpmsflags = NEO_GR01_SUPPRESS_HSYNC | |
| 1342 | NEO_GR01_SUPPRESS_VSYNC; |
| 1343 | #ifdef CONFIG_TOSHIBA |
| 1344 | /* Do we still need this ? */ |
| 1345 | /* attempt to turn off backlight on toshiba; also turns off external */ |
| 1346 | { |
| 1347 | SMMRegisters regs; |
| 1348 | |
| 1349 | regs.eax = 0xff00; /* HCI_SET */ |
| 1350 | regs.ebx = 0x0002; /* HCI_BACKLIGHT */ |
| 1351 | regs.ecx = 0x0000; /* HCI_DISABLE */ |
| 1352 | tosh_smm(®s); |
| 1353 | } |
| 1354 | #endif |
| 1355 | break; |
| 1356 | case FB_BLANK_HSYNC_SUSPEND: /* hsync off */ |
| 1357 | seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */ |
| 1358 | lcdflags = 0; /* LCD off */ |
| 1359 | dpmsflags = NEO_GR01_SUPPRESS_HSYNC; |
| 1360 | break; |
| 1361 | case FB_BLANK_VSYNC_SUSPEND: /* vsync off */ |
| 1362 | seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */ |
| 1363 | lcdflags = 0; /* LCD off */ |
| 1364 | dpmsflags = NEO_GR01_SUPPRESS_VSYNC; |
| 1365 | break; |
| 1366 | case FB_BLANK_NORMAL: /* just blank screen (backlight stays on) */ |
| 1367 | seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */ |
| 1368 | lcdflags = par->PanelDispCntlReg1 & 0x02; /* LCD normal */ |
| 1369 | dpmsflags = 0; /* no hsync/vsync suppression */ |
| 1370 | break; |
| 1371 | case FB_BLANK_UNBLANK: /* unblank */ |
| 1372 | seqflags = 0; /* Enable sequencer */ |
| 1373 | lcdflags = par->PanelDispCntlReg1 & 0x02; /* LCD normal */ |
| 1374 | dpmsflags = 0x00; /* no hsync/vsync suppression */ |
| 1375 | #ifdef CONFIG_TOSHIBA |
| 1376 | /* Do we still need this ? */ |
| 1377 | /* attempt to re-enable backlight/external on toshiba */ |
| 1378 | { |
| 1379 | SMMRegisters regs; |
| 1380 | |
| 1381 | regs.eax = 0xff00; /* HCI_SET */ |
| 1382 | regs.ebx = 0x0002; /* HCI_BACKLIGHT */ |
| 1383 | regs.ecx = 0x0001; /* HCI_ENABLE */ |
| 1384 | tosh_smm(®s); |
| 1385 | } |
| 1386 | #endif |
| 1387 | break; |
| 1388 | default: /* Anything else we don't understand; return 1 to tell |
| 1389 | * fb_blank we didn't aactually do anything */ |
| 1390 | return 1; |
| 1391 | } |
| 1392 | |
| 1393 | neoUnlock(); |
| 1394 | reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags; |
| 1395 | vga_wseq(NULL, 0x01, reg); |
| 1396 | reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags; |
| 1397 | vga_wgfx(NULL, 0x20, reg); |
| 1398 | reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags; |
| 1399 | vga_wgfx(NULL, 0x01, reg); |
| 1400 | neoLock(&par->state); |
| 1401 | return 0; |
| 1402 | } |
| 1403 | |
| 1404 | static void |
| 1405 | neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect) |
| 1406 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 1407 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1408 | u_long dst, rop; |
| 1409 | |
| 1410 | dst = rect->dx + rect->dy * info->var.xres_virtual; |
| 1411 | rop = rect->rop ? 0x060000 : 0x0c0000; |
| 1412 | |
| 1413 | neo2200_wait_fifo(info, 4); |
| 1414 | |
| 1415 | /* set blt control */ |
| 1416 | writel(NEO_BC3_FIFO_EN | |
| 1417 | NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING | |
| 1418 | // NEO_BC3_DST_XY_ADDR | |
| 1419 | // NEO_BC3_SRC_XY_ADDR | |
| 1420 | rop, &par->neo2200->bltCntl); |
| 1421 | |
| 1422 | switch (info->var.bits_per_pixel) { |
| 1423 | case 8: |
| 1424 | writel(rect->color, &par->neo2200->fgColor); |
| 1425 | break; |
| 1426 | case 16: |
| 1427 | case 24: |
| 1428 | writel(((u32 *) (info->pseudo_palette))[rect->color], |
| 1429 | &par->neo2200->fgColor); |
| 1430 | break; |
| 1431 | } |
| 1432 | |
| 1433 | writel(dst * ((info->var.bits_per_pixel + 7) >> 3), |
| 1434 | &par->neo2200->dstStart); |
| 1435 | writel((rect->height << 16) | (rect->width & 0xffff), |
| 1436 | &par->neo2200->xyExt); |
| 1437 | } |
| 1438 | |
| 1439 | static void |
| 1440 | neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area) |
| 1441 | { |
| 1442 | u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy; |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 1443 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1444 | u_long src, dst, bltCntl; |
| 1445 | |
| 1446 | bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000; |
| 1447 | |
| 1448 | if ((dy > sy) || ((dy == sy) && (dx > sx))) { |
| 1449 | /* Start with the lower right corner */ |
| 1450 | sy += (area->height - 1); |
| 1451 | dy += (area->height - 1); |
| 1452 | sx += (area->width - 1); |
| 1453 | dx += (area->width - 1); |
| 1454 | |
| 1455 | bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC; |
| 1456 | } |
| 1457 | |
| 1458 | src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length; |
| 1459 | dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length; |
| 1460 | |
| 1461 | neo2200_wait_fifo(info, 4); |
| 1462 | |
| 1463 | /* set blt control */ |
| 1464 | writel(bltCntl, &par->neo2200->bltCntl); |
| 1465 | |
| 1466 | writel(src, &par->neo2200->srcStart); |
| 1467 | writel(dst, &par->neo2200->dstStart); |
| 1468 | writel((area->height << 16) | (area->width & 0xffff), |
| 1469 | &par->neo2200->xyExt); |
| 1470 | } |
| 1471 | |
| 1472 | static void |
| 1473 | neo2200_imageblit(struct fb_info *info, const struct fb_image *image) |
| 1474 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 1475 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1476 | int s_pitch = (image->width * image->depth + 7) >> 3; |
| 1477 | int scan_align = info->pixmap.scan_align - 1; |
| 1478 | int buf_align = info->pixmap.buf_align - 1; |
| 1479 | int bltCntl_flags, d_pitch, data_len; |
| 1480 | |
| 1481 | // The data is padded for the hardware |
| 1482 | d_pitch = (s_pitch + scan_align) & ~scan_align; |
| 1483 | data_len = ((d_pitch * image->height) + buf_align) & ~buf_align; |
| 1484 | |
| 1485 | neo2200_sync(info); |
| 1486 | |
| 1487 | if (image->depth == 1) { |
| 1488 | if (info->var.bits_per_pixel == 24 && image->width < 16) { |
| 1489 | /* FIXME. There is a bug with accelerated color-expanded |
| 1490 | * transfers in 24 bit mode if the image being transferred |
| 1491 | * is less than 16 bits wide. This is due to insufficient |
| 1492 | * padding when writing the image. We need to adjust |
| 1493 | * struct fb_pixmap. Not yet done. */ |
| 1494 | return cfb_imageblit(info, image); |
| 1495 | } |
| 1496 | bltCntl_flags = NEO_BC0_SRC_MONO; |
| 1497 | } else if (image->depth == info->var.bits_per_pixel) { |
| 1498 | bltCntl_flags = 0; |
| 1499 | } else { |
| 1500 | /* We don't currently support hardware acceleration if image |
| 1501 | * depth is different from display */ |
| 1502 | return cfb_imageblit(info, image); |
| 1503 | } |
| 1504 | |
| 1505 | switch (info->var.bits_per_pixel) { |
| 1506 | case 8: |
| 1507 | writel(image->fg_color, &par->neo2200->fgColor); |
| 1508 | writel(image->bg_color, &par->neo2200->bgColor); |
| 1509 | break; |
| 1510 | case 16: |
| 1511 | case 24: |
| 1512 | writel(((u32 *) (info->pseudo_palette))[image->fg_color], |
| 1513 | &par->neo2200->fgColor); |
| 1514 | writel(((u32 *) (info->pseudo_palette))[image->bg_color], |
| 1515 | &par->neo2200->bgColor); |
| 1516 | break; |
| 1517 | } |
| 1518 | |
| 1519 | writel(NEO_BC0_SYS_TO_VID | |
| 1520 | NEO_BC3_SKIP_MAPPING | bltCntl_flags | |
| 1521 | // NEO_BC3_DST_XY_ADDR | |
| 1522 | 0x0c0000, &par->neo2200->bltCntl); |
| 1523 | |
| 1524 | writel(0, &par->neo2200->srcStart); |
| 1525 | // par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff); |
| 1526 | writel(((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) + |
| 1527 | image->dy * info->fix.line_length), &par->neo2200->dstStart); |
| 1528 | writel((image->height << 16) | (image->width & 0xffff), |
| 1529 | &par->neo2200->xyExt); |
| 1530 | |
| 1531 | memcpy_toio(par->mmio_vbase + 0x100000, image->data, data_len); |
| 1532 | } |
| 1533 | |
| 1534 | static void |
| 1535 | neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) |
| 1536 | { |
| 1537 | switch (info->fix.accel) { |
| 1538 | case FB_ACCEL_NEOMAGIC_NM2200: |
| 1539 | case FB_ACCEL_NEOMAGIC_NM2230: |
| 1540 | case FB_ACCEL_NEOMAGIC_NM2360: |
| 1541 | case FB_ACCEL_NEOMAGIC_NM2380: |
| 1542 | neo2200_fillrect(info, rect); |
| 1543 | break; |
| 1544 | default: |
| 1545 | cfb_fillrect(info, rect); |
| 1546 | break; |
| 1547 | } |
| 1548 | } |
| 1549 | |
| 1550 | static void |
| 1551 | neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area) |
| 1552 | { |
| 1553 | switch (info->fix.accel) { |
| 1554 | case FB_ACCEL_NEOMAGIC_NM2200: |
| 1555 | case FB_ACCEL_NEOMAGIC_NM2230: |
| 1556 | case FB_ACCEL_NEOMAGIC_NM2360: |
| 1557 | case FB_ACCEL_NEOMAGIC_NM2380: |
| 1558 | neo2200_copyarea(info, area); |
| 1559 | break; |
| 1560 | default: |
| 1561 | cfb_copyarea(info, area); |
| 1562 | break; |
| 1563 | } |
| 1564 | } |
| 1565 | |
| 1566 | static void |
| 1567 | neofb_imageblit(struct fb_info *info, const struct fb_image *image) |
| 1568 | { |
| 1569 | switch (info->fix.accel) { |
| 1570 | case FB_ACCEL_NEOMAGIC_NM2200: |
| 1571 | case FB_ACCEL_NEOMAGIC_NM2230: |
| 1572 | case FB_ACCEL_NEOMAGIC_NM2360: |
| 1573 | case FB_ACCEL_NEOMAGIC_NM2380: |
| 1574 | neo2200_imageblit(info, image); |
| 1575 | break; |
| 1576 | default: |
| 1577 | cfb_imageblit(info, image); |
| 1578 | break; |
| 1579 | } |
| 1580 | } |
| 1581 | |
| 1582 | static int |
| 1583 | neofb_sync(struct fb_info *info) |
| 1584 | { |
| 1585 | switch (info->fix.accel) { |
| 1586 | case FB_ACCEL_NEOMAGIC_NM2200: |
| 1587 | case FB_ACCEL_NEOMAGIC_NM2230: |
| 1588 | case FB_ACCEL_NEOMAGIC_NM2360: |
| 1589 | case FB_ACCEL_NEOMAGIC_NM2380: |
| 1590 | neo2200_sync(info); |
| 1591 | break; |
| 1592 | default: |
| 1593 | break; |
| 1594 | } |
| 1595 | return 0; |
| 1596 | } |
| 1597 | |
| 1598 | /* |
| 1599 | static void |
| 1600 | neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width) |
| 1601 | { |
| 1602 | //memset_io(info->sprite.addr, 0xff, 1); |
| 1603 | } |
| 1604 | |
| 1605 | static int |
| 1606 | neofb_cursor(struct fb_info *info, struct fb_cursor *cursor) |
| 1607 | { |
| 1608 | struct neofb_par *par = (struct neofb_par *) info->par; |
| 1609 | |
| 1610 | * Disable cursor * |
| 1611 | write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par); |
| 1612 | |
| 1613 | if (cursor->set & FB_CUR_SETPOS) { |
| 1614 | u32 x = cursor->image.dx; |
| 1615 | u32 y = cursor->image.dy; |
| 1616 | |
| 1617 | info->cursor.image.dx = x; |
| 1618 | info->cursor.image.dy = y; |
| 1619 | write_le32(NEOREG_CURSX, x, par); |
| 1620 | write_le32(NEOREG_CURSY, y, par); |
| 1621 | } |
| 1622 | |
| 1623 | if (cursor->set & FB_CUR_SETSIZE) { |
| 1624 | info->cursor.image.height = cursor->image.height; |
| 1625 | info->cursor.image.width = cursor->image.width; |
| 1626 | } |
| 1627 | |
| 1628 | if (cursor->set & FB_CUR_SETHOT) |
| 1629 | info->cursor.hot = cursor->hot; |
| 1630 | |
| 1631 | if (cursor->set & FB_CUR_SETCMAP) { |
| 1632 | if (cursor->image.depth == 1) { |
| 1633 | u32 fg = cursor->image.fg_color; |
| 1634 | u32 bg = cursor->image.bg_color; |
| 1635 | |
| 1636 | info->cursor.image.fg_color = fg; |
| 1637 | info->cursor.image.bg_color = bg; |
| 1638 | |
| 1639 | fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00); |
| 1640 | bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00); |
| 1641 | write_le32(NEOREG_CURSFGCOLOR, fg, par); |
| 1642 | write_le32(NEOREG_CURSBGCOLOR, bg, par); |
| 1643 | } |
| 1644 | } |
| 1645 | |
| 1646 | if (cursor->set & FB_CUR_SETSHAPE) |
| 1647 | fb_load_cursor_image(info); |
| 1648 | |
| 1649 | if (info->cursor.enable) |
| 1650 | write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par); |
| 1651 | return 0; |
| 1652 | } |
| 1653 | */ |
| 1654 | |
| 1655 | static struct fb_ops neofb_ops = { |
| 1656 | .owner = THIS_MODULE, |
| 1657 | .fb_open = neofb_open, |
| 1658 | .fb_release = neofb_release, |
| 1659 | .fb_check_var = neofb_check_var, |
| 1660 | .fb_set_par = neofb_set_par, |
| 1661 | .fb_setcolreg = neofb_setcolreg, |
| 1662 | .fb_pan_display = neofb_pan_display, |
| 1663 | .fb_blank = neofb_blank, |
| 1664 | .fb_sync = neofb_sync, |
| 1665 | .fb_fillrect = neofb_fillrect, |
| 1666 | .fb_copyarea = neofb_copyarea, |
| 1667 | .fb_imageblit = neofb_imageblit, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1668 | }; |
| 1669 | |
| 1670 | /* --------------------------------------------------------------------- */ |
| 1671 | |
| 1672 | static struct fb_videomode __devinitdata mode800x480 = { |
| 1673 | .xres = 800, |
| 1674 | .yres = 480, |
| 1675 | .pixclock = 25000, |
| 1676 | .left_margin = 88, |
| 1677 | .right_margin = 40, |
| 1678 | .upper_margin = 23, |
| 1679 | .lower_margin = 1, |
| 1680 | .hsync_len = 128, |
| 1681 | .vsync_len = 4, |
| 1682 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 1683 | .vmode = FB_VMODE_NONINTERLACED |
| 1684 | }; |
| 1685 | |
| 1686 | static int __devinit neo_map_mmio(struct fb_info *info, |
| 1687 | struct pci_dev *dev) |
| 1688 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 1689 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1690 | |
| 1691 | DBG("neo_map_mmio"); |
| 1692 | |
| 1693 | switch (info->fix.accel) { |
| 1694 | case FB_ACCEL_NEOMAGIC_NM2070: |
| 1695 | info->fix.mmio_start = pci_resource_start(dev, 0)+ |
| 1696 | 0x100000; |
| 1697 | break; |
| 1698 | case FB_ACCEL_NEOMAGIC_NM2090: |
| 1699 | case FB_ACCEL_NEOMAGIC_NM2093: |
| 1700 | info->fix.mmio_start = pci_resource_start(dev, 0)+ |
| 1701 | 0x200000; |
| 1702 | break; |
| 1703 | case FB_ACCEL_NEOMAGIC_NM2160: |
| 1704 | case FB_ACCEL_NEOMAGIC_NM2097: |
| 1705 | case FB_ACCEL_NEOMAGIC_NM2200: |
| 1706 | case FB_ACCEL_NEOMAGIC_NM2230: |
| 1707 | case FB_ACCEL_NEOMAGIC_NM2360: |
| 1708 | case FB_ACCEL_NEOMAGIC_NM2380: |
| 1709 | info->fix.mmio_start = pci_resource_start(dev, 1); |
| 1710 | break; |
| 1711 | default: |
| 1712 | info->fix.mmio_start = pci_resource_start(dev, 0); |
| 1713 | } |
| 1714 | info->fix.mmio_len = MMIO_SIZE; |
| 1715 | |
| 1716 | if (!request_mem_region |
| 1717 | (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) { |
| 1718 | printk("neofb: memory mapped IO in use\n"); |
| 1719 | return -EBUSY; |
| 1720 | } |
| 1721 | |
| 1722 | par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE); |
| 1723 | if (!par->mmio_vbase) { |
| 1724 | printk("neofb: unable to map memory mapped IO\n"); |
| 1725 | release_mem_region(info->fix.mmio_start, |
| 1726 | info->fix.mmio_len); |
| 1727 | return -ENOMEM; |
| 1728 | } else |
| 1729 | printk(KERN_INFO "neofb: mapped io at %p\n", |
| 1730 | par->mmio_vbase); |
| 1731 | return 0; |
| 1732 | } |
| 1733 | |
| 1734 | static void neo_unmap_mmio(struct fb_info *info) |
| 1735 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 1736 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1737 | |
| 1738 | DBG("neo_unmap_mmio"); |
| 1739 | |
| 1740 | iounmap(par->mmio_vbase); |
| 1741 | par->mmio_vbase = NULL; |
| 1742 | |
| 1743 | release_mem_region(info->fix.mmio_start, |
| 1744 | info->fix.mmio_len); |
| 1745 | } |
| 1746 | |
| 1747 | static int __devinit neo_map_video(struct fb_info *info, |
| 1748 | struct pci_dev *dev, int video_len) |
| 1749 | { |
| 1750 | //unsigned long addr; |
| 1751 | |
| 1752 | DBG("neo_map_video"); |
| 1753 | |
| 1754 | info->fix.smem_start = pci_resource_start(dev, 0); |
| 1755 | info->fix.smem_len = video_len; |
| 1756 | |
| 1757 | if (!request_mem_region(info->fix.smem_start, info->fix.smem_len, |
| 1758 | "frame buffer")) { |
| 1759 | printk("neofb: frame buffer in use\n"); |
| 1760 | return -EBUSY; |
| 1761 | } |
| 1762 | |
| 1763 | info->screen_base = |
| 1764 | ioremap(info->fix.smem_start, info->fix.smem_len); |
| 1765 | if (!info->screen_base) { |
| 1766 | printk("neofb: unable to map screen memory\n"); |
| 1767 | release_mem_region(info->fix.smem_start, |
| 1768 | info->fix.smem_len); |
| 1769 | return -ENOMEM; |
| 1770 | } else |
| 1771 | printk(KERN_INFO "neofb: mapped framebuffer at %p\n", |
| 1772 | info->screen_base); |
| 1773 | |
| 1774 | #ifdef CONFIG_MTRR |
| 1775 | ((struct neofb_par *)(info->par))->mtrr = |
| 1776 | mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0), |
| 1777 | MTRR_TYPE_WRCOMB, 1); |
| 1778 | #endif |
| 1779 | |
| 1780 | /* Clear framebuffer, it's all white in memory after boot */ |
| 1781 | memset_io(info->screen_base, 0, info->fix.smem_len); |
| 1782 | |
| 1783 | /* Allocate Cursor drawing pad. |
| 1784 | info->fix.smem_len -= PAGE_SIZE; |
| 1785 | addr = info->fix.smem_start + info->fix.smem_len; |
| 1786 | write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) | |
| 1787 | ((0x0ff0 & (addr >> 10)) >> 4), par); |
| 1788 | addr = (unsigned long) info->screen_base + info->fix.smem_len; |
| 1789 | info->sprite.addr = (u8 *) addr; */ |
| 1790 | return 0; |
| 1791 | } |
| 1792 | |
| 1793 | static void neo_unmap_video(struct fb_info *info) |
| 1794 | { |
| 1795 | DBG("neo_unmap_video"); |
| 1796 | |
| 1797 | #ifdef CONFIG_MTRR |
| 1798 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 1799 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1800 | |
| 1801 | mtrr_del(par->mtrr, info->fix.smem_start, |
| 1802 | info->fix.smem_len); |
| 1803 | } |
| 1804 | #endif |
| 1805 | iounmap(info->screen_base); |
| 1806 | info->screen_base = NULL; |
| 1807 | |
| 1808 | release_mem_region(info->fix.smem_start, |
| 1809 | info->fix.smem_len); |
| 1810 | } |
| 1811 | |
| 1812 | static int __devinit neo_scan_monitor(struct fb_info *info) |
| 1813 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 1814 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1815 | unsigned char type, display; |
| 1816 | int w; |
| 1817 | |
| 1818 | // Eventually we will have i2c support. |
| 1819 | info->monspecs.modedb = kmalloc(sizeof(struct fb_videomode), GFP_KERNEL); |
| 1820 | if (!info->monspecs.modedb) |
| 1821 | return -ENOMEM; |
| 1822 | info->monspecs.modedb_len = 1; |
| 1823 | |
| 1824 | /* Determine the panel type */ |
| 1825 | vga_wgfx(NULL, 0x09, 0x26); |
| 1826 | type = vga_rgfx(NULL, 0x21); |
| 1827 | display = vga_rgfx(NULL, 0x20); |
| 1828 | if (!par->internal_display && !par->external_display) { |
| 1829 | par->internal_display = display & 2 || !(display & 3) ? 1 : 0; |
| 1830 | par->external_display = display & 1; |
| 1831 | printk (KERN_INFO "Autodetected %s display\n", |
| 1832 | par->internal_display && par->external_display ? "simultaneous" : |
| 1833 | par->internal_display ? "internal" : "external"); |
| 1834 | } |
| 1835 | |
| 1836 | /* Determine panel width -- used in NeoValidMode. */ |
| 1837 | w = vga_rgfx(NULL, 0x20); |
| 1838 | vga_wgfx(NULL, 0x09, 0x00); |
| 1839 | switch ((w & 0x18) >> 3) { |
| 1840 | case 0x00: |
| 1841 | // 640x480@60 |
| 1842 | par->NeoPanelWidth = 640; |
| 1843 | par->NeoPanelHeight = 480; |
| 1844 | memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode)); |
| 1845 | break; |
| 1846 | case 0x01: |
| 1847 | par->NeoPanelWidth = 800; |
| 1848 | if (par->libretto) { |
| 1849 | par->NeoPanelHeight = 480; |
| 1850 | memcpy(info->monspecs.modedb, &mode800x480, sizeof(struct fb_videomode)); |
| 1851 | } else { |
| 1852 | // 800x600@60 |
| 1853 | par->NeoPanelHeight = 600; |
| 1854 | memcpy(info->monspecs.modedb, &vesa_modes[8], sizeof(struct fb_videomode)); |
| 1855 | } |
| 1856 | break; |
| 1857 | case 0x02: |
| 1858 | // 1024x768@60 |
| 1859 | par->NeoPanelWidth = 1024; |
| 1860 | par->NeoPanelHeight = 768; |
| 1861 | memcpy(info->monspecs.modedb, &vesa_modes[13], sizeof(struct fb_videomode)); |
| 1862 | break; |
| 1863 | case 0x03: |
| 1864 | /* 1280x1024@60 panel support needs to be added */ |
| 1865 | #ifdef NOT_DONE |
| 1866 | par->NeoPanelWidth = 1280; |
| 1867 | par->NeoPanelHeight = 1024; |
| 1868 | memcpy(info->monspecs.modedb, &vesa_modes[20], sizeof(struct fb_videomode)); |
| 1869 | break; |
| 1870 | #else |
| 1871 | printk(KERN_ERR |
| 1872 | "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n"); |
| 1873 | return -1; |
| 1874 | #endif |
| 1875 | default: |
| 1876 | // 640x480@60 |
| 1877 | par->NeoPanelWidth = 640; |
| 1878 | par->NeoPanelHeight = 480; |
| 1879 | memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode)); |
| 1880 | break; |
| 1881 | } |
| 1882 | |
| 1883 | printk(KERN_INFO "Panel is a %dx%d %s %s display\n", |
| 1884 | par->NeoPanelWidth, |
| 1885 | par->NeoPanelHeight, |
| 1886 | (type & 0x02) ? "color" : "monochrome", |
| 1887 | (type & 0x10) ? "TFT" : "dual scan"); |
| 1888 | return 0; |
| 1889 | } |
| 1890 | |
| 1891 | static int __devinit neo_init_hw(struct fb_info *info) |
| 1892 | { |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 1893 | struct neofb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1894 | int videoRam = 896; |
| 1895 | int maxClock = 65000; |
| 1896 | int CursorMem = 1024; |
| 1897 | int CursorOff = 0x100; |
| 1898 | int linearSize = 1024; |
| 1899 | int maxWidth = 1024; |
| 1900 | int maxHeight = 1024; |
| 1901 | |
| 1902 | DBG("neo_init_hw"); |
| 1903 | |
| 1904 | neoUnlock(); |
| 1905 | |
| 1906 | #if 0 |
| 1907 | printk(KERN_DEBUG "--- Neo extended register dump ---\n"); |
| 1908 | for (int w = 0; w < 0x85; w++) |
| 1909 | printk(KERN_DEBUG "CR %p: %p\n", (void *) w, |
| 1910 | (void *) vga_rcrt(NULL, w); |
| 1911 | for (int w = 0; w < 0xC7; w++) |
| 1912 | printk(KERN_DEBUG "GR %p: %p\n", (void *) w, |
| 1913 | (void *) vga_rgfx(NULL, w)); |
| 1914 | #endif |
| 1915 | switch (info->fix.accel) { |
| 1916 | case FB_ACCEL_NEOMAGIC_NM2070: |
| 1917 | videoRam = 896; |
| 1918 | maxClock = 65000; |
| 1919 | CursorMem = 2048; |
| 1920 | CursorOff = 0x100; |
| 1921 | linearSize = 1024; |
| 1922 | maxWidth = 1024; |
| 1923 | maxHeight = 1024; |
| 1924 | break; |
| 1925 | case FB_ACCEL_NEOMAGIC_NM2090: |
| 1926 | case FB_ACCEL_NEOMAGIC_NM2093: |
| 1927 | videoRam = 1152; |
| 1928 | maxClock = 80000; |
| 1929 | CursorMem = 2048; |
| 1930 | CursorOff = 0x100; |
| 1931 | linearSize = 2048; |
| 1932 | maxWidth = 1024; |
| 1933 | maxHeight = 1024; |
| 1934 | break; |
| 1935 | case FB_ACCEL_NEOMAGIC_NM2097: |
| 1936 | videoRam = 1152; |
| 1937 | maxClock = 80000; |
| 1938 | CursorMem = 1024; |
| 1939 | CursorOff = 0x100; |
| 1940 | linearSize = 2048; |
| 1941 | maxWidth = 1024; |
| 1942 | maxHeight = 1024; |
| 1943 | break; |
| 1944 | case FB_ACCEL_NEOMAGIC_NM2160: |
| 1945 | videoRam = 2048; |
| 1946 | maxClock = 90000; |
| 1947 | CursorMem = 1024; |
| 1948 | CursorOff = 0x100; |
| 1949 | linearSize = 2048; |
| 1950 | maxWidth = 1024; |
| 1951 | maxHeight = 1024; |
| 1952 | break; |
| 1953 | case FB_ACCEL_NEOMAGIC_NM2200: |
| 1954 | videoRam = 2560; |
| 1955 | maxClock = 110000; |
| 1956 | CursorMem = 1024; |
| 1957 | CursorOff = 0x1000; |
| 1958 | linearSize = 4096; |
| 1959 | maxWidth = 1280; |
| 1960 | maxHeight = 1024; /* ???? */ |
| 1961 | |
| 1962 | par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase; |
| 1963 | break; |
| 1964 | case FB_ACCEL_NEOMAGIC_NM2230: |
| 1965 | videoRam = 3008; |
| 1966 | maxClock = 110000; |
| 1967 | CursorMem = 1024; |
| 1968 | CursorOff = 0x1000; |
| 1969 | linearSize = 4096; |
| 1970 | maxWidth = 1280; |
| 1971 | maxHeight = 1024; /* ???? */ |
| 1972 | |
| 1973 | par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase; |
| 1974 | break; |
| 1975 | case FB_ACCEL_NEOMAGIC_NM2360: |
| 1976 | videoRam = 4096; |
| 1977 | maxClock = 110000; |
| 1978 | CursorMem = 1024; |
| 1979 | CursorOff = 0x1000; |
| 1980 | linearSize = 4096; |
| 1981 | maxWidth = 1280; |
| 1982 | maxHeight = 1024; /* ???? */ |
| 1983 | |
| 1984 | par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase; |
| 1985 | break; |
| 1986 | case FB_ACCEL_NEOMAGIC_NM2380: |
| 1987 | videoRam = 6144; |
| 1988 | maxClock = 110000; |
| 1989 | CursorMem = 1024; |
| 1990 | CursorOff = 0x1000; |
| 1991 | linearSize = 8192; |
| 1992 | maxWidth = 1280; |
| 1993 | maxHeight = 1024; /* ???? */ |
| 1994 | |
| 1995 | par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase; |
| 1996 | break; |
| 1997 | } |
| 1998 | /* |
| 1999 | info->sprite.size = CursorMem; |
| 2000 | info->sprite.scan_align = 1; |
| 2001 | info->sprite.buf_align = 1; |
| 2002 | info->sprite.flags = FB_PIXMAP_IO; |
| 2003 | info->sprite.outbuf = neofb_draw_cursor; |
| 2004 | */ |
| 2005 | par->maxClock = maxClock; |
| 2006 | par->cursorOff = CursorOff; |
| 2007 | return ((videoRam * 1024)); |
| 2008 | } |
| 2009 | |
| 2010 | |
| 2011 | static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct |
| 2012 | pci_device_id *id) |
| 2013 | { |
| 2014 | struct fb_info *info; |
| 2015 | struct neofb_par *par; |
| 2016 | |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 2017 | info = framebuffer_alloc(sizeof(struct neofb_par), &dev->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2018 | |
| 2019 | if (!info) |
| 2020 | return NULL; |
| 2021 | |
| 2022 | par = info->par; |
| 2023 | |
| 2024 | info->fix.accel = id->driver_data; |
| 2025 | |
| 2026 | par->pci_burst = !nopciburst; |
| 2027 | par->lcd_stretch = !nostretch; |
| 2028 | par->libretto = libretto; |
| 2029 | |
| 2030 | par->internal_display = internal; |
| 2031 | par->external_display = external; |
| 2032 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; |
| 2033 | |
| 2034 | switch (info->fix.accel) { |
| 2035 | case FB_ACCEL_NEOMAGIC_NM2070: |
| 2036 | sprintf(info->fix.id, "MagicGraph 128"); |
| 2037 | break; |
| 2038 | case FB_ACCEL_NEOMAGIC_NM2090: |
| 2039 | sprintf(info->fix.id, "MagicGraph 128V"); |
| 2040 | break; |
| 2041 | case FB_ACCEL_NEOMAGIC_NM2093: |
| 2042 | sprintf(info->fix.id, "MagicGraph 128ZV"); |
| 2043 | break; |
| 2044 | case FB_ACCEL_NEOMAGIC_NM2097: |
| 2045 | sprintf(info->fix.id, "MagicGraph 128ZV+"); |
| 2046 | break; |
| 2047 | case FB_ACCEL_NEOMAGIC_NM2160: |
| 2048 | sprintf(info->fix.id, "MagicGraph 128XD"); |
| 2049 | break; |
| 2050 | case FB_ACCEL_NEOMAGIC_NM2200: |
| 2051 | sprintf(info->fix.id, "MagicGraph 256AV"); |
| 2052 | info->flags |= FBINFO_HWACCEL_IMAGEBLIT | |
| 2053 | FBINFO_HWACCEL_COPYAREA | |
| 2054 | FBINFO_HWACCEL_FILLRECT; |
| 2055 | break; |
| 2056 | case FB_ACCEL_NEOMAGIC_NM2230: |
| 2057 | sprintf(info->fix.id, "MagicGraph 256AV+"); |
| 2058 | info->flags |= FBINFO_HWACCEL_IMAGEBLIT | |
| 2059 | FBINFO_HWACCEL_COPYAREA | |
| 2060 | FBINFO_HWACCEL_FILLRECT; |
| 2061 | break; |
| 2062 | case FB_ACCEL_NEOMAGIC_NM2360: |
| 2063 | sprintf(info->fix.id, "MagicGraph 256ZX"); |
| 2064 | info->flags |= FBINFO_HWACCEL_IMAGEBLIT | |
| 2065 | FBINFO_HWACCEL_COPYAREA | |
| 2066 | FBINFO_HWACCEL_FILLRECT; |
| 2067 | break; |
| 2068 | case FB_ACCEL_NEOMAGIC_NM2380: |
| 2069 | sprintf(info->fix.id, "MagicGraph 256XL+"); |
| 2070 | info->flags |= FBINFO_HWACCEL_IMAGEBLIT | |
| 2071 | FBINFO_HWACCEL_COPYAREA | |
| 2072 | FBINFO_HWACCEL_FILLRECT; |
| 2073 | break; |
| 2074 | } |
| 2075 | |
| 2076 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
| 2077 | info->fix.type_aux = 0; |
| 2078 | info->fix.xpanstep = 0; |
| 2079 | info->fix.ypanstep = 4; |
| 2080 | info->fix.ywrapstep = 0; |
| 2081 | info->fix.accel = id->driver_data; |
| 2082 | |
| 2083 | info->fbops = &neofb_ops; |
Antonino A. Daplas | 9f19bc5 | 2006-01-09 20:53:09 -0800 | [diff] [blame] | 2084 | info->pseudo_palette = par->palette; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2085 | return info; |
| 2086 | } |
| 2087 | |
| 2088 | static void neo_free_fb_info(struct fb_info *info) |
| 2089 | { |
| 2090 | if (info) { |
| 2091 | /* |
| 2092 | * Free the colourmap |
| 2093 | */ |
| 2094 | fb_dealloc_cmap(&info->cmap); |
| 2095 | framebuffer_release(info); |
| 2096 | } |
| 2097 | } |
| 2098 | |
| 2099 | /* --------------------------------------------------------------------- */ |
| 2100 | |
| 2101 | static int __devinit neofb_probe(struct pci_dev *dev, |
| 2102 | const struct pci_device_id *id) |
| 2103 | { |
| 2104 | struct fb_info *info; |
| 2105 | u_int h_sync, v_sync; |
| 2106 | int video_len, err; |
| 2107 | |
| 2108 | DBG("neofb_probe"); |
| 2109 | |
| 2110 | err = pci_enable_device(dev); |
| 2111 | if (err) |
| 2112 | return err; |
| 2113 | |
| 2114 | err = -ENOMEM; |
| 2115 | info = neo_alloc_fb_info(dev, id); |
| 2116 | if (!info) |
| 2117 | return err; |
| 2118 | |
| 2119 | err = neo_map_mmio(info, dev); |
| 2120 | if (err) |
| 2121 | goto err_map_mmio; |
| 2122 | |
| 2123 | err = neo_scan_monitor(info); |
| 2124 | if (err) |
| 2125 | goto err_scan_monitor; |
| 2126 | |
| 2127 | video_len = neo_init_hw(info); |
| 2128 | if (video_len < 0) { |
| 2129 | err = video_len; |
| 2130 | goto err_init_hw; |
| 2131 | } |
| 2132 | |
| 2133 | err = neo_map_video(info, dev, video_len); |
| 2134 | if (err) |
| 2135 | goto err_init_hw; |
| 2136 | |
| 2137 | if (!fb_find_mode(&info->var, info, mode_option, NULL, 0, |
| 2138 | info->monspecs.modedb, 16)) { |
| 2139 | printk(KERN_ERR "neofb: Unable to find usable video mode.\n"); |
| 2140 | goto err_map_video; |
| 2141 | } |
| 2142 | |
| 2143 | /* |
| 2144 | * Calculate the hsync and vsync frequencies. Note that |
| 2145 | * we split the 1e12 constant up so that we can preserve |
| 2146 | * the precision and fit the results into 32-bit registers. |
| 2147 | * (1953125000 * 512 = 1e12) |
| 2148 | */ |
| 2149 | h_sync = 1953125000 / info->var.pixclock; |
| 2150 | h_sync = |
| 2151 | h_sync * 512 / (info->var.xres + info->var.left_margin + |
| 2152 | info->var.right_margin + info->var.hsync_len); |
| 2153 | v_sync = |
| 2154 | h_sync / (info->var.yres + info->var.upper_margin + |
| 2155 | info->var.lower_margin + info->var.vsync_len); |
| 2156 | |
| 2157 | printk(KERN_INFO "neofb v" NEOFB_VERSION |
| 2158 | ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n", |
| 2159 | info->fix.smem_len >> 10, info->var.xres, |
| 2160 | info->var.yres, h_sync / 1000, h_sync % 1000, v_sync); |
| 2161 | |
| 2162 | if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) |
| 2163 | goto err_map_video; |
| 2164 | |
| 2165 | err = register_framebuffer(info); |
| 2166 | if (err < 0) |
| 2167 | goto err_reg_fb; |
| 2168 | |
| 2169 | printk(KERN_INFO "fb%d: %s frame buffer device\n", |
| 2170 | info->node, info->fix.id); |
| 2171 | |
| 2172 | /* |
| 2173 | * Our driver data |
| 2174 | */ |
| 2175 | pci_set_drvdata(dev, info); |
| 2176 | return 0; |
| 2177 | |
| 2178 | err_reg_fb: |
| 2179 | fb_dealloc_cmap(&info->cmap); |
| 2180 | err_map_video: |
| 2181 | neo_unmap_video(info); |
| 2182 | err_init_hw: |
| 2183 | fb_destroy_modedb(info->monspecs.modedb); |
| 2184 | err_scan_monitor: |
| 2185 | neo_unmap_mmio(info); |
| 2186 | err_map_mmio: |
| 2187 | neo_free_fb_info(info); |
| 2188 | return err; |
| 2189 | } |
| 2190 | |
| 2191 | static void __devexit neofb_remove(struct pci_dev *dev) |
| 2192 | { |
| 2193 | struct fb_info *info = pci_get_drvdata(dev); |
| 2194 | |
| 2195 | DBG("neofb_remove"); |
| 2196 | |
| 2197 | if (info) { |
| 2198 | /* |
| 2199 | * If unregister_framebuffer fails, then |
| 2200 | * we will be leaving hooks that could cause |
| 2201 | * oopsen laying around. |
| 2202 | */ |
| 2203 | if (unregister_framebuffer(info)) |
| 2204 | printk(KERN_WARNING |
| 2205 | "neofb: danger danger! Oopsen imminent!\n"); |
| 2206 | |
| 2207 | neo_unmap_video(info); |
| 2208 | fb_destroy_modedb(info->monspecs.modedb); |
| 2209 | neo_unmap_mmio(info); |
| 2210 | neo_free_fb_info(info); |
| 2211 | |
| 2212 | /* |
| 2213 | * Ensure that the driver data is no longer |
| 2214 | * valid. |
| 2215 | */ |
| 2216 | pci_set_drvdata(dev, NULL); |
| 2217 | } |
| 2218 | } |
| 2219 | |
| 2220 | static struct pci_device_id neofb_devices[] = { |
| 2221 | {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070, |
| 2222 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070}, |
| 2223 | |
| 2224 | {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090, |
| 2225 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090}, |
| 2226 | |
| 2227 | {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093, |
| 2228 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093}, |
| 2229 | |
| 2230 | {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097, |
| 2231 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097}, |
| 2232 | |
| 2233 | {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160, |
| 2234 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160}, |
| 2235 | |
| 2236 | {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200, |
| 2237 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200}, |
| 2238 | |
| 2239 | {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230, |
| 2240 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230}, |
| 2241 | |
| 2242 | {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360, |
| 2243 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360}, |
| 2244 | |
| 2245 | {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380, |
| 2246 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380}, |
| 2247 | |
| 2248 | {0, 0, 0, 0, 0, 0, 0} |
| 2249 | }; |
| 2250 | |
| 2251 | MODULE_DEVICE_TABLE(pci, neofb_devices); |
| 2252 | |
| 2253 | static struct pci_driver neofb_driver = { |
| 2254 | .name = "neofb", |
| 2255 | .id_table = neofb_devices, |
| 2256 | .probe = neofb_probe, |
| 2257 | .remove = __devexit_p(neofb_remove) |
| 2258 | }; |
| 2259 | |
| 2260 | /* ************************* init in-kernel code ************************** */ |
| 2261 | |
| 2262 | #ifndef MODULE |
| 2263 | static int __init neofb_setup(char *options) |
| 2264 | { |
| 2265 | char *this_opt; |
| 2266 | |
| 2267 | DBG("neofb_setup"); |
| 2268 | |
| 2269 | if (!options || !*options) |
| 2270 | return 0; |
| 2271 | |
| 2272 | while ((this_opt = strsep(&options, ",")) != NULL) { |
| 2273 | if (!*this_opt) |
| 2274 | continue; |
| 2275 | |
| 2276 | if (!strncmp(this_opt, "internal", 8)) |
| 2277 | internal = 1; |
| 2278 | else if (!strncmp(this_opt, "external", 8)) |
| 2279 | external = 1; |
| 2280 | else if (!strncmp(this_opt, "nostretch", 9)) |
| 2281 | nostretch = 1; |
| 2282 | else if (!strncmp(this_opt, "nopciburst", 10)) |
| 2283 | nopciburst = 1; |
| 2284 | else if (!strncmp(this_opt, "libretto", 8)) |
| 2285 | libretto = 1; |
| 2286 | else |
| 2287 | mode_option = this_opt; |
| 2288 | } |
| 2289 | return 0; |
| 2290 | } |
| 2291 | #endif /* MODULE */ |
| 2292 | |
| 2293 | static int __init neofb_init(void) |
| 2294 | { |
| 2295 | #ifndef MODULE |
| 2296 | char *option = NULL; |
| 2297 | |
| 2298 | if (fb_get_options("neofb", &option)) |
| 2299 | return -ENODEV; |
| 2300 | neofb_setup(option); |
| 2301 | #endif |
| 2302 | return pci_register_driver(&neofb_driver); |
| 2303 | } |
| 2304 | |
| 2305 | module_init(neofb_init); |
| 2306 | |
| 2307 | #ifdef MODULE |
| 2308 | static void __exit neofb_exit(void) |
| 2309 | { |
| 2310 | pci_unregister_driver(&neofb_driver); |
| 2311 | } |
| 2312 | |
| 2313 | module_exit(neofb_exit); |
| 2314 | #endif /* MODULE */ |