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buzbee311ca162013-02-28 15:56:43 -08001/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "compiler_internals.h"
18#include "local_value_numbering.h"
Ian Rogers8d3a1172013-06-04 01:13:28 -070019#include "dataflow_iterator-inl.h"
Vladimir Marko9820b7c2014-01-02 16:40:37 +000020#include "dex/quick/dex_file_method_inliner.h"
21#include "dex/quick/dex_file_to_method_inliner_map.h"
Vladimir Marko69f08ba2014-04-11 12:28:11 +010022#include "utils/scoped_arena_containers.h"
buzbee311ca162013-02-28 15:56:43 -080023
24namespace art {
25
Brian Carlstrom2ce745c2013-07-17 17:44:30 -070026static unsigned int Predecessors(BasicBlock* bb) {
buzbee862a7602013-04-05 10:58:54 -070027 return bb->predecessors->Size();
buzbee311ca162013-02-28 15:56:43 -080028}
29
30/* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
Brian Carlstrom2ce745c2013-07-17 17:44:30 -070031void MIRGraph::SetConstant(int32_t ssa_reg, int value) {
buzbee862a7602013-04-05 10:58:54 -070032 is_constant_v_->SetBit(ssa_reg);
buzbee311ca162013-02-28 15:56:43 -080033 constant_values_[ssa_reg] = value;
34}
35
Brian Carlstrom2ce745c2013-07-17 17:44:30 -070036void MIRGraph::SetConstantWide(int ssa_reg, int64_t value) {
buzbee862a7602013-04-05 10:58:54 -070037 is_constant_v_->SetBit(ssa_reg);
buzbee311ca162013-02-28 15:56:43 -080038 constant_values_[ssa_reg] = Low32Bits(value);
39 constant_values_[ssa_reg + 1] = High32Bits(value);
40}
41
Jean Christophe Beyler4e97c532014-01-07 10:07:18 -080042void MIRGraph::DoConstantPropagation(BasicBlock* bb) {
buzbee311ca162013-02-28 15:56:43 -080043 MIR* mir;
buzbee311ca162013-02-28 15:56:43 -080044
45 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
Alexei Zavjalov9d894662014-04-21 20:45:24 +070046 // Skip pass if BB has MIR without SSA representation.
Jean Christophe Beylercc794c32014-05-02 09:34:13 -070047 if (mir->ssa_rep == nullptr) {
Alexei Zavjalov9d894662014-04-21 20:45:24 +070048 return;
49 }
50
Jean Christophe Beylercc794c32014-05-02 09:34:13 -070051 uint64_t df_attributes = GetDataFlowAttributes(mir);
buzbee311ca162013-02-28 15:56:43 -080052
Ian Rogers29a26482014-05-02 15:27:29 -070053 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn;
buzbee311ca162013-02-28 15:56:43 -080054
55 if (!(df_attributes & DF_HAS_DEFS)) continue;
56
57 /* Handle instructions that set up constants directly */
58 if (df_attributes & DF_SETS_CONST) {
59 if (df_attributes & DF_DA) {
60 int32_t vB = static_cast<int32_t>(d_insn->vB);
61 switch (d_insn->opcode) {
62 case Instruction::CONST_4:
63 case Instruction::CONST_16:
64 case Instruction::CONST:
65 SetConstant(mir->ssa_rep->defs[0], vB);
66 break;
67 case Instruction::CONST_HIGH16:
68 SetConstant(mir->ssa_rep->defs[0], vB << 16);
69 break;
70 case Instruction::CONST_WIDE_16:
71 case Instruction::CONST_WIDE_32:
72 SetConstantWide(mir->ssa_rep->defs[0], static_cast<int64_t>(vB));
73 break;
74 case Instruction::CONST_WIDE:
Brian Carlstromb1eba212013-07-17 18:07:19 -070075 SetConstantWide(mir->ssa_rep->defs[0], d_insn->vB_wide);
buzbee311ca162013-02-28 15:56:43 -080076 break;
77 case Instruction::CONST_WIDE_HIGH16:
78 SetConstantWide(mir->ssa_rep->defs[0], static_cast<int64_t>(vB) << 48);
79 break;
80 default:
81 break;
82 }
83 }
84 /* Handle instructions that set up constants directly */
85 } else if (df_attributes & DF_IS_MOVE) {
86 int i;
87
88 for (i = 0; i < mir->ssa_rep->num_uses; i++) {
buzbee862a7602013-04-05 10:58:54 -070089 if (!is_constant_v_->IsBitSet(mir->ssa_rep->uses[i])) break;
buzbee311ca162013-02-28 15:56:43 -080090 }
91 /* Move a register holding a constant to another register */
92 if (i == mir->ssa_rep->num_uses) {
93 SetConstant(mir->ssa_rep->defs[0], constant_values_[mir->ssa_rep->uses[0]]);
94 if (df_attributes & DF_A_WIDE) {
95 SetConstant(mir->ssa_rep->defs[1], constant_values_[mir->ssa_rep->uses[1]]);
96 }
97 }
98 }
99 }
100 /* TODO: implement code to handle arithmetic operations */
buzbee311ca162013-02-28 15:56:43 -0800101}
102
buzbee311ca162013-02-28 15:56:43 -0800103/* Advance to next strictly dominated MIR node in an extended basic block */
buzbee0d829482013-10-11 15:24:55 -0700104MIR* MIRGraph::AdvanceMIR(BasicBlock** p_bb, MIR* mir) {
buzbee311ca162013-02-28 15:56:43 -0800105 BasicBlock* bb = *p_bb;
106 if (mir != NULL) {
107 mir = mir->next;
108 if (mir == NULL) {
buzbee0d829482013-10-11 15:24:55 -0700109 bb = GetBasicBlock(bb->fall_through);
buzbee311ca162013-02-28 15:56:43 -0800110 if ((bb == NULL) || Predecessors(bb) != 1) {
111 mir = NULL;
112 } else {
113 *p_bb = bb;
114 mir = bb->first_mir_insn;
115 }
116 }
117 }
118 return mir;
119}
120
121/*
122 * To be used at an invoke mir. If the logically next mir node represents
123 * a move-result, return it. Else, return NULL. If a move-result exists,
124 * it is required to immediately follow the invoke with no intervening
125 * opcodes or incoming arcs. However, if the result of the invoke is not
126 * used, a move-result may not be present.
127 */
Brian Carlstrom2ce745c2013-07-17 17:44:30 -0700128MIR* MIRGraph::FindMoveResult(BasicBlock* bb, MIR* mir) {
buzbee311ca162013-02-28 15:56:43 -0800129 BasicBlock* tbb = bb;
130 mir = AdvanceMIR(&tbb, mir);
131 while (mir != NULL) {
132 int opcode = mir->dalvikInsn.opcode;
133 if ((mir->dalvikInsn.opcode == Instruction::MOVE_RESULT) ||
134 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) ||
135 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_WIDE)) {
136 break;
137 }
138 // Keep going if pseudo op, otherwise terminate
139 if (opcode < kNumPackedOpcodes) {
140 mir = NULL;
141 } else {
142 mir = AdvanceMIR(&tbb, mir);
143 }
144 }
145 return mir;
146}
147
buzbee0d829482013-10-11 15:24:55 -0700148BasicBlock* MIRGraph::NextDominatedBlock(BasicBlock* bb) {
buzbee311ca162013-02-28 15:56:43 -0800149 if (bb->block_type == kDead) {
150 return NULL;
151 }
152 DCHECK((bb->block_type == kEntryBlock) || (bb->block_type == kDalvikByteCode)
153 || (bb->block_type == kExitBlock));
buzbee0d829482013-10-11 15:24:55 -0700154 BasicBlock* bb_taken = GetBasicBlock(bb->taken);
155 BasicBlock* bb_fall_through = GetBasicBlock(bb->fall_through);
buzbee1da1e2f2013-11-15 13:37:01 -0800156 if (((bb_fall_through == NULL) && (bb_taken != NULL)) &&
buzbee0d829482013-10-11 15:24:55 -0700157 ((bb_taken->block_type == kDalvikByteCode) || (bb_taken->block_type == kExitBlock))) {
buzbeecbcfaf32013-08-19 07:37:40 -0700158 // Follow simple unconditional branches.
buzbee0d829482013-10-11 15:24:55 -0700159 bb = bb_taken;
buzbeecbcfaf32013-08-19 07:37:40 -0700160 } else {
161 // Follow simple fallthrough
buzbee0d829482013-10-11 15:24:55 -0700162 bb = (bb_taken != NULL) ? NULL : bb_fall_through;
buzbeecbcfaf32013-08-19 07:37:40 -0700163 }
buzbee311ca162013-02-28 15:56:43 -0800164 if (bb == NULL || (Predecessors(bb) != 1)) {
165 return NULL;
166 }
167 DCHECK((bb->block_type == kDalvikByteCode) || (bb->block_type == kExitBlock));
168 return bb;
169}
170
Brian Carlstrom2ce745c2013-07-17 17:44:30 -0700171static MIR* FindPhi(BasicBlock* bb, int ssa_name) {
buzbee311ca162013-02-28 15:56:43 -0800172 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
173 if (static_cast<int>(mir->dalvikInsn.opcode) == kMirOpPhi) {
174 for (int i = 0; i < mir->ssa_rep->num_uses; i++) {
175 if (mir->ssa_rep->uses[i] == ssa_name) {
176 return mir;
177 }
178 }
179 }
180 }
181 return NULL;
182}
183
Brian Carlstrom2ce745c2013-07-17 17:44:30 -0700184static SelectInstructionKind SelectKind(MIR* mir) {
buzbee311ca162013-02-28 15:56:43 -0800185 switch (mir->dalvikInsn.opcode) {
186 case Instruction::MOVE:
187 case Instruction::MOVE_OBJECT:
188 case Instruction::MOVE_16:
189 case Instruction::MOVE_OBJECT_16:
190 case Instruction::MOVE_FROM16:
191 case Instruction::MOVE_OBJECT_FROM16:
192 return kSelectMove;
Brian Carlstrom6f485c62013-07-18 15:35:35 -0700193 case Instruction::CONST:
194 case Instruction::CONST_4:
195 case Instruction::CONST_16:
buzbee311ca162013-02-28 15:56:43 -0800196 return kSelectConst;
Brian Carlstrom6f485c62013-07-18 15:35:35 -0700197 case Instruction::GOTO:
198 case Instruction::GOTO_16:
199 case Instruction::GOTO_32:
buzbee311ca162013-02-28 15:56:43 -0800200 return kSelectGoto;
Brian Carlstrom02c8cc62013-07-18 15:54:44 -0700201 default:
202 return kSelectNone;
buzbee311ca162013-02-28 15:56:43 -0800203 }
buzbee311ca162013-02-28 15:56:43 -0800204}
205
Vladimir Markoa1a70742014-03-03 10:28:05 +0000206static constexpr ConditionCode kIfCcZConditionCodes[] = {
207 kCondEq, kCondNe, kCondLt, kCondGe, kCondGt, kCondLe
208};
209
210COMPILE_ASSERT(arraysize(kIfCcZConditionCodes) == Instruction::IF_LEZ - Instruction::IF_EQZ + 1,
211 if_ccz_ccodes_size1);
212
213static constexpr bool IsInstructionIfCcZ(Instruction::Code opcode) {
214 return Instruction::IF_EQZ <= opcode && opcode <= Instruction::IF_LEZ;
215}
216
217static constexpr ConditionCode ConditionCodeForIfCcZ(Instruction::Code opcode) {
218 return kIfCcZConditionCodes[opcode - Instruction::IF_EQZ];
219}
220
221COMPILE_ASSERT(ConditionCodeForIfCcZ(Instruction::IF_EQZ) == kCondEq, check_if_eqz_ccode);
222COMPILE_ASSERT(ConditionCodeForIfCcZ(Instruction::IF_NEZ) == kCondNe, check_if_nez_ccode);
223COMPILE_ASSERT(ConditionCodeForIfCcZ(Instruction::IF_LTZ) == kCondLt, check_if_ltz_ccode);
224COMPILE_ASSERT(ConditionCodeForIfCcZ(Instruction::IF_GEZ) == kCondGe, check_if_gez_ccode);
225COMPILE_ASSERT(ConditionCodeForIfCcZ(Instruction::IF_GTZ) == kCondGt, check_if_gtz_ccode);
226COMPILE_ASSERT(ConditionCodeForIfCcZ(Instruction::IF_LEZ) == kCondLe, check_if_lez_ccode);
227
Brian Carlstrom2ce745c2013-07-17 17:44:30 -0700228int MIRGraph::GetSSAUseCount(int s_reg) {
buzbee862a7602013-04-05 10:58:54 -0700229 return raw_use_counts_.Get(s_reg);
buzbee311ca162013-02-28 15:56:43 -0800230}
231
Razvan A Lupusoruda7a69b2014-01-08 15:09:50 -0800232size_t MIRGraph::GetNumAvailableNonSpecialCompilerTemps() {
233 if (num_non_special_compiler_temps_ >= max_available_non_special_compiler_temps_) {
234 return 0;
235 } else {
236 return max_available_non_special_compiler_temps_ - num_non_special_compiler_temps_;
237 }
238}
239
Bill Buzbee00e1ec62014-02-27 23:44:13 +0000240
241// FIXME - will probably need to revisit all uses of this, as type not defined.
Razvan A Lupusoruda7a69b2014-01-08 15:09:50 -0800242static const RegLocation temp_loc = {kLocCompilerTemp,
buzbee091cc402014-03-31 10:14:40 -0700243 0, 1 /*defined*/, 0, 0, 0, 0, 0, 1 /*home*/,
Bill Buzbee00e1ec62014-02-27 23:44:13 +0000244 RegStorage(), INVALID_SREG, INVALID_SREG};
Razvan A Lupusoruda7a69b2014-01-08 15:09:50 -0800245
246CompilerTemp* MIRGraph::GetNewCompilerTemp(CompilerTempType ct_type, bool wide) {
247 // There is a limit to the number of non-special temps so check to make sure it wasn't exceeded.
248 if (ct_type == kCompilerTempVR) {
249 size_t available_temps = GetNumAvailableNonSpecialCompilerTemps();
250 if (available_temps <= 0 || (available_temps <= 1 && wide)) {
251 return 0;
252 }
253 }
254
255 CompilerTemp *compiler_temp = static_cast<CompilerTemp *>(arena_->Alloc(sizeof(CompilerTemp),
Vladimir Marko83cc7ae2014-02-12 18:02:05 +0000256 kArenaAllocRegAlloc));
Razvan A Lupusoruda7a69b2014-01-08 15:09:50 -0800257
258 // Create the type of temp requested. Special temps need special handling because
259 // they have a specific virtual register assignment.
260 if (ct_type == kCompilerTempSpecialMethodPtr) {
261 DCHECK_EQ(wide, false);
262 compiler_temp->v_reg = static_cast<int>(kVRegMethodPtrBaseReg);
263 compiler_temp->s_reg_low = AddNewSReg(compiler_temp->v_reg);
264
265 // The MIR graph keeps track of the sreg for method pointer specially, so record that now.
266 method_sreg_ = compiler_temp->s_reg_low;
267 } else {
268 DCHECK_EQ(ct_type, kCompilerTempVR);
269
270 // The new non-special compiler temp must receive a unique v_reg with a negative value.
Chao-ying Fu54d36b62014-05-22 17:25:02 -0700271 compiler_temp->v_reg = static_cast<int>(kVRegNonSpecialTempBaseReg) -
272 num_non_special_compiler_temps_;
Razvan A Lupusoruda7a69b2014-01-08 15:09:50 -0800273 compiler_temp->s_reg_low = AddNewSReg(compiler_temp->v_reg);
274 num_non_special_compiler_temps_++;
275
276 if (wide) {
Chao-ying Fu54d36b62014-05-22 17:25:02 -0700277 // Create a new CompilerTemp for the high part.
278 CompilerTemp *compiler_temp_high =
279 static_cast<CompilerTemp *>(arena_->Alloc(sizeof(CompilerTemp), kArenaAllocRegAlloc));
280 compiler_temp_high->v_reg = compiler_temp->v_reg;
281 compiler_temp_high->s_reg_low = compiler_temp->s_reg_low;
282 compiler_temps_.Insert(compiler_temp_high);
283
284 // Ensure that the two registers are consecutive. Since the virtual registers used for temps
285 // grow in a negative fashion, we need the smaller to refer to the low part. Thus, we
286 // redefine the v_reg and s_reg_low.
Razvan A Lupusoruda7a69b2014-01-08 15:09:50 -0800287 compiler_temp->v_reg--;
288 int ssa_reg_high = compiler_temp->s_reg_low;
289 compiler_temp->s_reg_low = AddNewSReg(compiler_temp->v_reg);
290 int ssa_reg_low = compiler_temp->s_reg_low;
291
292 // If needed initialize the register location for the high part.
293 // The low part is handled later in this method on a common path.
294 if (reg_location_ != nullptr) {
295 reg_location_[ssa_reg_high] = temp_loc;
296 reg_location_[ssa_reg_high].high_word = 1;
297 reg_location_[ssa_reg_high].s_reg_low = ssa_reg_low;
298 reg_location_[ssa_reg_high].wide = true;
Razvan A Lupusoruda7a69b2014-01-08 15:09:50 -0800299 }
300
301 num_non_special_compiler_temps_++;
302 }
303 }
304
305 // Have we already allocated the register locations?
306 if (reg_location_ != nullptr) {
307 int ssa_reg_low = compiler_temp->s_reg_low;
308 reg_location_[ssa_reg_low] = temp_loc;
309 reg_location_[ssa_reg_low].s_reg_low = ssa_reg_low;
310 reg_location_[ssa_reg_low].wide = wide;
Razvan A Lupusoruda7a69b2014-01-08 15:09:50 -0800311 }
312
313 compiler_temps_.Insert(compiler_temp);
314 return compiler_temp;
315}
buzbee311ca162013-02-28 15:56:43 -0800316
317/* Do some MIR-level extended basic block optimizations */
Brian Carlstrom2ce745c2013-07-17 17:44:30 -0700318bool MIRGraph::BasicBlockOpt(BasicBlock* bb) {
buzbee311ca162013-02-28 15:56:43 -0800319 if (bb->block_type == kDead) {
320 return true;
321 }
buzbee1da1e2f2013-11-15 13:37:01 -0800322 bool use_lvn = bb->use_lvn;
Vladimir Marko2ac01fc2014-05-22 12:09:08 +0100323 std::unique_ptr<ScopedArenaAllocator> allocator;
Ian Rogers700a4022014-05-19 16:49:03 -0700324 std::unique_ptr<LocalValueNumbering> local_valnum;
buzbee1da1e2f2013-11-15 13:37:01 -0800325 if (use_lvn) {
Vladimir Marko2ac01fc2014-05-22 12:09:08 +0100326 allocator.reset(ScopedArenaAllocator::Create(&cu_->arena_stack));
327 local_valnum.reset(new (allocator.get()) LocalValueNumbering(cu_, allocator.get()));
buzbee1da1e2f2013-11-15 13:37:01 -0800328 }
buzbee311ca162013-02-28 15:56:43 -0800329 while (bb != NULL) {
330 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
331 // TUNING: use the returned value number for CSE.
buzbee1da1e2f2013-11-15 13:37:01 -0800332 if (use_lvn) {
333 local_valnum->GetValueNumber(mir);
334 }
buzbee311ca162013-02-28 15:56:43 -0800335 // Look for interesting opcodes, skip otherwise
336 Instruction::Code opcode = mir->dalvikInsn.opcode;
337 switch (opcode) {
338 case Instruction::CMPL_FLOAT:
339 case Instruction::CMPL_DOUBLE:
340 case Instruction::CMPG_FLOAT:
341 case Instruction::CMPG_DOUBLE:
342 case Instruction::CMP_LONG:
buzbee1fd33462013-03-25 13:40:45 -0700343 if ((cu_->disable_opt & (1 << kBranchFusing)) != 0) {
buzbee311ca162013-02-28 15:56:43 -0800344 // Bitcode doesn't allow this optimization.
345 break;
346 }
347 if (mir->next != NULL) {
348 MIR* mir_next = mir->next;
buzbee311ca162013-02-28 15:56:43 -0800349 // Make sure result of cmp is used by next insn and nowhere else
Vladimir Markoa1a70742014-03-03 10:28:05 +0000350 if (IsInstructionIfCcZ(mir->next->dalvikInsn.opcode) &&
buzbee311ca162013-02-28 15:56:43 -0800351 (mir->ssa_rep->defs[0] == mir_next->ssa_rep->uses[0]) &&
352 (GetSSAUseCount(mir->ssa_rep->defs[0]) == 1)) {
Vladimir Markoa1a70742014-03-03 10:28:05 +0000353 mir_next->meta.ccode = ConditionCodeForIfCcZ(mir_next->dalvikInsn.opcode);
Brian Carlstromdf629502013-07-17 22:39:56 -0700354 switch (opcode) {
buzbee311ca162013-02-28 15:56:43 -0800355 case Instruction::CMPL_FLOAT:
356 mir_next->dalvikInsn.opcode =
357 static_cast<Instruction::Code>(kMirOpFusedCmplFloat);
358 break;
359 case Instruction::CMPL_DOUBLE:
360 mir_next->dalvikInsn.opcode =
361 static_cast<Instruction::Code>(kMirOpFusedCmplDouble);
362 break;
363 case Instruction::CMPG_FLOAT:
364 mir_next->dalvikInsn.opcode =
365 static_cast<Instruction::Code>(kMirOpFusedCmpgFloat);
366 break;
367 case Instruction::CMPG_DOUBLE:
368 mir_next->dalvikInsn.opcode =
369 static_cast<Instruction::Code>(kMirOpFusedCmpgDouble);
370 break;
371 case Instruction::CMP_LONG:
372 mir_next->dalvikInsn.opcode =
373 static_cast<Instruction::Code>(kMirOpFusedCmpLong);
374 break;
375 default: LOG(ERROR) << "Unexpected opcode: " << opcode;
376 }
377 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
378 mir_next->ssa_rep->num_uses = mir->ssa_rep->num_uses;
379 mir_next->ssa_rep->uses = mir->ssa_rep->uses;
380 mir_next->ssa_rep->fp_use = mir->ssa_rep->fp_use;
381 mir_next->ssa_rep->num_defs = 0;
382 mir->ssa_rep->num_uses = 0;
383 mir->ssa_rep->num_defs = 0;
384 }
385 }
386 break;
387 case Instruction::GOTO:
388 case Instruction::GOTO_16:
389 case Instruction::GOTO_32:
390 case Instruction::IF_EQ:
391 case Instruction::IF_NE:
392 case Instruction::IF_LT:
393 case Instruction::IF_GE:
394 case Instruction::IF_GT:
395 case Instruction::IF_LE:
396 case Instruction::IF_EQZ:
397 case Instruction::IF_NEZ:
398 case Instruction::IF_LTZ:
399 case Instruction::IF_GEZ:
400 case Instruction::IF_GTZ:
401 case Instruction::IF_LEZ:
buzbeecbcfaf32013-08-19 07:37:40 -0700402 // If we've got a backwards branch to return, no need to suspend check.
buzbee0d829482013-10-11 15:24:55 -0700403 if ((IsBackedge(bb, bb->taken) && GetBasicBlock(bb->taken)->dominates_return) ||
404 (IsBackedge(bb, bb->fall_through) &&
405 GetBasicBlock(bb->fall_through)->dominates_return)) {
buzbee311ca162013-02-28 15:56:43 -0800406 mir->optimization_flags |= MIR_IGNORE_SUSPEND_CHECK;
407 if (cu_->verbose) {
buzbee0d829482013-10-11 15:24:55 -0700408 LOG(INFO) << "Suppressed suspend check on branch to return at 0x" << std::hex
409 << mir->offset;
buzbee311ca162013-02-28 15:56:43 -0800410 }
411 }
412 break;
413 default:
414 break;
415 }
416 // Is this the select pattern?
Razvan A Lupusorue27b3bf2014-01-23 09:41:45 -0800417 // TODO: flesh out support for Mips. NOTE: llvm's select op doesn't quite work here.
buzbee311ca162013-02-28 15:56:43 -0800418 // TUNING: expand to support IF_xx compare & branches
Nicolas Geoffrayb34f69a2014-03-07 15:28:39 +0000419 if (!cu_->compiler->IsPortable() &&
Serban Constantinescu05e27ff2014-05-28 13:21:45 +0100420 (cu_->instruction_set == kArm64 || cu_->instruction_set == kThumb2 ||
421 cu_->instruction_set == kX86 || cu_->instruction_set == kX86_64) &&
Vladimir Markoa1a70742014-03-03 10:28:05 +0000422 IsInstructionIfCcZ(mir->dalvikInsn.opcode)) {
buzbee0d829482013-10-11 15:24:55 -0700423 BasicBlock* ft = GetBasicBlock(bb->fall_through);
buzbee311ca162013-02-28 15:56:43 -0800424 DCHECK(ft != NULL);
buzbee0d829482013-10-11 15:24:55 -0700425 BasicBlock* ft_ft = GetBasicBlock(ft->fall_through);
426 BasicBlock* ft_tk = GetBasicBlock(ft->taken);
buzbee311ca162013-02-28 15:56:43 -0800427
buzbee0d829482013-10-11 15:24:55 -0700428 BasicBlock* tk = GetBasicBlock(bb->taken);
buzbee311ca162013-02-28 15:56:43 -0800429 DCHECK(tk != NULL);
buzbee0d829482013-10-11 15:24:55 -0700430 BasicBlock* tk_ft = GetBasicBlock(tk->fall_through);
431 BasicBlock* tk_tk = GetBasicBlock(tk->taken);
buzbee311ca162013-02-28 15:56:43 -0800432
433 /*
434 * In the select pattern, the taken edge goes to a block that unconditionally
435 * transfers to the rejoin block and the fall_though edge goes to a block that
436 * unconditionally falls through to the rejoin block.
437 */
438 if ((tk_ft == NULL) && (ft_tk == NULL) && (tk_tk == ft_ft) &&
439 (Predecessors(tk) == 1) && (Predecessors(ft) == 1)) {
440 /*
441 * Okay - we have the basic diamond shape. At the very least, we can eliminate the
442 * suspend check on the taken-taken branch back to the join point.
443 */
444 if (SelectKind(tk->last_mir_insn) == kSelectGoto) {
445 tk->last_mir_insn->optimization_flags |= (MIR_IGNORE_SUSPEND_CHECK);
446 }
Serban Constantinescu05e27ff2014-05-28 13:21:45 +0100447
448 // TODO: Add logic for LONG.
buzbee311ca162013-02-28 15:56:43 -0800449 // Are the block bodies something we can handle?
450 if ((ft->first_mir_insn == ft->last_mir_insn) &&
451 (tk->first_mir_insn != tk->last_mir_insn) &&
452 (tk->first_mir_insn->next == tk->last_mir_insn) &&
453 ((SelectKind(ft->first_mir_insn) == kSelectMove) ||
454 (SelectKind(ft->first_mir_insn) == kSelectConst)) &&
455 (SelectKind(ft->first_mir_insn) == SelectKind(tk->first_mir_insn)) &&
456 (SelectKind(tk->last_mir_insn) == kSelectGoto)) {
457 // Almost there. Are the instructions targeting the same vreg?
458 MIR* if_true = tk->first_mir_insn;
459 MIR* if_false = ft->first_mir_insn;
460 // It's possible that the target of the select isn't used - skip those (rare) cases.
461 MIR* phi = FindPhi(tk_tk, if_true->ssa_rep->defs[0]);
462 if ((phi != NULL) && (if_true->dalvikInsn.vA == if_false->dalvikInsn.vA)) {
463 /*
464 * We'll convert the IF_EQZ/IF_NEZ to a SELECT. We need to find the
465 * Phi node in the merge block and delete it (while using the SSA name
466 * of the merge as the target of the SELECT. Delete both taken and
467 * fallthrough blocks, and set fallthrough to merge block.
468 * NOTE: not updating other dataflow info (no longer used at this point).
469 * If this changes, need to update i_dom, etc. here (and in CombineBlocks).
470 */
Vladimir Markoa1a70742014-03-03 10:28:05 +0000471 mir->meta.ccode = ConditionCodeForIfCcZ(mir->dalvikInsn.opcode);
buzbee311ca162013-02-28 15:56:43 -0800472 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpSelect);
473 bool const_form = (SelectKind(if_true) == kSelectConst);
474 if ((SelectKind(if_true) == kSelectMove)) {
475 if (IsConst(if_true->ssa_rep->uses[0]) &&
476 IsConst(if_false->ssa_rep->uses[0])) {
477 const_form = true;
478 if_true->dalvikInsn.vB = ConstantValue(if_true->ssa_rep->uses[0]);
479 if_false->dalvikInsn.vB = ConstantValue(if_false->ssa_rep->uses[0]);
480 }
481 }
482 if (const_form) {
Razvan A Lupusorue27b3bf2014-01-23 09:41:45 -0800483 /*
484 * TODO: If both constants are the same value, then instead of generating
485 * a select, we should simply generate a const bytecode. This should be
486 * considered after inlining which can lead to CFG of this form.
487 */
buzbee311ca162013-02-28 15:56:43 -0800488 // "true" set val in vB
489 mir->dalvikInsn.vB = if_true->dalvikInsn.vB;
490 // "false" set val in vC
491 mir->dalvikInsn.vC = if_false->dalvikInsn.vB;
492 } else {
493 DCHECK_EQ(SelectKind(if_true), kSelectMove);
494 DCHECK_EQ(SelectKind(if_false), kSelectMove);
buzbee862a7602013-04-05 10:58:54 -0700495 int* src_ssa =
Vladimir Marko83cc7ae2014-02-12 18:02:05 +0000496 static_cast<int*>(arena_->Alloc(sizeof(int) * 3, kArenaAllocDFInfo));
buzbee311ca162013-02-28 15:56:43 -0800497 src_ssa[0] = mir->ssa_rep->uses[0];
498 src_ssa[1] = if_true->ssa_rep->uses[0];
499 src_ssa[2] = if_false->ssa_rep->uses[0];
500 mir->ssa_rep->uses = src_ssa;
501 mir->ssa_rep->num_uses = 3;
502 }
503 mir->ssa_rep->num_defs = 1;
buzbee862a7602013-04-05 10:58:54 -0700504 mir->ssa_rep->defs =
Vladimir Marko83cc7ae2014-02-12 18:02:05 +0000505 static_cast<int*>(arena_->Alloc(sizeof(int) * 1, kArenaAllocDFInfo));
buzbee862a7602013-04-05 10:58:54 -0700506 mir->ssa_rep->fp_def =
Vladimir Marko83cc7ae2014-02-12 18:02:05 +0000507 static_cast<bool*>(arena_->Alloc(sizeof(bool) * 1, kArenaAllocDFInfo));
buzbee311ca162013-02-28 15:56:43 -0800508 mir->ssa_rep->fp_def[0] = if_true->ssa_rep->fp_def[0];
buzbee817e45a2013-05-30 18:59:12 -0700509 // Match type of uses to def.
510 mir->ssa_rep->fp_use =
Mathieu Chartierf6c4b3b2013-08-24 16:11:37 -0700511 static_cast<bool*>(arena_->Alloc(sizeof(bool) * mir->ssa_rep->num_uses,
Vladimir Marko83cc7ae2014-02-12 18:02:05 +0000512 kArenaAllocDFInfo));
buzbee817e45a2013-05-30 18:59:12 -0700513 for (int i = 0; i < mir->ssa_rep->num_uses; i++) {
514 mir->ssa_rep->fp_use[i] = mir->ssa_rep->fp_def[0];
515 }
buzbee311ca162013-02-28 15:56:43 -0800516 /*
517 * There is usually a Phi node in the join block for our two cases. If the
518 * Phi node only contains our two cases as input, we will use the result
519 * SSA name of the Phi node as our select result and delete the Phi. If
520 * the Phi node has more than two operands, we will arbitrarily use the SSA
521 * name of the "true" path, delete the SSA name of the "false" path from the
522 * Phi node (and fix up the incoming arc list).
523 */
524 if (phi->ssa_rep->num_uses == 2) {
525 mir->ssa_rep->defs[0] = phi->ssa_rep->defs[0];
526 phi->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
527 } else {
528 int dead_def = if_false->ssa_rep->defs[0];
529 int live_def = if_true->ssa_rep->defs[0];
530 mir->ssa_rep->defs[0] = live_def;
buzbee0d829482013-10-11 15:24:55 -0700531 BasicBlockId* incoming = phi->meta.phi_incoming;
buzbee311ca162013-02-28 15:56:43 -0800532 for (int i = 0; i < phi->ssa_rep->num_uses; i++) {
533 if (phi->ssa_rep->uses[i] == live_def) {
534 incoming[i] = bb->id;
535 }
536 }
537 for (int i = 0; i < phi->ssa_rep->num_uses; i++) {
538 if (phi->ssa_rep->uses[i] == dead_def) {
539 int last_slot = phi->ssa_rep->num_uses - 1;
540 phi->ssa_rep->uses[i] = phi->ssa_rep->uses[last_slot];
541 incoming[i] = incoming[last_slot];
542 }
543 }
544 }
545 phi->ssa_rep->num_uses--;
buzbee0d829482013-10-11 15:24:55 -0700546 bb->taken = NullBasicBlockId;
buzbee311ca162013-02-28 15:56:43 -0800547 tk->block_type = kDead;
548 for (MIR* tmir = ft->first_mir_insn; tmir != NULL; tmir = tmir->next) {
549 tmir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
550 }
551 }
552 }
553 }
554 }
555 }
buzbee1da1e2f2013-11-15 13:37:01 -0800556 bb = ((cu_->disable_opt & (1 << kSuppressExceptionEdges)) != 0) ? NextDominatedBlock(bb) : NULL;
buzbee311ca162013-02-28 15:56:43 -0800557 }
Vladimir Marko2ac01fc2014-05-22 12:09:08 +0100558 if (use_lvn && UNLIKELY(!local_valnum->Good())) {
559 LOG(WARNING) << "LVN overflow in " << PrettyMethod(cu_->method_idx, *cu_->dex_file);
560 }
buzbee311ca162013-02-28 15:56:43 -0800561
buzbee311ca162013-02-28 15:56:43 -0800562 return true;
563}
564
buzbee311ca162013-02-28 15:56:43 -0800565/* Collect stats on number of checks removed */
Brian Carlstrom2ce745c2013-07-17 17:44:30 -0700566void MIRGraph::CountChecks(struct BasicBlock* bb) {
buzbee862a7602013-04-05 10:58:54 -0700567 if (bb->data_flow_info != NULL) {
568 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
569 if (mir->ssa_rep == NULL) {
570 continue;
buzbee311ca162013-02-28 15:56:43 -0800571 }
Jean Christophe Beylercc794c32014-05-02 09:34:13 -0700572 uint64_t df_attributes = GetDataFlowAttributes(mir);
buzbee862a7602013-04-05 10:58:54 -0700573 if (df_attributes & DF_HAS_NULL_CHKS) {
574 checkstats_->null_checks++;
575 if (mir->optimization_flags & MIR_IGNORE_NULL_CHECK) {
576 checkstats_->null_checks_eliminated++;
577 }
578 }
579 if (df_attributes & DF_HAS_RANGE_CHKS) {
580 checkstats_->range_checks++;
581 if (mir->optimization_flags & MIR_IGNORE_RANGE_CHECK) {
582 checkstats_->range_checks_eliminated++;
583 }
buzbee311ca162013-02-28 15:56:43 -0800584 }
585 }
586 }
buzbee311ca162013-02-28 15:56:43 -0800587}
588
589/* Try to make common case the fallthrough path */
buzbee0d829482013-10-11 15:24:55 -0700590bool MIRGraph::LayoutBlocks(BasicBlock* bb) {
buzbee311ca162013-02-28 15:56:43 -0800591 // TODO: For now, just looking for direct throws. Consider generalizing for profile feedback
592 if (!bb->explicit_throw) {
593 return false;
594 }
595 BasicBlock* walker = bb;
596 while (true) {
597 // Check termination conditions
598 if ((walker->block_type == kEntryBlock) || (Predecessors(walker) != 1)) {
599 break;
600 }
buzbee0d829482013-10-11 15:24:55 -0700601 BasicBlock* prev = GetBasicBlock(walker->predecessors->Get(0));
buzbee311ca162013-02-28 15:56:43 -0800602 if (prev->conditional_branch) {
buzbee0d829482013-10-11 15:24:55 -0700603 if (GetBasicBlock(prev->fall_through) == walker) {
buzbee311ca162013-02-28 15:56:43 -0800604 // Already done - return
605 break;
606 }
buzbee0d829482013-10-11 15:24:55 -0700607 DCHECK_EQ(walker, GetBasicBlock(prev->taken));
buzbee311ca162013-02-28 15:56:43 -0800608 // Got one. Flip it and exit
609 Instruction::Code opcode = prev->last_mir_insn->dalvikInsn.opcode;
610 switch (opcode) {
611 case Instruction::IF_EQ: opcode = Instruction::IF_NE; break;
612 case Instruction::IF_NE: opcode = Instruction::IF_EQ; break;
613 case Instruction::IF_LT: opcode = Instruction::IF_GE; break;
614 case Instruction::IF_GE: opcode = Instruction::IF_LT; break;
615 case Instruction::IF_GT: opcode = Instruction::IF_LE; break;
616 case Instruction::IF_LE: opcode = Instruction::IF_GT; break;
617 case Instruction::IF_EQZ: opcode = Instruction::IF_NEZ; break;
618 case Instruction::IF_NEZ: opcode = Instruction::IF_EQZ; break;
619 case Instruction::IF_LTZ: opcode = Instruction::IF_GEZ; break;
620 case Instruction::IF_GEZ: opcode = Instruction::IF_LTZ; break;
621 case Instruction::IF_GTZ: opcode = Instruction::IF_LEZ; break;
622 case Instruction::IF_LEZ: opcode = Instruction::IF_GTZ; break;
623 default: LOG(FATAL) << "Unexpected opcode " << opcode;
624 }
625 prev->last_mir_insn->dalvikInsn.opcode = opcode;
buzbee0d829482013-10-11 15:24:55 -0700626 BasicBlockId t_bb = prev->taken;
buzbee311ca162013-02-28 15:56:43 -0800627 prev->taken = prev->fall_through;
628 prev->fall_through = t_bb;
629 break;
630 }
631 walker = prev;
632 }
633 return false;
634}
635
636/* Combine any basic blocks terminated by instructions that we now know can't throw */
Jean Christophe Beyler4e97c532014-01-07 10:07:18 -0800637void MIRGraph::CombineBlocks(struct BasicBlock* bb) {
buzbee311ca162013-02-28 15:56:43 -0800638 // Loop here to allow combining a sequence of blocks
639 while (true) {
640 // Check termination conditions
641 if ((bb->first_mir_insn == NULL)
642 || (bb->data_flow_info == NULL)
643 || (bb->block_type == kExceptionHandling)
644 || (bb->block_type == kExitBlock)
645 || (bb->block_type == kDead)
buzbee0d829482013-10-11 15:24:55 -0700646 || (bb->taken == NullBasicBlockId)
647 || (GetBasicBlock(bb->taken)->block_type != kExceptionHandling)
648 || (bb->successor_block_list_type != kNotUsed)
buzbee311ca162013-02-28 15:56:43 -0800649 || (static_cast<int>(bb->last_mir_insn->dalvikInsn.opcode) != kMirOpCheck)) {
650 break;
651 }
652
653 // Test the kMirOpCheck instruction
654 MIR* mir = bb->last_mir_insn;
655 // Grab the attributes from the paired opcode
656 MIR* throw_insn = mir->meta.throw_insn;
Jean Christophe Beylercc794c32014-05-02 09:34:13 -0700657 uint64_t df_attributes = GetDataFlowAttributes(throw_insn);
buzbee311ca162013-02-28 15:56:43 -0800658 bool can_combine = true;
659 if (df_attributes & DF_HAS_NULL_CHKS) {
660 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_NULL_CHECK) != 0);
661 }
662 if (df_attributes & DF_HAS_RANGE_CHKS) {
663 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_RANGE_CHECK) != 0);
664 }
665 if (!can_combine) {
666 break;
667 }
668 // OK - got one. Combine
buzbee0d829482013-10-11 15:24:55 -0700669 BasicBlock* bb_next = GetBasicBlock(bb->fall_through);
buzbee311ca162013-02-28 15:56:43 -0800670 DCHECK(!bb_next->catch_entry);
671 DCHECK_EQ(Predecessors(bb_next), 1U);
buzbee311ca162013-02-28 15:56:43 -0800672 // Overwrite the kOpCheck insn with the paired opcode
673 DCHECK_EQ(bb_next->first_mir_insn, throw_insn);
674 *bb->last_mir_insn = *throw_insn;
buzbee311ca162013-02-28 15:56:43 -0800675 // Use the successor info from the next block
buzbee0d829482013-10-11 15:24:55 -0700676 bb->successor_block_list_type = bb_next->successor_block_list_type;
677 bb->successor_blocks = bb_next->successor_blocks;
buzbee311ca162013-02-28 15:56:43 -0800678 // Use the ending block linkage from the next block
679 bb->fall_through = bb_next->fall_through;
buzbee0d829482013-10-11 15:24:55 -0700680 GetBasicBlock(bb->taken)->block_type = kDead; // Kill the unused exception block
buzbee311ca162013-02-28 15:56:43 -0800681 bb->taken = bb_next->taken;
682 // Include the rest of the instructions
683 bb->last_mir_insn = bb_next->last_mir_insn;
684 /*
685 * If lower-half of pair of blocks to combine contained a return, move the flag
686 * to the newly combined block.
687 */
688 bb->terminated_by_return = bb_next->terminated_by_return;
689
690 /*
691 * NOTE: we aren't updating all dataflow info here. Should either make sure this pass
692 * happens after uses of i_dominated, dom_frontier or update the dataflow info here.
693 */
694
695 // Kill bb_next and remap now-dead id to parent
696 bb_next->block_type = kDead;
buzbee1fd33462013-03-25 13:40:45 -0700697 block_id_map_.Overwrite(bb_next->id, bb->id);
buzbee311ca162013-02-28 15:56:43 -0800698
699 // Now, loop back and see if we can keep going
700 }
buzbee311ca162013-02-28 15:56:43 -0800701}
702
Vladimir Markobfea9c22014-01-17 17:49:33 +0000703void MIRGraph::EliminateNullChecksAndInferTypesStart() {
704 if ((cu_->disable_opt & (1 << kNullCheckElimination)) == 0) {
705 if (kIsDebugBuild) {
706 AllNodesIterator iter(this);
707 for (BasicBlock* bb = iter.Next(); bb != nullptr; bb = iter.Next()) {
708 CHECK(bb->data_flow_info == nullptr || bb->data_flow_info->ending_check_v == nullptr);
709 }
710 }
711
712 DCHECK(temp_scoped_alloc_.get() == nullptr);
713 temp_scoped_alloc_.reset(ScopedArenaAllocator::Create(&cu_->arena_stack));
714 temp_bit_vector_size_ = GetNumSSARegs();
715 temp_bit_vector_ = new (temp_scoped_alloc_.get()) ArenaBitVector(
716 temp_scoped_alloc_.get(), temp_bit_vector_size_, false, kBitMapTempSSARegisterV);
717 }
718}
719
buzbee1da1e2f2013-11-15 13:37:01 -0800720/*
721 * Eliminate unnecessary null checks for a basic block. Also, while we're doing
722 * an iterative walk go ahead and perform type and size inference.
723 */
Jean Christophe Beyler4e97c532014-01-07 10:07:18 -0800724bool MIRGraph::EliminateNullChecksAndInferTypes(BasicBlock* bb) {
buzbee311ca162013-02-28 15:56:43 -0800725 if (bb->data_flow_info == NULL) return false;
buzbee1da1e2f2013-11-15 13:37:01 -0800726 bool infer_changed = false;
727 bool do_nce = ((cu_->disable_opt & (1 << kNullCheckElimination)) == 0);
buzbee311ca162013-02-28 15:56:43 -0800728
Vladimir Markobfea9c22014-01-17 17:49:33 +0000729 ArenaBitVector* ssa_regs_to_check = temp_bit_vector_;
buzbee1da1e2f2013-11-15 13:37:01 -0800730 if (do_nce) {
731 /*
732 * Set initial state. Be conservative with catch
733 * blocks and start with no assumptions about null check
734 * status (except for "this").
735 */
736 if ((bb->block_type == kEntryBlock) | bb->catch_entry) {
Vladimir Markobfea9c22014-01-17 17:49:33 +0000737 ssa_regs_to_check->ClearAllBits();
buzbee1da1e2f2013-11-15 13:37:01 -0800738 // Assume all ins are objects.
739 for (uint16_t in_reg = cu_->num_dalvik_registers - cu_->num_ins;
740 in_reg < cu_->num_dalvik_registers; in_reg++) {
Vladimir Markobfea9c22014-01-17 17:49:33 +0000741 ssa_regs_to_check->SetBit(in_reg);
buzbee1da1e2f2013-11-15 13:37:01 -0800742 }
743 if ((cu_->access_flags & kAccStatic) == 0) {
744 // If non-static method, mark "this" as non-null
745 int this_reg = cu_->num_dalvik_registers - cu_->num_ins;
Vladimir Markobfea9c22014-01-17 17:49:33 +0000746 ssa_regs_to_check->ClearBit(this_reg);
buzbee1da1e2f2013-11-15 13:37:01 -0800747 }
748 } else if (bb->predecessors->Size() == 1) {
749 BasicBlock* pred_bb = GetBasicBlock(bb->predecessors->Get(0));
Vladimir Markobfea9c22014-01-17 17:49:33 +0000750 // pred_bb must have already been processed at least once.
751 DCHECK(pred_bb->data_flow_info->ending_check_v != nullptr);
752 ssa_regs_to_check->Copy(pred_bb->data_flow_info->ending_check_v);
buzbee1da1e2f2013-11-15 13:37:01 -0800753 if (pred_bb->block_type == kDalvikByteCode) {
754 // Check to see if predecessor had an explicit null-check.
755 MIR* last_insn = pred_bb->last_mir_insn;
Jean Christophe Beylerb5c9b402014-04-30 14:52:00 -0700756 if (last_insn != nullptr) {
757 Instruction::Code last_opcode = last_insn->dalvikInsn.opcode;
758 if (last_opcode == Instruction::IF_EQZ) {
759 if (pred_bb->fall_through == bb->id) {
760 // The fall-through of a block following a IF_EQZ, set the vA of the IF_EQZ to show that
761 // it can't be null.
762 ssa_regs_to_check->ClearBit(last_insn->ssa_rep->uses[0]);
763 }
764 } else if (last_opcode == Instruction::IF_NEZ) {
765 if (pred_bb->taken == bb->id) {
766 // The taken block following a IF_NEZ, set the vA of the IF_NEZ to show that it can't be
767 // null.
768 ssa_regs_to_check->ClearBit(last_insn->ssa_rep->uses[0]);
769 }
buzbee1da1e2f2013-11-15 13:37:01 -0800770 }
Ian Rogers22fd6a02013-06-13 15:06:54 -0700771 }
772 }
buzbee1da1e2f2013-11-15 13:37:01 -0800773 } else {
774 // Starting state is union of all incoming arcs
775 GrowableArray<BasicBlockId>::Iterator iter(bb->predecessors);
776 BasicBlock* pred_bb = GetBasicBlock(iter.Next());
Vladimir Markobfea9c22014-01-17 17:49:33 +0000777 CHECK(pred_bb != NULL);
778 while (pred_bb->data_flow_info->ending_check_v == nullptr) {
779 pred_bb = GetBasicBlock(iter.Next());
780 // At least one predecessor must have been processed before this bb.
781 DCHECK(pred_bb != nullptr);
782 DCHECK(pred_bb->data_flow_info != nullptr);
783 }
784 ssa_regs_to_check->Copy(pred_bb->data_flow_info->ending_check_v);
buzbee1da1e2f2013-11-15 13:37:01 -0800785 while (true) {
786 pred_bb = GetBasicBlock(iter.Next());
787 if (!pred_bb) break;
Vladimir Markobfea9c22014-01-17 17:49:33 +0000788 DCHECK(pred_bb->data_flow_info != nullptr);
789 if (pred_bb->data_flow_info->ending_check_v == nullptr) {
buzbee1da1e2f2013-11-15 13:37:01 -0800790 continue;
791 }
Vladimir Markobfea9c22014-01-17 17:49:33 +0000792 ssa_regs_to_check->Union(pred_bb->data_flow_info->ending_check_v);
buzbee311ca162013-02-28 15:56:43 -0800793 }
buzbee311ca162013-02-28 15:56:43 -0800794 }
Vladimir Markobfea9c22014-01-17 17:49:33 +0000795 // At this point, ssa_regs_to_check shows which sregs have an object definition with
buzbee1da1e2f2013-11-15 13:37:01 -0800796 // no intervening uses.
buzbee311ca162013-02-28 15:56:43 -0800797 }
798
799 // Walk through the instruction in the block, updating as necessary
800 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
801 if (mir->ssa_rep == NULL) {
802 continue;
803 }
buzbee1da1e2f2013-11-15 13:37:01 -0800804
805 // Propagate type info.
806 infer_changed = InferTypeAndSize(bb, mir, infer_changed);
807 if (!do_nce) {
808 continue;
809 }
810
Jean Christophe Beylercc794c32014-05-02 09:34:13 -0700811 uint64_t df_attributes = GetDataFlowAttributes(mir);
buzbee311ca162013-02-28 15:56:43 -0800812
Bill Buzbee0b1191c2013-10-28 22:11:59 +0000813 // Might need a null check?
814 if (df_attributes & DF_HAS_NULL_CHKS) {
815 int src_idx;
816 if (df_attributes & DF_NULL_CHK_1) {
817 src_idx = 1;
818 } else if (df_attributes & DF_NULL_CHK_2) {
819 src_idx = 2;
820 } else {
821 src_idx = 0;
822 }
823 int src_sreg = mir->ssa_rep->uses[src_idx];
Vladimir Markobfea9c22014-01-17 17:49:33 +0000824 if (!ssa_regs_to_check->IsBitSet(src_sreg)) {
Bill Buzbee0b1191c2013-10-28 22:11:59 +0000825 // Eliminate the null check.
826 mir->optimization_flags |= MIR_IGNORE_NULL_CHECK;
827 } else {
828 // Do the null check.
829 mir->optimization_flags &= ~MIR_IGNORE_NULL_CHECK;
830 // Mark s_reg as null-checked
Vladimir Markobfea9c22014-01-17 17:49:33 +0000831 ssa_regs_to_check->ClearBit(src_sreg);
Bill Buzbee0b1191c2013-10-28 22:11:59 +0000832 }
833 }
834
835 if ((df_attributes & DF_A_WIDE) ||
836 (df_attributes & (DF_REF_A | DF_SETS_CONST | DF_NULL_TRANSFER)) == 0) {
837 continue;
838 }
839
840 /*
841 * First, mark all object definitions as requiring null check.
842 * Note: we can't tell if a CONST definition might be used as an object, so treat
843 * them all as object definitions.
844 */
845 if (((df_attributes & (DF_DA | DF_REF_A)) == (DF_DA | DF_REF_A)) ||
846 (df_attributes & DF_SETS_CONST)) {
Vladimir Markobfea9c22014-01-17 17:49:33 +0000847 ssa_regs_to_check->SetBit(mir->ssa_rep->defs[0]);
buzbee4db179d2013-10-23 12:16:39 -0700848 }
849
Bill Buzbee0b1191c2013-10-28 22:11:59 +0000850 // Now, remove mark from all object definitions we know are non-null.
851 if (df_attributes & DF_NON_NULL_DST) {
852 // Mark target of NEW* as non-null
Vladimir Markobfea9c22014-01-17 17:49:33 +0000853 ssa_regs_to_check->ClearBit(mir->ssa_rep->defs[0]);
Bill Buzbee0b1191c2013-10-28 22:11:59 +0000854 }
855
buzbee311ca162013-02-28 15:56:43 -0800856 // Mark non-null returns from invoke-style NEW*
857 if (df_attributes & DF_NON_NULL_RET) {
858 MIR* next_mir = mir->next;
859 // Next should be an MOVE_RESULT_OBJECT
860 if (next_mir &&
861 next_mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
862 // Mark as null checked
Vladimir Markobfea9c22014-01-17 17:49:33 +0000863 ssa_regs_to_check->ClearBit(next_mir->ssa_rep->defs[0]);
buzbee311ca162013-02-28 15:56:43 -0800864 } else {
865 if (next_mir) {
866 LOG(WARNING) << "Unexpected opcode following new: " << next_mir->dalvikInsn.opcode;
buzbee0d829482013-10-11 15:24:55 -0700867 } else if (bb->fall_through != NullBasicBlockId) {
buzbee311ca162013-02-28 15:56:43 -0800868 // Look in next basic block
buzbee0d829482013-10-11 15:24:55 -0700869 struct BasicBlock* next_bb = GetBasicBlock(bb->fall_through);
buzbee311ca162013-02-28 15:56:43 -0800870 for (MIR* tmir = next_bb->first_mir_insn; tmir != NULL;
871 tmir =tmir->next) {
872 if (static_cast<int>(tmir->dalvikInsn.opcode) >= static_cast<int>(kMirOpFirst)) {
873 continue;
874 }
875 // First non-pseudo should be MOVE_RESULT_OBJECT
876 if (tmir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
877 // Mark as null checked
Vladimir Markobfea9c22014-01-17 17:49:33 +0000878 ssa_regs_to_check->ClearBit(tmir->ssa_rep->defs[0]);
buzbee311ca162013-02-28 15:56:43 -0800879 } else {
880 LOG(WARNING) << "Unexpected op after new: " << tmir->dalvikInsn.opcode;
881 }
882 break;
883 }
884 }
885 }
886 }
887
888 /*
889 * Propagate nullcheck state on register copies (including
890 * Phi pseudo copies. For the latter, nullcheck state is
Bill Buzbee0b1191c2013-10-28 22:11:59 +0000891 * the "or" of all the Phi's operands.
buzbee311ca162013-02-28 15:56:43 -0800892 */
893 if (df_attributes & (DF_NULL_TRANSFER_0 | DF_NULL_TRANSFER_N)) {
894 int tgt_sreg = mir->ssa_rep->defs[0];
895 int operands = (df_attributes & DF_NULL_TRANSFER_0) ? 1 :
896 mir->ssa_rep->num_uses;
Bill Buzbee0b1191c2013-10-28 22:11:59 +0000897 bool needs_null_check = false;
buzbee311ca162013-02-28 15:56:43 -0800898 for (int i = 0; i < operands; i++) {
Vladimir Markobfea9c22014-01-17 17:49:33 +0000899 needs_null_check |= ssa_regs_to_check->IsBitSet(mir->ssa_rep->uses[i]);
buzbee311ca162013-02-28 15:56:43 -0800900 }
Bill Buzbee0b1191c2013-10-28 22:11:59 +0000901 if (needs_null_check) {
Vladimir Markobfea9c22014-01-17 17:49:33 +0000902 ssa_regs_to_check->SetBit(tgt_sreg);
Bill Buzbee0b1191c2013-10-28 22:11:59 +0000903 } else {
Vladimir Markobfea9c22014-01-17 17:49:33 +0000904 ssa_regs_to_check->ClearBit(tgt_sreg);
buzbee311ca162013-02-28 15:56:43 -0800905 }
906 }
buzbee311ca162013-02-28 15:56:43 -0800907 }
908
909 // Did anything change?
Vladimir Markobfea9c22014-01-17 17:49:33 +0000910 bool nce_changed = false;
911 if (do_nce) {
912 if (bb->data_flow_info->ending_check_v == nullptr) {
913 DCHECK(temp_scoped_alloc_.get() != nullptr);
914 bb->data_flow_info->ending_check_v = new (temp_scoped_alloc_.get()) ArenaBitVector(
915 temp_scoped_alloc_.get(), temp_bit_vector_size_, false, kBitMapNullCheck);
916 nce_changed = ssa_regs_to_check->GetHighestBitSet() != -1;
917 bb->data_flow_info->ending_check_v->Copy(ssa_regs_to_check);
Jean Christophe Beylerb5c9b402014-04-30 14:52:00 -0700918 } else if (!ssa_regs_to_check->SameBitsSet(bb->data_flow_info->ending_check_v)) {
Vladimir Markobfea9c22014-01-17 17:49:33 +0000919 nce_changed = true;
920 bb->data_flow_info->ending_check_v->Copy(ssa_regs_to_check);
921 }
buzbee311ca162013-02-28 15:56:43 -0800922 }
buzbee1da1e2f2013-11-15 13:37:01 -0800923 return infer_changed | nce_changed;
buzbee311ca162013-02-28 15:56:43 -0800924}
925
Vladimir Markobfea9c22014-01-17 17:49:33 +0000926void MIRGraph::EliminateNullChecksAndInferTypesEnd() {
927 if ((cu_->disable_opt & (1 << kNullCheckElimination)) == 0) {
928 // Clean up temporaries.
929 temp_bit_vector_size_ = 0u;
930 temp_bit_vector_ = nullptr;
931 AllNodesIterator iter(this);
932 for (BasicBlock* bb = iter.Next(); bb != nullptr; bb = iter.Next()) {
933 if (bb->data_flow_info != nullptr) {
934 bb->data_flow_info->ending_check_v = nullptr;
935 }
936 }
937 DCHECK(temp_scoped_alloc_.get() != nullptr);
938 temp_scoped_alloc_.reset();
939 }
940}
941
942bool MIRGraph::EliminateClassInitChecksGate() {
943 if ((cu_->disable_opt & (1 << kClassInitCheckElimination)) != 0 ||
944 !cu_->mir_graph->HasStaticFieldAccess()) {
945 return false;
946 }
947
948 if (kIsDebugBuild) {
949 AllNodesIterator iter(this);
950 for (BasicBlock* bb = iter.Next(); bb != nullptr; bb = iter.Next()) {
951 CHECK(bb->data_flow_info == nullptr || bb->data_flow_info->ending_check_v == nullptr);
952 }
953 }
954
955 DCHECK(temp_scoped_alloc_.get() == nullptr);
956 temp_scoped_alloc_.reset(ScopedArenaAllocator::Create(&cu_->arena_stack));
957
958 // Each insn we use here has at least 2 code units, offset/2 will be a unique index.
959 const size_t end = (cu_->code_item->insns_size_in_code_units_ + 1u) / 2u;
960 temp_insn_data_ = static_cast<uint16_t*>(
961 temp_scoped_alloc_->Alloc(end * sizeof(*temp_insn_data_), kArenaAllocGrowableArray));
962
963 uint32_t unique_class_count = 0u;
964 {
965 // Get unique_class_count and store indexes in temp_insn_data_ using a map on a nested
966 // ScopedArenaAllocator.
967
968 // Embed the map value in the entry to save space.
969 struct MapEntry {
970 // Map key: the class identified by the declaring dex file and type index.
971 const DexFile* declaring_dex_file;
972 uint16_t declaring_class_idx;
973 // Map value: index into bit vectors of classes requiring initialization checks.
974 uint16_t index;
975 };
976 struct MapEntryComparator {
977 bool operator()(const MapEntry& lhs, const MapEntry& rhs) const {
978 if (lhs.declaring_class_idx != rhs.declaring_class_idx) {
979 return lhs.declaring_class_idx < rhs.declaring_class_idx;
980 }
981 return lhs.declaring_dex_file < rhs.declaring_dex_file;
982 }
983 };
984
Vladimir Markobfea9c22014-01-17 17:49:33 +0000985 ScopedArenaAllocator allocator(&cu_->arena_stack);
Vladimir Marko69f08ba2014-04-11 12:28:11 +0100986 ScopedArenaSet<MapEntry, MapEntryComparator> class_to_index_map(MapEntryComparator(),
987 allocator.Adapter());
Vladimir Markobfea9c22014-01-17 17:49:33 +0000988
989 // First, find all SGET/SPUTs that may need class initialization checks, record INVOKE_STATICs.
990 AllNodesIterator iter(this);
991 for (BasicBlock* bb = iter.Next(); bb != nullptr; bb = iter.Next()) {
992 for (MIR* mir = bb->first_mir_insn; mir != nullptr; mir = mir->next) {
993 DCHECK(bb->data_flow_info != nullptr);
994 if (mir->dalvikInsn.opcode >= Instruction::SGET &&
995 mir->dalvikInsn.opcode <= Instruction::SPUT_SHORT) {
996 const MirSFieldLoweringInfo& field_info = GetSFieldLoweringInfo(mir);
997 uint16_t index = 0xffffu;
998 if (field_info.IsResolved() && !field_info.IsInitialized()) {
999 DCHECK_LT(class_to_index_map.size(), 0xffffu);
1000 MapEntry entry = {
1001 field_info.DeclaringDexFile(),
1002 field_info.DeclaringClassIndex(),
1003 static_cast<uint16_t>(class_to_index_map.size())
1004 };
1005 index = class_to_index_map.insert(entry).first->index;
1006 }
1007 // Using offset/2 for index into temp_insn_data_.
1008 temp_insn_data_[mir->offset / 2u] = index;
1009 }
1010 }
1011 }
1012 unique_class_count = static_cast<uint32_t>(class_to_index_map.size());
1013 }
1014
1015 if (unique_class_count == 0u) {
1016 // All SGET/SPUTs refer to initialized classes. Nothing to do.
1017 temp_insn_data_ = nullptr;
1018 temp_scoped_alloc_.reset();
1019 return false;
1020 }
1021
1022 temp_bit_vector_size_ = unique_class_count;
1023 temp_bit_vector_ = new (temp_scoped_alloc_.get()) ArenaBitVector(
1024 temp_scoped_alloc_.get(), temp_bit_vector_size_, false, kBitMapClInitCheck);
1025 DCHECK_GT(temp_bit_vector_size_, 0u);
1026 return true;
1027}
1028
1029/*
1030 * Eliminate unnecessary class initialization checks for a basic block.
1031 */
1032bool MIRGraph::EliminateClassInitChecks(BasicBlock* bb) {
1033 DCHECK_EQ((cu_->disable_opt & (1 << kClassInitCheckElimination)), 0u);
1034 if (bb->data_flow_info == NULL) {
1035 return false;
1036 }
1037
1038 /*
1039 * Set initial state. Be conservative with catch
1040 * blocks and start with no assumptions about class init check status.
1041 */
1042 ArenaBitVector* classes_to_check = temp_bit_vector_;
1043 DCHECK(classes_to_check != nullptr);
1044 if ((bb->block_type == kEntryBlock) | bb->catch_entry) {
1045 classes_to_check->SetInitialBits(temp_bit_vector_size_);
1046 } else if (bb->predecessors->Size() == 1) {
1047 BasicBlock* pred_bb = GetBasicBlock(bb->predecessors->Get(0));
1048 // pred_bb must have already been processed at least once.
1049 DCHECK(pred_bb != nullptr);
1050 DCHECK(pred_bb->data_flow_info != nullptr);
1051 DCHECK(pred_bb->data_flow_info->ending_check_v != nullptr);
1052 classes_to_check->Copy(pred_bb->data_flow_info->ending_check_v);
1053 } else {
1054 // Starting state is union of all incoming arcs
1055 GrowableArray<BasicBlockId>::Iterator iter(bb->predecessors);
1056 BasicBlock* pred_bb = GetBasicBlock(iter.Next());
1057 DCHECK(pred_bb != NULL);
1058 DCHECK(pred_bb->data_flow_info != NULL);
1059 while (pred_bb->data_flow_info->ending_check_v == nullptr) {
1060 pred_bb = GetBasicBlock(iter.Next());
1061 // At least one predecessor must have been processed before this bb.
1062 DCHECK(pred_bb != nullptr);
1063 DCHECK(pred_bb->data_flow_info != nullptr);
1064 }
1065 classes_to_check->Copy(pred_bb->data_flow_info->ending_check_v);
1066 while (true) {
1067 pred_bb = GetBasicBlock(iter.Next());
1068 if (!pred_bb) break;
1069 DCHECK(pred_bb->data_flow_info != nullptr);
1070 if (pred_bb->data_flow_info->ending_check_v == nullptr) {
1071 continue;
1072 }
1073 classes_to_check->Union(pred_bb->data_flow_info->ending_check_v);
1074 }
1075 }
1076 // At this point, classes_to_check shows which classes need clinit checks.
1077
1078 // Walk through the instruction in the block, updating as necessary
1079 for (MIR* mir = bb->first_mir_insn; mir != nullptr; mir = mir->next) {
1080 if (mir->dalvikInsn.opcode >= Instruction::SGET &&
1081 mir->dalvikInsn.opcode <= Instruction::SPUT_SHORT) {
1082 uint16_t index = temp_insn_data_[mir->offset / 2u];
1083 if (index != 0xffffu) {
1084 if (mir->dalvikInsn.opcode >= Instruction::SGET &&
1085 mir->dalvikInsn.opcode <= Instruction::SPUT_SHORT) {
1086 if (!classes_to_check->IsBitSet(index)) {
1087 // Eliminate the class init check.
1088 mir->optimization_flags |= MIR_IGNORE_CLINIT_CHECK;
1089 } else {
1090 // Do the class init check.
1091 mir->optimization_flags &= ~MIR_IGNORE_CLINIT_CHECK;
1092 }
1093 }
1094 // Mark the class as initialized.
1095 classes_to_check->ClearBit(index);
1096 }
1097 }
1098 }
1099
1100 // Did anything change?
1101 bool changed = false;
1102 if (bb->data_flow_info->ending_check_v == nullptr) {
1103 DCHECK(temp_scoped_alloc_.get() != nullptr);
1104 DCHECK(bb->data_flow_info != nullptr);
1105 bb->data_flow_info->ending_check_v = new (temp_scoped_alloc_.get()) ArenaBitVector(
1106 temp_scoped_alloc_.get(), temp_bit_vector_size_, false, kBitMapClInitCheck);
1107 changed = classes_to_check->GetHighestBitSet() != -1;
1108 bb->data_flow_info->ending_check_v->Copy(classes_to_check);
1109 } else if (!classes_to_check->Equal(bb->data_flow_info->ending_check_v)) {
1110 changed = true;
1111 bb->data_flow_info->ending_check_v->Copy(classes_to_check);
1112 }
1113 return changed;
1114}
1115
1116void MIRGraph::EliminateClassInitChecksEnd() {
1117 // Clean up temporaries.
1118 temp_bit_vector_size_ = 0u;
1119 temp_bit_vector_ = nullptr;
1120 AllNodesIterator iter(this);
1121 for (BasicBlock* bb = iter.Next(); bb != nullptr; bb = iter.Next()) {
1122 if (bb->data_flow_info != nullptr) {
1123 bb->data_flow_info->ending_check_v = nullptr;
1124 }
1125 }
1126
1127 DCHECK(temp_insn_data_ != nullptr);
1128 temp_insn_data_ = nullptr;
1129 DCHECK(temp_scoped_alloc_.get() != nullptr);
1130 temp_scoped_alloc_.reset();
1131}
1132
Vladimir Marko9820b7c2014-01-02 16:40:37 +00001133void MIRGraph::ComputeInlineIFieldLoweringInfo(uint16_t field_idx, MIR* invoke, MIR* iget_or_iput) {
1134 uint32_t method_index = invoke->meta.method_lowering_info;
1135 if (temp_bit_vector_->IsBitSet(method_index)) {
1136 iget_or_iput->meta.ifield_lowering_info = temp_insn_data_[method_index];
1137 DCHECK_EQ(field_idx, GetIFieldLoweringInfo(iget_or_iput).FieldIndex());
1138 return;
1139 }
1140
1141 const MirMethodLoweringInfo& method_info = GetMethodLoweringInfo(invoke);
1142 MethodReference target = method_info.GetTargetMethod();
1143 DexCompilationUnit inlined_unit(
1144 cu_, cu_->class_loader, cu_->class_linker, *target.dex_file,
1145 nullptr /* code_item not used */, 0u /* class_def_idx not used */, target.dex_method_index,
1146 0u /* access_flags not used */, nullptr /* verified_method not used */);
1147 MirIFieldLoweringInfo inlined_field_info(field_idx);
1148 MirIFieldLoweringInfo::Resolve(cu_->compiler_driver, &inlined_unit, &inlined_field_info, 1u);
1149 DCHECK(inlined_field_info.IsResolved());
1150
1151 uint32_t field_info_index = ifield_lowering_infos_.Size();
1152 ifield_lowering_infos_.Insert(inlined_field_info);
1153 temp_bit_vector_->SetBit(method_index);
1154 temp_insn_data_[method_index] = field_info_index;
1155 iget_or_iput->meta.ifield_lowering_info = field_info_index;
1156}
1157
1158bool MIRGraph::InlineCallsGate() {
1159 if ((cu_->disable_opt & (1 << kSuppressMethodInlining)) != 0 ||
1160 method_lowering_infos_.Size() == 0u) {
1161 return false;
1162 }
1163 if (cu_->compiler_driver->GetMethodInlinerMap() == nullptr) {
1164 // This isn't the Quick compiler.
1165 return false;
1166 }
1167 return true;
1168}
1169
1170void MIRGraph::InlineCallsStart() {
1171 // Prepare for inlining getters/setters. Since we're inlining at most 1 IGET/IPUT from
1172 // each INVOKE, we can index the data by the MIR::meta::method_lowering_info index.
1173
1174 DCHECK(temp_scoped_alloc_.get() == nullptr);
1175 temp_scoped_alloc_.reset(ScopedArenaAllocator::Create(&cu_->arena_stack));
1176 temp_bit_vector_size_ = method_lowering_infos_.Size();
1177 temp_bit_vector_ = new (temp_scoped_alloc_.get()) ArenaBitVector(
1178 temp_scoped_alloc_.get(), temp_bit_vector_size_, false, kBitMapMisc);
1179 temp_bit_vector_->ClearAllBits();
1180 temp_insn_data_ = static_cast<uint16_t*>(temp_scoped_alloc_->Alloc(
1181 temp_bit_vector_size_ * sizeof(*temp_insn_data_), kArenaAllocGrowableArray));
1182}
1183
1184void MIRGraph::InlineCalls(BasicBlock* bb) {
1185 if (bb->block_type != kDalvikByteCode) {
1186 return;
1187 }
1188 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
1189 if (!(Instruction::FlagsOf(mir->dalvikInsn.opcode) & Instruction::kInvoke)) {
1190 continue;
1191 }
1192 const MirMethodLoweringInfo& method_info = GetMethodLoweringInfo(mir);
1193 if (!method_info.FastPath()) {
1194 continue;
1195 }
1196 InvokeType sharp_type = method_info.GetSharpType();
1197 if ((sharp_type != kDirect) &&
1198 (sharp_type != kStatic || method_info.NeedsClassInitialization())) {
1199 continue;
1200 }
1201 DCHECK(cu_->compiler_driver->GetMethodInlinerMap() != nullptr);
1202 MethodReference target = method_info.GetTargetMethod();
1203 if (cu_->compiler_driver->GetMethodInlinerMap()->GetMethodInliner(target.dex_file)
1204 ->GenInline(this, bb, mir, target.dex_method_index)) {
1205 if (cu_->verbose) {
1206 LOG(INFO) << "In \"" << PrettyMethod(cu_->method_idx, *cu_->dex_file)
1207 << "\" @0x" << std::hex << mir->offset
1208 << " inlined " << method_info.GetInvokeType() << " (" << sharp_type << ") call to \""
1209 << PrettyMethod(target.dex_method_index, *target.dex_file) << "\"";
1210 }
1211 }
1212 }
1213}
1214
1215void MIRGraph::InlineCallsEnd() {
1216 DCHECK(temp_insn_data_ != nullptr);
1217 temp_insn_data_ = nullptr;
1218 DCHECK(temp_bit_vector_ != nullptr);
1219 temp_bit_vector_ = nullptr;
1220 DCHECK(temp_scoped_alloc_.get() != nullptr);
1221 temp_scoped_alloc_.reset();
1222}
1223
Brian Carlstrom2ce745c2013-07-17 17:44:30 -07001224void MIRGraph::DumpCheckStats() {
buzbee311ca162013-02-28 15:56:43 -08001225 Checkstats* stats =
Vladimir Marko83cc7ae2014-02-12 18:02:05 +00001226 static_cast<Checkstats*>(arena_->Alloc(sizeof(Checkstats), kArenaAllocDFInfo));
buzbee1fd33462013-03-25 13:40:45 -07001227 checkstats_ = stats;
buzbee56c71782013-09-05 17:13:19 -07001228 AllNodesIterator iter(this);
buzbee311ca162013-02-28 15:56:43 -08001229 for (BasicBlock* bb = iter.Next(); bb != NULL; bb = iter.Next()) {
1230 CountChecks(bb);
1231 }
1232 if (stats->null_checks > 0) {
1233 float eliminated = static_cast<float>(stats->null_checks_eliminated);
1234 float checks = static_cast<float>(stats->null_checks);
1235 LOG(INFO) << "Null Checks: " << PrettyMethod(cu_->method_idx, *cu_->dex_file) << " "
1236 << stats->null_checks_eliminated << " of " << stats->null_checks << " -> "
1237 << (eliminated/checks) * 100.0 << "%";
1238 }
1239 if (stats->range_checks > 0) {
1240 float eliminated = static_cast<float>(stats->range_checks_eliminated);
1241 float checks = static_cast<float>(stats->range_checks);
1242 LOG(INFO) << "Range Checks: " << PrettyMethod(cu_->method_idx, *cu_->dex_file) << " "
1243 << stats->range_checks_eliminated << " of " << stats->range_checks << " -> "
1244 << (eliminated/checks) * 100.0 << "%";
1245 }
1246}
1247
Brian Carlstrom2ce745c2013-07-17 17:44:30 -07001248bool MIRGraph::BuildExtendedBBList(struct BasicBlock* bb) {
buzbee311ca162013-02-28 15:56:43 -08001249 if (bb->visited) return false;
1250 if (!((bb->block_type == kEntryBlock) || (bb->block_type == kDalvikByteCode)
1251 || (bb->block_type == kExitBlock))) {
1252 // Ignore special blocks
1253 bb->visited = true;
1254 return false;
1255 }
1256 // Must be head of extended basic block.
1257 BasicBlock* start_bb = bb;
buzbee0d829482013-10-11 15:24:55 -07001258 extended_basic_blocks_.push_back(bb->id);
buzbee311ca162013-02-28 15:56:43 -08001259 bool terminated_by_return = false;
buzbee1da1e2f2013-11-15 13:37:01 -08001260 bool do_local_value_numbering = false;
buzbee311ca162013-02-28 15:56:43 -08001261 // Visit blocks strictly dominated by this head.
1262 while (bb != NULL) {
1263 bb->visited = true;
1264 terminated_by_return |= bb->terminated_by_return;
buzbee1da1e2f2013-11-15 13:37:01 -08001265 do_local_value_numbering |= bb->use_lvn;
buzbee311ca162013-02-28 15:56:43 -08001266 bb = NextDominatedBlock(bb);
1267 }
buzbee1da1e2f2013-11-15 13:37:01 -08001268 if (terminated_by_return || do_local_value_numbering) {
1269 // Do lvn for all blocks in this extended set.
buzbee311ca162013-02-28 15:56:43 -08001270 bb = start_bb;
1271 while (bb != NULL) {
buzbee1da1e2f2013-11-15 13:37:01 -08001272 bb->use_lvn = do_local_value_numbering;
1273 bb->dominates_return = terminated_by_return;
buzbee311ca162013-02-28 15:56:43 -08001274 bb = NextDominatedBlock(bb);
1275 }
1276 }
Brian Carlstrom7934ac22013-07-26 10:54:15 -07001277 return false; // Not iterative - return value will be ignored
buzbee311ca162013-02-28 15:56:43 -08001278}
1279
Brian Carlstrom2ce745c2013-07-17 17:44:30 -07001280void MIRGraph::BasicBlockOptimization() {
Jean Christophe Beyler4e97c532014-01-07 10:07:18 -08001281 if ((cu_->disable_opt & (1 << kSuppressExceptionEdges)) != 0) {
1282 ClearAllVisitedFlags();
1283 PreOrderDfsIterator iter2(this);
1284 for (BasicBlock* bb = iter2.Next(); bb != NULL; bb = iter2.Next()) {
1285 BuildExtendedBBList(bb);
buzbee311ca162013-02-28 15:56:43 -08001286 }
Jean Christophe Beyler4e97c532014-01-07 10:07:18 -08001287 // Perform extended basic block optimizations.
1288 for (unsigned int i = 0; i < extended_basic_blocks_.size(); i++) {
1289 BasicBlockOpt(GetBasicBlock(extended_basic_blocks_[i]));
1290 }
1291 } else {
1292 PreOrderDfsIterator iter(this);
1293 for (BasicBlock* bb = iter.Next(); bb != NULL; bb = iter.Next()) {
1294 BasicBlockOpt(bb);
1295 }
buzbee311ca162013-02-28 15:56:43 -08001296 }
1297}
1298
1299} // namespace art