buzbee | 1452bee | 2015-03-06 14:43:04 -0800 | [diff] [blame^] | 1 | /* move-wide/from16 vAA, vBBBB */ |
| 2 | /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ |
| 3 | FETCH r3, 1 @ r3<- BBBB |
| 4 | mov r2, rINST, lsr #8 @ r2<- AA |
| 5 | add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] |
| 6 | add r2, rFP, r2, lsl #2 @ r2<- &fp[AA] |
| 7 | ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB] |
| 8 | FETCH_ADVANCE_INST 2 @ advance rPC, load rINST |
| 9 | GET_INST_OPCODE ip @ extract opcode from rINST |
| 10 | stmia r2, {r0-r1} @ fp[AA]<- r0/r1 |
| 11 | GOTO_OPCODE ip @ jump to next instruction |