blob: f64c861ce5d78f0a8920cb89e2956ed29d2844c9 [file] [log] [blame]
buzbee1452bee2015-03-06 14:43:04 -08001 /*
2 * Long integer shift. This is different from the generic 32/64-bit
3 * binary operations because vAA/vBB are 64-bit but vCC (the shift
4 * distance) is 32-bit. Also, Dalvik requires us to mask off the low
5 * 6 bits of the shift distance.
6 */
7 /* ushr-long vAA, vBB, vCC */
8 FETCH r0, 1 @ r0<- CCBB
9 mov r9, rINST, lsr #8 @ r9<- AA
10 and r3, r0, #255 @ r3<- BB
11 mov r0, r0, lsr #8 @ r0<- CC
12 add r3, rFP, r3, lsl #2 @ r3<- &fp[BB]
13 GET_VREG r2, r0 @ r2<- vCC
14 ldmia r3, {r0-r1} @ r0/r1<- vBB/vBB+1
15 and r2, r2, #63 @ r0<- r0 & 0x3f
16 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
17
18 mov r0, r0, lsr r2 @ r0<- r2 >> r2
19 rsb r3, r2, #32 @ r3<- 32 - r2
20 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
21 subs ip, r2, #32 @ ip<- r2 - 32
22 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
23 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST
24 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
25 GET_INST_OPCODE ip @ extract opcode from rINST
26 stmia r9, {r0-r1} @ vAA/vAA+1<- r0/r1
27 GOTO_OPCODE ip @ jump to next instruction