Elliott Hughes | 2faa5f1 | 2012-01-30 14:42:07 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 16 | |
Elliott Hughes | 07ed66b | 2012-12-12 18:34:25 -0800 | [diff] [blame] | 17 | #include "base/logging.h" |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 18 | #include "calling_convention_arm.h" |
Mathieu Chartier | 3e0acf6 | 2015-01-08 09:41:25 -0800 | [diff] [blame] | 19 | #include "handle_scope-inl.h" |
Ian Rogers | 166db04 | 2013-07-26 12:05:57 -0700 | [diff] [blame] | 20 | #include "utils/arm/managed_register_arm.h" |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 21 | |
| 22 | namespace art { |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 23 | namespace arm { |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 24 | |
Zheng Xu | 5667fdb | 2014-10-23 18:29:55 +0800 | [diff] [blame] | 25 | // Used by hard float. |
| 26 | static const Register kHFCoreArgumentRegisters[] = { |
| 27 | R0, R1, R2, R3 |
| 28 | }; |
| 29 | |
| 30 | static const SRegister kHFSArgumentRegisters[] = { |
| 31 | S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, S12, S13, S14, S15 |
| 32 | }; |
| 33 | |
| 34 | static const DRegister kHFDArgumentRegisters[] = { |
| 35 | D0, D1, D2, D3, D4, D5, D6, D7 |
| 36 | }; |
| 37 | |
Andreas Gampe | 785d2f2 | 2014-11-03 22:57:30 -0800 | [diff] [blame] | 38 | static_assert(arraysize(kHFDArgumentRegisters) * 2 == arraysize(kHFSArgumentRegisters), |
| 39 | "ks d argument registers mismatch"); |
Zheng Xu | 5667fdb | 2014-10-23 18:29:55 +0800 | [diff] [blame] | 40 | |
Vladimir Marko | 1cd1b03 | 2016-05-19 10:37:24 +0100 | [diff] [blame] | 41 | static constexpr ManagedRegister kCalleeSaveRegisters[] = { |
| 42 | // Core registers. |
| 43 | ArmManagedRegister::FromCoreRegister(R5), |
| 44 | ArmManagedRegister::FromCoreRegister(R6), |
| 45 | ArmManagedRegister::FromCoreRegister(R7), |
| 46 | ArmManagedRegister::FromCoreRegister(R8), |
| 47 | ArmManagedRegister::FromCoreRegister(R10), |
| 48 | ArmManagedRegister::FromCoreRegister(R11), |
| 49 | // Hard float registers. |
| 50 | ArmManagedRegister::FromSRegister(S16), |
| 51 | ArmManagedRegister::FromSRegister(S17), |
| 52 | ArmManagedRegister::FromSRegister(S18), |
| 53 | ArmManagedRegister::FromSRegister(S19), |
| 54 | ArmManagedRegister::FromSRegister(S20), |
| 55 | ArmManagedRegister::FromSRegister(S21), |
| 56 | ArmManagedRegister::FromSRegister(S22), |
| 57 | ArmManagedRegister::FromSRegister(S23), |
| 58 | ArmManagedRegister::FromSRegister(S24), |
| 59 | ArmManagedRegister::FromSRegister(S25), |
| 60 | ArmManagedRegister::FromSRegister(S26), |
| 61 | ArmManagedRegister::FromSRegister(S27), |
| 62 | ArmManagedRegister::FromSRegister(S28), |
| 63 | ArmManagedRegister::FromSRegister(S29), |
| 64 | ArmManagedRegister::FromSRegister(S30), |
| 65 | ArmManagedRegister::FromSRegister(S31) |
| 66 | }; |
| 67 | |
| 68 | static constexpr uint32_t CalculateCoreCalleeSpillMask() { |
| 69 | // LR is a special callee save which is not reported by CalleeSaveRegisters(). |
| 70 | uint32_t result = 1 << LR; |
| 71 | for (auto&& r : kCalleeSaveRegisters) { |
| 72 | if (r.AsArm().IsCoreRegister()) { |
| 73 | result |= (1 << r.AsArm().AsCoreRegister()); |
| 74 | } |
| 75 | } |
| 76 | return result; |
| 77 | } |
| 78 | |
| 79 | static constexpr uint32_t CalculateFpCalleeSpillMask() { |
| 80 | uint32_t result = 0; |
| 81 | for (auto&& r : kCalleeSaveRegisters) { |
| 82 | if (r.AsArm().IsSRegister()) { |
| 83 | result |= (1 << r.AsArm().AsSRegister()); |
| 84 | } |
| 85 | } |
| 86 | return result; |
| 87 | } |
| 88 | |
| 89 | static constexpr uint32_t kCoreCalleeSpillMask = CalculateCoreCalleeSpillMask(); |
| 90 | static constexpr uint32_t kFpCalleeSpillMask = CalculateFpCalleeSpillMask(); |
| 91 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 92 | // Calling convention |
| 93 | |
| 94 | ManagedRegister ArmManagedRuntimeCallingConvention::InterproceduralScratchRegister() { |
| 95 | return ArmManagedRegister::FromCoreRegister(IP); // R12 |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 96 | } |
| 97 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 98 | ManagedRegister ArmJniCallingConvention::InterproceduralScratchRegister() { |
| 99 | return ArmManagedRegister::FromCoreRegister(IP); // R12 |
Shih-wei Liao | 668512a | 2011-09-01 14:18:34 -0700 | [diff] [blame] | 100 | } |
| 101 | |
Zheng Xu | 5667fdb | 2014-10-23 18:29:55 +0800 | [diff] [blame] | 102 | ManagedRegister ArmManagedRuntimeCallingConvention::ReturnRegister() { |
| 103 | if (kArm32QuickCodeUseSoftFloat) { |
| 104 | switch (GetShorty()[0]) { |
| 105 | case 'V': |
| 106 | return ArmManagedRegister::NoRegister(); |
| 107 | case 'D': |
| 108 | case 'J': |
| 109 | return ArmManagedRegister::FromRegisterPair(R0_R1); |
| 110 | default: |
| 111 | return ArmManagedRegister::FromCoreRegister(R0); |
| 112 | } |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 113 | } else { |
Zheng Xu | 5667fdb | 2014-10-23 18:29:55 +0800 | [diff] [blame] | 114 | switch (GetShorty()[0]) { |
| 115 | case 'V': |
| 116 | return ArmManagedRegister::NoRegister(); |
| 117 | case 'D': |
| 118 | return ArmManagedRegister::FromDRegister(D0); |
| 119 | case 'F': |
| 120 | return ArmManagedRegister::FromSRegister(S0); |
| 121 | case 'J': |
| 122 | return ArmManagedRegister::FromRegisterPair(R0_R1); |
| 123 | default: |
| 124 | return ArmManagedRegister::FromCoreRegister(R0); |
| 125 | } |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 126 | } |
| 127 | } |
| 128 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 129 | ManagedRegister ArmJniCallingConvention::ReturnRegister() { |
Zheng Xu | 5667fdb | 2014-10-23 18:29:55 +0800 | [diff] [blame] | 130 | switch (GetShorty()[0]) { |
| 131 | case 'V': |
| 132 | return ArmManagedRegister::NoRegister(); |
| 133 | case 'D': |
| 134 | case 'J': |
| 135 | return ArmManagedRegister::FromRegisterPair(R0_R1); |
| 136 | default: |
| 137 | return ArmManagedRegister::FromCoreRegister(R0); |
| 138 | } |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 139 | } |
| 140 | |
Ian Rogers | 00f7d0e | 2012-07-19 15:28:27 -0700 | [diff] [blame] | 141 | ManagedRegister ArmJniCallingConvention::IntReturnRegister() { |
| 142 | return ArmManagedRegister::FromCoreRegister(R0); |
| 143 | } |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 144 | |
Ian Rogers | 00f7d0e | 2012-07-19 15:28:27 -0700 | [diff] [blame] | 145 | // Managed runtime calling convention |
Ian Rogers | b5d09b2 | 2012-03-06 22:14:17 -0800 | [diff] [blame] | 146 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 147 | ManagedRegister ArmManagedRuntimeCallingConvention::MethodRegister() { |
| 148 | return ArmManagedRegister::FromCoreRegister(R0); |
| 149 | } |
| 150 | |
| 151 | bool ArmManagedRuntimeCallingConvention::IsCurrentParamInRegister() { |
Ian Rogers | 00f7d0e | 2012-07-19 15:28:27 -0700 | [diff] [blame] | 152 | return false; // Everything moved to stack on entry. |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 153 | } |
| 154 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 155 | bool ArmManagedRuntimeCallingConvention::IsCurrentParamOnStack() { |
Ian Rogers | 00f7d0e | 2012-07-19 15:28:27 -0700 | [diff] [blame] | 156 | return true; |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 157 | } |
| 158 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 159 | ManagedRegister ArmManagedRuntimeCallingConvention::CurrentParamRegister() { |
Ian Rogers | 00f7d0e | 2012-07-19 15:28:27 -0700 | [diff] [blame] | 160 | LOG(FATAL) << "Should not reach here"; |
| 161 | return ManagedRegister::NoRegister(); |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 162 | } |
| 163 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 164 | FrameOffset ArmManagedRuntimeCallingConvention::CurrentParamStackOffset() { |
Ian Rogers | 7a99c11 | 2011-09-07 12:48:27 -0700 | [diff] [blame] | 165 | CHECK(IsCurrentParamOnStack()); |
| 166 | FrameOffset result = |
Ian Rogers | 790a6b7 | 2014-04-01 10:36:00 -0700 | [diff] [blame] | 167 | FrameOffset(displacement_.Int32Value() + // displacement |
| 168 | kFramePointerSize + // Method* |
| 169 | (itr_slots_ * kFramePointerSize)); // offset into in args |
Ian Rogers | 7a99c11 | 2011-09-07 12:48:27 -0700 | [diff] [blame] | 170 | return result; |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 171 | } |
| 172 | |
Dmitry Petrochenko | fca8220 | 2014-03-21 11:21:37 +0700 | [diff] [blame] | 173 | const ManagedRegisterEntrySpills& ArmManagedRuntimeCallingConvention::EntrySpills() { |
Ian Rogers | 00f7d0e | 2012-07-19 15:28:27 -0700 | [diff] [blame] | 174 | // We spill the argument registers on ARM to free them up for scratch use, we then assume |
| 175 | // all arguments are on the stack. |
Zheng Xu | 5667fdb | 2014-10-23 18:29:55 +0800 | [diff] [blame] | 176 | if (kArm32QuickCodeUseSoftFloat) { |
| 177 | if (entry_spills_.size() == 0) { |
| 178 | size_t num_spills = NumArgs() + NumLongOrDoubleArgs(); |
| 179 | if (num_spills > 0) { |
| 180 | entry_spills_.push_back(ArmManagedRegister::FromCoreRegister(R1)); |
| 181 | if (num_spills > 1) { |
| 182 | entry_spills_.push_back(ArmManagedRegister::FromCoreRegister(R2)); |
| 183 | if (num_spills > 2) { |
| 184 | entry_spills_.push_back(ArmManagedRegister::FromCoreRegister(R3)); |
| 185 | } |
Ian Rogers | 00f7d0e | 2012-07-19 15:28:27 -0700 | [diff] [blame] | 186 | } |
| 187 | } |
| 188 | } |
Zheng Xu | 5667fdb | 2014-10-23 18:29:55 +0800 | [diff] [blame] | 189 | } else { |
| 190 | if ((entry_spills_.size() == 0) && (NumArgs() > 0)) { |
| 191 | uint32_t gpr_index = 1; // R0 ~ R3. Reserve r0 for ArtMethod*. |
| 192 | uint32_t fpr_index = 0; // S0 ~ S15. |
| 193 | uint32_t fpr_double_index = 0; // D0 ~ D7. |
| 194 | |
| 195 | ResetIterator(FrameOffset(0)); |
| 196 | while (HasNext()) { |
| 197 | if (IsCurrentParamAFloatOrDouble()) { |
| 198 | if (IsCurrentParamADouble()) { // Double. |
| 199 | // Double should not overlap with float. |
| 200 | fpr_double_index = (std::max(fpr_double_index * 2, RoundUp(fpr_index, 2))) / 2; |
| 201 | if (fpr_double_index < arraysize(kHFDArgumentRegisters)) { |
| 202 | entry_spills_.push_back( |
| 203 | ArmManagedRegister::FromDRegister(kHFDArgumentRegisters[fpr_double_index++])); |
| 204 | } else { |
| 205 | entry_spills_.push_back(ManagedRegister::NoRegister(), 8); |
| 206 | } |
| 207 | } else { // Float. |
| 208 | // Float should not overlap with double. |
| 209 | if (fpr_index % 2 == 0) { |
| 210 | fpr_index = std::max(fpr_double_index * 2, fpr_index); |
| 211 | } |
| 212 | if (fpr_index < arraysize(kHFSArgumentRegisters)) { |
| 213 | entry_spills_.push_back( |
| 214 | ArmManagedRegister::FromSRegister(kHFSArgumentRegisters[fpr_index++])); |
| 215 | } else { |
| 216 | entry_spills_.push_back(ManagedRegister::NoRegister(), 4); |
| 217 | } |
| 218 | } |
| 219 | } else { |
| 220 | // FIXME: Pointer this returns as both reference and long. |
| 221 | if (IsCurrentParamALong() && !IsCurrentParamAReference()) { // Long. |
Nicolas Geoffray | 69c15d3 | 2015-01-13 11:42:13 +0000 | [diff] [blame] | 222 | if (gpr_index < arraysize(kHFCoreArgumentRegisters) - 1) { |
| 223 | // Skip R1, and use R2_R3 if the long is the first parameter. |
| 224 | if (gpr_index == 1) { |
| 225 | gpr_index++; |
| 226 | } |
| 227 | } |
| 228 | |
Nicolas Geoffray | 425f239 | 2015-01-08 14:52:29 +0000 | [diff] [blame] | 229 | // If it spans register and memory, we must use the value in memory. |
| 230 | if (gpr_index < arraysize(kHFCoreArgumentRegisters) - 1) { |
Zheng Xu | 5667fdb | 2014-10-23 18:29:55 +0800 | [diff] [blame] | 231 | entry_spills_.push_back( |
| 232 | ArmManagedRegister::FromCoreRegister(kHFCoreArgumentRegisters[gpr_index++])); |
Nicolas Geoffray | 425f239 | 2015-01-08 14:52:29 +0000 | [diff] [blame] | 233 | } else if (gpr_index == arraysize(kHFCoreArgumentRegisters) - 1) { |
| 234 | gpr_index++; |
| 235 | entry_spills_.push_back(ManagedRegister::NoRegister(), 4); |
Zheng Xu | 5667fdb | 2014-10-23 18:29:55 +0800 | [diff] [blame] | 236 | } else { |
| 237 | entry_spills_.push_back(ManagedRegister::NoRegister(), 4); |
| 238 | } |
| 239 | } |
| 240 | // High part of long or 32-bit argument. |
| 241 | if (gpr_index < arraysize(kHFCoreArgumentRegisters)) { |
| 242 | entry_spills_.push_back( |
| 243 | ArmManagedRegister::FromCoreRegister(kHFCoreArgumentRegisters[gpr_index++])); |
| 244 | } else { |
| 245 | entry_spills_.push_back(ManagedRegister::NoRegister(), 4); |
| 246 | } |
| 247 | } |
| 248 | Next(); |
| 249 | } |
| 250 | } |
Ian Rogers | 00f7d0e | 2012-07-19 15:28:27 -0700 | [diff] [blame] | 251 | } |
| 252 | return entry_spills_; |
| 253 | } |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 254 | // JNI calling convention |
| 255 | |
Ian Rogers | 169c9a7 | 2011-11-13 20:13:17 -0800 | [diff] [blame] | 256 | ArmJniCallingConvention::ArmJniCallingConvention(bool is_static, bool is_synchronized, |
| 257 | const char* shorty) |
Ian Rogers | 790a6b7 | 2014-04-01 10:36:00 -0700 | [diff] [blame] | 258 | : JniCallingConvention(is_static, is_synchronized, shorty, kFramePointerSize) { |
Ian Rogers | c779284 | 2012-03-03 15:36:20 -0800 | [diff] [blame] | 259 | // Compute padding to ensure longs and doubles are not split in AAPCS. Ignore the 'this' jobject |
| 260 | // or jclass for static methods and the JNIEnv. We start at the aligned register r2. |
Ian Rogers | 67375ac | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 261 | size_t padding = 0; |
Ian Rogers | c779284 | 2012-03-03 15:36:20 -0800 | [diff] [blame] | 262 | for (size_t cur_arg = IsStatic() ? 0 : 1, cur_reg = 2; cur_arg < NumArgs(); cur_arg++) { |
| 263 | if (IsParamALongOrDouble(cur_arg)) { |
| 264 | if ((cur_reg & 1) != 0) { |
| 265 | padding += 4; |
| 266 | cur_reg++; // additional bump to ensure alignment |
| 267 | } |
| 268 | cur_reg++; // additional bump to skip extra long word |
Ian Rogers | 67375ac | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 269 | } |
Ian Rogers | c779284 | 2012-03-03 15:36:20 -0800 | [diff] [blame] | 270 | cur_reg++; // bump the iterator for every argument |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 271 | } |
Ian Rogers | 67375ac | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 272 | padding_ = padding; |
Ian Rogers | 67375ac | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 273 | } |
| 274 | |
| 275 | uint32_t ArmJniCallingConvention::CoreSpillMask() const { |
| 276 | // Compute spill mask to agree with callee saves initialized in the constructor |
Vladimir Marko | 1cd1b03 | 2016-05-19 10:37:24 +0100 | [diff] [blame] | 277 | return kCoreCalleeSpillMask; |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 278 | } |
| 279 | |
Sebastien Hertz | 7cde48c | 2015-01-20 16:06:43 +0100 | [diff] [blame] | 280 | uint32_t ArmJniCallingConvention::FpSpillMask() const { |
Vladimir Marko | 1cd1b03 | 2016-05-19 10:37:24 +0100 | [diff] [blame] | 281 | return kFpCalleeSpillMask; |
Sebastien Hertz | 7cde48c | 2015-01-20 16:06:43 +0100 | [diff] [blame] | 282 | } |
| 283 | |
Ian Rogers | dc51b79 | 2011-09-22 20:41:37 -0700 | [diff] [blame] | 284 | ManagedRegister ArmJniCallingConvention::ReturnScratchRegister() const { |
| 285 | return ArmManagedRegister::FromCoreRegister(R2); |
| 286 | } |
| 287 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 288 | size_t ArmJniCallingConvention::FrameSize() { |
Ian Rogers | dc51b79 | 2011-09-22 20:41:37 -0700 | [diff] [blame] | 289 | // Method*, LR and callee save area size, local reference segment state |
Mathieu Chartier | e401d14 | 2015-04-22 13:56:20 -0700 | [diff] [blame] | 290 | size_t frame_data_size = kArmPointerSize + (2 + CalleeSaveRegisters().size()) * kFramePointerSize; |
Mathieu Chartier | eb8167a | 2014-05-07 15:43:14 -0700 | [diff] [blame] | 291 | // References plus 2 words for HandleScope header |
Andreas Gampe | cf4035a | 2014-05-28 22:43:01 -0700 | [diff] [blame] | 292 | size_t handle_scope_size = HandleScope::SizeOf(kFramePointerSize, ReferenceCount()); |
Ian Rogers | 0d666d8 | 2011-08-14 16:03:46 -0700 | [diff] [blame] | 293 | // Plus return value spill area size |
Mathieu Chartier | eb8167a | 2014-05-07 15:43:14 -0700 | [diff] [blame] | 294 | return RoundUp(frame_data_size + handle_scope_size + SizeOfReturnValue(), kStackAlignment); |
Ian Rogers | 0d666d8 | 2011-08-14 16:03:46 -0700 | [diff] [blame] | 295 | } |
| 296 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 297 | size_t ArmJniCallingConvention::OutArgSize() { |
Ian Rogers | 790a6b7 | 2014-04-01 10:36:00 -0700 | [diff] [blame] | 298 | return RoundUp(NumberOfOutgoingStackArgs() * kFramePointerSize + padding_, |
Ian Rogers | 7a99c11 | 2011-09-07 12:48:27 -0700 | [diff] [blame] | 299 | kStackAlignment); |
| 300 | } |
| 301 | |
Vladimir Marko | 1cd1b03 | 2016-05-19 10:37:24 +0100 | [diff] [blame] | 302 | ArrayRef<const ManagedRegister> ArmJniCallingConvention::CalleeSaveRegisters() const { |
| 303 | return ArrayRef<const ManagedRegister>(kCalleeSaveRegisters); |
| 304 | } |
| 305 | |
Ian Rogers | 67375ac | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 306 | // JniCallingConvention ABI follows AAPCS where longs and doubles must occur |
| 307 | // in even register numbers and stack slots |
| 308 | void ArmJniCallingConvention::Next() { |
| 309 | JniCallingConvention::Next(); |
Ian Rogers | 169c9a7 | 2011-11-13 20:13:17 -0800 | [diff] [blame] | 310 | size_t arg_pos = itr_args_ - NumberOfExtraArgumentsForJni(); |
Ian Rogers | 67375ac | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 311 | if ((itr_args_ >= 2) && |
Ian Rogers | 169c9a7 | 2011-11-13 20:13:17 -0800 | [diff] [blame] | 312 | (arg_pos < NumArgs()) && |
| 313 | IsParamALongOrDouble(arg_pos)) { |
Shih-wei Liao | 5381cf9 | 2011-07-27 00:28:04 -0700 | [diff] [blame] | 314 | // itr_slots_ needs to be an even number, according to AAPCS. |
Ian Rogers | bdb0391 | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 315 | if ((itr_slots_ & 0x1u) != 0) { |
Shih-wei Liao | 5381cf9 | 2011-07-27 00:28:04 -0700 | [diff] [blame] | 316 | itr_slots_++; |
| 317 | } |
| 318 | } |
Ian Rogers | 67375ac | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 319 | } |
Shih-wei Liao | 5381cf9 | 2011-07-27 00:28:04 -0700 | [diff] [blame] | 320 | |
Ian Rogers | 67375ac | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 321 | bool ArmJniCallingConvention::IsCurrentParamInRegister() { |
Shih-wei Liao | 5381cf9 | 2011-07-27 00:28:04 -0700 | [diff] [blame] | 322 | return itr_slots_ < 4; |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 323 | } |
| 324 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 325 | bool ArmJniCallingConvention::IsCurrentParamOnStack() { |
Shih-wei Liao | 5381cf9 | 2011-07-27 00:28:04 -0700 | [diff] [blame] | 326 | return !IsCurrentParamInRegister(); |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 327 | } |
| 328 | |
| 329 | static const Register kJniArgumentRegisters[] = { |
| 330 | R0, R1, R2, R3 |
| 331 | }; |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 332 | ManagedRegister ArmJniCallingConvention::CurrentParamRegister() { |
Shih-wei Liao | 5381cf9 | 2011-07-27 00:28:04 -0700 | [diff] [blame] | 333 | CHECK_LT(itr_slots_, 4u); |
Ian Rogers | 169c9a7 | 2011-11-13 20:13:17 -0800 | [diff] [blame] | 334 | int arg_pos = itr_args_ - NumberOfExtraArgumentsForJni(); |
| 335 | if ((itr_args_ >= 2) && IsParamALongOrDouble(arg_pos)) { |
Shih-wei Liao | 5381cf9 | 2011-07-27 00:28:04 -0700 | [diff] [blame] | 336 | CHECK_EQ(itr_slots_, 2u); |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 337 | return ArmManagedRegister::FromRegisterPair(R2_R3); |
Carl Shapiro | e2d373e | 2011-07-25 15:20:06 -0700 | [diff] [blame] | 338 | } else { |
| 339 | return |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 340 | ArmManagedRegister::FromCoreRegister(kJniArgumentRegisters[itr_slots_]); |
Carl Shapiro | e2d373e | 2011-07-25 15:20:06 -0700 | [diff] [blame] | 341 | } |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 342 | } |
| 343 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 344 | FrameOffset ArmJniCallingConvention::CurrentParamStackOffset() { |
Shih-wei Liao | 5381cf9 | 2011-07-27 00:28:04 -0700 | [diff] [blame] | 345 | CHECK_GE(itr_slots_, 4u); |
Ian Rogers | 790a6b7 | 2014-04-01 10:36:00 -0700 | [diff] [blame] | 346 | size_t offset = displacement_.Int32Value() - OutArgSize() + ((itr_slots_ - 4) * kFramePointerSize); |
Ian Rogers | c779284 | 2012-03-03 15:36:20 -0800 | [diff] [blame] | 347 | CHECK_LT(offset, OutArgSize()); |
| 348 | return FrameOffset(offset); |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 349 | } |
| 350 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 351 | size_t ArmJniCallingConvention::NumberOfOutgoingStackArgs() { |
Ian Rogers | 169c9a7 | 2011-11-13 20:13:17 -0800 | [diff] [blame] | 352 | size_t static_args = IsStatic() ? 1 : 0; // count jclass |
Ian Rogers | 7a99c11 | 2011-09-07 12:48:27 -0700 | [diff] [blame] | 353 | // regular argument parameters and this |
Ian Rogers | 169c9a7 | 2011-11-13 20:13:17 -0800 | [diff] [blame] | 354 | size_t param_args = NumArgs() + NumLongOrDoubleArgs(); |
Ian Rogers | 7a99c11 | 2011-09-07 12:48:27 -0700 | [diff] [blame] | 355 | // count JNIEnv* less arguments in registers |
| 356 | return static_args + param_args + 1 - 4; |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 357 | } |
| 358 | |
Ian Rogers | 2c8f653 | 2011-09-02 17:16:34 -0700 | [diff] [blame] | 359 | } // namespace arm |
Ian Rogers | b033c75 | 2011-07-20 12:22:35 -0700 | [diff] [blame] | 360 | } // namespace art |