Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1 | /* |
| 2 | * This file was generated automatically by gen-mterp.py for 'x86_64'. |
| 3 | * |
| 4 | * --> DO NOT EDIT <-- |
| 5 | */ |
| 6 | |
| 7 | /* File: x86_64/header.S */ |
| 8 | /* |
| 9 | * Copyright (C) 2016 The Android Open Source Project |
| 10 | * |
| 11 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 12 | * you may not use this file except in compliance with the License. |
| 13 | * You may obtain a copy of the License at |
| 14 | * |
| 15 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 16 | * |
| 17 | * Unless required by applicable law or agreed to in writing, software |
| 18 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 20 | * See the License for the specific language governing permissions and |
| 21 | * limitations under the License. |
| 22 | */ |
| 23 | |
| 24 | /* |
| 25 | Art assembly interpreter notes: |
| 26 | |
| 27 | First validate assembly code by implementing ExecuteXXXImpl() style body (doesn't |
| 28 | handle invoke, allows higher-level code to create frame & shadow frame. |
| 29 | |
| 30 | Once that's working, support direct entry code & eliminate shadow frame (and |
| 31 | excess locals allocation. |
| 32 | |
| 33 | Some (hopefully) temporary ugliness. We'll treat rFP as pointing to the |
| 34 | base of the vreg array within the shadow frame. Access the other fields, |
| 35 | dex_pc_, method_ and number_of_vregs_ via negative offsets. For now, we'll continue |
| 36 | the shadow frame mechanism of double-storing object references - via rFP & |
| 37 | number_of_vregs_. |
| 38 | |
| 39 | */ |
| 40 | |
| 41 | /* |
| 42 | x86_64 ABI general notes: |
| 43 | |
| 44 | Caller save set: |
| 45 | rax, rdx, rcx, rsi, rdi, r8-r11, st(0)-st(7) |
| 46 | Callee save set: |
| 47 | rbx, rbp, r12-r15 |
| 48 | Return regs: |
| 49 | 32-bit in eax |
| 50 | 64-bit in rax |
| 51 | fp on xmm0 |
| 52 | |
| 53 | First 8 fp parameters came in xmm0-xmm7. |
| 54 | First 6 non-fp parameters came in rdi, rsi, rdx, rcx, r8, r9. |
| 55 | Other parameters passed on stack, pushed right-to-left. On entry to target, first |
| 56 | param is at 8(%esp). Traditional entry code is: |
| 57 | |
| 58 | Stack must be 16-byte aligned to support SSE in native code. |
| 59 | |
| 60 | If we're not doing variable stack allocation (alloca), the frame pointer can be |
| 61 | eliminated and all arg references adjusted to be esp relative. |
| 62 | */ |
| 63 | |
| 64 | /* |
| 65 | Mterp and x86_64 notes: |
| 66 | |
| 67 | Some key interpreter variables will be assigned to registers. |
| 68 | |
| 69 | nick reg purpose |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 70 | rPROFILE rbp countdown register for jit profiling |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 71 | rPC r12 interpreted program counter, used for fetching instructions |
| 72 | rFP r13 interpreted frame pointer, used for accessing locals and args |
| 73 | rINSTw bx first 16-bit code of current instruction |
| 74 | rINSTbl bl opcode portion of instruction word |
| 75 | rINSTbh bh high byte of inst word, usually contains src/tgt reg names |
| 76 | rIBASE r14 base of instruction handler table |
| 77 | rREFS r15 base of object references in shadow frame. |
| 78 | |
| 79 | Notes: |
| 80 | o High order 16 bits of ebx must be zero on entry to handler |
| 81 | o rPC, rFP, rINSTw/rINSTbl valid on handler entry and exit |
| 82 | o eax and ecx are scratch, rINSTw/ebx sometimes scratch |
| 83 | |
| 84 | Macros are provided for common operations. Each macro MUST emit only |
| 85 | one instruction to make instruction-counting easier. They MUST NOT alter |
| 86 | unspecified registers or condition codes. |
| 87 | */ |
| 88 | |
| 89 | /* |
| 90 | * This is a #include, not a %include, because we want the C pre-processor |
| 91 | * to expand the macros into assembler assignment statements. |
| 92 | */ |
| 93 | #include "asm_support.h" |
| 94 | |
| 95 | /* |
| 96 | * Handle mac compiler specific |
| 97 | */ |
| 98 | #if defined(__APPLE__) |
| 99 | #define MACRO_LITERAL(value) $(value) |
| 100 | #define FUNCTION_TYPE(name) |
| 101 | #define SIZE(start,end) |
| 102 | // Mac OS' symbols have an _ prefix. |
| 103 | #define SYMBOL(name) _ ## name |
| 104 | #else |
| 105 | #define MACRO_LITERAL(value) $value |
| 106 | #define FUNCTION_TYPE(name) .type name, @function |
| 107 | #define SIZE(start,end) .size start, .-end |
| 108 | #define SYMBOL(name) name |
| 109 | #endif |
| 110 | |
| 111 | .macro PUSH _reg |
| 112 | pushq \_reg |
| 113 | .cfi_adjust_cfa_offset 8 |
| 114 | .cfi_rel_offset \_reg, 0 |
| 115 | .endm |
| 116 | |
| 117 | .macro POP _reg |
| 118 | popq \_reg |
| 119 | .cfi_adjust_cfa_offset -8 |
| 120 | .cfi_restore \_reg |
| 121 | .endm |
| 122 | |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 123 | /* |
| 124 | * Instead of holding a pointer to the shadow frame, we keep rFP at the base of the vregs. So, |
| 125 | * to access other shadow frame fields, we need to use a backwards offset. Define those here. |
| 126 | */ |
| 127 | #define OFF_FP(a) (a - SHADOWFRAME_VREGS_OFFSET) |
| 128 | #define OFF_FP_NUMBER_OF_VREGS OFF_FP(SHADOWFRAME_NUMBER_OF_VREGS_OFFSET) |
| 129 | #define OFF_FP_DEX_PC OFF_FP(SHADOWFRAME_DEX_PC_OFFSET) |
| 130 | #define OFF_FP_LINK OFF_FP(SHADOWFRAME_LINK_OFFSET) |
| 131 | #define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) |
| 132 | #define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) |
| 133 | #define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) |
| 134 | #define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) |
| 135 | #define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET) |
| 136 | #define OFF_FP_SHADOWFRAME (-SHADOWFRAME_VREGS_OFFSET) |
| 137 | |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 138 | /* Frame size must be 16-byte aligned. |
| 139 | * Remember about 8 bytes for return address + 6 * 8 for spills. |
| 140 | */ |
| 141 | #define FRAME_SIZE 8 |
| 142 | |
| 143 | /* Frame diagram while executing ExecuteMterpImpl, high to low addresses */ |
| 144 | #define IN_ARG3 %rcx |
| 145 | #define IN_ARG2 %rdx |
| 146 | #define IN_ARG1 %rsi |
| 147 | #define IN_ARG0 %rdi |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 148 | /* Spill offsets relative to %esp */ |
| 149 | #define SELF_SPILL (FRAME_SIZE - 8) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 150 | /* Out Args */ |
| 151 | #define OUT_ARG3 %rcx |
| 152 | #define OUT_ARG2 %rdx |
| 153 | #define OUT_ARG1 %rsi |
| 154 | #define OUT_ARG0 %rdi |
| 155 | #define OUT_32_ARG3 %ecx |
| 156 | #define OUT_32_ARG2 %edx |
| 157 | #define OUT_32_ARG1 %esi |
| 158 | #define OUT_32_ARG0 %edi |
| 159 | #define OUT_FP_ARG1 %xmm1 |
| 160 | #define OUT_FP_ARG0 %xmm0 |
| 161 | |
| 162 | /* During bringup, we'll use the shadow frame model instead of rFP */ |
| 163 | /* single-purpose registers, given names for clarity */ |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 164 | #define rSELF SELF_SPILL(%rsp) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 165 | #define rPC %r12 |
| 166 | #define rFP %r13 |
| 167 | #define rINST %ebx |
| 168 | #define rINSTq %rbx |
| 169 | #define rINSTw %bx |
| 170 | #define rINSTbh %bh |
| 171 | #define rINSTbl %bl |
| 172 | #define rIBASE %r14 |
| 173 | #define rREFS %r15 |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 174 | #define rPROFILE %ebp |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 175 | |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 176 | #define MTERP_LOGGING 0 |
| 177 | |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 178 | /* |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 179 | * "export" the PC to dex_pc field in the shadow frame, f/b/o future exception objects. Must |
| 180 | * be done *before* something throws. |
| 181 | * |
| 182 | * It's okay to do this more than once. |
| 183 | * |
| 184 | * NOTE: the fast interpreter keeps track of dex pc as a direct pointer to the mapped |
| 185 | * dex byte codes. However, the rest of the runtime expects dex pc to be an instruction |
| 186 | * offset into the code_items_[] array. For effiency, we will "export" the |
| 187 | * current dex pc as a direct pointer using the EXPORT_PC macro, and rely on GetDexPC |
| 188 | * to convert to a dex pc when needed. |
| 189 | */ |
| 190 | .macro EXPORT_PC |
| 191 | movq rPC, OFF_FP_DEX_PC_PTR(rFP) |
| 192 | .endm |
| 193 | |
| 194 | /* |
| 195 | * Refresh handler table. |
| 196 | * IBase handles uses the caller save register so we must restore it after each call. |
| 197 | * Also it is used as a result of some 64-bit operations (like imul) and we should |
| 198 | * restore it in such cases also. |
| 199 | * |
| 200 | */ |
| 201 | .macro REFRESH_IBASE |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 202 | movq rSELF, rIBASE |
| 203 | movq THREAD_CURRENT_IBASE_OFFSET(rIBASE), rIBASE |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 204 | .endm |
| 205 | |
| 206 | /* |
| 207 | * Refresh rINST. |
| 208 | * At enter to handler rINST does not contain the opcode number. |
| 209 | * However some utilities require the full value, so this macro |
| 210 | * restores the opcode number. |
| 211 | */ |
| 212 | .macro REFRESH_INST _opnum |
| 213 | movb rINSTbl, rINSTbh |
| 214 | movb $\_opnum, rINSTbl |
| 215 | .endm |
| 216 | |
| 217 | /* |
| 218 | * Fetch the next instruction from rPC into rINSTw. Does not advance rPC. |
| 219 | */ |
| 220 | .macro FETCH_INST |
| 221 | movzwq (rPC), rINSTq |
| 222 | .endm |
| 223 | |
| 224 | /* |
| 225 | * Remove opcode from rINST, compute the address of handler and jump to it. |
| 226 | */ |
| 227 | .macro GOTO_NEXT |
| 228 | movzx rINSTbl,%eax |
| 229 | movzbl rINSTbh,rINST |
| 230 | shll MACRO_LITERAL(7), %eax |
| 231 | addq rIBASE, %rax |
| 232 | jmp *%rax |
| 233 | .endm |
| 234 | |
| 235 | /* |
| 236 | * Advance rPC by instruction count. |
| 237 | */ |
| 238 | .macro ADVANCE_PC _count |
| 239 | leaq 2*\_count(rPC), rPC |
| 240 | .endm |
| 241 | |
| 242 | /* |
| 243 | * Advance rPC by instruction count, fetch instruction and jump to handler. |
| 244 | */ |
| 245 | .macro ADVANCE_PC_FETCH_AND_GOTO_NEXT _count |
| 246 | ADVANCE_PC \_count |
| 247 | FETCH_INST |
| 248 | GOTO_NEXT |
| 249 | .endm |
| 250 | |
| 251 | /* |
| 252 | * Get/set the 32-bit value from a Dalvik register. |
| 253 | */ |
| 254 | #define VREG_ADDRESS(_vreg) (rFP,_vreg,4) |
| 255 | #define VREG_REF_ADDRESS(_vreg) (rREFS,_vreg,4) |
| 256 | |
| 257 | .macro GET_VREG _reg _vreg |
| 258 | movl (rFP,\_vreg,4), \_reg |
| 259 | .endm |
| 260 | |
| 261 | /* Read wide value. */ |
| 262 | .macro GET_WIDE_VREG _reg _vreg |
| 263 | movq (rFP,\_vreg,4), \_reg |
| 264 | .endm |
| 265 | |
| 266 | .macro SET_VREG _reg _vreg |
| 267 | movl \_reg, (rFP,\_vreg,4) |
| 268 | movl MACRO_LITERAL(0), (rREFS,\_vreg,4) |
| 269 | .endm |
| 270 | |
| 271 | /* Write wide value. reg is clobbered. */ |
| 272 | .macro SET_WIDE_VREG _reg _vreg |
| 273 | movq \_reg, (rFP,\_vreg,4) |
| 274 | xorq \_reg, \_reg |
| 275 | movq \_reg, (rREFS,\_vreg,4) |
| 276 | .endm |
| 277 | |
| 278 | .macro SET_VREG_OBJECT _reg _vreg |
| 279 | movl \_reg, (rFP,\_vreg,4) |
| 280 | movl \_reg, (rREFS,\_vreg,4) |
| 281 | .endm |
| 282 | |
| 283 | .macro GET_VREG_HIGH _reg _vreg |
| 284 | movl 4(rFP,\_vreg,4), \_reg |
| 285 | .endm |
| 286 | |
| 287 | .macro SET_VREG_HIGH _reg _vreg |
| 288 | movl \_reg, 4(rFP,\_vreg,4) |
| 289 | movl MACRO_LITERAL(0), 4(rREFS,\_vreg,4) |
| 290 | .endm |
| 291 | |
| 292 | .macro CLEAR_REF _vreg |
| 293 | movl MACRO_LITERAL(0), (rREFS,\_vreg,4) |
| 294 | .endm |
| 295 | |
| 296 | .macro CLEAR_WIDE_REF _vreg |
| 297 | movl MACRO_LITERAL(0), (rREFS,\_vreg,4) |
| 298 | movl MACRO_LITERAL(0), 4(rREFS,\_vreg,4) |
| 299 | .endm |
| 300 | |
| 301 | /* File: x86_64/entry.S */ |
| 302 | /* |
| 303 | * Copyright (C) 2016 The Android Open Source Project |
| 304 | * |
| 305 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 306 | * you may not use this file except in compliance with the License. |
| 307 | * You may obtain a copy of the License at |
| 308 | * |
| 309 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 310 | * |
| 311 | * Unless required by applicable law or agreed to in writing, software |
| 312 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 313 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 314 | * See the License for the specific language governing permissions and |
| 315 | * limitations under the License. |
| 316 | */ |
| 317 | /* |
| 318 | * Interpreter entry point. |
| 319 | */ |
| 320 | |
| 321 | .text |
| 322 | .global SYMBOL(ExecuteMterpImpl) |
| 323 | FUNCTION_TYPE(ExecuteMterpImpl) |
| 324 | |
| 325 | /* |
| 326 | * On entry: |
| 327 | * 0 Thread* self |
| 328 | * 1 code_item |
| 329 | * 2 ShadowFrame |
| 330 | * 3 JValue* result_register |
| 331 | * |
| 332 | */ |
| 333 | |
| 334 | SYMBOL(ExecuteMterpImpl): |
| 335 | .cfi_startproc |
| 336 | .cfi_def_cfa rsp, 8 |
| 337 | |
| 338 | /* Spill callee save regs */ |
| 339 | PUSH %rbx |
| 340 | PUSH %rbp |
| 341 | PUSH %r12 |
| 342 | PUSH %r13 |
| 343 | PUSH %r14 |
| 344 | PUSH %r15 |
| 345 | |
| 346 | /* Allocate frame */ |
| 347 | subq $FRAME_SIZE, %rsp |
| 348 | .cfi_adjust_cfa_offset FRAME_SIZE |
| 349 | |
| 350 | /* Remember the return register */ |
| 351 | movq IN_ARG3, SHADOWFRAME_RESULT_REGISTER_OFFSET(IN_ARG2) |
| 352 | |
| 353 | /* Remember the code_item */ |
| 354 | movq IN_ARG1, SHADOWFRAME_CODE_ITEM_OFFSET(IN_ARG2) |
| 355 | |
| 356 | /* set up "named" registers */ |
| 357 | movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(IN_ARG2), %eax |
| 358 | leaq SHADOWFRAME_VREGS_OFFSET(IN_ARG2), rFP |
| 359 | leaq (rFP, %rax, 4), rREFS |
| 360 | movl SHADOWFRAME_DEX_PC_OFFSET(IN_ARG2), %eax |
| 361 | leaq CODEITEM_INSNS_OFFSET(IN_ARG1), rPC |
| 362 | leaq (rPC, %rax, 2), rPC |
| 363 | EXPORT_PC |
| 364 | |
| 365 | /* Starting ibase */ |
| 366 | movq IN_ARG0, rSELF |
| 367 | REFRESH_IBASE |
| 368 | |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 369 | /* Set up for backwards branches & osr profiling */ |
| 370 | movq OFF_FP_METHOD(rFP), OUT_ARG0 |
| 371 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 372 | call SYMBOL(MterpSetUpHotnessCountdown) |
| 373 | movswl %ax, rPROFILE |
| 374 | |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 375 | /* start executing the instruction at rPC */ |
| 376 | FETCH_INST |
| 377 | GOTO_NEXT |
| 378 | /* NOTE: no fallthrough */ |
| 379 | |
| 380 | |
| 381 | .global SYMBOL(artMterpAsmInstructionStart) |
| 382 | FUNCTION_TYPE(SYMBOL(artMterpAsmInstructionStart)) |
| 383 | SYMBOL(artMterpAsmInstructionStart) = .L_op_nop |
| 384 | .text |
| 385 | |
| 386 | /* ------------------------------ */ |
| 387 | .balign 128 |
| 388 | .L_op_nop: /* 0x00 */ |
| 389 | /* File: x86_64/op_nop.S */ |
| 390 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 391 | |
| 392 | /* ------------------------------ */ |
| 393 | .balign 128 |
| 394 | .L_op_move: /* 0x01 */ |
| 395 | /* File: x86_64/op_move.S */ |
| 396 | /* for move, move-object, long-to-int */ |
| 397 | /* op vA, vB */ |
| 398 | movl rINST, %eax # eax <- BA |
| 399 | andb $0xf, %al # eax <- A |
| 400 | shrl $4, rINST # rINST <- B |
| 401 | GET_VREG %edx, rINSTq |
| 402 | .if 0 |
| 403 | SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] |
| 404 | .else |
| 405 | SET_VREG %edx, %rax # fp[A] <- fp[B] |
| 406 | .endif |
| 407 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 408 | |
| 409 | /* ------------------------------ */ |
| 410 | .balign 128 |
| 411 | .L_op_move_from16: /* 0x02 */ |
| 412 | /* File: x86_64/op_move_from16.S */ |
| 413 | /* for: move/from16, move-object/from16 */ |
| 414 | /* op vAA, vBBBB */ |
| 415 | movzwq 2(rPC), %rax # eax <- BBBB |
| 416 | GET_VREG %edx, %rax # edx <- fp[BBBB] |
| 417 | .if 0 |
| 418 | SET_VREG_OBJECT %edx, rINSTq # fp[A] <- fp[B] |
| 419 | .else |
| 420 | SET_VREG %edx, rINSTq # fp[A] <- fp[B] |
| 421 | .endif |
| 422 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 423 | |
| 424 | /* ------------------------------ */ |
| 425 | .balign 128 |
| 426 | .L_op_move_16: /* 0x03 */ |
| 427 | /* File: x86_64/op_move_16.S */ |
| 428 | /* for: move/16, move-object/16 */ |
| 429 | /* op vAAAA, vBBBB */ |
| 430 | movzwq 4(rPC), %rcx # ecx <- BBBB |
| 431 | movzwq 2(rPC), %rax # eax <- AAAA |
| 432 | GET_VREG %edx, %rcx |
| 433 | .if 0 |
| 434 | SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] |
| 435 | .else |
| 436 | SET_VREG %edx, %rax # fp[A] <- fp[B] |
| 437 | .endif |
| 438 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 |
| 439 | |
| 440 | /* ------------------------------ */ |
| 441 | .balign 128 |
| 442 | .L_op_move_wide: /* 0x04 */ |
| 443 | /* File: x86_64/op_move_wide.S */ |
| 444 | /* move-wide vA, vB */ |
| 445 | /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ |
| 446 | movl rINST, %ecx # ecx <- BA |
| 447 | sarl $4, rINST # rINST <- B |
| 448 | andb $0xf, %cl # ecx <- A |
| 449 | GET_WIDE_VREG %rdx, rINSTq # rdx <- v[B] |
| 450 | SET_WIDE_VREG %rdx, %rcx # v[A] <- rdx |
| 451 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 452 | |
| 453 | /* ------------------------------ */ |
| 454 | .balign 128 |
| 455 | .L_op_move_wide_from16: /* 0x05 */ |
| 456 | /* File: x86_64/op_move_wide_from16.S */ |
| 457 | /* move-wide/from16 vAA, vBBBB */ |
| 458 | /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ |
| 459 | movzwl 2(rPC), %ecx # ecx <- BBBB |
| 460 | GET_WIDE_VREG %rdx, %rcx # rdx <- v[B] |
| 461 | SET_WIDE_VREG %rdx, rINSTq # v[A] <- rdx |
| 462 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 463 | |
| 464 | /* ------------------------------ */ |
| 465 | .balign 128 |
| 466 | .L_op_move_wide_16: /* 0x06 */ |
| 467 | /* File: x86_64/op_move_wide_16.S */ |
| 468 | /* move-wide/16 vAAAA, vBBBB */ |
| 469 | /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ |
| 470 | movzwq 4(rPC), %rcx # ecx<- BBBB |
| 471 | movzwq 2(rPC), %rax # eax<- AAAA |
| 472 | GET_WIDE_VREG %rdx, %rcx # rdx <- v[B] |
| 473 | SET_WIDE_VREG %rdx, %rax # v[A] <- rdx |
| 474 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 |
| 475 | |
| 476 | /* ------------------------------ */ |
| 477 | .balign 128 |
| 478 | .L_op_move_object: /* 0x07 */ |
| 479 | /* File: x86_64/op_move_object.S */ |
| 480 | /* File: x86_64/op_move.S */ |
| 481 | /* for move, move-object, long-to-int */ |
| 482 | /* op vA, vB */ |
| 483 | movl rINST, %eax # eax <- BA |
| 484 | andb $0xf, %al # eax <- A |
| 485 | shrl $4, rINST # rINST <- B |
| 486 | GET_VREG %edx, rINSTq |
| 487 | .if 1 |
| 488 | SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] |
| 489 | .else |
| 490 | SET_VREG %edx, %rax # fp[A] <- fp[B] |
| 491 | .endif |
| 492 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 493 | |
| 494 | |
| 495 | /* ------------------------------ */ |
| 496 | .balign 128 |
| 497 | .L_op_move_object_from16: /* 0x08 */ |
| 498 | /* File: x86_64/op_move_object_from16.S */ |
| 499 | /* File: x86_64/op_move_from16.S */ |
| 500 | /* for: move/from16, move-object/from16 */ |
| 501 | /* op vAA, vBBBB */ |
| 502 | movzwq 2(rPC), %rax # eax <- BBBB |
| 503 | GET_VREG %edx, %rax # edx <- fp[BBBB] |
| 504 | .if 1 |
| 505 | SET_VREG_OBJECT %edx, rINSTq # fp[A] <- fp[B] |
| 506 | .else |
| 507 | SET_VREG %edx, rINSTq # fp[A] <- fp[B] |
| 508 | .endif |
| 509 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 510 | |
| 511 | |
| 512 | /* ------------------------------ */ |
| 513 | .balign 128 |
| 514 | .L_op_move_object_16: /* 0x09 */ |
| 515 | /* File: x86_64/op_move_object_16.S */ |
| 516 | /* File: x86_64/op_move_16.S */ |
| 517 | /* for: move/16, move-object/16 */ |
| 518 | /* op vAAAA, vBBBB */ |
| 519 | movzwq 4(rPC), %rcx # ecx <- BBBB |
| 520 | movzwq 2(rPC), %rax # eax <- AAAA |
| 521 | GET_VREG %edx, %rcx |
| 522 | .if 1 |
| 523 | SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] |
| 524 | .else |
| 525 | SET_VREG %edx, %rax # fp[A] <- fp[B] |
| 526 | .endif |
| 527 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 |
| 528 | |
| 529 | |
| 530 | /* ------------------------------ */ |
| 531 | .balign 128 |
| 532 | .L_op_move_result: /* 0x0a */ |
| 533 | /* File: x86_64/op_move_result.S */ |
| 534 | /* for: move-result, move-result-object */ |
| 535 | /* op vAA */ |
| 536 | movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType. |
| 537 | movl (%rax), %eax # r0 <- result.i. |
| 538 | .if 0 |
| 539 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <- fp[B] |
| 540 | .else |
| 541 | SET_VREG %eax, rINSTq # fp[A] <- fp[B] |
| 542 | .endif |
| 543 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 544 | |
| 545 | /* ------------------------------ */ |
| 546 | .balign 128 |
| 547 | .L_op_move_result_wide: /* 0x0b */ |
| 548 | /* File: x86_64/op_move_result_wide.S */ |
| 549 | /* move-result-wide vAA */ |
| 550 | movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType. |
| 551 | movq (%rax), %rdx # Get wide |
| 552 | SET_WIDE_VREG %rdx, rINSTq # v[AA] <- rdx |
| 553 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 554 | |
| 555 | /* ------------------------------ */ |
| 556 | .balign 128 |
| 557 | .L_op_move_result_object: /* 0x0c */ |
| 558 | /* File: x86_64/op_move_result_object.S */ |
| 559 | /* File: x86_64/op_move_result.S */ |
| 560 | /* for: move-result, move-result-object */ |
| 561 | /* op vAA */ |
| 562 | movq OFF_FP_RESULT_REGISTER(rFP), %rax # get pointer to result JType. |
| 563 | movl (%rax), %eax # r0 <- result.i. |
| 564 | .if 1 |
| 565 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <- fp[B] |
| 566 | .else |
| 567 | SET_VREG %eax, rINSTq # fp[A] <- fp[B] |
| 568 | .endif |
| 569 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 570 | |
| 571 | |
| 572 | /* ------------------------------ */ |
| 573 | .balign 128 |
| 574 | .L_op_move_exception: /* 0x0d */ |
| 575 | /* File: x86_64/op_move_exception.S */ |
| 576 | /* move-exception vAA */ |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 577 | movq rSELF, %rcx |
| 578 | movl THREAD_EXCEPTION_OFFSET(%rcx), %eax |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 579 | SET_VREG_OBJECT %eax, rINSTq # fp[AA] <- exception object |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 580 | movl $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 581 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 582 | |
| 583 | /* ------------------------------ */ |
| 584 | .balign 128 |
| 585 | .L_op_return_void: /* 0x0e */ |
| 586 | /* File: x86_64/op_return_void.S */ |
| 587 | .extern MterpThreadFenceForConstructor |
| 588 | call SYMBOL(MterpThreadFenceForConstructor) |
Hiroshi Yamauchi | 0402c56 | 2016-04-01 12:00:10 -0700 | [diff] [blame] | 589 | movq rSELF, OUT_ARG0 |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 590 | testl $(THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) |
| 591 | jz 1f |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 592 | call SYMBOL(MterpSuspendCheck) |
| 593 | 1: |
| 594 | xorq %rax, %rax |
| 595 | jmp MterpReturn |
| 596 | |
| 597 | /* ------------------------------ */ |
| 598 | .balign 128 |
| 599 | .L_op_return: /* 0x0f */ |
| 600 | /* File: x86_64/op_return.S */ |
| 601 | /* |
| 602 | * Return a 32-bit value. |
| 603 | * |
| 604 | * for: return, return-object |
| 605 | */ |
| 606 | /* op vAA */ |
| 607 | .extern MterpThreadFenceForConstructor |
| 608 | call SYMBOL(MterpThreadFenceForConstructor) |
Hiroshi Yamauchi | 0402c56 | 2016-04-01 12:00:10 -0700 | [diff] [blame] | 609 | movq rSELF, OUT_ARG0 |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 610 | testl $(THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) |
| 611 | jz 1f |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 612 | call SYMBOL(MterpSuspendCheck) |
| 613 | 1: |
| 614 | GET_VREG %eax, rINSTq # eax <- vAA |
| 615 | jmp MterpReturn |
| 616 | |
| 617 | /* ------------------------------ */ |
| 618 | .balign 128 |
| 619 | .L_op_return_wide: /* 0x10 */ |
| 620 | /* File: x86_64/op_return_wide.S */ |
| 621 | /* |
| 622 | * Return a 64-bit value. |
| 623 | */ |
| 624 | /* return-wide vAA */ |
| 625 | .extern MterpThreadFenceForConstructor |
| 626 | call SYMBOL(MterpThreadFenceForConstructor) |
Hiroshi Yamauchi | 0402c56 | 2016-04-01 12:00:10 -0700 | [diff] [blame] | 627 | movq rSELF, OUT_ARG0 |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 628 | testl $(THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) |
| 629 | jz 1f |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 630 | call SYMBOL(MterpSuspendCheck) |
| 631 | 1: |
| 632 | GET_WIDE_VREG %rax, rINSTq # eax <- v[AA] |
| 633 | jmp MterpReturn |
| 634 | |
| 635 | /* ------------------------------ */ |
| 636 | .balign 128 |
| 637 | .L_op_return_object: /* 0x11 */ |
| 638 | /* File: x86_64/op_return_object.S */ |
| 639 | /* File: x86_64/op_return.S */ |
| 640 | /* |
| 641 | * Return a 32-bit value. |
| 642 | * |
| 643 | * for: return, return-object |
| 644 | */ |
| 645 | /* op vAA */ |
| 646 | .extern MterpThreadFenceForConstructor |
| 647 | call SYMBOL(MterpThreadFenceForConstructor) |
Hiroshi Yamauchi | 0402c56 | 2016-04-01 12:00:10 -0700 | [diff] [blame] | 648 | movq rSELF, OUT_ARG0 |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 649 | testl $(THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) |
| 650 | jz 1f |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 651 | call SYMBOL(MterpSuspendCheck) |
| 652 | 1: |
| 653 | GET_VREG %eax, rINSTq # eax <- vAA |
| 654 | jmp MterpReturn |
| 655 | |
| 656 | |
| 657 | /* ------------------------------ */ |
| 658 | .balign 128 |
| 659 | .L_op_const_4: /* 0x12 */ |
| 660 | /* File: x86_64/op_const_4.S */ |
| 661 | /* const/4 vA, #+B */ |
| 662 | movsbl rINSTbl, %eax # eax <-ssssssBx |
| 663 | movl $0xf, rINST |
| 664 | andl %eax, rINST # rINST <- A |
| 665 | sarl $4, %eax |
| 666 | SET_VREG %eax, rINSTq |
| 667 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 668 | |
| 669 | /* ------------------------------ */ |
| 670 | .balign 128 |
| 671 | .L_op_const_16: /* 0x13 */ |
| 672 | /* File: x86_64/op_const_16.S */ |
| 673 | /* const/16 vAA, #+BBBB */ |
| 674 | movswl 2(rPC), %ecx # ecx <- ssssBBBB |
| 675 | SET_VREG %ecx, rINSTq # vAA <- ssssBBBB |
| 676 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 677 | |
| 678 | /* ------------------------------ */ |
| 679 | .balign 128 |
| 680 | .L_op_const: /* 0x14 */ |
| 681 | /* File: x86_64/op_const.S */ |
| 682 | /* const vAA, #+BBBBbbbb */ |
| 683 | movl 2(rPC), %eax # grab all 32 bits at once |
| 684 | SET_VREG %eax, rINSTq # vAA<- eax |
| 685 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 |
| 686 | |
| 687 | /* ------------------------------ */ |
| 688 | .balign 128 |
| 689 | .L_op_const_high16: /* 0x15 */ |
| 690 | /* File: x86_64/op_const_high16.S */ |
| 691 | /* const/high16 vAA, #+BBBB0000 */ |
| 692 | movzwl 2(rPC), %eax # eax <- 0000BBBB |
| 693 | sall $16, %eax # eax <- BBBB0000 |
| 694 | SET_VREG %eax, rINSTq # vAA <- eax |
| 695 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 696 | |
| 697 | /* ------------------------------ */ |
| 698 | .balign 128 |
| 699 | .L_op_const_wide_16: /* 0x16 */ |
| 700 | /* File: x86_64/op_const_wide_16.S */ |
| 701 | /* const-wide/16 vAA, #+BBBB */ |
| 702 | movswq 2(rPC), %rax # rax <- ssssBBBB |
| 703 | SET_WIDE_VREG %rax, rINSTq # store |
| 704 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 705 | |
| 706 | /* ------------------------------ */ |
| 707 | .balign 128 |
| 708 | .L_op_const_wide_32: /* 0x17 */ |
| 709 | /* File: x86_64/op_const_wide_32.S */ |
| 710 | /* const-wide/32 vAA, #+BBBBbbbb */ |
| 711 | movslq 2(rPC), %rax # eax <- ssssssssBBBBbbbb |
| 712 | SET_WIDE_VREG %rax, rINSTq # store |
| 713 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 |
| 714 | |
| 715 | /* ------------------------------ */ |
| 716 | .balign 128 |
| 717 | .L_op_const_wide: /* 0x18 */ |
| 718 | /* File: x86_64/op_const_wide.S */ |
| 719 | /* const-wide vAA, #+HHHHhhhhBBBBbbbb */ |
| 720 | movq 2(rPC), %rax # rax <- HHHHhhhhBBBBbbbb |
| 721 | SET_WIDE_VREG %rax, rINSTq |
| 722 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 5 |
| 723 | |
| 724 | /* ------------------------------ */ |
| 725 | .balign 128 |
| 726 | .L_op_const_wide_high16: /* 0x19 */ |
| 727 | /* File: x86_64/op_const_wide_high16.S */ |
| 728 | /* const-wide/high16 vAA, #+BBBB000000000000 */ |
| 729 | movzwq 2(rPC), %rax # eax <- 0000BBBB |
| 730 | salq $48, %rax # eax <- BBBB0000 |
| 731 | SET_WIDE_VREG %rax, rINSTq # v[AA+0] <- eax |
| 732 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 733 | |
| 734 | /* ------------------------------ */ |
| 735 | .balign 128 |
| 736 | .L_op_const_string: /* 0x1a */ |
| 737 | /* File: x86_64/op_const_string.S */ |
| 738 | /* const/string vAA, String@BBBB */ |
| 739 | EXPORT_PC |
| 740 | movzwq 2(rPC), OUT_ARG0 # OUT_ARG0 <- BBBB |
| 741 | movq rINSTq, OUT_ARG1 |
| 742 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG2 |
| 743 | movq rSELF, OUT_ARG3 |
| 744 | call SYMBOL(MterpConstString) # (index, tgt_reg, shadow_frame, self) |
| 745 | testb %al, %al |
| 746 | jnz MterpPossibleException |
| 747 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 748 | |
| 749 | /* ------------------------------ */ |
| 750 | .balign 128 |
| 751 | .L_op_const_string_jumbo: /* 0x1b */ |
| 752 | /* File: x86_64/op_const_string_jumbo.S */ |
| 753 | /* const/string vAA, String@BBBBBBBB */ |
| 754 | EXPORT_PC |
| 755 | movl 2(rPC), OUT_32_ARG0 # OUT_32_ARG0 <- BBBB |
| 756 | movq rINSTq, OUT_ARG1 |
| 757 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG2 |
| 758 | movq rSELF, OUT_ARG3 |
| 759 | call SYMBOL(MterpConstString) # (index, tgt_reg, shadow_frame, self) |
| 760 | testb %al, %al |
| 761 | jnz MterpPossibleException |
| 762 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 |
| 763 | |
| 764 | /* ------------------------------ */ |
| 765 | .balign 128 |
| 766 | .L_op_const_class: /* 0x1c */ |
| 767 | /* File: x86_64/op_const_class.S */ |
| 768 | /* const/class vAA, Class@BBBB */ |
| 769 | EXPORT_PC |
| 770 | movzwq 2(rPC), OUT_ARG0 # eax <- OUT_ARG0 |
| 771 | movq rINSTq, OUT_ARG1 |
| 772 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG2 |
| 773 | movq rSELF, OUT_ARG3 |
| 774 | call SYMBOL(MterpConstClass) # (index, tgt_reg, shadow_frame, self) |
| 775 | testb %al, %al |
| 776 | jnz MterpPossibleException |
| 777 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 778 | |
| 779 | /* ------------------------------ */ |
| 780 | .balign 128 |
| 781 | .L_op_monitor_enter: /* 0x1d */ |
| 782 | /* File: x86_64/op_monitor_enter.S */ |
| 783 | /* |
| 784 | * Synchronize on an object. |
| 785 | */ |
| 786 | /* monitor-enter vAA */ |
| 787 | EXPORT_PC |
| 788 | GET_VREG OUT_32_ARG0, rINSTq |
| 789 | movq rSELF, OUT_ARG1 |
| 790 | call SYMBOL(artLockObjectFromCode) # (object, self) |
| 791 | testq %rax, %rax |
| 792 | jnz MterpException |
| 793 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 794 | |
| 795 | /* ------------------------------ */ |
| 796 | .balign 128 |
| 797 | .L_op_monitor_exit: /* 0x1e */ |
| 798 | /* File: x86_64/op_monitor_exit.S */ |
| 799 | /* |
| 800 | * Unlock an object. |
| 801 | * |
| 802 | * Exceptions that occur when unlocking a monitor need to appear as |
| 803 | * if they happened at the following instruction. See the Dalvik |
| 804 | * instruction spec. |
| 805 | */ |
| 806 | /* monitor-exit vAA */ |
| 807 | EXPORT_PC |
| 808 | GET_VREG OUT_32_ARG0, rINSTq |
| 809 | movq rSELF, OUT_ARG1 |
| 810 | call SYMBOL(artUnlockObjectFromCode) # (object, self) |
| 811 | testq %rax, %rax |
| 812 | jnz MterpException |
| 813 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 814 | |
| 815 | /* ------------------------------ */ |
| 816 | .balign 128 |
| 817 | .L_op_check_cast: /* 0x1f */ |
| 818 | /* File: x86_64/op_check_cast.S */ |
| 819 | /* |
| 820 | * Check to see if a cast from one class to another is allowed. |
| 821 | */ |
| 822 | /* check-cast vAA, class@BBBB */ |
| 823 | EXPORT_PC |
| 824 | movzwq 2(rPC), OUT_ARG0 # OUT_ARG0 <- BBBB |
| 825 | leaq VREG_ADDRESS(rINSTq), OUT_ARG1 |
| 826 | movq OFF_FP_METHOD(rFP), OUT_ARG2 |
| 827 | movq rSELF, OUT_ARG3 |
| 828 | call SYMBOL(MterpCheckCast) # (index, &obj, method, self) |
| 829 | testb %al, %al |
| 830 | jnz MterpPossibleException |
| 831 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 832 | |
| 833 | /* ------------------------------ */ |
| 834 | .balign 128 |
| 835 | .L_op_instance_of: /* 0x20 */ |
| 836 | /* File: x86_64/op_instance_of.S */ |
| 837 | /* |
| 838 | * Check to see if an object reference is an instance of a class. |
| 839 | * |
| 840 | * Most common situation is a non-null object, being compared against |
| 841 | * an already-resolved class. |
| 842 | */ |
| 843 | /* instance-of vA, vB, class@CCCC */ |
| 844 | EXPORT_PC |
| 845 | movzwl 2(rPC), OUT_32_ARG0 # OUT_32_ARG0 <- CCCC |
| 846 | movl rINST, %eax # eax <- BA |
| 847 | sarl $4, %eax # eax <- B |
| 848 | leaq VREG_ADDRESS(%rax), OUT_ARG1 # Get object address |
| 849 | movq OFF_FP_METHOD(rFP), OUT_ARG2 |
| 850 | movq rSELF, OUT_ARG3 |
| 851 | call SYMBOL(MterpInstanceOf) # (index, &obj, method, self) |
| 852 | movsbl %al, %eax |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 853 | movq rSELF, %rcx |
| 854 | cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 855 | jnz MterpException |
| 856 | andb $0xf, rINSTbl # rINSTbl <- A |
| 857 | SET_VREG %eax, rINSTq |
| 858 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 859 | |
| 860 | /* ------------------------------ */ |
| 861 | .balign 128 |
| 862 | .L_op_array_length: /* 0x21 */ |
| 863 | /* File: x86_64/op_array_length.S */ |
| 864 | /* |
| 865 | * Return the length of an array. |
| 866 | */ |
| 867 | movl rINST, %eax # eax <- BA |
| 868 | sarl $4, rINST # rINST <- B |
| 869 | GET_VREG %ecx, rINSTq # ecx <- vB (object ref) |
| 870 | testl %ecx, %ecx # is null? |
| 871 | je common_errNullObject |
| 872 | andb $0xf, %al # eax <- A |
| 873 | movl MIRROR_ARRAY_LENGTH_OFFSET(%rcx), rINST |
| 874 | SET_VREG rINST, %rax |
| 875 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 876 | |
| 877 | /* ------------------------------ */ |
| 878 | .balign 128 |
| 879 | .L_op_new_instance: /* 0x22 */ |
| 880 | /* File: x86_64/op_new_instance.S */ |
| 881 | /* |
| 882 | * Create a new instance of a class. |
| 883 | */ |
| 884 | /* new-instance vAA, class@BBBB */ |
| 885 | EXPORT_PC |
| 886 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 |
| 887 | movq rSELF, OUT_ARG1 |
| 888 | REFRESH_INST 34 |
| 889 | movq rINSTq, OUT_ARG2 |
| 890 | call SYMBOL(MterpNewInstance) |
| 891 | testb %al, %al # 0 means an exception is thrown |
| 892 | jz MterpPossibleException |
| 893 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 894 | |
| 895 | /* ------------------------------ */ |
| 896 | .balign 128 |
| 897 | .L_op_new_array: /* 0x23 */ |
| 898 | /* File: x86_64/op_new_array.S */ |
| 899 | /* |
| 900 | * Allocate an array of objects, specified with the array class |
| 901 | * and a count. |
| 902 | * |
| 903 | * The verifier guarantees that this is an array class, so we don't |
| 904 | * check for it here. |
| 905 | */ |
| 906 | /* new-array vA, vB, class@CCCC */ |
| 907 | EXPORT_PC |
| 908 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 |
| 909 | movq rPC, OUT_ARG1 |
| 910 | REFRESH_INST 35 |
| 911 | movq rINSTq, OUT_ARG2 |
| 912 | movq rSELF, OUT_ARG3 |
| 913 | call SYMBOL(MterpNewArray) |
| 914 | testb %al, %al # 0 means an exception is thrown |
| 915 | jz MterpPossibleException |
| 916 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 917 | |
| 918 | /* ------------------------------ */ |
| 919 | .balign 128 |
| 920 | .L_op_filled_new_array: /* 0x24 */ |
| 921 | /* File: x86_64/op_filled_new_array.S */ |
| 922 | /* |
| 923 | * Create a new array with elements filled from registers. |
| 924 | * |
| 925 | * for: filled-new-array, filled-new-array/range |
| 926 | */ |
| 927 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 928 | /* op {vCCCC..v(CCCC+AA-1)}, type@BBBB */ |
| 929 | .extern MterpFilledNewArray |
| 930 | EXPORT_PC |
| 931 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 |
| 932 | movq rPC, OUT_ARG1 |
| 933 | movq rSELF, OUT_ARG2 |
| 934 | call SYMBOL(MterpFilledNewArray) |
| 935 | testb %al, %al # 0 means an exception is thrown |
| 936 | jz MterpPossibleException |
| 937 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 |
| 938 | |
| 939 | /* ------------------------------ */ |
| 940 | .balign 128 |
| 941 | .L_op_filled_new_array_range: /* 0x25 */ |
| 942 | /* File: x86_64/op_filled_new_array_range.S */ |
| 943 | /* File: x86_64/op_filled_new_array.S */ |
| 944 | /* |
| 945 | * Create a new array with elements filled from registers. |
| 946 | * |
| 947 | * for: filled-new-array, filled-new-array/range |
| 948 | */ |
| 949 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 950 | /* op {vCCCC..v(CCCC+AA-1)}, type@BBBB */ |
| 951 | .extern MterpFilledNewArrayRange |
| 952 | EXPORT_PC |
| 953 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 |
| 954 | movq rPC, OUT_ARG1 |
| 955 | movq rSELF, OUT_ARG2 |
| 956 | call SYMBOL(MterpFilledNewArrayRange) |
| 957 | testb %al, %al # 0 means an exception is thrown |
| 958 | jz MterpPossibleException |
| 959 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 |
| 960 | |
| 961 | |
| 962 | /* ------------------------------ */ |
| 963 | .balign 128 |
| 964 | .L_op_fill_array_data: /* 0x26 */ |
| 965 | /* File: x86_64/op_fill_array_data.S */ |
| 966 | /* fill-array-data vAA, +BBBBBBBB */ |
| 967 | EXPORT_PC |
| 968 | movl 2(rPC), %ecx # ecx <- BBBBbbbb |
| 969 | leaq (rPC,%rcx,2), OUT_ARG1 # OUT_ARG1 <- PC + BBBBbbbb*2 |
| 970 | GET_VREG OUT_32_ARG0, rINSTq # OUT_ARG0 <- vAA (array object) |
| 971 | call SYMBOL(MterpFillArrayData) # (obj, payload) |
| 972 | testb %al, %al # 0 means an exception is thrown |
| 973 | jz MterpPossibleException |
| 974 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 |
| 975 | |
| 976 | /* ------------------------------ */ |
| 977 | .balign 128 |
| 978 | .L_op_throw: /* 0x27 */ |
| 979 | /* File: x86_64/op_throw.S */ |
| 980 | /* |
| 981 | * Throw an exception object in the current thread. |
| 982 | */ |
| 983 | /* throw vAA */ |
| 984 | EXPORT_PC |
| 985 | GET_VREG %eax, rINSTq # eax<- vAA (exception object) |
| 986 | testb %al, %al |
| 987 | jz common_errNullObject |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 988 | movq rSELF, %rcx |
| 989 | movq %rax, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 990 | jmp MterpException |
| 991 | |
| 992 | /* ------------------------------ */ |
| 993 | .balign 128 |
| 994 | .L_op_goto: /* 0x28 */ |
| 995 | /* File: x86_64/op_goto.S */ |
| 996 | /* |
| 997 | * Unconditional branch, 8-bit offset. |
| 998 | * |
| 999 | * The branch distance is a signed code-unit offset, which we need to |
| 1000 | * double to get a byte offset. |
| 1001 | */ |
| 1002 | /* goto +AA */ |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1003 | movsbq rINSTbl, rINSTq # rINSTq <- ssssssAA |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1004 | testq rINSTq, rINSTq |
| 1005 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1006 | |
| 1007 | /* ------------------------------ */ |
| 1008 | .balign 128 |
| 1009 | .L_op_goto_16: /* 0x29 */ |
| 1010 | /* File: x86_64/op_goto_16.S */ |
| 1011 | /* |
| 1012 | * Unconditional branch, 16-bit offset. |
| 1013 | * |
| 1014 | * The branch distance is a signed code-unit offset, which we need to |
| 1015 | * double to get a byte offset. |
| 1016 | */ |
| 1017 | /* goto/16 +AAAA */ |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1018 | movswq 2(rPC), rINSTq # rINSTq <- ssssAAAA |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1019 | testq rINSTq, rINSTq |
| 1020 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1021 | |
| 1022 | /* ------------------------------ */ |
| 1023 | .balign 128 |
| 1024 | .L_op_goto_32: /* 0x2a */ |
| 1025 | /* File: x86_64/op_goto_32.S */ |
| 1026 | /* |
| 1027 | * Unconditional branch, 32-bit offset. |
| 1028 | * |
| 1029 | * The branch distance is a signed code-unit offset, which we need to |
| 1030 | * double to get a byte offset. |
| 1031 | * |
| 1032 | * Because we need the SF bit set, we'll use an adds |
| 1033 | * to convert from Dalvik offset to byte offset. |
| 1034 | */ |
| 1035 | /* goto/32 +AAAAAAAA */ |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1036 | movslq 2(rPC), rINSTq # rINSTq <- AAAAAAAA |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1037 | testq rINSTq, rINSTq |
| 1038 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1039 | |
| 1040 | /* ------------------------------ */ |
| 1041 | .balign 128 |
| 1042 | .L_op_packed_switch: /* 0x2b */ |
| 1043 | /* File: x86_64/op_packed_switch.S */ |
| 1044 | /* |
| 1045 | * Handle a packed-switch or sparse-switch instruction. In both cases |
| 1046 | * we decode it and hand it off to a helper function. |
| 1047 | * |
| 1048 | * We don't really expect backward branches in a switch statement, but |
| 1049 | * they're perfectly legal, so we check for them here. |
| 1050 | * |
| 1051 | * for: packed-switch, sparse-switch |
| 1052 | */ |
| 1053 | /* op vAA, +BBBB */ |
| 1054 | movslq 2(rPC), OUT_ARG0 # rcx <- BBBBbbbb |
| 1055 | leaq (rPC,OUT_ARG0,2), OUT_ARG0 # rcx <- PC + BBBBbbbb*2 |
| 1056 | GET_VREG OUT_32_ARG1, rINSTq # eax <- vAA |
| 1057 | call SYMBOL(MterpDoPackedSwitch) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1058 | testl %eax, %eax |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1059 | movslq %eax, rINSTq |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1060 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1061 | |
| 1062 | /* ------------------------------ */ |
| 1063 | .balign 128 |
| 1064 | .L_op_sparse_switch: /* 0x2c */ |
| 1065 | /* File: x86_64/op_sparse_switch.S */ |
| 1066 | /* File: x86_64/op_packed_switch.S */ |
| 1067 | /* |
| 1068 | * Handle a packed-switch or sparse-switch instruction. In both cases |
| 1069 | * we decode it and hand it off to a helper function. |
| 1070 | * |
| 1071 | * We don't really expect backward branches in a switch statement, but |
| 1072 | * they're perfectly legal, so we check for them here. |
| 1073 | * |
| 1074 | * for: packed-switch, sparse-switch |
| 1075 | */ |
| 1076 | /* op vAA, +BBBB */ |
| 1077 | movslq 2(rPC), OUT_ARG0 # rcx <- BBBBbbbb |
| 1078 | leaq (rPC,OUT_ARG0,2), OUT_ARG0 # rcx <- PC + BBBBbbbb*2 |
| 1079 | GET_VREG OUT_32_ARG1, rINSTq # eax <- vAA |
| 1080 | call SYMBOL(MterpDoSparseSwitch) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1081 | testl %eax, %eax |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1082 | movslq %eax, rINSTq |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1083 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1084 | |
| 1085 | |
| 1086 | /* ------------------------------ */ |
| 1087 | .balign 128 |
| 1088 | .L_op_cmpl_float: /* 0x2d */ |
| 1089 | /* File: x86_64/op_cmpl_float.S */ |
| 1090 | /* File: x86_64/fpcmp.S */ |
| 1091 | /* |
| 1092 | * Compare two floating-point values. Puts 0, 1, or -1 into the |
| 1093 | * destination register based on the results of the comparison. |
| 1094 | * |
| 1095 | * int compare(x, y) { |
| 1096 | * if (x == y) { |
| 1097 | * return 0; |
| 1098 | * } else if (x < y) { |
| 1099 | * return -1; |
| 1100 | * } else if (x > y) { |
| 1101 | * return 1; |
| 1102 | * } else { |
| 1103 | * return nanval ? 1 : -1; |
| 1104 | * } |
| 1105 | * } |
| 1106 | */ |
| 1107 | /* op vAA, vBB, vCC */ |
| 1108 | movzbq 3(rPC), %rcx # ecx<- CC |
| 1109 | movzbq 2(rPC), %rax # eax<- BB |
| 1110 | movss VREG_ADDRESS(%rax), %xmm0 |
| 1111 | xor %eax, %eax |
| 1112 | ucomiss VREG_ADDRESS(%rcx), %xmm0 |
| 1113 | jp .Lop_cmpl_float_nan_is_neg |
| 1114 | je .Lop_cmpl_float_finish |
| 1115 | jb .Lop_cmpl_float_less |
| 1116 | .Lop_cmpl_float_nan_is_pos: |
| 1117 | addb $1, %al |
| 1118 | jmp .Lop_cmpl_float_finish |
| 1119 | .Lop_cmpl_float_nan_is_neg: |
| 1120 | .Lop_cmpl_float_less: |
| 1121 | movl $-1, %eax |
| 1122 | .Lop_cmpl_float_finish: |
| 1123 | SET_VREG %eax, rINSTq |
| 1124 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1125 | |
| 1126 | |
| 1127 | /* ------------------------------ */ |
| 1128 | .balign 128 |
| 1129 | .L_op_cmpg_float: /* 0x2e */ |
| 1130 | /* File: x86_64/op_cmpg_float.S */ |
| 1131 | /* File: x86_64/fpcmp.S */ |
| 1132 | /* |
| 1133 | * Compare two floating-point values. Puts 0, 1, or -1 into the |
| 1134 | * destination register based on the results of the comparison. |
| 1135 | * |
| 1136 | * int compare(x, y) { |
| 1137 | * if (x == y) { |
| 1138 | * return 0; |
| 1139 | * } else if (x < y) { |
| 1140 | * return -1; |
| 1141 | * } else if (x > y) { |
| 1142 | * return 1; |
| 1143 | * } else { |
| 1144 | * return nanval ? 1 : -1; |
| 1145 | * } |
| 1146 | * } |
| 1147 | */ |
| 1148 | /* op vAA, vBB, vCC */ |
| 1149 | movzbq 3(rPC), %rcx # ecx<- CC |
| 1150 | movzbq 2(rPC), %rax # eax<- BB |
| 1151 | movss VREG_ADDRESS(%rax), %xmm0 |
| 1152 | xor %eax, %eax |
| 1153 | ucomiss VREG_ADDRESS(%rcx), %xmm0 |
| 1154 | jp .Lop_cmpg_float_nan_is_pos |
| 1155 | je .Lop_cmpg_float_finish |
| 1156 | jb .Lop_cmpg_float_less |
| 1157 | .Lop_cmpg_float_nan_is_pos: |
| 1158 | addb $1, %al |
| 1159 | jmp .Lop_cmpg_float_finish |
| 1160 | .Lop_cmpg_float_nan_is_neg: |
| 1161 | .Lop_cmpg_float_less: |
| 1162 | movl $-1, %eax |
| 1163 | .Lop_cmpg_float_finish: |
| 1164 | SET_VREG %eax, rINSTq |
| 1165 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1166 | |
| 1167 | |
| 1168 | /* ------------------------------ */ |
| 1169 | .balign 128 |
| 1170 | .L_op_cmpl_double: /* 0x2f */ |
| 1171 | /* File: x86_64/op_cmpl_double.S */ |
| 1172 | /* File: x86_64/fpcmp.S */ |
| 1173 | /* |
| 1174 | * Compare two floating-point values. Puts 0, 1, or -1 into the |
| 1175 | * destination register based on the results of the comparison. |
| 1176 | * |
| 1177 | * int compare(x, y) { |
| 1178 | * if (x == y) { |
| 1179 | * return 0; |
| 1180 | * } else if (x < y) { |
| 1181 | * return -1; |
| 1182 | * } else if (x > y) { |
| 1183 | * return 1; |
| 1184 | * } else { |
| 1185 | * return nanval ? 1 : -1; |
| 1186 | * } |
| 1187 | * } |
| 1188 | */ |
| 1189 | /* op vAA, vBB, vCC */ |
| 1190 | movzbq 3(rPC), %rcx # ecx<- CC |
| 1191 | movzbq 2(rPC), %rax # eax<- BB |
| 1192 | movsd VREG_ADDRESS(%rax), %xmm0 |
| 1193 | xor %eax, %eax |
| 1194 | ucomisd VREG_ADDRESS(%rcx), %xmm0 |
| 1195 | jp .Lop_cmpl_double_nan_is_neg |
| 1196 | je .Lop_cmpl_double_finish |
| 1197 | jb .Lop_cmpl_double_less |
| 1198 | .Lop_cmpl_double_nan_is_pos: |
| 1199 | addb $1, %al |
| 1200 | jmp .Lop_cmpl_double_finish |
| 1201 | .Lop_cmpl_double_nan_is_neg: |
| 1202 | .Lop_cmpl_double_less: |
| 1203 | movl $-1, %eax |
| 1204 | .Lop_cmpl_double_finish: |
| 1205 | SET_VREG %eax, rINSTq |
| 1206 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1207 | |
| 1208 | |
| 1209 | /* ------------------------------ */ |
| 1210 | .balign 128 |
| 1211 | .L_op_cmpg_double: /* 0x30 */ |
| 1212 | /* File: x86_64/op_cmpg_double.S */ |
| 1213 | /* File: x86_64/fpcmp.S */ |
| 1214 | /* |
| 1215 | * Compare two floating-point values. Puts 0, 1, or -1 into the |
| 1216 | * destination register based on the results of the comparison. |
| 1217 | * |
| 1218 | * int compare(x, y) { |
| 1219 | * if (x == y) { |
| 1220 | * return 0; |
| 1221 | * } else if (x < y) { |
| 1222 | * return -1; |
| 1223 | * } else if (x > y) { |
| 1224 | * return 1; |
| 1225 | * } else { |
| 1226 | * return nanval ? 1 : -1; |
| 1227 | * } |
| 1228 | * } |
| 1229 | */ |
| 1230 | /* op vAA, vBB, vCC */ |
| 1231 | movzbq 3(rPC), %rcx # ecx<- CC |
| 1232 | movzbq 2(rPC), %rax # eax<- BB |
| 1233 | movsd VREG_ADDRESS(%rax), %xmm0 |
| 1234 | xor %eax, %eax |
| 1235 | ucomisd VREG_ADDRESS(%rcx), %xmm0 |
| 1236 | jp .Lop_cmpg_double_nan_is_pos |
| 1237 | je .Lop_cmpg_double_finish |
| 1238 | jb .Lop_cmpg_double_less |
| 1239 | .Lop_cmpg_double_nan_is_pos: |
| 1240 | addb $1, %al |
| 1241 | jmp .Lop_cmpg_double_finish |
| 1242 | .Lop_cmpg_double_nan_is_neg: |
| 1243 | .Lop_cmpg_double_less: |
| 1244 | movl $-1, %eax |
| 1245 | .Lop_cmpg_double_finish: |
| 1246 | SET_VREG %eax, rINSTq |
| 1247 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1248 | |
| 1249 | |
| 1250 | /* ------------------------------ */ |
| 1251 | .balign 128 |
| 1252 | .L_op_cmp_long: /* 0x31 */ |
| 1253 | /* File: x86_64/op_cmp_long.S */ |
| 1254 | /* |
| 1255 | * Compare two 64-bit values. Puts 0, 1, or -1 into the destination |
| 1256 | * register based on the results of the comparison. |
| 1257 | */ |
| 1258 | /* cmp-long vAA, vBB, vCC */ |
| 1259 | movzbq 2(rPC), %rdx # edx <- BB |
| 1260 | movzbq 3(rPC), %rcx # ecx <- CC |
| 1261 | GET_WIDE_VREG %rdx, %rdx # rdx <- v[BB] |
| 1262 | xorl %eax, %eax |
| 1263 | xorl %edi, %edi |
| 1264 | addb $1, %al |
| 1265 | movl $-1, %esi |
| 1266 | cmpq VREG_ADDRESS(%rcx), %rdx |
| 1267 | cmovl %esi, %edi |
| 1268 | cmovg %eax, %edi |
| 1269 | SET_VREG %edi, rINSTq |
| 1270 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1271 | |
| 1272 | /* ------------------------------ */ |
| 1273 | .balign 128 |
| 1274 | .L_op_if_eq: /* 0x32 */ |
| 1275 | /* File: x86_64/op_if_eq.S */ |
| 1276 | /* File: x86_64/bincmp.S */ |
| 1277 | /* |
| 1278 | * Generic two-operand compare-and-branch operation. Provide a "revcmp" |
| 1279 | * fragment that specifies the *reverse* comparison to perform, e.g. |
| 1280 | * for "if-le" you would use "gt". |
| 1281 | * |
| 1282 | * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le |
| 1283 | */ |
| 1284 | /* if-cmp vA, vB, +CCCC */ |
| 1285 | movl rINST, %ecx # rcx <- A+ |
| 1286 | sarl $4, rINST # rINST <- B |
| 1287 | andb $0xf, %cl # rcx <- A |
| 1288 | GET_VREG %eax, %rcx # eax <- vA |
| 1289 | cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1290 | jne 1f |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1291 | movswq 2(rPC), rINSTq # Get signed branch offset |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1292 | testq rINSTq, rINSTq |
| 1293 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1294 | 1: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1295 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 1296 | je .L_check_not_taken_osr |
| 1297 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1298 | |
| 1299 | |
| 1300 | /* ------------------------------ */ |
| 1301 | .balign 128 |
| 1302 | .L_op_if_ne: /* 0x33 */ |
| 1303 | /* File: x86_64/op_if_ne.S */ |
| 1304 | /* File: x86_64/bincmp.S */ |
| 1305 | /* |
| 1306 | * Generic two-operand compare-and-branch operation. Provide a "revcmp" |
| 1307 | * fragment that specifies the *reverse* comparison to perform, e.g. |
| 1308 | * for "if-le" you would use "gt". |
| 1309 | * |
| 1310 | * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le |
| 1311 | */ |
| 1312 | /* if-cmp vA, vB, +CCCC */ |
| 1313 | movl rINST, %ecx # rcx <- A+ |
| 1314 | sarl $4, rINST # rINST <- B |
| 1315 | andb $0xf, %cl # rcx <- A |
| 1316 | GET_VREG %eax, %rcx # eax <- vA |
| 1317 | cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1318 | je 1f |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1319 | movswq 2(rPC), rINSTq # Get signed branch offset |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1320 | testq rINSTq, rINSTq |
| 1321 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1322 | 1: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1323 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 1324 | je .L_check_not_taken_osr |
| 1325 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1326 | |
| 1327 | |
| 1328 | /* ------------------------------ */ |
| 1329 | .balign 128 |
| 1330 | .L_op_if_lt: /* 0x34 */ |
| 1331 | /* File: x86_64/op_if_lt.S */ |
| 1332 | /* File: x86_64/bincmp.S */ |
| 1333 | /* |
| 1334 | * Generic two-operand compare-and-branch operation. Provide a "revcmp" |
| 1335 | * fragment that specifies the *reverse* comparison to perform, e.g. |
| 1336 | * for "if-le" you would use "gt". |
| 1337 | * |
| 1338 | * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le |
| 1339 | */ |
| 1340 | /* if-cmp vA, vB, +CCCC */ |
| 1341 | movl rINST, %ecx # rcx <- A+ |
| 1342 | sarl $4, rINST # rINST <- B |
| 1343 | andb $0xf, %cl # rcx <- A |
| 1344 | GET_VREG %eax, %rcx # eax <- vA |
| 1345 | cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1346 | jge 1f |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1347 | movswq 2(rPC), rINSTq # Get signed branch offset |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1348 | testq rINSTq, rINSTq |
| 1349 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1350 | 1: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1351 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 1352 | je .L_check_not_taken_osr |
| 1353 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1354 | |
| 1355 | |
| 1356 | /* ------------------------------ */ |
| 1357 | .balign 128 |
| 1358 | .L_op_if_ge: /* 0x35 */ |
| 1359 | /* File: x86_64/op_if_ge.S */ |
| 1360 | /* File: x86_64/bincmp.S */ |
| 1361 | /* |
| 1362 | * Generic two-operand compare-and-branch operation. Provide a "revcmp" |
| 1363 | * fragment that specifies the *reverse* comparison to perform, e.g. |
| 1364 | * for "if-le" you would use "gt". |
| 1365 | * |
| 1366 | * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le |
| 1367 | */ |
| 1368 | /* if-cmp vA, vB, +CCCC */ |
| 1369 | movl rINST, %ecx # rcx <- A+ |
| 1370 | sarl $4, rINST # rINST <- B |
| 1371 | andb $0xf, %cl # rcx <- A |
| 1372 | GET_VREG %eax, %rcx # eax <- vA |
| 1373 | cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1374 | jl 1f |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1375 | movswq 2(rPC), rINSTq # Get signed branch offset |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1376 | testq rINSTq, rINSTq |
| 1377 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1378 | 1: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1379 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 1380 | je .L_check_not_taken_osr |
| 1381 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1382 | |
| 1383 | |
| 1384 | /* ------------------------------ */ |
| 1385 | .balign 128 |
| 1386 | .L_op_if_gt: /* 0x36 */ |
| 1387 | /* File: x86_64/op_if_gt.S */ |
| 1388 | /* File: x86_64/bincmp.S */ |
| 1389 | /* |
| 1390 | * Generic two-operand compare-and-branch operation. Provide a "revcmp" |
| 1391 | * fragment that specifies the *reverse* comparison to perform, e.g. |
| 1392 | * for "if-le" you would use "gt". |
| 1393 | * |
| 1394 | * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le |
| 1395 | */ |
| 1396 | /* if-cmp vA, vB, +CCCC */ |
| 1397 | movl rINST, %ecx # rcx <- A+ |
| 1398 | sarl $4, rINST # rINST <- B |
| 1399 | andb $0xf, %cl # rcx <- A |
| 1400 | GET_VREG %eax, %rcx # eax <- vA |
| 1401 | cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1402 | jle 1f |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1403 | movswq 2(rPC), rINSTq # Get signed branch offset |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1404 | testq rINSTq, rINSTq |
| 1405 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1406 | 1: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1407 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 1408 | je .L_check_not_taken_osr |
| 1409 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1410 | |
| 1411 | |
| 1412 | /* ------------------------------ */ |
| 1413 | .balign 128 |
| 1414 | .L_op_if_le: /* 0x37 */ |
| 1415 | /* File: x86_64/op_if_le.S */ |
| 1416 | /* File: x86_64/bincmp.S */ |
| 1417 | /* |
| 1418 | * Generic two-operand compare-and-branch operation. Provide a "revcmp" |
| 1419 | * fragment that specifies the *reverse* comparison to perform, e.g. |
| 1420 | * for "if-le" you would use "gt". |
| 1421 | * |
| 1422 | * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le |
| 1423 | */ |
| 1424 | /* if-cmp vA, vB, +CCCC */ |
| 1425 | movl rINST, %ecx # rcx <- A+ |
| 1426 | sarl $4, rINST # rINST <- B |
| 1427 | andb $0xf, %cl # rcx <- A |
| 1428 | GET_VREG %eax, %rcx # eax <- vA |
| 1429 | cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1430 | jg 1f |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1431 | movswq 2(rPC), rINSTq # Get signed branch offset |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1432 | testq rINSTq, rINSTq |
| 1433 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1434 | 1: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1435 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 1436 | je .L_check_not_taken_osr |
| 1437 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1438 | |
| 1439 | |
| 1440 | /* ------------------------------ */ |
| 1441 | .balign 128 |
| 1442 | .L_op_if_eqz: /* 0x38 */ |
| 1443 | /* File: x86_64/op_if_eqz.S */ |
| 1444 | /* File: x86_64/zcmp.S */ |
| 1445 | /* |
| 1446 | * Generic one-operand compare-and-branch operation. Provide a "revcmp" |
| 1447 | * fragment that specifies the *reverse* comparison to perform, e.g. |
| 1448 | * for "if-le" you would use "gt". |
| 1449 | * |
| 1450 | * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez |
| 1451 | */ |
| 1452 | /* if-cmp vAA, +BBBB */ |
| 1453 | cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1454 | jne 1f |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1455 | movswq 2(rPC), rINSTq # fetch signed displacement |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1456 | testq rINSTq, rINSTq |
| 1457 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1458 | 1: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1459 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 1460 | je .L_check_not_taken_osr |
| 1461 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1462 | |
| 1463 | |
| 1464 | /* ------------------------------ */ |
| 1465 | .balign 128 |
| 1466 | .L_op_if_nez: /* 0x39 */ |
| 1467 | /* File: x86_64/op_if_nez.S */ |
| 1468 | /* File: x86_64/zcmp.S */ |
| 1469 | /* |
| 1470 | * Generic one-operand compare-and-branch operation. Provide a "revcmp" |
| 1471 | * fragment that specifies the *reverse* comparison to perform, e.g. |
| 1472 | * for "if-le" you would use "gt". |
| 1473 | * |
| 1474 | * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez |
| 1475 | */ |
| 1476 | /* if-cmp vAA, +BBBB */ |
| 1477 | cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1478 | je 1f |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1479 | movswq 2(rPC), rINSTq # fetch signed displacement |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1480 | testq rINSTq, rINSTq |
| 1481 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1482 | 1: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1483 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 1484 | je .L_check_not_taken_osr |
| 1485 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1486 | |
| 1487 | |
| 1488 | /* ------------------------------ */ |
| 1489 | .balign 128 |
| 1490 | .L_op_if_ltz: /* 0x3a */ |
| 1491 | /* File: x86_64/op_if_ltz.S */ |
| 1492 | /* File: x86_64/zcmp.S */ |
| 1493 | /* |
| 1494 | * Generic one-operand compare-and-branch operation. Provide a "revcmp" |
| 1495 | * fragment that specifies the *reverse* comparison to perform, e.g. |
| 1496 | * for "if-le" you would use "gt". |
| 1497 | * |
| 1498 | * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez |
| 1499 | */ |
| 1500 | /* if-cmp vAA, +BBBB */ |
| 1501 | cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1502 | jge 1f |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1503 | movswq 2(rPC), rINSTq # fetch signed displacement |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1504 | testq rINSTq, rINSTq |
| 1505 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1506 | 1: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1507 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 1508 | je .L_check_not_taken_osr |
| 1509 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1510 | |
| 1511 | |
| 1512 | /* ------------------------------ */ |
| 1513 | .balign 128 |
| 1514 | .L_op_if_gez: /* 0x3b */ |
| 1515 | /* File: x86_64/op_if_gez.S */ |
| 1516 | /* File: x86_64/zcmp.S */ |
| 1517 | /* |
| 1518 | * Generic one-operand compare-and-branch operation. Provide a "revcmp" |
| 1519 | * fragment that specifies the *reverse* comparison to perform, e.g. |
| 1520 | * for "if-le" you would use "gt". |
| 1521 | * |
| 1522 | * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez |
| 1523 | */ |
| 1524 | /* if-cmp vAA, +BBBB */ |
| 1525 | cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1526 | jl 1f |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1527 | movswq 2(rPC), rINSTq # fetch signed displacement |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1528 | testq rINSTq, rINSTq |
| 1529 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1530 | 1: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1531 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 1532 | je .L_check_not_taken_osr |
| 1533 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1534 | |
| 1535 | |
| 1536 | /* ------------------------------ */ |
| 1537 | .balign 128 |
| 1538 | .L_op_if_gtz: /* 0x3c */ |
| 1539 | /* File: x86_64/op_if_gtz.S */ |
| 1540 | /* File: x86_64/zcmp.S */ |
| 1541 | /* |
| 1542 | * Generic one-operand compare-and-branch operation. Provide a "revcmp" |
| 1543 | * fragment that specifies the *reverse* comparison to perform, e.g. |
| 1544 | * for "if-le" you would use "gt". |
| 1545 | * |
| 1546 | * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez |
| 1547 | */ |
| 1548 | /* if-cmp vAA, +BBBB */ |
| 1549 | cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1550 | jle 1f |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1551 | movswq 2(rPC), rINSTq # fetch signed displacement |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1552 | testq rINSTq, rINSTq |
| 1553 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1554 | 1: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1555 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 1556 | je .L_check_not_taken_osr |
| 1557 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1558 | |
| 1559 | |
| 1560 | /* ------------------------------ */ |
| 1561 | .balign 128 |
| 1562 | .L_op_if_lez: /* 0x3d */ |
| 1563 | /* File: x86_64/op_if_lez.S */ |
| 1564 | /* File: x86_64/zcmp.S */ |
| 1565 | /* |
| 1566 | * Generic one-operand compare-and-branch operation. Provide a "revcmp" |
| 1567 | * fragment that specifies the *reverse* comparison to perform, e.g. |
| 1568 | * for "if-le" you would use "gt". |
| 1569 | * |
| 1570 | * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez |
| 1571 | */ |
| 1572 | /* if-cmp vAA, +BBBB */ |
| 1573 | cmpl $0, VREG_ADDRESS(rINSTq) # compare (vA, 0) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1574 | jg 1f |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 1575 | movswq 2(rPC), rINSTq # fetch signed displacement |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1576 | testq rINSTq, rINSTq |
| 1577 | jmp MterpCommonTakenBranch |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1578 | 1: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1579 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 1580 | je .L_check_not_taken_osr |
| 1581 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1582 | |
| 1583 | |
| 1584 | /* ------------------------------ */ |
| 1585 | .balign 128 |
| 1586 | .L_op_unused_3e: /* 0x3e */ |
| 1587 | /* File: x86_64/op_unused_3e.S */ |
| 1588 | /* File: x86_64/unused.S */ |
| 1589 | /* |
| 1590 | * Bail to reference interpreter to throw. |
| 1591 | */ |
| 1592 | jmp MterpFallback |
| 1593 | |
| 1594 | |
| 1595 | /* ------------------------------ */ |
| 1596 | .balign 128 |
| 1597 | .L_op_unused_3f: /* 0x3f */ |
| 1598 | /* File: x86_64/op_unused_3f.S */ |
| 1599 | /* File: x86_64/unused.S */ |
| 1600 | /* |
| 1601 | * Bail to reference interpreter to throw. |
| 1602 | */ |
| 1603 | jmp MterpFallback |
| 1604 | |
| 1605 | |
| 1606 | /* ------------------------------ */ |
| 1607 | .balign 128 |
| 1608 | .L_op_unused_40: /* 0x40 */ |
| 1609 | /* File: x86_64/op_unused_40.S */ |
| 1610 | /* File: x86_64/unused.S */ |
| 1611 | /* |
| 1612 | * Bail to reference interpreter to throw. |
| 1613 | */ |
| 1614 | jmp MterpFallback |
| 1615 | |
| 1616 | |
| 1617 | /* ------------------------------ */ |
| 1618 | .balign 128 |
| 1619 | .L_op_unused_41: /* 0x41 */ |
| 1620 | /* File: x86_64/op_unused_41.S */ |
| 1621 | /* File: x86_64/unused.S */ |
| 1622 | /* |
| 1623 | * Bail to reference interpreter to throw. |
| 1624 | */ |
| 1625 | jmp MterpFallback |
| 1626 | |
| 1627 | |
| 1628 | /* ------------------------------ */ |
| 1629 | .balign 128 |
| 1630 | .L_op_unused_42: /* 0x42 */ |
| 1631 | /* File: x86_64/op_unused_42.S */ |
| 1632 | /* File: x86_64/unused.S */ |
| 1633 | /* |
| 1634 | * Bail to reference interpreter to throw. |
| 1635 | */ |
| 1636 | jmp MterpFallback |
| 1637 | |
| 1638 | |
| 1639 | /* ------------------------------ */ |
| 1640 | .balign 128 |
| 1641 | .L_op_unused_43: /* 0x43 */ |
| 1642 | /* File: x86_64/op_unused_43.S */ |
| 1643 | /* File: x86_64/unused.S */ |
| 1644 | /* |
| 1645 | * Bail to reference interpreter to throw. |
| 1646 | */ |
| 1647 | jmp MterpFallback |
| 1648 | |
| 1649 | |
| 1650 | /* ------------------------------ */ |
| 1651 | .balign 128 |
| 1652 | .L_op_aget: /* 0x44 */ |
| 1653 | /* File: x86_64/op_aget.S */ |
| 1654 | /* |
| 1655 | * Array get, 32 bits or less. vAA <- vBB[vCC]. |
| 1656 | * |
| 1657 | * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide |
| 1658 | * |
| 1659 | */ |
| 1660 | /* op vAA, vBB, vCC */ |
| 1661 | movzbq 2(rPC), %rax # eax <- BB |
| 1662 | movzbq 3(rPC), %rcx # ecx <- CC |
| 1663 | GET_VREG %eax, %rax # eax <- vBB (array object) |
| 1664 | GET_VREG %ecx, %rcx # ecx <- vCC (requested index) |
| 1665 | testl %eax, %eax # null array object? |
| 1666 | je common_errNullObject # bail if so |
| 1667 | cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx |
| 1668 | jae common_errArrayIndex # index >= length, bail. |
| 1669 | .if 0 |
| 1670 | movq MIRROR_INT_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax |
| 1671 | SET_WIDE_VREG %rax, rINSTq |
| 1672 | .else |
| 1673 | movl MIRROR_INT_ARRAY_DATA_OFFSET(%rax,%rcx,4), %eax |
| 1674 | SET_VREG %eax, rINSTq |
| 1675 | .endif |
| 1676 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1677 | |
| 1678 | /* ------------------------------ */ |
| 1679 | .balign 128 |
| 1680 | .L_op_aget_wide: /* 0x45 */ |
| 1681 | /* File: x86_64/op_aget_wide.S */ |
| 1682 | /* File: x86_64/op_aget.S */ |
| 1683 | /* |
| 1684 | * Array get, 32 bits or less. vAA <- vBB[vCC]. |
| 1685 | * |
| 1686 | * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide |
| 1687 | * |
| 1688 | */ |
| 1689 | /* op vAA, vBB, vCC */ |
| 1690 | movzbq 2(rPC), %rax # eax <- BB |
| 1691 | movzbq 3(rPC), %rcx # ecx <- CC |
| 1692 | GET_VREG %eax, %rax # eax <- vBB (array object) |
| 1693 | GET_VREG %ecx, %rcx # ecx <- vCC (requested index) |
| 1694 | testl %eax, %eax # null array object? |
| 1695 | je common_errNullObject # bail if so |
| 1696 | cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx |
| 1697 | jae common_errArrayIndex # index >= length, bail. |
| 1698 | .if 1 |
| 1699 | movq MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax |
| 1700 | SET_WIDE_VREG %rax, rINSTq |
| 1701 | .else |
| 1702 | movq MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8), %eax |
| 1703 | SET_VREG %eax, rINSTq |
| 1704 | .endif |
| 1705 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1706 | |
| 1707 | |
| 1708 | /* ------------------------------ */ |
| 1709 | .balign 128 |
| 1710 | .L_op_aget_object: /* 0x46 */ |
| 1711 | /* File: x86_64/op_aget_object.S */ |
| 1712 | /* |
| 1713 | * Array object get. vAA <- vBB[vCC]. |
| 1714 | * |
| 1715 | * for: aget-object |
| 1716 | */ |
| 1717 | /* op vAA, vBB, vCC */ |
| 1718 | movzbq 2(rPC), %rax # rax <- BB |
| 1719 | movzbq 3(rPC), %rcx # rcx <- CC |
| 1720 | GET_VREG OUT_32_ARG0, %rax # eax <- vBB (array object) |
| 1721 | GET_VREG OUT_32_ARG1, %rcx # ecx <- vCC (requested index) |
| 1722 | EXPORT_PC |
| 1723 | call SYMBOL(artAGetObjectFromMterp) # (array, index) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 1724 | movq rSELF, %rcx |
| 1725 | cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 1726 | jnz MterpException |
| 1727 | SET_VREG_OBJECT %eax, rINSTq |
| 1728 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1729 | |
| 1730 | /* ------------------------------ */ |
| 1731 | .balign 128 |
| 1732 | .L_op_aget_boolean: /* 0x47 */ |
| 1733 | /* File: x86_64/op_aget_boolean.S */ |
| 1734 | /* File: x86_64/op_aget.S */ |
| 1735 | /* |
| 1736 | * Array get, 32 bits or less. vAA <- vBB[vCC]. |
| 1737 | * |
| 1738 | * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide |
| 1739 | * |
| 1740 | */ |
| 1741 | /* op vAA, vBB, vCC */ |
| 1742 | movzbq 2(rPC), %rax # eax <- BB |
| 1743 | movzbq 3(rPC), %rcx # ecx <- CC |
| 1744 | GET_VREG %eax, %rax # eax <- vBB (array object) |
| 1745 | GET_VREG %ecx, %rcx # ecx <- vCC (requested index) |
| 1746 | testl %eax, %eax # null array object? |
| 1747 | je common_errNullObject # bail if so |
| 1748 | cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx |
| 1749 | jae common_errArrayIndex # index >= length, bail. |
| 1750 | .if 0 |
| 1751 | movq MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax |
| 1752 | SET_WIDE_VREG %rax, rINSTq |
| 1753 | .else |
| 1754 | movzbl MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%rax,%rcx,1), %eax |
| 1755 | SET_VREG %eax, rINSTq |
| 1756 | .endif |
| 1757 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1758 | |
| 1759 | |
| 1760 | /* ------------------------------ */ |
| 1761 | .balign 128 |
| 1762 | .L_op_aget_byte: /* 0x48 */ |
| 1763 | /* File: x86_64/op_aget_byte.S */ |
| 1764 | /* File: x86_64/op_aget.S */ |
| 1765 | /* |
| 1766 | * Array get, 32 bits or less. vAA <- vBB[vCC]. |
| 1767 | * |
| 1768 | * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide |
| 1769 | * |
| 1770 | */ |
| 1771 | /* op vAA, vBB, vCC */ |
| 1772 | movzbq 2(rPC), %rax # eax <- BB |
| 1773 | movzbq 3(rPC), %rcx # ecx <- CC |
| 1774 | GET_VREG %eax, %rax # eax <- vBB (array object) |
| 1775 | GET_VREG %ecx, %rcx # ecx <- vCC (requested index) |
| 1776 | testl %eax, %eax # null array object? |
| 1777 | je common_errNullObject # bail if so |
| 1778 | cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx |
| 1779 | jae common_errArrayIndex # index >= length, bail. |
| 1780 | .if 0 |
| 1781 | movq MIRROR_BYTE_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax |
| 1782 | SET_WIDE_VREG %rax, rINSTq |
| 1783 | .else |
| 1784 | movsbl MIRROR_BYTE_ARRAY_DATA_OFFSET(%rax,%rcx,1), %eax |
| 1785 | SET_VREG %eax, rINSTq |
| 1786 | .endif |
| 1787 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1788 | |
| 1789 | |
| 1790 | /* ------------------------------ */ |
| 1791 | .balign 128 |
| 1792 | .L_op_aget_char: /* 0x49 */ |
| 1793 | /* File: x86_64/op_aget_char.S */ |
| 1794 | /* File: x86_64/op_aget.S */ |
| 1795 | /* |
| 1796 | * Array get, 32 bits or less. vAA <- vBB[vCC]. |
| 1797 | * |
| 1798 | * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide |
| 1799 | * |
| 1800 | */ |
| 1801 | /* op vAA, vBB, vCC */ |
| 1802 | movzbq 2(rPC), %rax # eax <- BB |
| 1803 | movzbq 3(rPC), %rcx # ecx <- CC |
| 1804 | GET_VREG %eax, %rax # eax <- vBB (array object) |
| 1805 | GET_VREG %ecx, %rcx # ecx <- vCC (requested index) |
| 1806 | testl %eax, %eax # null array object? |
| 1807 | je common_errNullObject # bail if so |
| 1808 | cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx |
| 1809 | jae common_errArrayIndex # index >= length, bail. |
| 1810 | .if 0 |
| 1811 | movq MIRROR_CHAR_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax |
| 1812 | SET_WIDE_VREG %rax, rINSTq |
| 1813 | .else |
| 1814 | movzwl MIRROR_CHAR_ARRAY_DATA_OFFSET(%rax,%rcx,2), %eax |
| 1815 | SET_VREG %eax, rINSTq |
| 1816 | .endif |
| 1817 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1818 | |
| 1819 | |
| 1820 | /* ------------------------------ */ |
| 1821 | .balign 128 |
| 1822 | .L_op_aget_short: /* 0x4a */ |
| 1823 | /* File: x86_64/op_aget_short.S */ |
| 1824 | /* File: x86_64/op_aget.S */ |
| 1825 | /* |
| 1826 | * Array get, 32 bits or less. vAA <- vBB[vCC]. |
| 1827 | * |
| 1828 | * for: aget, aget-boolean, aget-byte, aget-char, aget-short, aget-wide |
| 1829 | * |
| 1830 | */ |
| 1831 | /* op vAA, vBB, vCC */ |
| 1832 | movzbq 2(rPC), %rax # eax <- BB |
| 1833 | movzbq 3(rPC), %rcx # ecx <- CC |
| 1834 | GET_VREG %eax, %rax # eax <- vBB (array object) |
| 1835 | GET_VREG %ecx, %rcx # ecx <- vCC (requested index) |
| 1836 | testl %eax, %eax # null array object? |
| 1837 | je common_errNullObject # bail if so |
| 1838 | cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx |
| 1839 | jae common_errArrayIndex # index >= length, bail. |
| 1840 | .if 0 |
| 1841 | movq MIRROR_SHORT_ARRAY_DATA_OFFSET(%rax,%rcx,8), %rax |
| 1842 | SET_WIDE_VREG %rax, rINSTq |
| 1843 | .else |
| 1844 | movswl MIRROR_SHORT_ARRAY_DATA_OFFSET(%rax,%rcx,2), %eax |
| 1845 | SET_VREG %eax, rINSTq |
| 1846 | .endif |
| 1847 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1848 | |
| 1849 | |
| 1850 | /* ------------------------------ */ |
| 1851 | .balign 128 |
| 1852 | .L_op_aput: /* 0x4b */ |
| 1853 | /* File: x86_64/op_aput.S */ |
| 1854 | /* |
| 1855 | * Array put, 32 bits or less. vBB[vCC] <- vAA. |
| 1856 | * |
| 1857 | * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide |
| 1858 | * |
| 1859 | */ |
| 1860 | /* op vAA, vBB, vCC */ |
| 1861 | movzbq 2(rPC), %rax # rax <- BB |
| 1862 | movzbq 3(rPC), %rcx # rcx <- CC |
| 1863 | GET_VREG %eax, %rax # eax <- vBB (array object) |
| 1864 | GET_VREG %ecx, %rcx # ecx <- vCC (requested index) |
| 1865 | testl %eax, %eax # null array object? |
| 1866 | je common_errNullObject # bail if so |
| 1867 | cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx |
| 1868 | jae common_errArrayIndex # index >= length, bail. |
| 1869 | .if 0 |
| 1870 | GET_WIDE_VREG rINSTq, rINSTq |
| 1871 | .else |
| 1872 | GET_VREG rINST, rINSTq |
| 1873 | .endif |
| 1874 | movl rINST, MIRROR_INT_ARRAY_DATA_OFFSET(%rax,%rcx,4) |
| 1875 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1876 | |
| 1877 | /* ------------------------------ */ |
| 1878 | .balign 128 |
| 1879 | .L_op_aput_wide: /* 0x4c */ |
| 1880 | /* File: x86_64/op_aput_wide.S */ |
| 1881 | /* File: x86_64/op_aput.S */ |
| 1882 | /* |
| 1883 | * Array put, 32 bits or less. vBB[vCC] <- vAA. |
| 1884 | * |
| 1885 | * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide |
| 1886 | * |
| 1887 | */ |
| 1888 | /* op vAA, vBB, vCC */ |
| 1889 | movzbq 2(rPC), %rax # rax <- BB |
| 1890 | movzbq 3(rPC), %rcx # rcx <- CC |
| 1891 | GET_VREG %eax, %rax # eax <- vBB (array object) |
| 1892 | GET_VREG %ecx, %rcx # ecx <- vCC (requested index) |
| 1893 | testl %eax, %eax # null array object? |
| 1894 | je common_errNullObject # bail if so |
| 1895 | cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx |
| 1896 | jae common_errArrayIndex # index >= length, bail. |
| 1897 | .if 1 |
| 1898 | GET_WIDE_VREG rINSTq, rINSTq |
| 1899 | .else |
| 1900 | GET_VREG rINST, rINSTq |
| 1901 | .endif |
| 1902 | movq rINSTq, MIRROR_WIDE_ARRAY_DATA_OFFSET(%rax,%rcx,8) |
| 1903 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1904 | |
| 1905 | |
| 1906 | /* ------------------------------ */ |
| 1907 | .balign 128 |
| 1908 | .L_op_aput_object: /* 0x4d */ |
| 1909 | /* File: x86_64/op_aput_object.S */ |
| 1910 | /* |
| 1911 | * Store an object into an array. vBB[vCC] <- vAA. |
| 1912 | */ |
| 1913 | /* op vAA, vBB, vCC */ |
| 1914 | EXPORT_PC |
| 1915 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 |
| 1916 | movq rPC, OUT_ARG1 |
| 1917 | REFRESH_INST 77 |
| 1918 | movq rINSTq, OUT_ARG2 |
| 1919 | call SYMBOL(MterpAputObject) # (array, index) |
| 1920 | testb %al, %al |
| 1921 | jz MterpPossibleException |
| 1922 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1923 | |
| 1924 | /* ------------------------------ */ |
| 1925 | .balign 128 |
| 1926 | .L_op_aput_boolean: /* 0x4e */ |
| 1927 | /* File: x86_64/op_aput_boolean.S */ |
| 1928 | /* File: x86_64/op_aput.S */ |
| 1929 | /* |
| 1930 | * Array put, 32 bits or less. vBB[vCC] <- vAA. |
| 1931 | * |
| 1932 | * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide |
| 1933 | * |
| 1934 | */ |
| 1935 | /* op vAA, vBB, vCC */ |
| 1936 | movzbq 2(rPC), %rax # rax <- BB |
| 1937 | movzbq 3(rPC), %rcx # rcx <- CC |
| 1938 | GET_VREG %eax, %rax # eax <- vBB (array object) |
| 1939 | GET_VREG %ecx, %rcx # ecx <- vCC (requested index) |
| 1940 | testl %eax, %eax # null array object? |
| 1941 | je common_errNullObject # bail if so |
| 1942 | cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx |
| 1943 | jae common_errArrayIndex # index >= length, bail. |
| 1944 | .if 0 |
| 1945 | GET_WIDE_VREG rINSTq, rINSTq |
| 1946 | .else |
| 1947 | GET_VREG rINST, rINSTq |
| 1948 | .endif |
| 1949 | movb rINSTbl, MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%rax,%rcx,1) |
| 1950 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1951 | |
| 1952 | |
| 1953 | /* ------------------------------ */ |
| 1954 | .balign 128 |
| 1955 | .L_op_aput_byte: /* 0x4f */ |
| 1956 | /* File: x86_64/op_aput_byte.S */ |
| 1957 | /* File: x86_64/op_aput.S */ |
| 1958 | /* |
| 1959 | * Array put, 32 bits or less. vBB[vCC] <- vAA. |
| 1960 | * |
| 1961 | * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide |
| 1962 | * |
| 1963 | */ |
| 1964 | /* op vAA, vBB, vCC */ |
| 1965 | movzbq 2(rPC), %rax # rax <- BB |
| 1966 | movzbq 3(rPC), %rcx # rcx <- CC |
| 1967 | GET_VREG %eax, %rax # eax <- vBB (array object) |
| 1968 | GET_VREG %ecx, %rcx # ecx <- vCC (requested index) |
| 1969 | testl %eax, %eax # null array object? |
| 1970 | je common_errNullObject # bail if so |
| 1971 | cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx |
| 1972 | jae common_errArrayIndex # index >= length, bail. |
| 1973 | .if 0 |
| 1974 | GET_WIDE_VREG rINSTq, rINSTq |
| 1975 | .else |
| 1976 | GET_VREG rINST, rINSTq |
| 1977 | .endif |
| 1978 | movb rINSTbl, MIRROR_BYTE_ARRAY_DATA_OFFSET(%rax,%rcx,1) |
| 1979 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 1980 | |
| 1981 | |
| 1982 | /* ------------------------------ */ |
| 1983 | .balign 128 |
| 1984 | .L_op_aput_char: /* 0x50 */ |
| 1985 | /* File: x86_64/op_aput_char.S */ |
| 1986 | /* File: x86_64/op_aput.S */ |
| 1987 | /* |
| 1988 | * Array put, 32 bits or less. vBB[vCC] <- vAA. |
| 1989 | * |
| 1990 | * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide |
| 1991 | * |
| 1992 | */ |
| 1993 | /* op vAA, vBB, vCC */ |
| 1994 | movzbq 2(rPC), %rax # rax <- BB |
| 1995 | movzbq 3(rPC), %rcx # rcx <- CC |
| 1996 | GET_VREG %eax, %rax # eax <- vBB (array object) |
| 1997 | GET_VREG %ecx, %rcx # ecx <- vCC (requested index) |
| 1998 | testl %eax, %eax # null array object? |
| 1999 | je common_errNullObject # bail if so |
| 2000 | cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx |
| 2001 | jae common_errArrayIndex # index >= length, bail. |
| 2002 | .if 0 |
| 2003 | GET_WIDE_VREG rINSTq, rINSTq |
| 2004 | .else |
| 2005 | GET_VREG rINST, rINSTq |
| 2006 | .endif |
| 2007 | movw rINSTw, MIRROR_CHAR_ARRAY_DATA_OFFSET(%rax,%rcx,2) |
| 2008 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2009 | |
| 2010 | |
| 2011 | /* ------------------------------ */ |
| 2012 | .balign 128 |
| 2013 | .L_op_aput_short: /* 0x51 */ |
| 2014 | /* File: x86_64/op_aput_short.S */ |
| 2015 | /* File: x86_64/op_aput.S */ |
| 2016 | /* |
| 2017 | * Array put, 32 bits or less. vBB[vCC] <- vAA. |
| 2018 | * |
| 2019 | * for: aput, aput-boolean, aput-byte, aput-char, aput-short, aput-wide |
| 2020 | * |
| 2021 | */ |
| 2022 | /* op vAA, vBB, vCC */ |
| 2023 | movzbq 2(rPC), %rax # rax <- BB |
| 2024 | movzbq 3(rPC), %rcx # rcx <- CC |
| 2025 | GET_VREG %eax, %rax # eax <- vBB (array object) |
| 2026 | GET_VREG %ecx, %rcx # ecx <- vCC (requested index) |
| 2027 | testl %eax, %eax # null array object? |
| 2028 | je common_errNullObject # bail if so |
| 2029 | cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx |
| 2030 | jae common_errArrayIndex # index >= length, bail. |
| 2031 | .if 0 |
| 2032 | GET_WIDE_VREG rINSTq, rINSTq |
| 2033 | .else |
| 2034 | GET_VREG rINST, rINSTq |
| 2035 | .endif |
| 2036 | movw rINSTw, MIRROR_SHORT_ARRAY_DATA_OFFSET(%rax,%rcx,2) |
| 2037 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2038 | |
| 2039 | |
| 2040 | /* ------------------------------ */ |
| 2041 | .balign 128 |
| 2042 | .L_op_iget: /* 0x52 */ |
| 2043 | /* File: x86_64/op_iget.S */ |
| 2044 | /* |
| 2045 | * General instance field get. |
| 2046 | * |
| 2047 | * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide |
| 2048 | */ |
| 2049 | EXPORT_PC |
| 2050 | movzbq rINSTbl, %rcx # rcx <- BA |
| 2051 | movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC |
| 2052 | sarl $4, %ecx # ecx <- B |
| 2053 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2054 | movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer |
| 2055 | movq rSELF, OUT_ARG3 |
| 2056 | call SYMBOL(artGet32InstanceFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2057 | movq rSELF, %rcx |
| 2058 | cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2059 | jnz MterpException # bail out |
| 2060 | andb $0xf, rINSTbl # rINST <- A |
| 2061 | .if 0 |
| 2062 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value |
| 2063 | .else |
| 2064 | .if 0 |
| 2065 | SET_WIDE_VREG %rax, rINSTq # fp[A] <-value |
| 2066 | .else |
| 2067 | SET_VREG %eax, rINSTq # fp[A] <-value |
| 2068 | .endif |
| 2069 | .endif |
| 2070 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2071 | |
| 2072 | /* ------------------------------ */ |
| 2073 | .balign 128 |
| 2074 | .L_op_iget_wide: /* 0x53 */ |
| 2075 | /* File: x86_64/op_iget_wide.S */ |
| 2076 | /* File: x86_64/op_iget.S */ |
| 2077 | /* |
| 2078 | * General instance field get. |
| 2079 | * |
| 2080 | * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide |
| 2081 | */ |
| 2082 | EXPORT_PC |
| 2083 | movzbq rINSTbl, %rcx # rcx <- BA |
| 2084 | movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC |
| 2085 | sarl $4, %ecx # ecx <- B |
| 2086 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2087 | movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer |
| 2088 | movq rSELF, OUT_ARG3 |
| 2089 | call SYMBOL(artGet64InstanceFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2090 | movq rSELF, %rcx |
| 2091 | cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2092 | jnz MterpException # bail out |
| 2093 | andb $0xf, rINSTbl # rINST <- A |
| 2094 | .if 0 |
| 2095 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value |
| 2096 | .else |
| 2097 | .if 1 |
| 2098 | SET_WIDE_VREG %rax, rINSTq # fp[A] <-value |
| 2099 | .else |
| 2100 | SET_VREG %eax, rINSTq # fp[A] <-value |
| 2101 | .endif |
| 2102 | .endif |
| 2103 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2104 | |
| 2105 | |
| 2106 | /* ------------------------------ */ |
| 2107 | .balign 128 |
| 2108 | .L_op_iget_object: /* 0x54 */ |
| 2109 | /* File: x86_64/op_iget_object.S */ |
| 2110 | /* File: x86_64/op_iget.S */ |
| 2111 | /* |
| 2112 | * General instance field get. |
| 2113 | * |
| 2114 | * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide |
| 2115 | */ |
| 2116 | EXPORT_PC |
| 2117 | movzbq rINSTbl, %rcx # rcx <- BA |
| 2118 | movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC |
| 2119 | sarl $4, %ecx # ecx <- B |
| 2120 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2121 | movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer |
| 2122 | movq rSELF, OUT_ARG3 |
| 2123 | call SYMBOL(artGetObjInstanceFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2124 | movq rSELF, %rcx |
| 2125 | cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2126 | jnz MterpException # bail out |
| 2127 | andb $0xf, rINSTbl # rINST <- A |
| 2128 | .if 1 |
| 2129 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value |
| 2130 | .else |
| 2131 | .if 0 |
| 2132 | SET_WIDE_VREG %rax, rINSTq # fp[A] <-value |
| 2133 | .else |
| 2134 | SET_VREG %eax, rINSTq # fp[A] <-value |
| 2135 | .endif |
| 2136 | .endif |
| 2137 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2138 | |
| 2139 | |
| 2140 | /* ------------------------------ */ |
| 2141 | .balign 128 |
| 2142 | .L_op_iget_boolean: /* 0x55 */ |
| 2143 | /* File: x86_64/op_iget_boolean.S */ |
| 2144 | /* File: x86_64/op_iget.S */ |
| 2145 | /* |
| 2146 | * General instance field get. |
| 2147 | * |
| 2148 | * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide |
| 2149 | */ |
| 2150 | EXPORT_PC |
| 2151 | movzbq rINSTbl, %rcx # rcx <- BA |
| 2152 | movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC |
| 2153 | sarl $4, %ecx # ecx <- B |
| 2154 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2155 | movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer |
| 2156 | movq rSELF, OUT_ARG3 |
| 2157 | call SYMBOL(artGetBooleanInstanceFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2158 | movq rSELF, %rcx |
| 2159 | cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2160 | jnz MterpException # bail out |
| 2161 | andb $0xf, rINSTbl # rINST <- A |
| 2162 | .if 0 |
| 2163 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value |
| 2164 | .else |
| 2165 | .if 0 |
| 2166 | SET_WIDE_VREG %rax, rINSTq # fp[A] <-value |
| 2167 | .else |
| 2168 | SET_VREG %eax, rINSTq # fp[A] <-value |
| 2169 | .endif |
| 2170 | .endif |
| 2171 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2172 | |
| 2173 | |
| 2174 | /* ------------------------------ */ |
| 2175 | .balign 128 |
| 2176 | .L_op_iget_byte: /* 0x56 */ |
| 2177 | /* File: x86_64/op_iget_byte.S */ |
| 2178 | /* File: x86_64/op_iget.S */ |
| 2179 | /* |
| 2180 | * General instance field get. |
| 2181 | * |
| 2182 | * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide |
| 2183 | */ |
| 2184 | EXPORT_PC |
| 2185 | movzbq rINSTbl, %rcx # rcx <- BA |
| 2186 | movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC |
| 2187 | sarl $4, %ecx # ecx <- B |
| 2188 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2189 | movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer |
| 2190 | movq rSELF, OUT_ARG3 |
| 2191 | call SYMBOL(artGetByteInstanceFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2192 | movq rSELF, %rcx |
| 2193 | cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2194 | jnz MterpException # bail out |
| 2195 | andb $0xf, rINSTbl # rINST <- A |
| 2196 | .if 0 |
| 2197 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value |
| 2198 | .else |
| 2199 | .if 0 |
| 2200 | SET_WIDE_VREG %rax, rINSTq # fp[A] <-value |
| 2201 | .else |
| 2202 | SET_VREG %eax, rINSTq # fp[A] <-value |
| 2203 | .endif |
| 2204 | .endif |
| 2205 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2206 | |
| 2207 | |
| 2208 | /* ------------------------------ */ |
| 2209 | .balign 128 |
| 2210 | .L_op_iget_char: /* 0x57 */ |
| 2211 | /* File: x86_64/op_iget_char.S */ |
| 2212 | /* File: x86_64/op_iget.S */ |
| 2213 | /* |
| 2214 | * General instance field get. |
| 2215 | * |
| 2216 | * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide |
| 2217 | */ |
| 2218 | EXPORT_PC |
| 2219 | movzbq rINSTbl, %rcx # rcx <- BA |
| 2220 | movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC |
| 2221 | sarl $4, %ecx # ecx <- B |
| 2222 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2223 | movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer |
| 2224 | movq rSELF, OUT_ARG3 |
| 2225 | call SYMBOL(artGetCharInstanceFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2226 | movq rSELF, %rcx |
| 2227 | cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2228 | jnz MterpException # bail out |
| 2229 | andb $0xf, rINSTbl # rINST <- A |
| 2230 | .if 0 |
| 2231 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value |
| 2232 | .else |
| 2233 | .if 0 |
| 2234 | SET_WIDE_VREG %rax, rINSTq # fp[A] <-value |
| 2235 | .else |
| 2236 | SET_VREG %eax, rINSTq # fp[A] <-value |
| 2237 | .endif |
| 2238 | .endif |
| 2239 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2240 | |
| 2241 | |
| 2242 | /* ------------------------------ */ |
| 2243 | .balign 128 |
| 2244 | .L_op_iget_short: /* 0x58 */ |
| 2245 | /* File: x86_64/op_iget_short.S */ |
| 2246 | /* File: x86_64/op_iget.S */ |
| 2247 | /* |
| 2248 | * General instance field get. |
| 2249 | * |
| 2250 | * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short, iget-wide |
| 2251 | */ |
| 2252 | EXPORT_PC |
| 2253 | movzbq rINSTbl, %rcx # rcx <- BA |
| 2254 | movzwl 2(rPC), OUT_32_ARG0 # eax <- field ref CCCC |
| 2255 | sarl $4, %ecx # ecx <- B |
| 2256 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2257 | movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer |
| 2258 | movq rSELF, OUT_ARG3 |
| 2259 | call SYMBOL(artGetShortInstanceFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2260 | movq rSELF, %rcx |
| 2261 | cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2262 | jnz MterpException # bail out |
| 2263 | andb $0xf, rINSTbl # rINST <- A |
| 2264 | .if 0 |
| 2265 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <-value |
| 2266 | .else |
| 2267 | .if 0 |
| 2268 | SET_WIDE_VREG %rax, rINSTq # fp[A] <-value |
| 2269 | .else |
| 2270 | SET_VREG %eax, rINSTq # fp[A] <-value |
| 2271 | .endif |
| 2272 | .endif |
| 2273 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2274 | |
| 2275 | |
| 2276 | /* ------------------------------ */ |
| 2277 | .balign 128 |
| 2278 | .L_op_iput: /* 0x59 */ |
| 2279 | /* File: x86_64/op_iput.S */ |
| 2280 | /* |
| 2281 | * General 32-bit instance field put. |
| 2282 | * |
| 2283 | * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short |
| 2284 | */ |
| 2285 | /* op vA, vB, field@CCCC */ |
| 2286 | .extern artSet32InstanceFromMterp |
| 2287 | EXPORT_PC |
| 2288 | movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC |
| 2289 | movzbq rINSTbl, %rcx # rcx<- BA |
| 2290 | sarl $4, %ecx # ecx<- B |
| 2291 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2292 | andb $0xf, rINSTbl # rINST<- A |
| 2293 | GET_VREG OUT_32_ARG2, rINSTq # fp[A] |
| 2294 | movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer |
| 2295 | call SYMBOL(artSet32InstanceFromMterp) |
| 2296 | testb %al, %al |
| 2297 | jnz MterpPossibleException |
| 2298 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2299 | |
| 2300 | /* ------------------------------ */ |
| 2301 | .balign 128 |
| 2302 | .L_op_iput_wide: /* 0x5a */ |
| 2303 | /* File: x86_64/op_iput_wide.S */ |
| 2304 | /* iput-wide vA, vB, field@CCCC */ |
| 2305 | .extern artSet64InstanceFromMterp |
| 2306 | EXPORT_PC |
| 2307 | movzwq 2(rPC), OUT_ARG0 # field ref CCCC |
| 2308 | movzbq rINSTbl, %rcx # rcx <- BA |
| 2309 | sarl $4, %ecx # ecx <- B |
| 2310 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2311 | andb $0xf, rINSTbl # rINST <- A |
| 2312 | leaq VREG_ADDRESS(rINSTq), OUT_ARG2 # &fp[A] |
| 2313 | movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer |
| 2314 | call SYMBOL(artSet64InstanceFromMterp) |
| 2315 | testb %al, %al |
| 2316 | jnz MterpPossibleException |
| 2317 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2318 | |
| 2319 | /* ------------------------------ */ |
| 2320 | .balign 128 |
| 2321 | .L_op_iput_object: /* 0x5b */ |
| 2322 | /* File: x86_64/op_iput_object.S */ |
| 2323 | EXPORT_PC |
| 2324 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 |
| 2325 | movq rPC, OUT_ARG1 |
| 2326 | REFRESH_INST 91 |
| 2327 | movl rINST, OUT_32_ARG2 |
| 2328 | movq rSELF, OUT_ARG3 |
| 2329 | call SYMBOL(MterpIputObject) |
| 2330 | testb %al, %al |
| 2331 | jz MterpException |
| 2332 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2333 | |
| 2334 | /* ------------------------------ */ |
| 2335 | .balign 128 |
| 2336 | .L_op_iput_boolean: /* 0x5c */ |
| 2337 | /* File: x86_64/op_iput_boolean.S */ |
| 2338 | /* File: x86_64/op_iput.S */ |
| 2339 | /* |
| 2340 | * General 32-bit instance field put. |
| 2341 | * |
| 2342 | * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short |
| 2343 | */ |
| 2344 | /* op vA, vB, field@CCCC */ |
| 2345 | .extern artSet8InstanceFromMterp |
| 2346 | EXPORT_PC |
| 2347 | movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC |
| 2348 | movzbq rINSTbl, %rcx # rcx<- BA |
| 2349 | sarl $4, %ecx # ecx<- B |
| 2350 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2351 | andb $0xf, rINSTbl # rINST<- A |
| 2352 | GET_VREG OUT_32_ARG2, rINSTq # fp[A] |
| 2353 | movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer |
| 2354 | call SYMBOL(artSet8InstanceFromMterp) |
| 2355 | testb %al, %al |
| 2356 | jnz MterpPossibleException |
| 2357 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2358 | |
| 2359 | |
| 2360 | /* ------------------------------ */ |
| 2361 | .balign 128 |
| 2362 | .L_op_iput_byte: /* 0x5d */ |
| 2363 | /* File: x86_64/op_iput_byte.S */ |
| 2364 | /* File: x86_64/op_iput.S */ |
| 2365 | /* |
| 2366 | * General 32-bit instance field put. |
| 2367 | * |
| 2368 | * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short |
| 2369 | */ |
| 2370 | /* op vA, vB, field@CCCC */ |
| 2371 | .extern artSet8InstanceFromMterp |
| 2372 | EXPORT_PC |
| 2373 | movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC |
| 2374 | movzbq rINSTbl, %rcx # rcx<- BA |
| 2375 | sarl $4, %ecx # ecx<- B |
| 2376 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2377 | andb $0xf, rINSTbl # rINST<- A |
| 2378 | GET_VREG OUT_32_ARG2, rINSTq # fp[A] |
| 2379 | movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer |
| 2380 | call SYMBOL(artSet8InstanceFromMterp) |
| 2381 | testb %al, %al |
| 2382 | jnz MterpPossibleException |
| 2383 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2384 | |
| 2385 | |
| 2386 | /* ------------------------------ */ |
| 2387 | .balign 128 |
| 2388 | .L_op_iput_char: /* 0x5e */ |
| 2389 | /* File: x86_64/op_iput_char.S */ |
| 2390 | /* File: x86_64/op_iput.S */ |
| 2391 | /* |
| 2392 | * General 32-bit instance field put. |
| 2393 | * |
| 2394 | * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short |
| 2395 | */ |
| 2396 | /* op vA, vB, field@CCCC */ |
| 2397 | .extern artSet16InstanceFromMterp |
| 2398 | EXPORT_PC |
| 2399 | movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC |
| 2400 | movzbq rINSTbl, %rcx # rcx<- BA |
| 2401 | sarl $4, %ecx # ecx<- B |
| 2402 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2403 | andb $0xf, rINSTbl # rINST<- A |
| 2404 | GET_VREG OUT_32_ARG2, rINSTq # fp[A] |
| 2405 | movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer |
| 2406 | call SYMBOL(artSet16InstanceFromMterp) |
| 2407 | testb %al, %al |
| 2408 | jnz MterpPossibleException |
| 2409 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2410 | |
| 2411 | |
| 2412 | /* ------------------------------ */ |
| 2413 | .balign 128 |
| 2414 | .L_op_iput_short: /* 0x5f */ |
| 2415 | /* File: x86_64/op_iput_short.S */ |
| 2416 | /* File: x86_64/op_iput.S */ |
| 2417 | /* |
| 2418 | * General 32-bit instance field put. |
| 2419 | * |
| 2420 | * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short |
| 2421 | */ |
| 2422 | /* op vA, vB, field@CCCC */ |
| 2423 | .extern artSet16InstanceFromMterp |
| 2424 | EXPORT_PC |
| 2425 | movzwl 2(rPC), OUT_32_ARG0 # field ref <- 0000CCCC |
| 2426 | movzbq rINSTbl, %rcx # rcx<- BA |
| 2427 | sarl $4, %ecx # ecx<- B |
| 2428 | GET_VREG OUT_32_ARG1, %rcx # the object pointer |
| 2429 | andb $0xf, rINSTbl # rINST<- A |
| 2430 | GET_VREG OUT_32_ARG2, rINSTq # fp[A] |
| 2431 | movq OFF_FP_METHOD(rFP), OUT_ARG3 # referrer |
| 2432 | call SYMBOL(artSet16InstanceFromMterp) |
| 2433 | testb %al, %al |
| 2434 | jnz MterpPossibleException |
| 2435 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2436 | |
| 2437 | |
| 2438 | /* ------------------------------ */ |
| 2439 | .balign 128 |
| 2440 | .L_op_sget: /* 0x60 */ |
| 2441 | /* File: x86_64/op_sget.S */ |
| 2442 | /* |
| 2443 | * General SGET handler wrapper. |
| 2444 | * |
| 2445 | * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide |
| 2446 | */ |
| 2447 | /* op vAA, field@BBBB */ |
| 2448 | .extern artGet32StaticFromCode |
| 2449 | EXPORT_PC |
| 2450 | movzwq 2(rPC), OUT_ARG0 # field ref CCCC |
| 2451 | movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer |
| 2452 | movq rSELF, OUT_ARG2 # self |
| 2453 | call SYMBOL(artGet32StaticFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2454 | movq rSELF, %rcx |
| 2455 | cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2456 | jnz MterpException |
| 2457 | .if 0 |
| 2458 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value |
| 2459 | .else |
| 2460 | .if 0 |
| 2461 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 2462 | .else |
| 2463 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 2464 | .endif |
| 2465 | .endif |
| 2466 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2467 | |
| 2468 | /* ------------------------------ */ |
| 2469 | .balign 128 |
| 2470 | .L_op_sget_wide: /* 0x61 */ |
| 2471 | /* File: x86_64/op_sget_wide.S */ |
| 2472 | /* File: x86_64/op_sget.S */ |
| 2473 | /* |
| 2474 | * General SGET handler wrapper. |
| 2475 | * |
| 2476 | * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide |
| 2477 | */ |
| 2478 | /* op vAA, field@BBBB */ |
| 2479 | .extern artGet64StaticFromCode |
| 2480 | EXPORT_PC |
| 2481 | movzwq 2(rPC), OUT_ARG0 # field ref CCCC |
| 2482 | movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer |
| 2483 | movq rSELF, OUT_ARG2 # self |
| 2484 | call SYMBOL(artGet64StaticFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2485 | movq rSELF, %rcx |
| 2486 | cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2487 | jnz MterpException |
| 2488 | .if 0 |
| 2489 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value |
| 2490 | .else |
| 2491 | .if 1 |
| 2492 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 2493 | .else |
| 2494 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 2495 | .endif |
| 2496 | .endif |
| 2497 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2498 | |
| 2499 | |
| 2500 | /* ------------------------------ */ |
| 2501 | .balign 128 |
| 2502 | .L_op_sget_object: /* 0x62 */ |
| 2503 | /* File: x86_64/op_sget_object.S */ |
| 2504 | /* File: x86_64/op_sget.S */ |
| 2505 | /* |
| 2506 | * General SGET handler wrapper. |
| 2507 | * |
| 2508 | * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide |
| 2509 | */ |
| 2510 | /* op vAA, field@BBBB */ |
| 2511 | .extern artGetObjStaticFromCode |
| 2512 | EXPORT_PC |
| 2513 | movzwq 2(rPC), OUT_ARG0 # field ref CCCC |
| 2514 | movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer |
| 2515 | movq rSELF, OUT_ARG2 # self |
| 2516 | call SYMBOL(artGetObjStaticFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2517 | movq rSELF, %rcx |
| 2518 | cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2519 | jnz MterpException |
| 2520 | .if 1 |
| 2521 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value |
| 2522 | .else |
| 2523 | .if 0 |
| 2524 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 2525 | .else |
| 2526 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 2527 | .endif |
| 2528 | .endif |
| 2529 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2530 | |
| 2531 | |
| 2532 | /* ------------------------------ */ |
| 2533 | .balign 128 |
| 2534 | .L_op_sget_boolean: /* 0x63 */ |
| 2535 | /* File: x86_64/op_sget_boolean.S */ |
| 2536 | /* File: x86_64/op_sget.S */ |
| 2537 | /* |
| 2538 | * General SGET handler wrapper. |
| 2539 | * |
| 2540 | * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide |
| 2541 | */ |
| 2542 | /* op vAA, field@BBBB */ |
| 2543 | .extern artGetBooleanStaticFromCode |
| 2544 | EXPORT_PC |
| 2545 | movzwq 2(rPC), OUT_ARG0 # field ref CCCC |
| 2546 | movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer |
| 2547 | movq rSELF, OUT_ARG2 # self |
| 2548 | call SYMBOL(artGetBooleanStaticFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2549 | movq rSELF, %rcx |
| 2550 | cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2551 | jnz MterpException |
| 2552 | .if 0 |
| 2553 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value |
| 2554 | .else |
| 2555 | .if 0 |
| 2556 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 2557 | .else |
| 2558 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 2559 | .endif |
| 2560 | .endif |
| 2561 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2562 | |
| 2563 | |
| 2564 | /* ------------------------------ */ |
| 2565 | .balign 128 |
| 2566 | .L_op_sget_byte: /* 0x64 */ |
| 2567 | /* File: x86_64/op_sget_byte.S */ |
| 2568 | /* File: x86_64/op_sget.S */ |
| 2569 | /* |
| 2570 | * General SGET handler wrapper. |
| 2571 | * |
| 2572 | * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide |
| 2573 | */ |
| 2574 | /* op vAA, field@BBBB */ |
| 2575 | .extern artGetByteStaticFromCode |
| 2576 | EXPORT_PC |
| 2577 | movzwq 2(rPC), OUT_ARG0 # field ref CCCC |
| 2578 | movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer |
| 2579 | movq rSELF, OUT_ARG2 # self |
| 2580 | call SYMBOL(artGetByteStaticFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2581 | movq rSELF, %rcx |
| 2582 | cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2583 | jnz MterpException |
| 2584 | .if 0 |
| 2585 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value |
| 2586 | .else |
| 2587 | .if 0 |
| 2588 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 2589 | .else |
| 2590 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 2591 | .endif |
| 2592 | .endif |
| 2593 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2594 | |
| 2595 | |
| 2596 | /* ------------------------------ */ |
| 2597 | .balign 128 |
| 2598 | .L_op_sget_char: /* 0x65 */ |
| 2599 | /* File: x86_64/op_sget_char.S */ |
| 2600 | /* File: x86_64/op_sget.S */ |
| 2601 | /* |
| 2602 | * General SGET handler wrapper. |
| 2603 | * |
| 2604 | * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide |
| 2605 | */ |
| 2606 | /* op vAA, field@BBBB */ |
| 2607 | .extern artGetCharStaticFromCode |
| 2608 | EXPORT_PC |
| 2609 | movzwq 2(rPC), OUT_ARG0 # field ref CCCC |
| 2610 | movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer |
| 2611 | movq rSELF, OUT_ARG2 # self |
| 2612 | call SYMBOL(artGetCharStaticFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2613 | movq rSELF, %rcx |
| 2614 | cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2615 | jnz MterpException |
| 2616 | .if 0 |
| 2617 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value |
| 2618 | .else |
| 2619 | .if 0 |
| 2620 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 2621 | .else |
| 2622 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 2623 | .endif |
| 2624 | .endif |
| 2625 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2626 | |
| 2627 | |
| 2628 | /* ------------------------------ */ |
| 2629 | .balign 128 |
| 2630 | .L_op_sget_short: /* 0x66 */ |
| 2631 | /* File: x86_64/op_sget_short.S */ |
| 2632 | /* File: x86_64/op_sget.S */ |
| 2633 | /* |
| 2634 | * General SGET handler wrapper. |
| 2635 | * |
| 2636 | * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short, sget-wide |
| 2637 | */ |
| 2638 | /* op vAA, field@BBBB */ |
| 2639 | .extern artGetShortStaticFromCode |
| 2640 | EXPORT_PC |
| 2641 | movzwq 2(rPC), OUT_ARG0 # field ref CCCC |
| 2642 | movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer |
| 2643 | movq rSELF, OUT_ARG2 # self |
| 2644 | call SYMBOL(artGetShortStaticFromCode) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2645 | movq rSELF, %rcx |
| 2646 | cmpl $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2647 | jnz MterpException |
| 2648 | .if 0 |
| 2649 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value |
| 2650 | .else |
| 2651 | .if 0 |
| 2652 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 2653 | .else |
| 2654 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 2655 | .endif |
| 2656 | .endif |
| 2657 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2658 | |
| 2659 | |
| 2660 | /* ------------------------------ */ |
| 2661 | .balign 128 |
| 2662 | .L_op_sput: /* 0x67 */ |
| 2663 | /* File: x86_64/op_sput.S */ |
| 2664 | /* |
| 2665 | * General SPUT handler wrapper. |
| 2666 | * |
| 2667 | * for: sput, sput-boolean, sput-byte, sput-char, sput-short |
| 2668 | */ |
| 2669 | /* op vAA, field@BBBB */ |
| 2670 | .extern artSet32StaticFromCode |
| 2671 | EXPORT_PC |
| 2672 | movzwq 2(rPC), OUT_ARG0 # field ref BBBB |
| 2673 | GET_VREG OUT_32_ARG1, rINSTq # fp[AA] |
| 2674 | movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer |
| 2675 | movq rSELF, OUT_ARG3 # self |
| 2676 | call SYMBOL(artSet32StaticFromCode) |
| 2677 | testb %al, %al |
| 2678 | jnz MterpException |
| 2679 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2680 | |
| 2681 | /* ------------------------------ */ |
| 2682 | .balign 128 |
| 2683 | .L_op_sput_wide: /* 0x68 */ |
| 2684 | /* File: x86_64/op_sput_wide.S */ |
| 2685 | /* |
| 2686 | * SPUT_WIDE handler wrapper. |
| 2687 | * |
| 2688 | */ |
| 2689 | /* sput-wide vAA, field@BBBB */ |
| 2690 | .extern artSet64IndirectStaticFromMterp |
| 2691 | EXPORT_PC |
| 2692 | movzwq 2(rPC), OUT_ARG0 # field ref BBBB |
| 2693 | movq OFF_FP_METHOD(rFP), OUT_ARG1 # referrer |
| 2694 | leaq VREG_ADDRESS(rINSTq), OUT_ARG2 # &fp[AA] |
| 2695 | movq rSELF, OUT_ARG3 # self |
| 2696 | call SYMBOL(artSet64IndirectStaticFromMterp) |
| 2697 | testb %al, %al |
| 2698 | jnz MterpException |
| 2699 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2700 | |
| 2701 | /* ------------------------------ */ |
| 2702 | .balign 128 |
| 2703 | .L_op_sput_object: /* 0x69 */ |
| 2704 | /* File: x86_64/op_sput_object.S */ |
| 2705 | EXPORT_PC |
| 2706 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 |
| 2707 | movq rPC, OUT_ARG1 |
| 2708 | REFRESH_INST 105 |
| 2709 | movq rINSTq, OUT_ARG2 |
| 2710 | movq rSELF, OUT_ARG3 |
| 2711 | call SYMBOL(MterpSputObject) |
| 2712 | testb %al, %al |
| 2713 | jz MterpException |
| 2714 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2715 | |
| 2716 | /* ------------------------------ */ |
| 2717 | .balign 128 |
| 2718 | .L_op_sput_boolean: /* 0x6a */ |
| 2719 | /* File: x86_64/op_sput_boolean.S */ |
| 2720 | /* File: x86_64/op_sput.S */ |
| 2721 | /* |
| 2722 | * General SPUT handler wrapper. |
| 2723 | * |
| 2724 | * for: sput, sput-boolean, sput-byte, sput-char, sput-short |
| 2725 | */ |
| 2726 | /* op vAA, field@BBBB */ |
| 2727 | .extern artSet8StaticFromCode |
| 2728 | EXPORT_PC |
| 2729 | movzwq 2(rPC), OUT_ARG0 # field ref BBBB |
| 2730 | GET_VREG OUT_32_ARG1, rINSTq # fp[AA] |
| 2731 | movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer |
| 2732 | movq rSELF, OUT_ARG3 # self |
| 2733 | call SYMBOL(artSet8StaticFromCode) |
| 2734 | testb %al, %al |
| 2735 | jnz MterpException |
| 2736 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2737 | |
| 2738 | |
| 2739 | /* ------------------------------ */ |
| 2740 | .balign 128 |
| 2741 | .L_op_sput_byte: /* 0x6b */ |
| 2742 | /* File: x86_64/op_sput_byte.S */ |
| 2743 | /* File: x86_64/op_sput.S */ |
| 2744 | /* |
| 2745 | * General SPUT handler wrapper. |
| 2746 | * |
| 2747 | * for: sput, sput-boolean, sput-byte, sput-char, sput-short |
| 2748 | */ |
| 2749 | /* op vAA, field@BBBB */ |
| 2750 | .extern artSet8StaticFromCode |
| 2751 | EXPORT_PC |
| 2752 | movzwq 2(rPC), OUT_ARG0 # field ref BBBB |
| 2753 | GET_VREG OUT_32_ARG1, rINSTq # fp[AA] |
| 2754 | movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer |
| 2755 | movq rSELF, OUT_ARG3 # self |
| 2756 | call SYMBOL(artSet8StaticFromCode) |
| 2757 | testb %al, %al |
| 2758 | jnz MterpException |
| 2759 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2760 | |
| 2761 | |
| 2762 | /* ------------------------------ */ |
| 2763 | .balign 128 |
| 2764 | .L_op_sput_char: /* 0x6c */ |
| 2765 | /* File: x86_64/op_sput_char.S */ |
| 2766 | /* File: x86_64/op_sput.S */ |
| 2767 | /* |
| 2768 | * General SPUT handler wrapper. |
| 2769 | * |
| 2770 | * for: sput, sput-boolean, sput-byte, sput-char, sput-short |
| 2771 | */ |
| 2772 | /* op vAA, field@BBBB */ |
| 2773 | .extern artSet16StaticFromCode |
| 2774 | EXPORT_PC |
| 2775 | movzwq 2(rPC), OUT_ARG0 # field ref BBBB |
| 2776 | GET_VREG OUT_32_ARG1, rINSTq # fp[AA] |
| 2777 | movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer |
| 2778 | movq rSELF, OUT_ARG3 # self |
| 2779 | call SYMBOL(artSet16StaticFromCode) |
| 2780 | testb %al, %al |
| 2781 | jnz MterpException |
| 2782 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2783 | |
| 2784 | |
| 2785 | /* ------------------------------ */ |
| 2786 | .balign 128 |
| 2787 | .L_op_sput_short: /* 0x6d */ |
| 2788 | /* File: x86_64/op_sput_short.S */ |
| 2789 | /* File: x86_64/op_sput.S */ |
| 2790 | /* |
| 2791 | * General SPUT handler wrapper. |
| 2792 | * |
| 2793 | * for: sput, sput-boolean, sput-byte, sput-char, sput-short |
| 2794 | */ |
| 2795 | /* op vAA, field@BBBB */ |
| 2796 | .extern artSet16StaticFromCode |
| 2797 | EXPORT_PC |
| 2798 | movzwq 2(rPC), OUT_ARG0 # field ref BBBB |
| 2799 | GET_VREG OUT_32_ARG1, rINSTq # fp[AA] |
| 2800 | movq OFF_FP_METHOD(rFP), OUT_ARG2 # referrer |
| 2801 | movq rSELF, OUT_ARG3 # self |
| 2802 | call SYMBOL(artSet16StaticFromCode) |
| 2803 | testb %al, %al |
| 2804 | jnz MterpException |
| 2805 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 2806 | |
| 2807 | |
| 2808 | /* ------------------------------ */ |
| 2809 | .balign 128 |
| 2810 | .L_op_invoke_virtual: /* 0x6e */ |
| 2811 | /* File: x86_64/op_invoke_virtual.S */ |
| 2812 | /* File: x86_64/invoke.S */ |
| 2813 | /* |
| 2814 | * Generic invoke handler wrapper. |
| 2815 | */ |
| 2816 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 2817 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 2818 | .extern MterpInvokeVirtual |
| 2819 | EXPORT_PC |
| 2820 | movq rSELF, OUT_ARG0 |
| 2821 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 2822 | movq rPC, OUT_ARG2 |
| 2823 | REFRESH_INST 110 |
| 2824 | movl rINST, OUT_32_ARG3 |
| 2825 | call SYMBOL(MterpInvokeVirtual) |
| 2826 | testb %al, %al |
| 2827 | jz MterpException |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 2828 | ADVANCE_PC 3 |
| 2829 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 2830 | testb %al, %al |
| 2831 | jnz MterpFallback |
| 2832 | FETCH_INST |
| 2833 | GOTO_NEXT |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2834 | |
| 2835 | /* |
| 2836 | * Handle a virtual method call. |
| 2837 | * |
| 2838 | * for: invoke-virtual, invoke-virtual/range |
| 2839 | */ |
| 2840 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 2841 | /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 2842 | |
| 2843 | /* ------------------------------ */ |
| 2844 | .balign 128 |
| 2845 | .L_op_invoke_super: /* 0x6f */ |
| 2846 | /* File: x86_64/op_invoke_super.S */ |
| 2847 | /* File: x86_64/invoke.S */ |
| 2848 | /* |
| 2849 | * Generic invoke handler wrapper. |
| 2850 | */ |
| 2851 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 2852 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 2853 | .extern MterpInvokeSuper |
| 2854 | EXPORT_PC |
| 2855 | movq rSELF, OUT_ARG0 |
| 2856 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 2857 | movq rPC, OUT_ARG2 |
| 2858 | REFRESH_INST 111 |
| 2859 | movl rINST, OUT_32_ARG3 |
| 2860 | call SYMBOL(MterpInvokeSuper) |
| 2861 | testb %al, %al |
| 2862 | jz MterpException |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 2863 | ADVANCE_PC 3 |
| 2864 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 2865 | testb %al, %al |
| 2866 | jnz MterpFallback |
| 2867 | FETCH_INST |
| 2868 | GOTO_NEXT |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2869 | |
| 2870 | /* |
| 2871 | * Handle a "super" method call. |
| 2872 | * |
| 2873 | * for: invoke-super, invoke-super/range |
| 2874 | */ |
| 2875 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 2876 | /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 2877 | |
| 2878 | /* ------------------------------ */ |
| 2879 | .balign 128 |
| 2880 | .L_op_invoke_direct: /* 0x70 */ |
| 2881 | /* File: x86_64/op_invoke_direct.S */ |
| 2882 | /* File: x86_64/invoke.S */ |
| 2883 | /* |
| 2884 | * Generic invoke handler wrapper. |
| 2885 | */ |
| 2886 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 2887 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 2888 | .extern MterpInvokeDirect |
| 2889 | EXPORT_PC |
| 2890 | movq rSELF, OUT_ARG0 |
| 2891 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 2892 | movq rPC, OUT_ARG2 |
| 2893 | REFRESH_INST 112 |
| 2894 | movl rINST, OUT_32_ARG3 |
| 2895 | call SYMBOL(MterpInvokeDirect) |
| 2896 | testb %al, %al |
| 2897 | jz MterpException |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 2898 | ADVANCE_PC 3 |
| 2899 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 2900 | testb %al, %al |
| 2901 | jnz MterpFallback |
| 2902 | FETCH_INST |
| 2903 | GOTO_NEXT |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2904 | |
| 2905 | |
| 2906 | /* ------------------------------ */ |
| 2907 | .balign 128 |
| 2908 | .L_op_invoke_static: /* 0x71 */ |
| 2909 | /* File: x86_64/op_invoke_static.S */ |
| 2910 | /* File: x86_64/invoke.S */ |
| 2911 | /* |
| 2912 | * Generic invoke handler wrapper. |
| 2913 | */ |
| 2914 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 2915 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 2916 | .extern MterpInvokeStatic |
| 2917 | EXPORT_PC |
| 2918 | movq rSELF, OUT_ARG0 |
| 2919 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 2920 | movq rPC, OUT_ARG2 |
| 2921 | REFRESH_INST 113 |
| 2922 | movl rINST, OUT_32_ARG3 |
| 2923 | call SYMBOL(MterpInvokeStatic) |
| 2924 | testb %al, %al |
| 2925 | jz MterpException |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 2926 | ADVANCE_PC 3 |
| 2927 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 2928 | testb %al, %al |
| 2929 | jnz MterpFallback |
| 2930 | FETCH_INST |
| 2931 | GOTO_NEXT |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2932 | |
| 2933 | |
| 2934 | |
| 2935 | /* ------------------------------ */ |
| 2936 | .balign 128 |
| 2937 | .L_op_invoke_interface: /* 0x72 */ |
| 2938 | /* File: x86_64/op_invoke_interface.S */ |
| 2939 | /* File: x86_64/invoke.S */ |
| 2940 | /* |
| 2941 | * Generic invoke handler wrapper. |
| 2942 | */ |
| 2943 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 2944 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 2945 | .extern MterpInvokeInterface |
| 2946 | EXPORT_PC |
| 2947 | movq rSELF, OUT_ARG0 |
| 2948 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 2949 | movq rPC, OUT_ARG2 |
| 2950 | REFRESH_INST 114 |
| 2951 | movl rINST, OUT_32_ARG3 |
| 2952 | call SYMBOL(MterpInvokeInterface) |
| 2953 | testb %al, %al |
| 2954 | jz MterpException |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 2955 | ADVANCE_PC 3 |
| 2956 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 2957 | testb %al, %al |
| 2958 | jnz MterpFallback |
| 2959 | FETCH_INST |
| 2960 | GOTO_NEXT |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2961 | |
| 2962 | /* |
| 2963 | * Handle an interface method call. |
| 2964 | * |
| 2965 | * for: invoke-interface, invoke-interface/range |
| 2966 | */ |
| 2967 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 2968 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 2969 | |
| 2970 | /* ------------------------------ */ |
| 2971 | .balign 128 |
| 2972 | .L_op_return_void_no_barrier: /* 0x73 */ |
| 2973 | /* File: x86_64/op_return_void_no_barrier.S */ |
Hiroshi Yamauchi | 0402c56 | 2016-04-01 12:00:10 -0700 | [diff] [blame] | 2974 | movq rSELF, OUT_ARG0 |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 2975 | testl $(THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(OUT_ARG0) |
| 2976 | jz 1f |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 2977 | call SYMBOL(MterpSuspendCheck) |
| 2978 | 1: |
| 2979 | xorq %rax, %rax |
| 2980 | jmp MterpReturn |
| 2981 | |
| 2982 | /* ------------------------------ */ |
| 2983 | .balign 128 |
| 2984 | .L_op_invoke_virtual_range: /* 0x74 */ |
| 2985 | /* File: x86_64/op_invoke_virtual_range.S */ |
| 2986 | /* File: x86_64/invoke.S */ |
| 2987 | /* |
| 2988 | * Generic invoke handler wrapper. |
| 2989 | */ |
| 2990 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 2991 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 2992 | .extern MterpInvokeVirtualRange |
| 2993 | EXPORT_PC |
| 2994 | movq rSELF, OUT_ARG0 |
| 2995 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 2996 | movq rPC, OUT_ARG2 |
| 2997 | REFRESH_INST 116 |
| 2998 | movl rINST, OUT_32_ARG3 |
| 2999 | call SYMBOL(MterpInvokeVirtualRange) |
| 3000 | testb %al, %al |
| 3001 | jz MterpException |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 3002 | ADVANCE_PC 3 |
| 3003 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 3004 | testb %al, %al |
| 3005 | jnz MterpFallback |
| 3006 | FETCH_INST |
| 3007 | GOTO_NEXT |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 3008 | |
| 3009 | |
| 3010 | /* ------------------------------ */ |
| 3011 | .balign 128 |
| 3012 | .L_op_invoke_super_range: /* 0x75 */ |
| 3013 | /* File: x86_64/op_invoke_super_range.S */ |
| 3014 | /* File: x86_64/invoke.S */ |
| 3015 | /* |
| 3016 | * Generic invoke handler wrapper. |
| 3017 | */ |
| 3018 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 3019 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 3020 | .extern MterpInvokeSuperRange |
| 3021 | EXPORT_PC |
| 3022 | movq rSELF, OUT_ARG0 |
| 3023 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 3024 | movq rPC, OUT_ARG2 |
| 3025 | REFRESH_INST 117 |
| 3026 | movl rINST, OUT_32_ARG3 |
| 3027 | call SYMBOL(MterpInvokeSuperRange) |
| 3028 | testb %al, %al |
| 3029 | jz MterpException |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 3030 | ADVANCE_PC 3 |
| 3031 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 3032 | testb %al, %al |
| 3033 | jnz MterpFallback |
| 3034 | FETCH_INST |
| 3035 | GOTO_NEXT |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 3036 | |
| 3037 | |
| 3038 | /* ------------------------------ */ |
| 3039 | .balign 128 |
| 3040 | .L_op_invoke_direct_range: /* 0x76 */ |
| 3041 | /* File: x86_64/op_invoke_direct_range.S */ |
| 3042 | /* File: x86_64/invoke.S */ |
| 3043 | /* |
| 3044 | * Generic invoke handler wrapper. |
| 3045 | */ |
| 3046 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 3047 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 3048 | .extern MterpInvokeDirectRange |
| 3049 | EXPORT_PC |
| 3050 | movq rSELF, OUT_ARG0 |
| 3051 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 3052 | movq rPC, OUT_ARG2 |
| 3053 | REFRESH_INST 118 |
| 3054 | movl rINST, OUT_32_ARG3 |
| 3055 | call SYMBOL(MterpInvokeDirectRange) |
| 3056 | testb %al, %al |
| 3057 | jz MterpException |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 3058 | ADVANCE_PC 3 |
| 3059 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 3060 | testb %al, %al |
| 3061 | jnz MterpFallback |
| 3062 | FETCH_INST |
| 3063 | GOTO_NEXT |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 3064 | |
| 3065 | |
| 3066 | /* ------------------------------ */ |
| 3067 | .balign 128 |
| 3068 | .L_op_invoke_static_range: /* 0x77 */ |
| 3069 | /* File: x86_64/op_invoke_static_range.S */ |
| 3070 | /* File: x86_64/invoke.S */ |
| 3071 | /* |
| 3072 | * Generic invoke handler wrapper. |
| 3073 | */ |
| 3074 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 3075 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 3076 | .extern MterpInvokeStaticRange |
| 3077 | EXPORT_PC |
| 3078 | movq rSELF, OUT_ARG0 |
| 3079 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 3080 | movq rPC, OUT_ARG2 |
| 3081 | REFRESH_INST 119 |
| 3082 | movl rINST, OUT_32_ARG3 |
| 3083 | call SYMBOL(MterpInvokeStaticRange) |
| 3084 | testb %al, %al |
| 3085 | jz MterpException |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 3086 | ADVANCE_PC 3 |
| 3087 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 3088 | testb %al, %al |
| 3089 | jnz MterpFallback |
| 3090 | FETCH_INST |
| 3091 | GOTO_NEXT |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 3092 | |
| 3093 | |
| 3094 | /* ------------------------------ */ |
| 3095 | .balign 128 |
| 3096 | .L_op_invoke_interface_range: /* 0x78 */ |
| 3097 | /* File: x86_64/op_invoke_interface_range.S */ |
| 3098 | /* File: x86_64/invoke.S */ |
| 3099 | /* |
| 3100 | * Generic invoke handler wrapper. |
| 3101 | */ |
| 3102 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 3103 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 3104 | .extern MterpInvokeInterfaceRange |
| 3105 | EXPORT_PC |
| 3106 | movq rSELF, OUT_ARG0 |
| 3107 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 3108 | movq rPC, OUT_ARG2 |
| 3109 | REFRESH_INST 120 |
| 3110 | movl rINST, OUT_32_ARG3 |
| 3111 | call SYMBOL(MterpInvokeInterfaceRange) |
| 3112 | testb %al, %al |
| 3113 | jz MterpException |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 3114 | ADVANCE_PC 3 |
| 3115 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 3116 | testb %al, %al |
| 3117 | jnz MterpFallback |
| 3118 | FETCH_INST |
| 3119 | GOTO_NEXT |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 3120 | |
| 3121 | |
| 3122 | /* ------------------------------ */ |
| 3123 | .balign 128 |
| 3124 | .L_op_unused_79: /* 0x79 */ |
| 3125 | /* File: x86_64/op_unused_79.S */ |
| 3126 | /* File: x86_64/unused.S */ |
| 3127 | /* |
| 3128 | * Bail to reference interpreter to throw. |
| 3129 | */ |
| 3130 | jmp MterpFallback |
| 3131 | |
| 3132 | |
| 3133 | /* ------------------------------ */ |
| 3134 | .balign 128 |
| 3135 | .L_op_unused_7a: /* 0x7a */ |
| 3136 | /* File: x86_64/op_unused_7a.S */ |
| 3137 | /* File: x86_64/unused.S */ |
| 3138 | /* |
| 3139 | * Bail to reference interpreter to throw. |
| 3140 | */ |
| 3141 | jmp MterpFallback |
| 3142 | |
| 3143 | |
| 3144 | /* ------------------------------ */ |
| 3145 | .balign 128 |
| 3146 | .L_op_neg_int: /* 0x7b */ |
| 3147 | /* File: x86_64/op_neg_int.S */ |
| 3148 | /* File: x86_64/unop.S */ |
| 3149 | /* |
| 3150 | * Generic 32/64-bit unary operation. Provide an "instr" line that |
| 3151 | * specifies an instruction that performs "result = op eax". |
| 3152 | */ |
| 3153 | /* unop vA, vB */ |
| 3154 | movl rINST, %ecx # rcx <- A+ |
| 3155 | sarl $4,rINST # rINST <- B |
| 3156 | .if 0 |
| 3157 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 3158 | .else |
| 3159 | GET_VREG %eax, rINSTq # eax <- vB |
| 3160 | .endif |
| 3161 | andb $0xf,%cl # ecx <- A |
| 3162 | |
| 3163 | negl %eax |
| 3164 | .if 0 |
| 3165 | SET_WIDE_VREG %rax, %rcx |
| 3166 | .else |
| 3167 | SET_VREG %eax, %rcx |
| 3168 | .endif |
| 3169 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3170 | |
| 3171 | |
| 3172 | /* ------------------------------ */ |
| 3173 | .balign 128 |
| 3174 | .L_op_not_int: /* 0x7c */ |
| 3175 | /* File: x86_64/op_not_int.S */ |
| 3176 | /* File: x86_64/unop.S */ |
| 3177 | /* |
| 3178 | * Generic 32/64-bit unary operation. Provide an "instr" line that |
| 3179 | * specifies an instruction that performs "result = op eax". |
| 3180 | */ |
| 3181 | /* unop vA, vB */ |
| 3182 | movl rINST, %ecx # rcx <- A+ |
| 3183 | sarl $4,rINST # rINST <- B |
| 3184 | .if 0 |
| 3185 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 3186 | .else |
| 3187 | GET_VREG %eax, rINSTq # eax <- vB |
| 3188 | .endif |
| 3189 | andb $0xf,%cl # ecx <- A |
| 3190 | |
| 3191 | notl %eax |
| 3192 | .if 0 |
| 3193 | SET_WIDE_VREG %rax, %rcx |
| 3194 | .else |
| 3195 | SET_VREG %eax, %rcx |
| 3196 | .endif |
| 3197 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3198 | |
| 3199 | |
| 3200 | /* ------------------------------ */ |
| 3201 | .balign 128 |
| 3202 | .L_op_neg_long: /* 0x7d */ |
| 3203 | /* File: x86_64/op_neg_long.S */ |
| 3204 | /* File: x86_64/unop.S */ |
| 3205 | /* |
| 3206 | * Generic 32/64-bit unary operation. Provide an "instr" line that |
| 3207 | * specifies an instruction that performs "result = op eax". |
| 3208 | */ |
| 3209 | /* unop vA, vB */ |
| 3210 | movl rINST, %ecx # rcx <- A+ |
| 3211 | sarl $4,rINST # rINST <- B |
| 3212 | .if 1 |
| 3213 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 3214 | .else |
| 3215 | GET_VREG %eax, rINSTq # eax <- vB |
| 3216 | .endif |
| 3217 | andb $0xf,%cl # ecx <- A |
| 3218 | |
| 3219 | negq %rax |
| 3220 | .if 1 |
| 3221 | SET_WIDE_VREG %rax, %rcx |
| 3222 | .else |
| 3223 | SET_VREG %eax, %rcx |
| 3224 | .endif |
| 3225 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3226 | |
| 3227 | |
| 3228 | /* ------------------------------ */ |
| 3229 | .balign 128 |
| 3230 | .L_op_not_long: /* 0x7e */ |
| 3231 | /* File: x86_64/op_not_long.S */ |
| 3232 | /* File: x86_64/unop.S */ |
| 3233 | /* |
| 3234 | * Generic 32/64-bit unary operation. Provide an "instr" line that |
| 3235 | * specifies an instruction that performs "result = op eax". |
| 3236 | */ |
| 3237 | /* unop vA, vB */ |
| 3238 | movl rINST, %ecx # rcx <- A+ |
| 3239 | sarl $4,rINST # rINST <- B |
| 3240 | .if 1 |
| 3241 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 3242 | .else |
| 3243 | GET_VREG %eax, rINSTq # eax <- vB |
| 3244 | .endif |
| 3245 | andb $0xf,%cl # ecx <- A |
| 3246 | |
| 3247 | notq %rax |
| 3248 | .if 1 |
| 3249 | SET_WIDE_VREG %rax, %rcx |
| 3250 | .else |
| 3251 | SET_VREG %eax, %rcx |
| 3252 | .endif |
| 3253 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3254 | |
| 3255 | |
| 3256 | /* ------------------------------ */ |
| 3257 | .balign 128 |
| 3258 | .L_op_neg_float: /* 0x7f */ |
| 3259 | /* File: x86_64/op_neg_float.S */ |
| 3260 | /* File: x86_64/unop.S */ |
| 3261 | /* |
| 3262 | * Generic 32/64-bit unary operation. Provide an "instr" line that |
| 3263 | * specifies an instruction that performs "result = op eax". |
| 3264 | */ |
| 3265 | /* unop vA, vB */ |
| 3266 | movl rINST, %ecx # rcx <- A+ |
| 3267 | sarl $4,rINST # rINST <- B |
| 3268 | .if 0 |
| 3269 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 3270 | .else |
| 3271 | GET_VREG %eax, rINSTq # eax <- vB |
| 3272 | .endif |
| 3273 | andb $0xf,%cl # ecx <- A |
| 3274 | |
| 3275 | xorl $0x80000000, %eax |
| 3276 | .if 0 |
| 3277 | SET_WIDE_VREG %rax, %rcx |
| 3278 | .else |
| 3279 | SET_VREG %eax, %rcx |
| 3280 | .endif |
| 3281 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3282 | |
| 3283 | |
| 3284 | /* ------------------------------ */ |
| 3285 | .balign 128 |
| 3286 | .L_op_neg_double: /* 0x80 */ |
| 3287 | /* File: x86_64/op_neg_double.S */ |
| 3288 | /* File: x86_64/unop.S */ |
| 3289 | /* |
| 3290 | * Generic 32/64-bit unary operation. Provide an "instr" line that |
| 3291 | * specifies an instruction that performs "result = op eax". |
| 3292 | */ |
| 3293 | /* unop vA, vB */ |
| 3294 | movl rINST, %ecx # rcx <- A+ |
| 3295 | sarl $4,rINST # rINST <- B |
| 3296 | .if 1 |
| 3297 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 3298 | .else |
| 3299 | GET_VREG %eax, rINSTq # eax <- vB |
| 3300 | .endif |
| 3301 | andb $0xf,%cl # ecx <- A |
| 3302 | movq $0x8000000000000000, %rsi |
| 3303 | xorq %rsi, %rax |
| 3304 | .if 1 |
| 3305 | SET_WIDE_VREG %rax, %rcx |
| 3306 | .else |
| 3307 | SET_VREG %eax, %rcx |
| 3308 | .endif |
| 3309 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3310 | |
| 3311 | |
| 3312 | /* ------------------------------ */ |
| 3313 | .balign 128 |
| 3314 | .L_op_int_to_long: /* 0x81 */ |
| 3315 | /* File: x86_64/op_int_to_long.S */ |
| 3316 | /* int to long vA, vB */ |
| 3317 | movzbq rINSTbl, %rax # rax <- +A |
| 3318 | sarl $4, %eax # eax <- B |
| 3319 | andb $0xf, rINSTbl # rINST <- A |
| 3320 | movslq VREG_ADDRESS(%rax), %rax |
| 3321 | SET_WIDE_VREG %rax, rINSTq # v[A] <- %rax |
| 3322 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3323 | |
| 3324 | |
| 3325 | /* ------------------------------ */ |
| 3326 | .balign 128 |
| 3327 | .L_op_int_to_float: /* 0x82 */ |
| 3328 | /* File: x86_64/op_int_to_float.S */ |
| 3329 | /* File: x86_64/fpcvt.S */ |
| 3330 | /* |
| 3331 | * Generic 32-bit FP conversion operation. |
| 3332 | */ |
| 3333 | /* unop vA, vB */ |
| 3334 | movl rINST, %ecx # rcx <- A+ |
| 3335 | sarl $4, rINST # rINST <- B |
| 3336 | andb $0xf, %cl # ecx <- A |
| 3337 | cvtsi2ssl VREG_ADDRESS(rINSTq), %xmm0 |
| 3338 | .if 0 |
| 3339 | movsd %xmm0, VREG_ADDRESS(%rcx) |
| 3340 | CLEAR_WIDE_REF %rcx |
| 3341 | .else |
| 3342 | movss %xmm0, VREG_ADDRESS(%rcx) |
| 3343 | CLEAR_REF %rcx |
| 3344 | .endif |
| 3345 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3346 | |
| 3347 | |
| 3348 | /* ------------------------------ */ |
| 3349 | .balign 128 |
| 3350 | .L_op_int_to_double: /* 0x83 */ |
| 3351 | /* File: x86_64/op_int_to_double.S */ |
| 3352 | /* File: x86_64/fpcvt.S */ |
| 3353 | /* |
| 3354 | * Generic 32-bit FP conversion operation. |
| 3355 | */ |
| 3356 | /* unop vA, vB */ |
| 3357 | movl rINST, %ecx # rcx <- A+ |
| 3358 | sarl $4, rINST # rINST <- B |
| 3359 | andb $0xf, %cl # ecx <- A |
| 3360 | cvtsi2sdl VREG_ADDRESS(rINSTq), %xmm0 |
| 3361 | .if 1 |
| 3362 | movsd %xmm0, VREG_ADDRESS(%rcx) |
| 3363 | CLEAR_WIDE_REF %rcx |
| 3364 | .else |
| 3365 | movss %xmm0, VREG_ADDRESS(%rcx) |
| 3366 | CLEAR_REF %rcx |
| 3367 | .endif |
| 3368 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3369 | |
| 3370 | |
| 3371 | /* ------------------------------ */ |
| 3372 | .balign 128 |
| 3373 | .L_op_long_to_int: /* 0x84 */ |
| 3374 | /* File: x86_64/op_long_to_int.S */ |
| 3375 | /* we ignore the high word, making this equivalent to a 32-bit reg move */ |
| 3376 | /* File: x86_64/op_move.S */ |
| 3377 | /* for move, move-object, long-to-int */ |
| 3378 | /* op vA, vB */ |
| 3379 | movl rINST, %eax # eax <- BA |
| 3380 | andb $0xf, %al # eax <- A |
| 3381 | shrl $4, rINST # rINST <- B |
| 3382 | GET_VREG %edx, rINSTq |
| 3383 | .if 0 |
| 3384 | SET_VREG_OBJECT %edx, %rax # fp[A] <- fp[B] |
| 3385 | .else |
| 3386 | SET_VREG %edx, %rax # fp[A] <- fp[B] |
| 3387 | .endif |
| 3388 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3389 | |
| 3390 | |
| 3391 | /* ------------------------------ */ |
| 3392 | .balign 128 |
| 3393 | .L_op_long_to_float: /* 0x85 */ |
| 3394 | /* File: x86_64/op_long_to_float.S */ |
| 3395 | /* File: x86_64/fpcvt.S */ |
| 3396 | /* |
| 3397 | * Generic 32-bit FP conversion operation. |
| 3398 | */ |
| 3399 | /* unop vA, vB */ |
| 3400 | movl rINST, %ecx # rcx <- A+ |
| 3401 | sarl $4, rINST # rINST <- B |
| 3402 | andb $0xf, %cl # ecx <- A |
| 3403 | cvtsi2ssq VREG_ADDRESS(rINSTq), %xmm0 |
| 3404 | .if 0 |
| 3405 | movsd %xmm0, VREG_ADDRESS(%rcx) |
| 3406 | CLEAR_WIDE_REF %rcx |
| 3407 | .else |
| 3408 | movss %xmm0, VREG_ADDRESS(%rcx) |
| 3409 | CLEAR_REF %rcx |
| 3410 | .endif |
| 3411 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3412 | |
| 3413 | |
| 3414 | /* ------------------------------ */ |
| 3415 | .balign 128 |
| 3416 | .L_op_long_to_double: /* 0x86 */ |
| 3417 | /* File: x86_64/op_long_to_double.S */ |
| 3418 | /* File: x86_64/fpcvt.S */ |
| 3419 | /* |
| 3420 | * Generic 32-bit FP conversion operation. |
| 3421 | */ |
| 3422 | /* unop vA, vB */ |
| 3423 | movl rINST, %ecx # rcx <- A+ |
| 3424 | sarl $4, rINST # rINST <- B |
| 3425 | andb $0xf, %cl # ecx <- A |
| 3426 | cvtsi2sdq VREG_ADDRESS(rINSTq), %xmm0 |
| 3427 | .if 1 |
| 3428 | movsd %xmm0, VREG_ADDRESS(%rcx) |
| 3429 | CLEAR_WIDE_REF %rcx |
| 3430 | .else |
| 3431 | movss %xmm0, VREG_ADDRESS(%rcx) |
| 3432 | CLEAR_REF %rcx |
| 3433 | .endif |
| 3434 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3435 | |
| 3436 | |
| 3437 | /* ------------------------------ */ |
| 3438 | .balign 128 |
| 3439 | .L_op_float_to_int: /* 0x87 */ |
| 3440 | /* File: x86_64/op_float_to_int.S */ |
| 3441 | /* File: x86_64/cvtfp_int.S */ |
| 3442 | /* On fp to int conversions, Java requires that |
| 3443 | * if the result > maxint, it should be clamped to maxint. If it is less |
| 3444 | * than minint, it should be clamped to minint. If it is a nan, the result |
| 3445 | * should be zero. Further, the rounding mode is to truncate. |
| 3446 | */ |
| 3447 | /* float/double to int/long vA, vB */ |
| 3448 | movl rINST, %ecx # rcx <- A+ |
| 3449 | sarl $4, rINST # rINST <- B |
| 3450 | andb $0xf, %cl # ecx <- A |
| 3451 | movss VREG_ADDRESS(rINSTq), %xmm0 |
| 3452 | movl $0x7fffffff, %eax |
| 3453 | cvtsi2ssl %eax, %xmm1 |
| 3454 | comiss %xmm1, %xmm0 |
| 3455 | jae 1f |
| 3456 | jp 2f |
| 3457 | cvttss2sil %xmm0, %eax |
| 3458 | jmp 1f |
| 3459 | 2: |
| 3460 | xorl %eax, %eax |
| 3461 | 1: |
| 3462 | .if 0 |
| 3463 | SET_WIDE_VREG %eax, %rcx |
| 3464 | .else |
| 3465 | SET_VREG %eax, %rcx |
| 3466 | .endif |
| 3467 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3468 | |
| 3469 | |
| 3470 | /* ------------------------------ */ |
| 3471 | .balign 128 |
| 3472 | .L_op_float_to_long: /* 0x88 */ |
| 3473 | /* File: x86_64/op_float_to_long.S */ |
| 3474 | /* File: x86_64/cvtfp_int.S */ |
| 3475 | /* On fp to int conversions, Java requires that |
| 3476 | * if the result > maxint, it should be clamped to maxint. If it is less |
| 3477 | * than minint, it should be clamped to minint. If it is a nan, the result |
| 3478 | * should be zero. Further, the rounding mode is to truncate. |
| 3479 | */ |
| 3480 | /* float/double to int/long vA, vB */ |
| 3481 | movl rINST, %ecx # rcx <- A+ |
| 3482 | sarl $4, rINST # rINST <- B |
| 3483 | andb $0xf, %cl # ecx <- A |
| 3484 | movss VREG_ADDRESS(rINSTq), %xmm0 |
| 3485 | movq $0x7fffffffffffffff, %rax |
| 3486 | cvtsi2ssq %rax, %xmm1 |
| 3487 | comiss %xmm1, %xmm0 |
| 3488 | jae 1f |
| 3489 | jp 2f |
| 3490 | cvttss2siq %xmm0, %rax |
| 3491 | jmp 1f |
| 3492 | 2: |
| 3493 | xorq %rax, %rax |
| 3494 | 1: |
| 3495 | .if 1 |
| 3496 | SET_WIDE_VREG %rax, %rcx |
| 3497 | .else |
| 3498 | SET_VREG %rax, %rcx |
| 3499 | .endif |
| 3500 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3501 | |
| 3502 | |
| 3503 | /* ------------------------------ */ |
| 3504 | .balign 128 |
| 3505 | .L_op_float_to_double: /* 0x89 */ |
| 3506 | /* File: x86_64/op_float_to_double.S */ |
| 3507 | /* File: x86_64/fpcvt.S */ |
| 3508 | /* |
| 3509 | * Generic 32-bit FP conversion operation. |
| 3510 | */ |
| 3511 | /* unop vA, vB */ |
| 3512 | movl rINST, %ecx # rcx <- A+ |
| 3513 | sarl $4, rINST # rINST <- B |
| 3514 | andb $0xf, %cl # ecx <- A |
| 3515 | cvtss2sd VREG_ADDRESS(rINSTq), %xmm0 |
| 3516 | .if 1 |
| 3517 | movsd %xmm0, VREG_ADDRESS(%rcx) |
| 3518 | CLEAR_WIDE_REF %rcx |
| 3519 | .else |
| 3520 | movss %xmm0, VREG_ADDRESS(%rcx) |
| 3521 | CLEAR_REF %rcx |
| 3522 | .endif |
| 3523 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3524 | |
| 3525 | |
| 3526 | /* ------------------------------ */ |
| 3527 | .balign 128 |
| 3528 | .L_op_double_to_int: /* 0x8a */ |
| 3529 | /* File: x86_64/op_double_to_int.S */ |
| 3530 | /* File: x86_64/cvtfp_int.S */ |
| 3531 | /* On fp to int conversions, Java requires that |
| 3532 | * if the result > maxint, it should be clamped to maxint. If it is less |
| 3533 | * than minint, it should be clamped to minint. If it is a nan, the result |
| 3534 | * should be zero. Further, the rounding mode is to truncate. |
| 3535 | */ |
| 3536 | /* float/double to int/long vA, vB */ |
| 3537 | movl rINST, %ecx # rcx <- A+ |
| 3538 | sarl $4, rINST # rINST <- B |
| 3539 | andb $0xf, %cl # ecx <- A |
| 3540 | movsd VREG_ADDRESS(rINSTq), %xmm0 |
| 3541 | movl $0x7fffffff, %eax |
| 3542 | cvtsi2sdl %eax, %xmm1 |
| 3543 | comisd %xmm1, %xmm0 |
| 3544 | jae 1f |
| 3545 | jp 2f |
| 3546 | cvttsd2sil %xmm0, %eax |
| 3547 | jmp 1f |
| 3548 | 2: |
| 3549 | xorl %eax, %eax |
| 3550 | 1: |
| 3551 | .if 0 |
| 3552 | SET_WIDE_VREG %eax, %rcx |
| 3553 | .else |
| 3554 | SET_VREG %eax, %rcx |
| 3555 | .endif |
| 3556 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3557 | |
| 3558 | |
| 3559 | /* ------------------------------ */ |
| 3560 | .balign 128 |
| 3561 | .L_op_double_to_long: /* 0x8b */ |
| 3562 | /* File: x86_64/op_double_to_long.S */ |
| 3563 | /* File: x86_64/cvtfp_int.S */ |
| 3564 | /* On fp to int conversions, Java requires that |
| 3565 | * if the result > maxint, it should be clamped to maxint. If it is less |
| 3566 | * than minint, it should be clamped to minint. If it is a nan, the result |
| 3567 | * should be zero. Further, the rounding mode is to truncate. |
| 3568 | */ |
| 3569 | /* float/double to int/long vA, vB */ |
| 3570 | movl rINST, %ecx # rcx <- A+ |
| 3571 | sarl $4, rINST # rINST <- B |
| 3572 | andb $0xf, %cl # ecx <- A |
| 3573 | movsd VREG_ADDRESS(rINSTq), %xmm0 |
| 3574 | movq $0x7fffffffffffffff, %rax |
| 3575 | cvtsi2sdq %rax, %xmm1 |
| 3576 | comisd %xmm1, %xmm0 |
| 3577 | jae 1f |
| 3578 | jp 2f |
| 3579 | cvttsd2siq %xmm0, %rax |
| 3580 | jmp 1f |
| 3581 | 2: |
| 3582 | xorq %rax, %rax |
| 3583 | 1: |
| 3584 | .if 1 |
| 3585 | SET_WIDE_VREG %rax, %rcx |
| 3586 | .else |
| 3587 | SET_VREG %rax, %rcx |
| 3588 | .endif |
| 3589 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3590 | |
| 3591 | |
| 3592 | /* ------------------------------ */ |
| 3593 | .balign 128 |
| 3594 | .L_op_double_to_float: /* 0x8c */ |
| 3595 | /* File: x86_64/op_double_to_float.S */ |
| 3596 | /* File: x86_64/fpcvt.S */ |
| 3597 | /* |
| 3598 | * Generic 32-bit FP conversion operation. |
| 3599 | */ |
| 3600 | /* unop vA, vB */ |
| 3601 | movl rINST, %ecx # rcx <- A+ |
| 3602 | sarl $4, rINST # rINST <- B |
| 3603 | andb $0xf, %cl # ecx <- A |
| 3604 | cvtsd2ss VREG_ADDRESS(rINSTq), %xmm0 |
| 3605 | .if 0 |
| 3606 | movsd %xmm0, VREG_ADDRESS(%rcx) |
| 3607 | CLEAR_WIDE_REF %rcx |
| 3608 | .else |
| 3609 | movss %xmm0, VREG_ADDRESS(%rcx) |
| 3610 | CLEAR_REF %rcx |
| 3611 | .endif |
| 3612 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3613 | |
| 3614 | |
| 3615 | /* ------------------------------ */ |
| 3616 | .balign 128 |
| 3617 | .L_op_int_to_byte: /* 0x8d */ |
| 3618 | /* File: x86_64/op_int_to_byte.S */ |
| 3619 | /* File: x86_64/unop.S */ |
| 3620 | /* |
| 3621 | * Generic 32/64-bit unary operation. Provide an "instr" line that |
| 3622 | * specifies an instruction that performs "result = op eax". |
| 3623 | */ |
| 3624 | /* unop vA, vB */ |
| 3625 | movl rINST, %ecx # rcx <- A+ |
| 3626 | sarl $4,rINST # rINST <- B |
| 3627 | .if 0 |
| 3628 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 3629 | .else |
| 3630 | GET_VREG %eax, rINSTq # eax <- vB |
| 3631 | .endif |
| 3632 | andb $0xf,%cl # ecx <- A |
| 3633 | |
| 3634 | movsbl %al, %eax |
| 3635 | .if 0 |
| 3636 | SET_WIDE_VREG %rax, %rcx |
| 3637 | .else |
| 3638 | SET_VREG %eax, %rcx |
| 3639 | .endif |
| 3640 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3641 | |
| 3642 | |
| 3643 | /* ------------------------------ */ |
| 3644 | .balign 128 |
| 3645 | .L_op_int_to_char: /* 0x8e */ |
| 3646 | /* File: x86_64/op_int_to_char.S */ |
| 3647 | /* File: x86_64/unop.S */ |
| 3648 | /* |
| 3649 | * Generic 32/64-bit unary operation. Provide an "instr" line that |
| 3650 | * specifies an instruction that performs "result = op eax". |
| 3651 | */ |
| 3652 | /* unop vA, vB */ |
| 3653 | movl rINST, %ecx # rcx <- A+ |
| 3654 | sarl $4,rINST # rINST <- B |
| 3655 | .if 0 |
| 3656 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 3657 | .else |
| 3658 | GET_VREG %eax, rINSTq # eax <- vB |
| 3659 | .endif |
| 3660 | andb $0xf,%cl # ecx <- A |
| 3661 | |
| 3662 | movzwl %ax,%eax |
| 3663 | .if 0 |
| 3664 | SET_WIDE_VREG %rax, %rcx |
| 3665 | .else |
| 3666 | SET_VREG %eax, %rcx |
| 3667 | .endif |
| 3668 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3669 | |
| 3670 | |
| 3671 | /* ------------------------------ */ |
| 3672 | .balign 128 |
| 3673 | .L_op_int_to_short: /* 0x8f */ |
| 3674 | /* File: x86_64/op_int_to_short.S */ |
| 3675 | /* File: x86_64/unop.S */ |
| 3676 | /* |
| 3677 | * Generic 32/64-bit unary operation. Provide an "instr" line that |
| 3678 | * specifies an instruction that performs "result = op eax". |
| 3679 | */ |
| 3680 | /* unop vA, vB */ |
| 3681 | movl rINST, %ecx # rcx <- A+ |
| 3682 | sarl $4,rINST # rINST <- B |
| 3683 | .if 0 |
| 3684 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 3685 | .else |
| 3686 | GET_VREG %eax, rINSTq # eax <- vB |
| 3687 | .endif |
| 3688 | andb $0xf,%cl # ecx <- A |
| 3689 | |
| 3690 | movswl %ax, %eax |
| 3691 | .if 0 |
| 3692 | SET_WIDE_VREG %rax, %rcx |
| 3693 | .else |
| 3694 | SET_VREG %eax, %rcx |
| 3695 | .endif |
| 3696 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 3697 | |
| 3698 | |
| 3699 | /* ------------------------------ */ |
| 3700 | .balign 128 |
| 3701 | .L_op_add_int: /* 0x90 */ |
| 3702 | /* File: x86_64/op_add_int.S */ |
| 3703 | /* File: x86_64/binop.S */ |
| 3704 | /* |
| 3705 | * Generic 32-bit binary operation. Provide an "instr" line that |
| 3706 | * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". |
| 3707 | * This could be an x86 instruction or a function call. (If the result |
| 3708 | * comes back in a register other than eax, you can override "result".) |
| 3709 | * |
| 3710 | * For: add-int, sub-int, and-int, or-int, |
| 3711 | * xor-int, shl-int, shr-int, ushr-int |
| 3712 | */ |
| 3713 | /* binop vAA, vBB, vCC */ |
| 3714 | movzbq 2(rPC), %rax # rax <- BB |
| 3715 | movzbq 3(rPC), %rcx # rcx <- CC |
| 3716 | GET_VREG %eax, %rax # eax <- vBB |
| 3717 | addl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax |
| 3718 | SET_VREG %eax, rINSTq |
| 3719 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 3720 | |
| 3721 | |
| 3722 | /* ------------------------------ */ |
| 3723 | .balign 128 |
| 3724 | .L_op_sub_int: /* 0x91 */ |
| 3725 | /* File: x86_64/op_sub_int.S */ |
| 3726 | /* File: x86_64/binop.S */ |
| 3727 | /* |
| 3728 | * Generic 32-bit binary operation. Provide an "instr" line that |
| 3729 | * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". |
| 3730 | * This could be an x86 instruction or a function call. (If the result |
| 3731 | * comes back in a register other than eax, you can override "result".) |
| 3732 | * |
| 3733 | * For: add-int, sub-int, and-int, or-int, |
| 3734 | * xor-int, shl-int, shr-int, ushr-int |
| 3735 | */ |
| 3736 | /* binop vAA, vBB, vCC */ |
| 3737 | movzbq 2(rPC), %rax # rax <- BB |
| 3738 | movzbq 3(rPC), %rcx # rcx <- CC |
| 3739 | GET_VREG %eax, %rax # eax <- vBB |
| 3740 | subl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax |
| 3741 | SET_VREG %eax, rINSTq |
| 3742 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 3743 | |
| 3744 | |
| 3745 | /* ------------------------------ */ |
| 3746 | .balign 128 |
| 3747 | .L_op_mul_int: /* 0x92 */ |
| 3748 | /* File: x86_64/op_mul_int.S */ |
| 3749 | /* File: x86_64/binop.S */ |
| 3750 | /* |
| 3751 | * Generic 32-bit binary operation. Provide an "instr" line that |
| 3752 | * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". |
| 3753 | * This could be an x86 instruction or a function call. (If the result |
| 3754 | * comes back in a register other than eax, you can override "result".) |
| 3755 | * |
| 3756 | * For: add-int, sub-int, and-int, or-int, |
| 3757 | * xor-int, shl-int, shr-int, ushr-int |
| 3758 | */ |
| 3759 | /* binop vAA, vBB, vCC */ |
| 3760 | movzbq 2(rPC), %rax # rax <- BB |
| 3761 | movzbq 3(rPC), %rcx # rcx <- CC |
| 3762 | GET_VREG %eax, %rax # eax <- vBB |
| 3763 | imull (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax |
| 3764 | SET_VREG %eax, rINSTq |
| 3765 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 3766 | |
| 3767 | |
| 3768 | /* ------------------------------ */ |
| 3769 | .balign 128 |
| 3770 | .L_op_div_int: /* 0x93 */ |
| 3771 | /* File: x86_64/op_div_int.S */ |
| 3772 | /* File: x86_64/bindiv.S */ |
| 3773 | /* |
| 3774 | * 32-bit binary div/rem operation. Handles special case of op1=-1. |
| 3775 | */ |
| 3776 | /* div/rem vAA, vBB, vCC */ |
| 3777 | movzbq 2(rPC), %rax # rax <- BB |
| 3778 | movzbq 3(rPC), %rcx # rcx <- CC |
| 3779 | .if 0 |
| 3780 | GET_WIDE_VREG %rax, %rax # eax <- vBB |
| 3781 | GET_WIDE_VREG %ecx, %rcx # ecx <- vCC |
| 3782 | .else |
| 3783 | GET_VREG %eax, %rax # eax <- vBB |
| 3784 | GET_VREG %ecx, %rcx # ecx <- vCC |
| 3785 | .endif |
| 3786 | testl %ecx, %ecx |
| 3787 | jz common_errDivideByZero |
| 3788 | cmpl $-1, %ecx |
| 3789 | je 2f |
| 3790 | cdq # rdx:rax <- sign-extended of rax |
| 3791 | idivl %ecx |
| 3792 | 1: |
| 3793 | .if 0 |
| 3794 | SET_WIDE_VREG %eax, rINSTq # eax <- vBB |
| 3795 | .else |
| 3796 | SET_VREG %eax, rINSTq # eax <- vBB |
| 3797 | .endif |
| 3798 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 3799 | 2: |
| 3800 | .if 0 |
| 3801 | xorl %eax, %eax |
| 3802 | .else |
| 3803 | negl %eax |
| 3804 | .endif |
| 3805 | jmp 1b |
| 3806 | |
| 3807 | |
| 3808 | /* ------------------------------ */ |
| 3809 | .balign 128 |
| 3810 | .L_op_rem_int: /* 0x94 */ |
| 3811 | /* File: x86_64/op_rem_int.S */ |
| 3812 | /* File: x86_64/bindiv.S */ |
| 3813 | /* |
| 3814 | * 32-bit binary div/rem operation. Handles special case of op1=-1. |
| 3815 | */ |
| 3816 | /* div/rem vAA, vBB, vCC */ |
| 3817 | movzbq 2(rPC), %rax # rax <- BB |
| 3818 | movzbq 3(rPC), %rcx # rcx <- CC |
| 3819 | .if 0 |
| 3820 | GET_WIDE_VREG %rax, %rax # eax <- vBB |
| 3821 | GET_WIDE_VREG %ecx, %rcx # ecx <- vCC |
| 3822 | .else |
| 3823 | GET_VREG %eax, %rax # eax <- vBB |
| 3824 | GET_VREG %ecx, %rcx # ecx <- vCC |
| 3825 | .endif |
| 3826 | testl %ecx, %ecx |
| 3827 | jz common_errDivideByZero |
| 3828 | cmpl $-1, %ecx |
| 3829 | je 2f |
| 3830 | cdq # rdx:rax <- sign-extended of rax |
| 3831 | idivl %ecx |
| 3832 | 1: |
| 3833 | .if 0 |
| 3834 | SET_WIDE_VREG %edx, rINSTq # eax <- vBB |
| 3835 | .else |
| 3836 | SET_VREG %edx, rINSTq # eax <- vBB |
| 3837 | .endif |
| 3838 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 3839 | 2: |
| 3840 | .if 1 |
| 3841 | xorl %edx, %edx |
| 3842 | .else |
| 3843 | negl %edx |
| 3844 | .endif |
| 3845 | jmp 1b |
| 3846 | |
| 3847 | |
| 3848 | /* ------------------------------ */ |
| 3849 | .balign 128 |
| 3850 | .L_op_and_int: /* 0x95 */ |
| 3851 | /* File: x86_64/op_and_int.S */ |
| 3852 | /* File: x86_64/binop.S */ |
| 3853 | /* |
| 3854 | * Generic 32-bit binary operation. Provide an "instr" line that |
| 3855 | * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". |
| 3856 | * This could be an x86 instruction or a function call. (If the result |
| 3857 | * comes back in a register other than eax, you can override "result".) |
| 3858 | * |
| 3859 | * For: add-int, sub-int, and-int, or-int, |
| 3860 | * xor-int, shl-int, shr-int, ushr-int |
| 3861 | */ |
| 3862 | /* binop vAA, vBB, vCC */ |
| 3863 | movzbq 2(rPC), %rax # rax <- BB |
| 3864 | movzbq 3(rPC), %rcx # rcx <- CC |
| 3865 | GET_VREG %eax, %rax # eax <- vBB |
| 3866 | andl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax |
| 3867 | SET_VREG %eax, rINSTq |
| 3868 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 3869 | |
| 3870 | |
| 3871 | /* ------------------------------ */ |
| 3872 | .balign 128 |
| 3873 | .L_op_or_int: /* 0x96 */ |
| 3874 | /* File: x86_64/op_or_int.S */ |
| 3875 | /* File: x86_64/binop.S */ |
| 3876 | /* |
| 3877 | * Generic 32-bit binary operation. Provide an "instr" line that |
| 3878 | * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". |
| 3879 | * This could be an x86 instruction or a function call. (If the result |
| 3880 | * comes back in a register other than eax, you can override "result".) |
| 3881 | * |
| 3882 | * For: add-int, sub-int, and-int, or-int, |
| 3883 | * xor-int, shl-int, shr-int, ushr-int |
| 3884 | */ |
| 3885 | /* binop vAA, vBB, vCC */ |
| 3886 | movzbq 2(rPC), %rax # rax <- BB |
| 3887 | movzbq 3(rPC), %rcx # rcx <- CC |
| 3888 | GET_VREG %eax, %rax # eax <- vBB |
| 3889 | orl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax |
| 3890 | SET_VREG %eax, rINSTq |
| 3891 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 3892 | |
| 3893 | |
| 3894 | /* ------------------------------ */ |
| 3895 | .balign 128 |
| 3896 | .L_op_xor_int: /* 0x97 */ |
| 3897 | /* File: x86_64/op_xor_int.S */ |
| 3898 | /* File: x86_64/binop.S */ |
| 3899 | /* |
| 3900 | * Generic 32-bit binary operation. Provide an "instr" line that |
| 3901 | * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". |
| 3902 | * This could be an x86 instruction or a function call. (If the result |
| 3903 | * comes back in a register other than eax, you can override "result".) |
| 3904 | * |
| 3905 | * For: add-int, sub-int, and-int, or-int, |
| 3906 | * xor-int, shl-int, shr-int, ushr-int |
| 3907 | */ |
| 3908 | /* binop vAA, vBB, vCC */ |
| 3909 | movzbq 2(rPC), %rax # rax <- BB |
| 3910 | movzbq 3(rPC), %rcx # rcx <- CC |
| 3911 | GET_VREG %eax, %rax # eax <- vBB |
| 3912 | xorl (rFP,%rcx,4), %eax # ex: addl (rFP,%rcx,4),%eax |
| 3913 | SET_VREG %eax, rINSTq |
| 3914 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 3915 | |
| 3916 | |
| 3917 | /* ------------------------------ */ |
| 3918 | .balign 128 |
| 3919 | .L_op_shl_int: /* 0x98 */ |
| 3920 | /* File: x86_64/op_shl_int.S */ |
| 3921 | /* File: x86_64/binop1.S */ |
| 3922 | /* |
| 3923 | * Generic 32-bit binary operation in which both operands loaded to |
| 3924 | * registers (op0 in eax, op1 in ecx). |
| 3925 | */ |
| 3926 | /* binop vAA, vBB, vCC */ |
| 3927 | movzbq 2(rPC), %rax # eax <- BB |
| 3928 | movzbq 3(rPC), %rcx # ecx <- CC |
| 3929 | GET_VREG %ecx, %rcx # eax <- vCC |
| 3930 | .if 0 |
| 3931 | GET_WIDE_VREG %rax, %rax # rax <- vBB |
| 3932 | sall %cl, %eax # ex: addl %ecx,%eax |
| 3933 | SET_WIDE_VREG %rax, rINSTq |
| 3934 | .else |
| 3935 | GET_VREG %eax, %rax # eax <- vBB |
| 3936 | sall %cl, %eax # ex: addl %ecx,%eax |
| 3937 | SET_VREG %eax, rINSTq |
| 3938 | .endif |
| 3939 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 3940 | |
| 3941 | |
| 3942 | /* ------------------------------ */ |
| 3943 | .balign 128 |
| 3944 | .L_op_shr_int: /* 0x99 */ |
| 3945 | /* File: x86_64/op_shr_int.S */ |
| 3946 | /* File: x86_64/binop1.S */ |
| 3947 | /* |
| 3948 | * Generic 32-bit binary operation in which both operands loaded to |
| 3949 | * registers (op0 in eax, op1 in ecx). |
| 3950 | */ |
| 3951 | /* binop vAA, vBB, vCC */ |
| 3952 | movzbq 2(rPC), %rax # eax <- BB |
| 3953 | movzbq 3(rPC), %rcx # ecx <- CC |
| 3954 | GET_VREG %ecx, %rcx # eax <- vCC |
| 3955 | .if 0 |
| 3956 | GET_WIDE_VREG %rax, %rax # rax <- vBB |
| 3957 | sarl %cl, %eax # ex: addl %ecx,%eax |
| 3958 | SET_WIDE_VREG %rax, rINSTq |
| 3959 | .else |
| 3960 | GET_VREG %eax, %rax # eax <- vBB |
| 3961 | sarl %cl, %eax # ex: addl %ecx,%eax |
| 3962 | SET_VREG %eax, rINSTq |
| 3963 | .endif |
| 3964 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 3965 | |
| 3966 | |
| 3967 | /* ------------------------------ */ |
| 3968 | .balign 128 |
| 3969 | .L_op_ushr_int: /* 0x9a */ |
| 3970 | /* File: x86_64/op_ushr_int.S */ |
| 3971 | /* File: x86_64/binop1.S */ |
| 3972 | /* |
| 3973 | * Generic 32-bit binary operation in which both operands loaded to |
| 3974 | * registers (op0 in eax, op1 in ecx). |
| 3975 | */ |
| 3976 | /* binop vAA, vBB, vCC */ |
| 3977 | movzbq 2(rPC), %rax # eax <- BB |
| 3978 | movzbq 3(rPC), %rcx # ecx <- CC |
| 3979 | GET_VREG %ecx, %rcx # eax <- vCC |
| 3980 | .if 0 |
| 3981 | GET_WIDE_VREG %rax, %rax # rax <- vBB |
| 3982 | shrl %cl, %eax # ex: addl %ecx,%eax |
| 3983 | SET_WIDE_VREG %rax, rINSTq |
| 3984 | .else |
| 3985 | GET_VREG %eax, %rax # eax <- vBB |
| 3986 | shrl %cl, %eax # ex: addl %ecx,%eax |
| 3987 | SET_VREG %eax, rINSTq |
| 3988 | .endif |
| 3989 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 3990 | |
| 3991 | |
| 3992 | /* ------------------------------ */ |
| 3993 | .balign 128 |
| 3994 | .L_op_add_long: /* 0x9b */ |
| 3995 | /* File: x86_64/op_add_long.S */ |
| 3996 | /* File: x86_64/binopWide.S */ |
| 3997 | /* |
| 3998 | * Generic 64-bit binary operation. |
| 3999 | */ |
| 4000 | /* binop vAA, vBB, vCC */ |
| 4001 | movzbq 2(rPC), %rax # eax <- BB |
| 4002 | movzbq 3(rPC), %rcx # ecx <- CC |
| 4003 | GET_WIDE_VREG %rax, %rax # rax <- v[BB] |
| 4004 | addq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax |
| 4005 | SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax |
| 4006 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4007 | |
| 4008 | |
| 4009 | /* ------------------------------ */ |
| 4010 | .balign 128 |
| 4011 | .L_op_sub_long: /* 0x9c */ |
| 4012 | /* File: x86_64/op_sub_long.S */ |
| 4013 | /* File: x86_64/binopWide.S */ |
| 4014 | /* |
| 4015 | * Generic 64-bit binary operation. |
| 4016 | */ |
| 4017 | /* binop vAA, vBB, vCC */ |
| 4018 | movzbq 2(rPC), %rax # eax <- BB |
| 4019 | movzbq 3(rPC), %rcx # ecx <- CC |
| 4020 | GET_WIDE_VREG %rax, %rax # rax <- v[BB] |
| 4021 | subq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax |
| 4022 | SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax |
| 4023 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4024 | |
| 4025 | |
| 4026 | /* ------------------------------ */ |
| 4027 | .balign 128 |
| 4028 | .L_op_mul_long: /* 0x9d */ |
| 4029 | /* File: x86_64/op_mul_long.S */ |
| 4030 | /* File: x86_64/binopWide.S */ |
| 4031 | /* |
| 4032 | * Generic 64-bit binary operation. |
| 4033 | */ |
| 4034 | /* binop vAA, vBB, vCC */ |
| 4035 | movzbq 2(rPC), %rax # eax <- BB |
| 4036 | movzbq 3(rPC), %rcx # ecx <- CC |
| 4037 | GET_WIDE_VREG %rax, %rax # rax <- v[BB] |
| 4038 | imulq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax |
| 4039 | SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax |
| 4040 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4041 | |
| 4042 | |
| 4043 | /* ------------------------------ */ |
| 4044 | .balign 128 |
| 4045 | .L_op_div_long: /* 0x9e */ |
| 4046 | /* File: x86_64/op_div_long.S */ |
| 4047 | /* File: x86_64/bindiv.S */ |
| 4048 | /* |
| 4049 | * 32-bit binary div/rem operation. Handles special case of op1=-1. |
| 4050 | */ |
| 4051 | /* div/rem vAA, vBB, vCC */ |
| 4052 | movzbq 2(rPC), %rax # rax <- BB |
| 4053 | movzbq 3(rPC), %rcx # rcx <- CC |
| 4054 | .if 1 |
| 4055 | GET_WIDE_VREG %rax, %rax # eax <- vBB |
| 4056 | GET_WIDE_VREG %rcx, %rcx # ecx <- vCC |
| 4057 | .else |
| 4058 | GET_VREG %eax, %rax # eax <- vBB |
| 4059 | GET_VREG %rcx, %rcx # ecx <- vCC |
| 4060 | .endif |
| 4061 | testq %rcx, %rcx |
| 4062 | jz common_errDivideByZero |
| 4063 | cmpq $-1, %rcx |
| 4064 | je 2f |
| 4065 | cqo # rdx:rax <- sign-extended of rax |
| 4066 | idivq %rcx |
| 4067 | 1: |
| 4068 | .if 1 |
| 4069 | SET_WIDE_VREG %rax, rINSTq # eax <- vBB |
| 4070 | .else |
| 4071 | SET_VREG %rax, rINSTq # eax <- vBB |
| 4072 | .endif |
| 4073 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4074 | 2: |
| 4075 | .if 0 |
| 4076 | xorq %rax, %rax |
| 4077 | .else |
| 4078 | negq %rax |
| 4079 | .endif |
| 4080 | jmp 1b |
| 4081 | |
| 4082 | |
| 4083 | /* ------------------------------ */ |
| 4084 | .balign 128 |
| 4085 | .L_op_rem_long: /* 0x9f */ |
| 4086 | /* File: x86_64/op_rem_long.S */ |
| 4087 | /* File: x86_64/bindiv.S */ |
| 4088 | /* |
| 4089 | * 32-bit binary div/rem operation. Handles special case of op1=-1. |
| 4090 | */ |
| 4091 | /* div/rem vAA, vBB, vCC */ |
| 4092 | movzbq 2(rPC), %rax # rax <- BB |
| 4093 | movzbq 3(rPC), %rcx # rcx <- CC |
| 4094 | .if 1 |
| 4095 | GET_WIDE_VREG %rax, %rax # eax <- vBB |
| 4096 | GET_WIDE_VREG %rcx, %rcx # ecx <- vCC |
| 4097 | .else |
| 4098 | GET_VREG %eax, %rax # eax <- vBB |
| 4099 | GET_VREG %rcx, %rcx # ecx <- vCC |
| 4100 | .endif |
| 4101 | testq %rcx, %rcx |
| 4102 | jz common_errDivideByZero |
| 4103 | cmpq $-1, %rcx |
| 4104 | je 2f |
| 4105 | cqo # rdx:rax <- sign-extended of rax |
| 4106 | idivq %rcx |
| 4107 | 1: |
| 4108 | .if 1 |
| 4109 | SET_WIDE_VREG %rdx, rINSTq # eax <- vBB |
| 4110 | .else |
| 4111 | SET_VREG %rdx, rINSTq # eax <- vBB |
| 4112 | .endif |
| 4113 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4114 | 2: |
| 4115 | .if 1 |
| 4116 | xorq %rdx, %rdx |
| 4117 | .else |
| 4118 | negq %rdx |
| 4119 | .endif |
| 4120 | jmp 1b |
| 4121 | |
| 4122 | |
| 4123 | /* ------------------------------ */ |
| 4124 | .balign 128 |
| 4125 | .L_op_and_long: /* 0xa0 */ |
| 4126 | /* File: x86_64/op_and_long.S */ |
| 4127 | /* File: x86_64/binopWide.S */ |
| 4128 | /* |
| 4129 | * Generic 64-bit binary operation. |
| 4130 | */ |
| 4131 | /* binop vAA, vBB, vCC */ |
| 4132 | movzbq 2(rPC), %rax # eax <- BB |
| 4133 | movzbq 3(rPC), %rcx # ecx <- CC |
| 4134 | GET_WIDE_VREG %rax, %rax # rax <- v[BB] |
| 4135 | andq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax |
| 4136 | SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax |
| 4137 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4138 | |
| 4139 | |
| 4140 | /* ------------------------------ */ |
| 4141 | .balign 128 |
| 4142 | .L_op_or_long: /* 0xa1 */ |
| 4143 | /* File: x86_64/op_or_long.S */ |
| 4144 | /* File: x86_64/binopWide.S */ |
| 4145 | /* |
| 4146 | * Generic 64-bit binary operation. |
| 4147 | */ |
| 4148 | /* binop vAA, vBB, vCC */ |
| 4149 | movzbq 2(rPC), %rax # eax <- BB |
| 4150 | movzbq 3(rPC), %rcx # ecx <- CC |
| 4151 | GET_WIDE_VREG %rax, %rax # rax <- v[BB] |
| 4152 | orq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax |
| 4153 | SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax |
| 4154 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4155 | |
| 4156 | |
| 4157 | /* ------------------------------ */ |
| 4158 | .balign 128 |
| 4159 | .L_op_xor_long: /* 0xa2 */ |
| 4160 | /* File: x86_64/op_xor_long.S */ |
| 4161 | /* File: x86_64/binopWide.S */ |
| 4162 | /* |
| 4163 | * Generic 64-bit binary operation. |
| 4164 | */ |
| 4165 | /* binop vAA, vBB, vCC */ |
| 4166 | movzbq 2(rPC), %rax # eax <- BB |
| 4167 | movzbq 3(rPC), %rcx # ecx <- CC |
| 4168 | GET_WIDE_VREG %rax, %rax # rax <- v[BB] |
| 4169 | xorq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax |
| 4170 | SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax |
| 4171 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4172 | |
| 4173 | |
| 4174 | /* ------------------------------ */ |
| 4175 | .balign 128 |
| 4176 | .L_op_shl_long: /* 0xa3 */ |
| 4177 | /* File: x86_64/op_shl_long.S */ |
| 4178 | /* File: x86_64/binop1.S */ |
| 4179 | /* |
| 4180 | * Generic 32-bit binary operation in which both operands loaded to |
| 4181 | * registers (op0 in eax, op1 in ecx). |
| 4182 | */ |
| 4183 | /* binop vAA, vBB, vCC */ |
| 4184 | movzbq 2(rPC), %rax # eax <- BB |
| 4185 | movzbq 3(rPC), %rcx # ecx <- CC |
| 4186 | GET_VREG %ecx, %rcx # eax <- vCC |
| 4187 | .if 1 |
| 4188 | GET_WIDE_VREG %rax, %rax # rax <- vBB |
| 4189 | salq %cl, %rax # ex: addl %ecx,%eax |
| 4190 | SET_WIDE_VREG %rax, rINSTq |
| 4191 | .else |
| 4192 | GET_VREG %eax, %rax # eax <- vBB |
| 4193 | salq %cl, %rax # ex: addl %ecx,%eax |
| 4194 | SET_VREG %eax, rINSTq |
| 4195 | .endif |
| 4196 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4197 | |
| 4198 | |
| 4199 | /* ------------------------------ */ |
| 4200 | .balign 128 |
| 4201 | .L_op_shr_long: /* 0xa4 */ |
| 4202 | /* File: x86_64/op_shr_long.S */ |
| 4203 | /* File: x86_64/binop1.S */ |
| 4204 | /* |
| 4205 | * Generic 32-bit binary operation in which both operands loaded to |
| 4206 | * registers (op0 in eax, op1 in ecx). |
| 4207 | */ |
| 4208 | /* binop vAA, vBB, vCC */ |
| 4209 | movzbq 2(rPC), %rax # eax <- BB |
| 4210 | movzbq 3(rPC), %rcx # ecx <- CC |
| 4211 | GET_VREG %ecx, %rcx # eax <- vCC |
| 4212 | .if 1 |
| 4213 | GET_WIDE_VREG %rax, %rax # rax <- vBB |
| 4214 | sarq %cl, %rax # ex: addl %ecx,%eax |
| 4215 | SET_WIDE_VREG %rax, rINSTq |
| 4216 | .else |
| 4217 | GET_VREG %eax, %rax # eax <- vBB |
| 4218 | sarq %cl, %rax # ex: addl %ecx,%eax |
| 4219 | SET_VREG %eax, rINSTq |
| 4220 | .endif |
| 4221 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4222 | |
| 4223 | |
| 4224 | /* ------------------------------ */ |
| 4225 | .balign 128 |
| 4226 | .L_op_ushr_long: /* 0xa5 */ |
| 4227 | /* File: x86_64/op_ushr_long.S */ |
| 4228 | /* File: x86_64/binop1.S */ |
| 4229 | /* |
| 4230 | * Generic 32-bit binary operation in which both operands loaded to |
| 4231 | * registers (op0 in eax, op1 in ecx). |
| 4232 | */ |
| 4233 | /* binop vAA, vBB, vCC */ |
| 4234 | movzbq 2(rPC), %rax # eax <- BB |
| 4235 | movzbq 3(rPC), %rcx # ecx <- CC |
| 4236 | GET_VREG %ecx, %rcx # eax <- vCC |
| 4237 | .if 1 |
| 4238 | GET_WIDE_VREG %rax, %rax # rax <- vBB |
| 4239 | shrq %cl, %rax # ex: addl %ecx,%eax |
| 4240 | SET_WIDE_VREG %rax, rINSTq |
| 4241 | .else |
| 4242 | GET_VREG %eax, %rax # eax <- vBB |
| 4243 | shrq %cl, %rax # ex: addl %ecx,%eax |
| 4244 | SET_VREG %eax, rINSTq |
| 4245 | .endif |
| 4246 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4247 | |
| 4248 | |
| 4249 | /* ------------------------------ */ |
| 4250 | .balign 128 |
| 4251 | .L_op_add_float: /* 0xa6 */ |
| 4252 | /* File: x86_64/op_add_float.S */ |
| 4253 | /* File: x86_64/sseBinop.S */ |
| 4254 | movzbq 2(rPC), %rcx # ecx <- BB |
| 4255 | movzbq 3(rPC), %rax # eax <- CC |
| 4256 | movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 4257 | addss VREG_ADDRESS(%rax), %xmm0 |
| 4258 | movss %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 |
| 4259 | pxor %xmm0, %xmm0 |
| 4260 | movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 4261 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4262 | |
| 4263 | |
| 4264 | /* ------------------------------ */ |
| 4265 | .balign 128 |
| 4266 | .L_op_sub_float: /* 0xa7 */ |
| 4267 | /* File: x86_64/op_sub_float.S */ |
| 4268 | /* File: x86_64/sseBinop.S */ |
| 4269 | movzbq 2(rPC), %rcx # ecx <- BB |
| 4270 | movzbq 3(rPC), %rax # eax <- CC |
| 4271 | movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 4272 | subss VREG_ADDRESS(%rax), %xmm0 |
| 4273 | movss %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 |
| 4274 | pxor %xmm0, %xmm0 |
| 4275 | movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 4276 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4277 | |
| 4278 | |
| 4279 | /* ------------------------------ */ |
| 4280 | .balign 128 |
| 4281 | .L_op_mul_float: /* 0xa8 */ |
| 4282 | /* File: x86_64/op_mul_float.S */ |
| 4283 | /* File: x86_64/sseBinop.S */ |
| 4284 | movzbq 2(rPC), %rcx # ecx <- BB |
| 4285 | movzbq 3(rPC), %rax # eax <- CC |
| 4286 | movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 4287 | mulss VREG_ADDRESS(%rax), %xmm0 |
| 4288 | movss %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 |
| 4289 | pxor %xmm0, %xmm0 |
| 4290 | movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 4291 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4292 | |
| 4293 | |
| 4294 | /* ------------------------------ */ |
| 4295 | .balign 128 |
| 4296 | .L_op_div_float: /* 0xa9 */ |
| 4297 | /* File: x86_64/op_div_float.S */ |
| 4298 | /* File: x86_64/sseBinop.S */ |
| 4299 | movzbq 2(rPC), %rcx # ecx <- BB |
| 4300 | movzbq 3(rPC), %rax # eax <- CC |
| 4301 | movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 4302 | divss VREG_ADDRESS(%rax), %xmm0 |
| 4303 | movss %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 |
| 4304 | pxor %xmm0, %xmm0 |
| 4305 | movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 4306 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4307 | |
| 4308 | |
| 4309 | /* ------------------------------ */ |
| 4310 | .balign 128 |
| 4311 | .L_op_rem_float: /* 0xaa */ |
| 4312 | /* File: x86_64/op_rem_float.S */ |
| 4313 | /* rem_float vAA, vBB, vCC */ |
| 4314 | movzbq 3(rPC), %rcx # ecx <- BB |
| 4315 | movzbq 2(rPC), %rax # eax <- CC |
| 4316 | flds VREG_ADDRESS(%rcx) # vBB to fp stack |
| 4317 | flds VREG_ADDRESS(%rax) # vCC to fp stack |
| 4318 | 1: |
| 4319 | fprem |
| 4320 | fstsw %ax |
| 4321 | sahf |
| 4322 | jp 1b |
| 4323 | fstp %st(1) |
| 4324 | fstps VREG_ADDRESS(rINSTq) # %st to vAA |
| 4325 | CLEAR_REF rINSTq |
| 4326 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4327 | |
| 4328 | /* ------------------------------ */ |
| 4329 | .balign 128 |
| 4330 | .L_op_add_double: /* 0xab */ |
| 4331 | /* File: x86_64/op_add_double.S */ |
| 4332 | /* File: x86_64/sseBinop.S */ |
| 4333 | movzbq 2(rPC), %rcx # ecx <- BB |
| 4334 | movzbq 3(rPC), %rax # eax <- CC |
| 4335 | movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 4336 | addsd VREG_ADDRESS(%rax), %xmm0 |
| 4337 | movsd %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 |
| 4338 | pxor %xmm0, %xmm0 |
| 4339 | movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 4340 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4341 | |
| 4342 | |
| 4343 | /* ------------------------------ */ |
| 4344 | .balign 128 |
| 4345 | .L_op_sub_double: /* 0xac */ |
| 4346 | /* File: x86_64/op_sub_double.S */ |
| 4347 | /* File: x86_64/sseBinop.S */ |
| 4348 | movzbq 2(rPC), %rcx # ecx <- BB |
| 4349 | movzbq 3(rPC), %rax # eax <- CC |
| 4350 | movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 4351 | subsd VREG_ADDRESS(%rax), %xmm0 |
| 4352 | movsd %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 |
| 4353 | pxor %xmm0, %xmm0 |
| 4354 | movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 4355 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4356 | |
| 4357 | |
| 4358 | /* ------------------------------ */ |
| 4359 | .balign 128 |
| 4360 | .L_op_mul_double: /* 0xad */ |
| 4361 | /* File: x86_64/op_mul_double.S */ |
| 4362 | /* File: x86_64/sseBinop.S */ |
| 4363 | movzbq 2(rPC), %rcx # ecx <- BB |
| 4364 | movzbq 3(rPC), %rax # eax <- CC |
| 4365 | movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 4366 | mulsd VREG_ADDRESS(%rax), %xmm0 |
| 4367 | movsd %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 |
| 4368 | pxor %xmm0, %xmm0 |
| 4369 | movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 4370 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4371 | |
| 4372 | |
| 4373 | /* ------------------------------ */ |
| 4374 | .balign 128 |
| 4375 | .L_op_div_double: /* 0xae */ |
| 4376 | /* File: x86_64/op_div_double.S */ |
| 4377 | /* File: x86_64/sseBinop.S */ |
| 4378 | movzbq 2(rPC), %rcx # ecx <- BB |
| 4379 | movzbq 3(rPC), %rax # eax <- CC |
| 4380 | movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 4381 | divsd VREG_ADDRESS(%rax), %xmm0 |
| 4382 | movsd %xmm0, VREG_ADDRESS(rINSTq) # vAA <- %xmm0 |
| 4383 | pxor %xmm0, %xmm0 |
| 4384 | movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 4385 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4386 | |
| 4387 | |
| 4388 | /* ------------------------------ */ |
| 4389 | .balign 128 |
| 4390 | .L_op_rem_double: /* 0xaf */ |
| 4391 | /* File: x86_64/op_rem_double.S */ |
| 4392 | /* rem_double vAA, vBB, vCC */ |
| 4393 | movzbq 3(rPC), %rcx # ecx <- BB |
| 4394 | movzbq 2(rPC), %rax # eax <- CC |
| 4395 | fldl VREG_ADDRESS(%rcx) # %st1 <- fp[vBB] |
| 4396 | fldl VREG_ADDRESS(%rax) # %st0 <- fp[vCC] |
| 4397 | 1: |
| 4398 | fprem |
| 4399 | fstsw %ax |
| 4400 | sahf |
| 4401 | jp 1b |
| 4402 | fstp %st(1) |
| 4403 | fstpl VREG_ADDRESS(rINSTq) # fp[vAA] <- %st |
| 4404 | CLEAR_WIDE_REF rINSTq |
| 4405 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 4406 | |
| 4407 | /* ------------------------------ */ |
| 4408 | .balign 128 |
| 4409 | .L_op_add_int_2addr: /* 0xb0 */ |
| 4410 | /* File: x86_64/op_add_int_2addr.S */ |
| 4411 | /* File: x86_64/binop2addr.S */ |
| 4412 | /* |
| 4413 | * Generic 32-bit "/2addr" binary operation. Provide an "instr" line |
| 4414 | * that specifies an instruction that performs "result = r0 op r1". |
| 4415 | * This could be an instruction or a function call. |
| 4416 | * |
| 4417 | * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, |
| 4418 | * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, |
| 4419 | * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, |
| 4420 | * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr |
| 4421 | */ |
| 4422 | /* binop/2addr vA, vB */ |
| 4423 | movl rINST, %ecx # rcx <- A+ |
| 4424 | sarl $4, rINST # rINST <- B |
| 4425 | andb $0xf, %cl # ecx <- A |
| 4426 | GET_VREG %eax, rINSTq # eax <- vB |
| 4427 | addl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) |
| 4428 | CLEAR_REF %rcx |
| 4429 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4430 | |
| 4431 | |
| 4432 | /* ------------------------------ */ |
| 4433 | .balign 128 |
| 4434 | .L_op_sub_int_2addr: /* 0xb1 */ |
| 4435 | /* File: x86_64/op_sub_int_2addr.S */ |
| 4436 | /* File: x86_64/binop2addr.S */ |
| 4437 | /* |
| 4438 | * Generic 32-bit "/2addr" binary operation. Provide an "instr" line |
| 4439 | * that specifies an instruction that performs "result = r0 op r1". |
| 4440 | * This could be an instruction or a function call. |
| 4441 | * |
| 4442 | * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, |
| 4443 | * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, |
| 4444 | * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, |
| 4445 | * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr |
| 4446 | */ |
| 4447 | /* binop/2addr vA, vB */ |
| 4448 | movl rINST, %ecx # rcx <- A+ |
| 4449 | sarl $4, rINST # rINST <- B |
| 4450 | andb $0xf, %cl # ecx <- A |
| 4451 | GET_VREG %eax, rINSTq # eax <- vB |
| 4452 | subl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) |
| 4453 | CLEAR_REF %rcx |
| 4454 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4455 | |
| 4456 | |
| 4457 | /* ------------------------------ */ |
| 4458 | .balign 128 |
| 4459 | .L_op_mul_int_2addr: /* 0xb2 */ |
| 4460 | /* File: x86_64/op_mul_int_2addr.S */ |
| 4461 | /* mul vA, vB */ |
| 4462 | movl rINST, %ecx # rcx <- A+ |
| 4463 | sarl $4, rINST # rINST <- B |
| 4464 | andb $0xf, %cl # ecx <- A |
| 4465 | GET_VREG %eax, %rcx # eax <- vA |
| 4466 | imull (rFP,rINSTq,4), %eax |
| 4467 | SET_VREG %eax, %rcx |
| 4468 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4469 | |
| 4470 | /* ------------------------------ */ |
| 4471 | .balign 128 |
| 4472 | .L_op_div_int_2addr: /* 0xb3 */ |
| 4473 | /* File: x86_64/op_div_int_2addr.S */ |
| 4474 | /* File: x86_64/bindiv2addr.S */ |
| 4475 | /* |
| 4476 | * 32-bit binary div/rem operation. Handles special case of op1=-1. |
| 4477 | */ |
| 4478 | /* div/rem/2addr vA, vB */ |
| 4479 | movl rINST, %ecx # rcx <- BA |
| 4480 | sarl $4, %ecx # rcx <- B |
| 4481 | andb $0xf, rINSTbl # rINST <- A |
| 4482 | .if 0 |
| 4483 | GET_WIDE_VREG %rax, rINSTq # eax <- vA |
| 4484 | GET_WIDE_VREG %ecx, %rcx # ecx <- vB |
| 4485 | .else |
| 4486 | GET_VREG %eax, rINSTq # eax <- vA |
| 4487 | GET_VREG %ecx, %rcx # ecx <- vB |
| 4488 | .endif |
| 4489 | testl %ecx, %ecx |
| 4490 | jz common_errDivideByZero |
| 4491 | cmpl $-1, %ecx |
| 4492 | je 2f |
| 4493 | cdq # rdx:rax <- sign-extended of rax |
| 4494 | idivl %ecx |
| 4495 | 1: |
| 4496 | .if 0 |
| 4497 | SET_WIDE_VREG %eax, rINSTq # vA <- result |
| 4498 | .else |
| 4499 | SET_VREG %eax, rINSTq # vA <- result |
| 4500 | .endif |
| 4501 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4502 | 2: |
| 4503 | .if 0 |
| 4504 | xorl %eax, %eax |
| 4505 | .else |
| 4506 | negl %eax |
| 4507 | .endif |
| 4508 | jmp 1b |
| 4509 | |
| 4510 | |
| 4511 | /* ------------------------------ */ |
| 4512 | .balign 128 |
| 4513 | .L_op_rem_int_2addr: /* 0xb4 */ |
| 4514 | /* File: x86_64/op_rem_int_2addr.S */ |
| 4515 | /* File: x86_64/bindiv2addr.S */ |
| 4516 | /* |
| 4517 | * 32-bit binary div/rem operation. Handles special case of op1=-1. |
| 4518 | */ |
| 4519 | /* div/rem/2addr vA, vB */ |
| 4520 | movl rINST, %ecx # rcx <- BA |
| 4521 | sarl $4, %ecx # rcx <- B |
| 4522 | andb $0xf, rINSTbl # rINST <- A |
| 4523 | .if 0 |
| 4524 | GET_WIDE_VREG %rax, rINSTq # eax <- vA |
| 4525 | GET_WIDE_VREG %ecx, %rcx # ecx <- vB |
| 4526 | .else |
| 4527 | GET_VREG %eax, rINSTq # eax <- vA |
| 4528 | GET_VREG %ecx, %rcx # ecx <- vB |
| 4529 | .endif |
| 4530 | testl %ecx, %ecx |
| 4531 | jz common_errDivideByZero |
| 4532 | cmpl $-1, %ecx |
| 4533 | je 2f |
| 4534 | cdq # rdx:rax <- sign-extended of rax |
| 4535 | idivl %ecx |
| 4536 | 1: |
| 4537 | .if 0 |
| 4538 | SET_WIDE_VREG %edx, rINSTq # vA <- result |
| 4539 | .else |
| 4540 | SET_VREG %edx, rINSTq # vA <- result |
| 4541 | .endif |
| 4542 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4543 | 2: |
| 4544 | .if 1 |
| 4545 | xorl %edx, %edx |
| 4546 | .else |
| 4547 | negl %edx |
| 4548 | .endif |
| 4549 | jmp 1b |
| 4550 | |
| 4551 | |
| 4552 | /* ------------------------------ */ |
| 4553 | .balign 128 |
| 4554 | .L_op_and_int_2addr: /* 0xb5 */ |
| 4555 | /* File: x86_64/op_and_int_2addr.S */ |
| 4556 | /* File: x86_64/binop2addr.S */ |
| 4557 | /* |
| 4558 | * Generic 32-bit "/2addr" binary operation. Provide an "instr" line |
| 4559 | * that specifies an instruction that performs "result = r0 op r1". |
| 4560 | * This could be an instruction or a function call. |
| 4561 | * |
| 4562 | * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, |
| 4563 | * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, |
| 4564 | * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, |
| 4565 | * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr |
| 4566 | */ |
| 4567 | /* binop/2addr vA, vB */ |
| 4568 | movl rINST, %ecx # rcx <- A+ |
| 4569 | sarl $4, rINST # rINST <- B |
| 4570 | andb $0xf, %cl # ecx <- A |
| 4571 | GET_VREG %eax, rINSTq # eax <- vB |
| 4572 | andl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) |
| 4573 | CLEAR_REF %rcx |
| 4574 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4575 | |
| 4576 | |
| 4577 | /* ------------------------------ */ |
| 4578 | .balign 128 |
| 4579 | .L_op_or_int_2addr: /* 0xb6 */ |
| 4580 | /* File: x86_64/op_or_int_2addr.S */ |
| 4581 | /* File: x86_64/binop2addr.S */ |
| 4582 | /* |
| 4583 | * Generic 32-bit "/2addr" binary operation. Provide an "instr" line |
| 4584 | * that specifies an instruction that performs "result = r0 op r1". |
| 4585 | * This could be an instruction or a function call. |
| 4586 | * |
| 4587 | * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, |
| 4588 | * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, |
| 4589 | * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, |
| 4590 | * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr |
| 4591 | */ |
| 4592 | /* binop/2addr vA, vB */ |
| 4593 | movl rINST, %ecx # rcx <- A+ |
| 4594 | sarl $4, rINST # rINST <- B |
| 4595 | andb $0xf, %cl # ecx <- A |
| 4596 | GET_VREG %eax, rINSTq # eax <- vB |
| 4597 | orl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) |
| 4598 | CLEAR_REF %rcx |
| 4599 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4600 | |
| 4601 | |
| 4602 | /* ------------------------------ */ |
| 4603 | .balign 128 |
| 4604 | .L_op_xor_int_2addr: /* 0xb7 */ |
| 4605 | /* File: x86_64/op_xor_int_2addr.S */ |
| 4606 | /* File: x86_64/binop2addr.S */ |
| 4607 | /* |
| 4608 | * Generic 32-bit "/2addr" binary operation. Provide an "instr" line |
| 4609 | * that specifies an instruction that performs "result = r0 op r1". |
| 4610 | * This could be an instruction or a function call. |
| 4611 | * |
| 4612 | * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, |
| 4613 | * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, |
| 4614 | * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, |
| 4615 | * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr |
| 4616 | */ |
| 4617 | /* binop/2addr vA, vB */ |
| 4618 | movl rINST, %ecx # rcx <- A+ |
| 4619 | sarl $4, rINST # rINST <- B |
| 4620 | andb $0xf, %cl # ecx <- A |
| 4621 | GET_VREG %eax, rINSTq # eax <- vB |
| 4622 | xorl %eax, (rFP,%rcx,4) # for ex: addl %eax,(rFP,%ecx,4) |
| 4623 | CLEAR_REF %rcx |
| 4624 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4625 | |
| 4626 | |
| 4627 | /* ------------------------------ */ |
| 4628 | .balign 128 |
| 4629 | .L_op_shl_int_2addr: /* 0xb8 */ |
| 4630 | /* File: x86_64/op_shl_int_2addr.S */ |
| 4631 | /* File: x86_64/shop2addr.S */ |
| 4632 | /* |
| 4633 | * Generic 32-bit "shift/2addr" operation. |
| 4634 | */ |
| 4635 | /* shift/2addr vA, vB */ |
| 4636 | movl rINST, %ecx # ecx <- BA |
| 4637 | sarl $4, %ecx # ecx <- B |
| 4638 | GET_VREG %ecx, %rcx # ecx <- vBB |
| 4639 | andb $0xf, rINSTbl # rINST <- A |
| 4640 | .if 0 |
| 4641 | GET_WIDE_VREG %rax, rINSTq # rax <- vAA |
| 4642 | sall %cl, %eax # ex: sarl %cl, %eax |
| 4643 | SET_WIDE_VREG %rax, rINSTq |
| 4644 | .else |
| 4645 | GET_VREG %eax, rINSTq # eax <- vAA |
| 4646 | sall %cl, %eax # ex: sarl %cl, %eax |
| 4647 | SET_VREG %eax, rINSTq |
| 4648 | .endif |
| 4649 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4650 | |
| 4651 | |
| 4652 | /* ------------------------------ */ |
| 4653 | .balign 128 |
| 4654 | .L_op_shr_int_2addr: /* 0xb9 */ |
| 4655 | /* File: x86_64/op_shr_int_2addr.S */ |
| 4656 | /* File: x86_64/shop2addr.S */ |
| 4657 | /* |
| 4658 | * Generic 32-bit "shift/2addr" operation. |
| 4659 | */ |
| 4660 | /* shift/2addr vA, vB */ |
| 4661 | movl rINST, %ecx # ecx <- BA |
| 4662 | sarl $4, %ecx # ecx <- B |
| 4663 | GET_VREG %ecx, %rcx # ecx <- vBB |
| 4664 | andb $0xf, rINSTbl # rINST <- A |
| 4665 | .if 0 |
| 4666 | GET_WIDE_VREG %rax, rINSTq # rax <- vAA |
| 4667 | sarl %cl, %eax # ex: sarl %cl, %eax |
| 4668 | SET_WIDE_VREG %rax, rINSTq |
| 4669 | .else |
| 4670 | GET_VREG %eax, rINSTq # eax <- vAA |
| 4671 | sarl %cl, %eax # ex: sarl %cl, %eax |
| 4672 | SET_VREG %eax, rINSTq |
| 4673 | .endif |
| 4674 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4675 | |
| 4676 | |
| 4677 | /* ------------------------------ */ |
| 4678 | .balign 128 |
| 4679 | .L_op_ushr_int_2addr: /* 0xba */ |
| 4680 | /* File: x86_64/op_ushr_int_2addr.S */ |
| 4681 | /* File: x86_64/shop2addr.S */ |
| 4682 | /* |
| 4683 | * Generic 32-bit "shift/2addr" operation. |
| 4684 | */ |
| 4685 | /* shift/2addr vA, vB */ |
| 4686 | movl rINST, %ecx # ecx <- BA |
| 4687 | sarl $4, %ecx # ecx <- B |
| 4688 | GET_VREG %ecx, %rcx # ecx <- vBB |
| 4689 | andb $0xf, rINSTbl # rINST <- A |
| 4690 | .if 0 |
| 4691 | GET_WIDE_VREG %rax, rINSTq # rax <- vAA |
| 4692 | shrl %cl, %eax # ex: sarl %cl, %eax |
| 4693 | SET_WIDE_VREG %rax, rINSTq |
| 4694 | .else |
| 4695 | GET_VREG %eax, rINSTq # eax <- vAA |
| 4696 | shrl %cl, %eax # ex: sarl %cl, %eax |
| 4697 | SET_VREG %eax, rINSTq |
| 4698 | .endif |
| 4699 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4700 | |
| 4701 | |
| 4702 | /* ------------------------------ */ |
| 4703 | .balign 128 |
| 4704 | .L_op_add_long_2addr: /* 0xbb */ |
| 4705 | /* File: x86_64/op_add_long_2addr.S */ |
| 4706 | /* File: x86_64/binopWide2addr.S */ |
| 4707 | /* |
| 4708 | * Generic 64-bit binary operation. |
| 4709 | */ |
| 4710 | /* binop/2addr vA, vB */ |
| 4711 | movl rINST, %ecx # rcx <- A+ |
| 4712 | sarl $4, rINST # rINST <- B |
| 4713 | andb $0xf, %cl # ecx <- A |
| 4714 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 4715 | addq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) |
| 4716 | CLEAR_WIDE_REF %rcx |
| 4717 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4718 | |
| 4719 | |
| 4720 | /* ------------------------------ */ |
| 4721 | .balign 128 |
| 4722 | .L_op_sub_long_2addr: /* 0xbc */ |
| 4723 | /* File: x86_64/op_sub_long_2addr.S */ |
| 4724 | /* File: x86_64/binopWide2addr.S */ |
| 4725 | /* |
| 4726 | * Generic 64-bit binary operation. |
| 4727 | */ |
| 4728 | /* binop/2addr vA, vB */ |
| 4729 | movl rINST, %ecx # rcx <- A+ |
| 4730 | sarl $4, rINST # rINST <- B |
| 4731 | andb $0xf, %cl # ecx <- A |
| 4732 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 4733 | subq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) |
| 4734 | CLEAR_WIDE_REF %rcx |
| 4735 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4736 | |
| 4737 | |
| 4738 | /* ------------------------------ */ |
| 4739 | .balign 128 |
| 4740 | .L_op_mul_long_2addr: /* 0xbd */ |
| 4741 | /* File: x86_64/op_mul_long_2addr.S */ |
| 4742 | /* mul vA, vB */ |
| 4743 | movl rINST, %ecx # rcx <- A+ |
| 4744 | sarl $4, rINST # rINST <- B |
| 4745 | andb $0xf, %cl # ecx <- A |
| 4746 | GET_WIDE_VREG %rax, %rcx # rax <- vA |
| 4747 | imulq (rFP,rINSTq,4), %rax |
| 4748 | SET_WIDE_VREG %rax, %rcx |
| 4749 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4750 | |
| 4751 | /* ------------------------------ */ |
| 4752 | .balign 128 |
| 4753 | .L_op_div_long_2addr: /* 0xbe */ |
| 4754 | /* File: x86_64/op_div_long_2addr.S */ |
| 4755 | /* File: x86_64/bindiv2addr.S */ |
| 4756 | /* |
| 4757 | * 32-bit binary div/rem operation. Handles special case of op1=-1. |
| 4758 | */ |
| 4759 | /* div/rem/2addr vA, vB */ |
| 4760 | movl rINST, %ecx # rcx <- BA |
| 4761 | sarl $4, %ecx # rcx <- B |
| 4762 | andb $0xf, rINSTbl # rINST <- A |
| 4763 | .if 1 |
| 4764 | GET_WIDE_VREG %rax, rINSTq # eax <- vA |
| 4765 | GET_WIDE_VREG %rcx, %rcx # ecx <- vB |
| 4766 | .else |
| 4767 | GET_VREG %eax, rINSTq # eax <- vA |
| 4768 | GET_VREG %rcx, %rcx # ecx <- vB |
| 4769 | .endif |
| 4770 | testq %rcx, %rcx |
| 4771 | jz common_errDivideByZero |
| 4772 | cmpq $-1, %rcx |
| 4773 | je 2f |
| 4774 | cqo # rdx:rax <- sign-extended of rax |
| 4775 | idivq %rcx |
| 4776 | 1: |
| 4777 | .if 1 |
| 4778 | SET_WIDE_VREG %rax, rINSTq # vA <- result |
| 4779 | .else |
| 4780 | SET_VREG %rax, rINSTq # vA <- result |
| 4781 | .endif |
| 4782 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4783 | 2: |
| 4784 | .if 0 |
| 4785 | xorq %rax, %rax |
| 4786 | .else |
| 4787 | negq %rax |
| 4788 | .endif |
| 4789 | jmp 1b |
| 4790 | |
| 4791 | |
| 4792 | /* ------------------------------ */ |
| 4793 | .balign 128 |
| 4794 | .L_op_rem_long_2addr: /* 0xbf */ |
| 4795 | /* File: x86_64/op_rem_long_2addr.S */ |
| 4796 | /* File: x86_64/bindiv2addr.S */ |
| 4797 | /* |
| 4798 | * 32-bit binary div/rem operation. Handles special case of op1=-1. |
| 4799 | */ |
| 4800 | /* div/rem/2addr vA, vB */ |
| 4801 | movl rINST, %ecx # rcx <- BA |
| 4802 | sarl $4, %ecx # rcx <- B |
| 4803 | andb $0xf, rINSTbl # rINST <- A |
| 4804 | .if 1 |
| 4805 | GET_WIDE_VREG %rax, rINSTq # eax <- vA |
| 4806 | GET_WIDE_VREG %rcx, %rcx # ecx <- vB |
| 4807 | .else |
| 4808 | GET_VREG %eax, rINSTq # eax <- vA |
| 4809 | GET_VREG %rcx, %rcx # ecx <- vB |
| 4810 | .endif |
| 4811 | testq %rcx, %rcx |
| 4812 | jz common_errDivideByZero |
| 4813 | cmpq $-1, %rcx |
| 4814 | je 2f |
| 4815 | cqo # rdx:rax <- sign-extended of rax |
| 4816 | idivq %rcx |
| 4817 | 1: |
| 4818 | .if 1 |
| 4819 | SET_WIDE_VREG %rdx, rINSTq # vA <- result |
| 4820 | .else |
| 4821 | SET_VREG %rdx, rINSTq # vA <- result |
| 4822 | .endif |
| 4823 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4824 | 2: |
| 4825 | .if 1 |
| 4826 | xorq %rdx, %rdx |
| 4827 | .else |
| 4828 | negq %rdx |
| 4829 | .endif |
| 4830 | jmp 1b |
| 4831 | |
| 4832 | |
| 4833 | /* ------------------------------ */ |
| 4834 | .balign 128 |
| 4835 | .L_op_and_long_2addr: /* 0xc0 */ |
| 4836 | /* File: x86_64/op_and_long_2addr.S */ |
| 4837 | /* File: x86_64/binopWide2addr.S */ |
| 4838 | /* |
| 4839 | * Generic 64-bit binary operation. |
| 4840 | */ |
| 4841 | /* binop/2addr vA, vB */ |
| 4842 | movl rINST, %ecx # rcx <- A+ |
| 4843 | sarl $4, rINST # rINST <- B |
| 4844 | andb $0xf, %cl # ecx <- A |
| 4845 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 4846 | andq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) |
| 4847 | CLEAR_WIDE_REF %rcx |
| 4848 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4849 | |
| 4850 | |
| 4851 | /* ------------------------------ */ |
| 4852 | .balign 128 |
| 4853 | .L_op_or_long_2addr: /* 0xc1 */ |
| 4854 | /* File: x86_64/op_or_long_2addr.S */ |
| 4855 | /* File: x86_64/binopWide2addr.S */ |
| 4856 | /* |
| 4857 | * Generic 64-bit binary operation. |
| 4858 | */ |
| 4859 | /* binop/2addr vA, vB */ |
| 4860 | movl rINST, %ecx # rcx <- A+ |
| 4861 | sarl $4, rINST # rINST <- B |
| 4862 | andb $0xf, %cl # ecx <- A |
| 4863 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 4864 | orq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) |
| 4865 | CLEAR_WIDE_REF %rcx |
| 4866 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4867 | |
| 4868 | |
| 4869 | /* ------------------------------ */ |
| 4870 | .balign 128 |
| 4871 | .L_op_xor_long_2addr: /* 0xc2 */ |
| 4872 | /* File: x86_64/op_xor_long_2addr.S */ |
| 4873 | /* File: x86_64/binopWide2addr.S */ |
| 4874 | /* |
| 4875 | * Generic 64-bit binary operation. |
| 4876 | */ |
| 4877 | /* binop/2addr vA, vB */ |
| 4878 | movl rINST, %ecx # rcx <- A+ |
| 4879 | sarl $4, rINST # rINST <- B |
| 4880 | andb $0xf, %cl # ecx <- A |
| 4881 | GET_WIDE_VREG %rax, rINSTq # rax <- vB |
| 4882 | xorq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4) |
| 4883 | CLEAR_WIDE_REF %rcx |
| 4884 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4885 | |
| 4886 | |
| 4887 | /* ------------------------------ */ |
| 4888 | .balign 128 |
| 4889 | .L_op_shl_long_2addr: /* 0xc3 */ |
| 4890 | /* File: x86_64/op_shl_long_2addr.S */ |
| 4891 | /* File: x86_64/shop2addr.S */ |
| 4892 | /* |
| 4893 | * Generic 32-bit "shift/2addr" operation. |
| 4894 | */ |
| 4895 | /* shift/2addr vA, vB */ |
| 4896 | movl rINST, %ecx # ecx <- BA |
| 4897 | sarl $4, %ecx # ecx <- B |
| 4898 | GET_VREG %ecx, %rcx # ecx <- vBB |
| 4899 | andb $0xf, rINSTbl # rINST <- A |
| 4900 | .if 1 |
| 4901 | GET_WIDE_VREG %rax, rINSTq # rax <- vAA |
| 4902 | salq %cl, %rax # ex: sarl %cl, %eax |
| 4903 | SET_WIDE_VREG %rax, rINSTq |
| 4904 | .else |
| 4905 | GET_VREG %eax, rINSTq # eax <- vAA |
| 4906 | salq %cl, %rax # ex: sarl %cl, %eax |
| 4907 | SET_VREG %eax, rINSTq |
| 4908 | .endif |
| 4909 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4910 | |
| 4911 | |
| 4912 | /* ------------------------------ */ |
| 4913 | .balign 128 |
| 4914 | .L_op_shr_long_2addr: /* 0xc4 */ |
| 4915 | /* File: x86_64/op_shr_long_2addr.S */ |
| 4916 | /* File: x86_64/shop2addr.S */ |
| 4917 | /* |
| 4918 | * Generic 32-bit "shift/2addr" operation. |
| 4919 | */ |
| 4920 | /* shift/2addr vA, vB */ |
| 4921 | movl rINST, %ecx # ecx <- BA |
| 4922 | sarl $4, %ecx # ecx <- B |
| 4923 | GET_VREG %ecx, %rcx # ecx <- vBB |
| 4924 | andb $0xf, rINSTbl # rINST <- A |
| 4925 | .if 1 |
| 4926 | GET_WIDE_VREG %rax, rINSTq # rax <- vAA |
| 4927 | sarq %cl, %rax # ex: sarl %cl, %eax |
| 4928 | SET_WIDE_VREG %rax, rINSTq |
| 4929 | .else |
| 4930 | GET_VREG %eax, rINSTq # eax <- vAA |
| 4931 | sarq %cl, %rax # ex: sarl %cl, %eax |
| 4932 | SET_VREG %eax, rINSTq |
| 4933 | .endif |
| 4934 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4935 | |
| 4936 | |
| 4937 | /* ------------------------------ */ |
| 4938 | .balign 128 |
| 4939 | .L_op_ushr_long_2addr: /* 0xc5 */ |
| 4940 | /* File: x86_64/op_ushr_long_2addr.S */ |
| 4941 | /* File: x86_64/shop2addr.S */ |
| 4942 | /* |
| 4943 | * Generic 32-bit "shift/2addr" operation. |
| 4944 | */ |
| 4945 | /* shift/2addr vA, vB */ |
| 4946 | movl rINST, %ecx # ecx <- BA |
| 4947 | sarl $4, %ecx # ecx <- B |
| 4948 | GET_VREG %ecx, %rcx # ecx <- vBB |
| 4949 | andb $0xf, rINSTbl # rINST <- A |
| 4950 | .if 1 |
| 4951 | GET_WIDE_VREG %rax, rINSTq # rax <- vAA |
| 4952 | shrq %cl, %rax # ex: sarl %cl, %eax |
| 4953 | SET_WIDE_VREG %rax, rINSTq |
| 4954 | .else |
| 4955 | GET_VREG %eax, rINSTq # eax <- vAA |
| 4956 | shrq %cl, %rax # ex: sarl %cl, %eax |
| 4957 | SET_VREG %eax, rINSTq |
| 4958 | .endif |
| 4959 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4960 | |
| 4961 | |
| 4962 | /* ------------------------------ */ |
| 4963 | .balign 128 |
| 4964 | .L_op_add_float_2addr: /* 0xc6 */ |
| 4965 | /* File: x86_64/op_add_float_2addr.S */ |
| 4966 | /* File: x86_64/sseBinop2Addr.S */ |
| 4967 | movl rINST, %ecx # ecx <- A+ |
| 4968 | andl $0xf, %ecx # ecx <- A |
| 4969 | movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 4970 | sarl $4, rINST # rINST<- B |
| 4971 | addss VREG_ADDRESS(rINSTq), %xmm0 |
| 4972 | movss %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 |
| 4973 | pxor %xmm0, %xmm0 |
| 4974 | movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 4975 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4976 | |
| 4977 | |
| 4978 | /* ------------------------------ */ |
| 4979 | .balign 128 |
| 4980 | .L_op_sub_float_2addr: /* 0xc7 */ |
| 4981 | /* File: x86_64/op_sub_float_2addr.S */ |
| 4982 | /* File: x86_64/sseBinop2Addr.S */ |
| 4983 | movl rINST, %ecx # ecx <- A+ |
| 4984 | andl $0xf, %ecx # ecx <- A |
| 4985 | movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 4986 | sarl $4, rINST # rINST<- B |
| 4987 | subss VREG_ADDRESS(rINSTq), %xmm0 |
| 4988 | movss %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 |
| 4989 | pxor %xmm0, %xmm0 |
| 4990 | movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 4991 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 4992 | |
| 4993 | |
| 4994 | /* ------------------------------ */ |
| 4995 | .balign 128 |
| 4996 | .L_op_mul_float_2addr: /* 0xc8 */ |
| 4997 | /* File: x86_64/op_mul_float_2addr.S */ |
| 4998 | /* File: x86_64/sseBinop2Addr.S */ |
| 4999 | movl rINST, %ecx # ecx <- A+ |
| 5000 | andl $0xf, %ecx # ecx <- A |
| 5001 | movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 5002 | sarl $4, rINST # rINST<- B |
| 5003 | mulss VREG_ADDRESS(rINSTq), %xmm0 |
| 5004 | movss %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 |
| 5005 | pxor %xmm0, %xmm0 |
| 5006 | movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 5007 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 5008 | |
| 5009 | |
| 5010 | /* ------------------------------ */ |
| 5011 | .balign 128 |
| 5012 | .L_op_div_float_2addr: /* 0xc9 */ |
| 5013 | /* File: x86_64/op_div_float_2addr.S */ |
| 5014 | /* File: x86_64/sseBinop2Addr.S */ |
| 5015 | movl rINST, %ecx # ecx <- A+ |
| 5016 | andl $0xf, %ecx # ecx <- A |
| 5017 | movss VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 5018 | sarl $4, rINST # rINST<- B |
| 5019 | divss VREG_ADDRESS(rINSTq), %xmm0 |
| 5020 | movss %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 |
| 5021 | pxor %xmm0, %xmm0 |
| 5022 | movss %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 5023 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 5024 | |
| 5025 | |
| 5026 | /* ------------------------------ */ |
| 5027 | .balign 128 |
| 5028 | .L_op_rem_float_2addr: /* 0xca */ |
| 5029 | /* File: x86_64/op_rem_float_2addr.S */ |
| 5030 | /* rem_float/2addr vA, vB */ |
| 5031 | movzbq rINSTbl, %rcx # ecx <- A+ |
| 5032 | sarl $4, rINST # rINST <- B |
| 5033 | flds VREG_ADDRESS(rINSTq) # vB to fp stack |
| 5034 | andb $0xf, %cl # ecx <- A |
| 5035 | flds VREG_ADDRESS(%rcx) # vA to fp stack |
| 5036 | 1: |
| 5037 | fprem |
| 5038 | fstsw %ax |
| 5039 | sahf |
| 5040 | jp 1b |
| 5041 | fstp %st(1) |
| 5042 | fstps VREG_ADDRESS(%rcx) # %st to vA |
| 5043 | CLEAR_REF %rcx |
| 5044 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 5045 | |
| 5046 | /* ------------------------------ */ |
| 5047 | .balign 128 |
| 5048 | .L_op_add_double_2addr: /* 0xcb */ |
| 5049 | /* File: x86_64/op_add_double_2addr.S */ |
| 5050 | /* File: x86_64/sseBinop2Addr.S */ |
| 5051 | movl rINST, %ecx # ecx <- A+ |
| 5052 | andl $0xf, %ecx # ecx <- A |
| 5053 | movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 5054 | sarl $4, rINST # rINST<- B |
| 5055 | addsd VREG_ADDRESS(rINSTq), %xmm0 |
| 5056 | movsd %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 |
| 5057 | pxor %xmm0, %xmm0 |
| 5058 | movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 5059 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 5060 | |
| 5061 | |
| 5062 | /* ------------------------------ */ |
| 5063 | .balign 128 |
| 5064 | .L_op_sub_double_2addr: /* 0xcc */ |
| 5065 | /* File: x86_64/op_sub_double_2addr.S */ |
| 5066 | /* File: x86_64/sseBinop2Addr.S */ |
| 5067 | movl rINST, %ecx # ecx <- A+ |
| 5068 | andl $0xf, %ecx # ecx <- A |
| 5069 | movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 5070 | sarl $4, rINST # rINST<- B |
| 5071 | subsd VREG_ADDRESS(rINSTq), %xmm0 |
| 5072 | movsd %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 |
| 5073 | pxor %xmm0, %xmm0 |
| 5074 | movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 5075 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 5076 | |
| 5077 | |
| 5078 | /* ------------------------------ */ |
| 5079 | .balign 128 |
| 5080 | .L_op_mul_double_2addr: /* 0xcd */ |
| 5081 | /* File: x86_64/op_mul_double_2addr.S */ |
| 5082 | /* File: x86_64/sseBinop2Addr.S */ |
| 5083 | movl rINST, %ecx # ecx <- A+ |
| 5084 | andl $0xf, %ecx # ecx <- A |
| 5085 | movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 5086 | sarl $4, rINST # rINST<- B |
| 5087 | mulsd VREG_ADDRESS(rINSTq), %xmm0 |
| 5088 | movsd %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 |
| 5089 | pxor %xmm0, %xmm0 |
| 5090 | movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 5091 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 5092 | |
| 5093 | |
| 5094 | /* ------------------------------ */ |
| 5095 | .balign 128 |
| 5096 | .L_op_div_double_2addr: /* 0xce */ |
| 5097 | /* File: x86_64/op_div_double_2addr.S */ |
| 5098 | /* File: x86_64/sseBinop2Addr.S */ |
| 5099 | movl rINST, %ecx # ecx <- A+ |
| 5100 | andl $0xf, %ecx # ecx <- A |
| 5101 | movsd VREG_ADDRESS(%rcx), %xmm0 # %xmm0 <- 1st src |
| 5102 | sarl $4, rINST # rINST<- B |
| 5103 | divsd VREG_ADDRESS(rINSTq), %xmm0 |
| 5104 | movsd %xmm0, VREG_ADDRESS(%rcx) # vAA<- %xmm0 |
| 5105 | pxor %xmm0, %xmm0 |
| 5106 | movsd %xmm0, VREG_REF_ADDRESS(rINSTq) # clear ref |
| 5107 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 5108 | |
| 5109 | |
| 5110 | /* ------------------------------ */ |
| 5111 | .balign 128 |
| 5112 | .L_op_rem_double_2addr: /* 0xcf */ |
| 5113 | /* File: x86_64/op_rem_double_2addr.S */ |
| 5114 | /* rem_double/2addr vA, vB */ |
| 5115 | movzbq rINSTbl, %rcx # ecx <- A+ |
| 5116 | sarl $4, rINST # rINST <- B |
| 5117 | fldl VREG_ADDRESS(rINSTq) # vB to fp stack |
| 5118 | andb $0xf, %cl # ecx <- A |
| 5119 | fldl VREG_ADDRESS(%rcx) # vA to fp stack |
| 5120 | 1: |
| 5121 | fprem |
| 5122 | fstsw %ax |
| 5123 | sahf |
| 5124 | jp 1b |
| 5125 | fstp %st(1) |
| 5126 | fstpl VREG_ADDRESS(%rcx) # %st to vA |
| 5127 | CLEAR_WIDE_REF %rcx |
| 5128 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 |
| 5129 | |
| 5130 | /* ------------------------------ */ |
| 5131 | .balign 128 |
| 5132 | .L_op_add_int_lit16: /* 0xd0 */ |
| 5133 | /* File: x86_64/op_add_int_lit16.S */ |
| 5134 | /* File: x86_64/binopLit16.S */ |
| 5135 | /* |
| 5136 | * Generic 32-bit "lit16" binary operation. Provide an "instr" line |
| 5137 | * that specifies an instruction that performs "result = eax op ecx". |
| 5138 | * This could be an x86 instruction or a function call. (If the result |
| 5139 | * comes back in a register other than eax, you can override "result".) |
| 5140 | * |
| 5141 | * For: add-int/lit16, rsub-int, |
| 5142 | * and-int/lit16, or-int/lit16, xor-int/lit16 |
| 5143 | */ |
| 5144 | /* binop/lit16 vA, vB, #+CCCC */ |
| 5145 | movl rINST, %eax # rax <- 000000BA |
| 5146 | sarl $4, %eax # eax <- B |
| 5147 | GET_VREG %eax, %rax # eax <- vB |
| 5148 | andb $0xf, rINSTbl # rINST <- A |
| 5149 | movswl 2(rPC), %ecx # ecx <- ssssCCCC |
| 5150 | addl %ecx, %eax # for example: addl %ecx, %eax |
| 5151 | SET_VREG %eax, rINSTq |
| 5152 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5153 | |
| 5154 | |
| 5155 | /* ------------------------------ */ |
| 5156 | .balign 128 |
| 5157 | .L_op_rsub_int: /* 0xd1 */ |
| 5158 | /* File: x86_64/op_rsub_int.S */ |
| 5159 | /* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */ |
| 5160 | /* File: x86_64/binopLit16.S */ |
| 5161 | /* |
| 5162 | * Generic 32-bit "lit16" binary operation. Provide an "instr" line |
| 5163 | * that specifies an instruction that performs "result = eax op ecx". |
| 5164 | * This could be an x86 instruction or a function call. (If the result |
| 5165 | * comes back in a register other than eax, you can override "result".) |
| 5166 | * |
| 5167 | * For: add-int/lit16, rsub-int, |
| 5168 | * and-int/lit16, or-int/lit16, xor-int/lit16 |
| 5169 | */ |
| 5170 | /* binop/lit16 vA, vB, #+CCCC */ |
| 5171 | movl rINST, %eax # rax <- 000000BA |
| 5172 | sarl $4, %eax # eax <- B |
| 5173 | GET_VREG %eax, %rax # eax <- vB |
| 5174 | andb $0xf, rINSTbl # rINST <- A |
| 5175 | movswl 2(rPC), %ecx # ecx <- ssssCCCC |
| 5176 | subl %eax, %ecx # for example: addl %ecx, %eax |
| 5177 | SET_VREG %ecx, rINSTq |
| 5178 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5179 | |
| 5180 | |
| 5181 | /* ------------------------------ */ |
| 5182 | .balign 128 |
| 5183 | .L_op_mul_int_lit16: /* 0xd2 */ |
| 5184 | /* File: x86_64/op_mul_int_lit16.S */ |
| 5185 | /* File: x86_64/binopLit16.S */ |
| 5186 | /* |
| 5187 | * Generic 32-bit "lit16" binary operation. Provide an "instr" line |
| 5188 | * that specifies an instruction that performs "result = eax op ecx". |
| 5189 | * This could be an x86 instruction or a function call. (If the result |
| 5190 | * comes back in a register other than eax, you can override "result".) |
| 5191 | * |
| 5192 | * For: add-int/lit16, rsub-int, |
| 5193 | * and-int/lit16, or-int/lit16, xor-int/lit16 |
| 5194 | */ |
| 5195 | /* binop/lit16 vA, vB, #+CCCC */ |
| 5196 | movl rINST, %eax # rax <- 000000BA |
| 5197 | sarl $4, %eax # eax <- B |
| 5198 | GET_VREG %eax, %rax # eax <- vB |
| 5199 | andb $0xf, rINSTbl # rINST <- A |
| 5200 | movswl 2(rPC), %ecx # ecx <- ssssCCCC |
| 5201 | imull %ecx, %eax # for example: addl %ecx, %eax |
| 5202 | SET_VREG %eax, rINSTq |
| 5203 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5204 | |
| 5205 | |
| 5206 | /* ------------------------------ */ |
| 5207 | .balign 128 |
| 5208 | .L_op_div_int_lit16: /* 0xd3 */ |
| 5209 | /* File: x86_64/op_div_int_lit16.S */ |
| 5210 | /* File: x86_64/bindivLit16.S */ |
| 5211 | /* |
| 5212 | * 32-bit binary div/rem operation. Handles special case of op1=-1. |
| 5213 | */ |
| 5214 | /* div/rem/lit16 vA, vB, #+CCCC */ |
| 5215 | /* Need A in rINST, ssssCCCC in ecx, vB in eax */ |
| 5216 | movl rINST, %eax # rax <- 000000BA |
| 5217 | sarl $4, %eax # eax <- B |
| 5218 | GET_VREG %eax, %rax # eax <- vB |
| 5219 | movswl 2(rPC), %ecx # ecx <- ssssCCCC |
| 5220 | andb $0xf, rINSTbl # rINST <- A |
| 5221 | testl %ecx, %ecx |
| 5222 | jz common_errDivideByZero |
| 5223 | cmpl $-1, %ecx |
| 5224 | je 2f |
| 5225 | cdq # rax <- sign-extended of eax |
| 5226 | idivl %ecx |
| 5227 | 1: |
| 5228 | SET_VREG %eax, rINSTq # vA <- result |
| 5229 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5230 | 2: |
| 5231 | .if 0 |
| 5232 | xorl %eax, %eax |
| 5233 | .else |
| 5234 | negl %eax |
| 5235 | .endif |
| 5236 | jmp 1b |
| 5237 | |
| 5238 | |
| 5239 | /* ------------------------------ */ |
| 5240 | .balign 128 |
| 5241 | .L_op_rem_int_lit16: /* 0xd4 */ |
| 5242 | /* File: x86_64/op_rem_int_lit16.S */ |
| 5243 | /* File: x86_64/bindivLit16.S */ |
| 5244 | /* |
| 5245 | * 32-bit binary div/rem operation. Handles special case of op1=-1. |
| 5246 | */ |
| 5247 | /* div/rem/lit16 vA, vB, #+CCCC */ |
| 5248 | /* Need A in rINST, ssssCCCC in ecx, vB in eax */ |
| 5249 | movl rINST, %eax # rax <- 000000BA |
| 5250 | sarl $4, %eax # eax <- B |
| 5251 | GET_VREG %eax, %rax # eax <- vB |
| 5252 | movswl 2(rPC), %ecx # ecx <- ssssCCCC |
| 5253 | andb $0xf, rINSTbl # rINST <- A |
| 5254 | testl %ecx, %ecx |
| 5255 | jz common_errDivideByZero |
| 5256 | cmpl $-1, %ecx |
| 5257 | je 2f |
| 5258 | cdq # rax <- sign-extended of eax |
| 5259 | idivl %ecx |
| 5260 | 1: |
| 5261 | SET_VREG %edx, rINSTq # vA <- result |
| 5262 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5263 | 2: |
| 5264 | .if 1 |
| 5265 | xorl %edx, %edx |
| 5266 | .else |
| 5267 | negl %edx |
| 5268 | .endif |
| 5269 | jmp 1b |
| 5270 | |
| 5271 | |
| 5272 | /* ------------------------------ */ |
| 5273 | .balign 128 |
| 5274 | .L_op_and_int_lit16: /* 0xd5 */ |
| 5275 | /* File: x86_64/op_and_int_lit16.S */ |
| 5276 | /* File: x86_64/binopLit16.S */ |
| 5277 | /* |
| 5278 | * Generic 32-bit "lit16" binary operation. Provide an "instr" line |
| 5279 | * that specifies an instruction that performs "result = eax op ecx". |
| 5280 | * This could be an x86 instruction or a function call. (If the result |
| 5281 | * comes back in a register other than eax, you can override "result".) |
| 5282 | * |
| 5283 | * For: add-int/lit16, rsub-int, |
| 5284 | * and-int/lit16, or-int/lit16, xor-int/lit16 |
| 5285 | */ |
| 5286 | /* binop/lit16 vA, vB, #+CCCC */ |
| 5287 | movl rINST, %eax # rax <- 000000BA |
| 5288 | sarl $4, %eax # eax <- B |
| 5289 | GET_VREG %eax, %rax # eax <- vB |
| 5290 | andb $0xf, rINSTbl # rINST <- A |
| 5291 | movswl 2(rPC), %ecx # ecx <- ssssCCCC |
| 5292 | andl %ecx, %eax # for example: addl %ecx, %eax |
| 5293 | SET_VREG %eax, rINSTq |
| 5294 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5295 | |
| 5296 | |
| 5297 | /* ------------------------------ */ |
| 5298 | .balign 128 |
| 5299 | .L_op_or_int_lit16: /* 0xd6 */ |
| 5300 | /* File: x86_64/op_or_int_lit16.S */ |
| 5301 | /* File: x86_64/binopLit16.S */ |
| 5302 | /* |
| 5303 | * Generic 32-bit "lit16" binary operation. Provide an "instr" line |
| 5304 | * that specifies an instruction that performs "result = eax op ecx". |
| 5305 | * This could be an x86 instruction or a function call. (If the result |
| 5306 | * comes back in a register other than eax, you can override "result".) |
| 5307 | * |
| 5308 | * For: add-int/lit16, rsub-int, |
| 5309 | * and-int/lit16, or-int/lit16, xor-int/lit16 |
| 5310 | */ |
| 5311 | /* binop/lit16 vA, vB, #+CCCC */ |
| 5312 | movl rINST, %eax # rax <- 000000BA |
| 5313 | sarl $4, %eax # eax <- B |
| 5314 | GET_VREG %eax, %rax # eax <- vB |
| 5315 | andb $0xf, rINSTbl # rINST <- A |
| 5316 | movswl 2(rPC), %ecx # ecx <- ssssCCCC |
| 5317 | orl %ecx, %eax # for example: addl %ecx, %eax |
| 5318 | SET_VREG %eax, rINSTq |
| 5319 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5320 | |
| 5321 | |
| 5322 | /* ------------------------------ */ |
| 5323 | .balign 128 |
| 5324 | .L_op_xor_int_lit16: /* 0xd7 */ |
| 5325 | /* File: x86_64/op_xor_int_lit16.S */ |
| 5326 | /* File: x86_64/binopLit16.S */ |
| 5327 | /* |
| 5328 | * Generic 32-bit "lit16" binary operation. Provide an "instr" line |
| 5329 | * that specifies an instruction that performs "result = eax op ecx". |
| 5330 | * This could be an x86 instruction or a function call. (If the result |
| 5331 | * comes back in a register other than eax, you can override "result".) |
| 5332 | * |
| 5333 | * For: add-int/lit16, rsub-int, |
| 5334 | * and-int/lit16, or-int/lit16, xor-int/lit16 |
| 5335 | */ |
| 5336 | /* binop/lit16 vA, vB, #+CCCC */ |
| 5337 | movl rINST, %eax # rax <- 000000BA |
| 5338 | sarl $4, %eax # eax <- B |
| 5339 | GET_VREG %eax, %rax # eax <- vB |
| 5340 | andb $0xf, rINSTbl # rINST <- A |
| 5341 | movswl 2(rPC), %ecx # ecx <- ssssCCCC |
| 5342 | xorl %ecx, %eax # for example: addl %ecx, %eax |
| 5343 | SET_VREG %eax, rINSTq |
| 5344 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5345 | |
| 5346 | |
| 5347 | /* ------------------------------ */ |
| 5348 | .balign 128 |
| 5349 | .L_op_add_int_lit8: /* 0xd8 */ |
| 5350 | /* File: x86_64/op_add_int_lit8.S */ |
| 5351 | /* File: x86_64/binopLit8.S */ |
| 5352 | /* |
| 5353 | * Generic 32-bit "lit8" binary operation. Provide an "instr" line |
| 5354 | * that specifies an instruction that performs "result = eax op ecx". |
| 5355 | * This could be an x86 instruction or a function call. (If the result |
| 5356 | * comes back in a register other than r0, you can override "result".) |
| 5357 | * |
| 5358 | * For: add-int/lit8, rsub-int/lit8 |
| 5359 | * and-int/lit8, or-int/lit8, xor-int/lit8, |
| 5360 | * shl-int/lit8, shr-int/lit8, ushr-int/lit8 |
| 5361 | */ |
| 5362 | /* binop/lit8 vAA, vBB, #+CC */ |
| 5363 | movzbq 2(rPC), %rax # rax <- BB |
| 5364 | movsbl 3(rPC), %ecx # rcx <- ssssssCC |
| 5365 | GET_VREG %eax, %rax # eax <- rBB |
| 5366 | addl %ecx, %eax # ex: addl %ecx,%eax |
| 5367 | SET_VREG %eax, rINSTq |
| 5368 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5369 | |
| 5370 | |
| 5371 | /* ------------------------------ */ |
| 5372 | .balign 128 |
| 5373 | .L_op_rsub_int_lit8: /* 0xd9 */ |
| 5374 | /* File: x86_64/op_rsub_int_lit8.S */ |
| 5375 | /* File: x86_64/binopLit8.S */ |
| 5376 | /* |
| 5377 | * Generic 32-bit "lit8" binary operation. Provide an "instr" line |
| 5378 | * that specifies an instruction that performs "result = eax op ecx". |
| 5379 | * This could be an x86 instruction or a function call. (If the result |
| 5380 | * comes back in a register other than r0, you can override "result".) |
| 5381 | * |
| 5382 | * For: add-int/lit8, rsub-int/lit8 |
| 5383 | * and-int/lit8, or-int/lit8, xor-int/lit8, |
| 5384 | * shl-int/lit8, shr-int/lit8, ushr-int/lit8 |
| 5385 | */ |
| 5386 | /* binop/lit8 vAA, vBB, #+CC */ |
| 5387 | movzbq 2(rPC), %rax # rax <- BB |
| 5388 | movsbl 3(rPC), %ecx # rcx <- ssssssCC |
| 5389 | GET_VREG %eax, %rax # eax <- rBB |
| 5390 | subl %eax, %ecx # ex: addl %ecx,%eax |
| 5391 | SET_VREG %ecx, rINSTq |
| 5392 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5393 | |
| 5394 | |
| 5395 | /* ------------------------------ */ |
| 5396 | .balign 128 |
| 5397 | .L_op_mul_int_lit8: /* 0xda */ |
| 5398 | /* File: x86_64/op_mul_int_lit8.S */ |
| 5399 | /* File: x86_64/binopLit8.S */ |
| 5400 | /* |
| 5401 | * Generic 32-bit "lit8" binary operation. Provide an "instr" line |
| 5402 | * that specifies an instruction that performs "result = eax op ecx". |
| 5403 | * This could be an x86 instruction or a function call. (If the result |
| 5404 | * comes back in a register other than r0, you can override "result".) |
| 5405 | * |
| 5406 | * For: add-int/lit8, rsub-int/lit8 |
| 5407 | * and-int/lit8, or-int/lit8, xor-int/lit8, |
| 5408 | * shl-int/lit8, shr-int/lit8, ushr-int/lit8 |
| 5409 | */ |
| 5410 | /* binop/lit8 vAA, vBB, #+CC */ |
| 5411 | movzbq 2(rPC), %rax # rax <- BB |
| 5412 | movsbl 3(rPC), %ecx # rcx <- ssssssCC |
| 5413 | GET_VREG %eax, %rax # eax <- rBB |
| 5414 | imull %ecx, %eax # ex: addl %ecx,%eax |
| 5415 | SET_VREG %eax, rINSTq |
| 5416 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5417 | |
| 5418 | |
| 5419 | /* ------------------------------ */ |
| 5420 | .balign 128 |
| 5421 | .L_op_div_int_lit8: /* 0xdb */ |
| 5422 | /* File: x86_64/op_div_int_lit8.S */ |
| 5423 | /* File: x86_64/bindivLit8.S */ |
| 5424 | /* |
| 5425 | * 32-bit div/rem "lit8" binary operation. Handles special case of |
| 5426 | * op0=minint & op1=-1 |
| 5427 | */ |
| 5428 | /* div/rem/lit8 vAA, vBB, #+CC */ |
| 5429 | movzbq 2(rPC), %rax # eax <- BB |
| 5430 | movsbl 3(rPC), %ecx # ecx <- ssssssCC |
| 5431 | GET_VREG %eax, %rax # eax <- rBB |
| 5432 | testl %ecx, %ecx |
| 5433 | je common_errDivideByZero |
| 5434 | cmpl $-1, %ecx |
| 5435 | je 2f |
| 5436 | cdq # rax <- sign-extended of eax |
| 5437 | idivl %ecx |
| 5438 | 1: |
| 5439 | SET_VREG %eax, rINSTq # vA <- result |
| 5440 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5441 | 2: |
| 5442 | .if 0 |
| 5443 | xorl %eax, %eax |
| 5444 | .else |
| 5445 | negl %eax |
| 5446 | .endif |
| 5447 | jmp 1b |
| 5448 | |
| 5449 | |
| 5450 | /* ------------------------------ */ |
| 5451 | .balign 128 |
| 5452 | .L_op_rem_int_lit8: /* 0xdc */ |
| 5453 | /* File: x86_64/op_rem_int_lit8.S */ |
| 5454 | /* File: x86_64/bindivLit8.S */ |
| 5455 | /* |
| 5456 | * 32-bit div/rem "lit8" binary operation. Handles special case of |
| 5457 | * op0=minint & op1=-1 |
| 5458 | */ |
| 5459 | /* div/rem/lit8 vAA, vBB, #+CC */ |
| 5460 | movzbq 2(rPC), %rax # eax <- BB |
| 5461 | movsbl 3(rPC), %ecx # ecx <- ssssssCC |
| 5462 | GET_VREG %eax, %rax # eax <- rBB |
| 5463 | testl %ecx, %ecx |
| 5464 | je common_errDivideByZero |
| 5465 | cmpl $-1, %ecx |
| 5466 | je 2f |
| 5467 | cdq # rax <- sign-extended of eax |
| 5468 | idivl %ecx |
| 5469 | 1: |
| 5470 | SET_VREG %edx, rINSTq # vA <- result |
| 5471 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5472 | 2: |
| 5473 | .if 1 |
| 5474 | xorl %edx, %edx |
| 5475 | .else |
| 5476 | negl %edx |
| 5477 | .endif |
| 5478 | jmp 1b |
| 5479 | |
| 5480 | |
| 5481 | /* ------------------------------ */ |
| 5482 | .balign 128 |
| 5483 | .L_op_and_int_lit8: /* 0xdd */ |
| 5484 | /* File: x86_64/op_and_int_lit8.S */ |
| 5485 | /* File: x86_64/binopLit8.S */ |
| 5486 | /* |
| 5487 | * Generic 32-bit "lit8" binary operation. Provide an "instr" line |
| 5488 | * that specifies an instruction that performs "result = eax op ecx". |
| 5489 | * This could be an x86 instruction or a function call. (If the result |
| 5490 | * comes back in a register other than r0, you can override "result".) |
| 5491 | * |
| 5492 | * For: add-int/lit8, rsub-int/lit8 |
| 5493 | * and-int/lit8, or-int/lit8, xor-int/lit8, |
| 5494 | * shl-int/lit8, shr-int/lit8, ushr-int/lit8 |
| 5495 | */ |
| 5496 | /* binop/lit8 vAA, vBB, #+CC */ |
| 5497 | movzbq 2(rPC), %rax # rax <- BB |
| 5498 | movsbl 3(rPC), %ecx # rcx <- ssssssCC |
| 5499 | GET_VREG %eax, %rax # eax <- rBB |
| 5500 | andl %ecx, %eax # ex: addl %ecx,%eax |
| 5501 | SET_VREG %eax, rINSTq |
| 5502 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5503 | |
| 5504 | |
| 5505 | /* ------------------------------ */ |
| 5506 | .balign 128 |
| 5507 | .L_op_or_int_lit8: /* 0xde */ |
| 5508 | /* File: x86_64/op_or_int_lit8.S */ |
| 5509 | /* File: x86_64/binopLit8.S */ |
| 5510 | /* |
| 5511 | * Generic 32-bit "lit8" binary operation. Provide an "instr" line |
| 5512 | * that specifies an instruction that performs "result = eax op ecx". |
| 5513 | * This could be an x86 instruction or a function call. (If the result |
| 5514 | * comes back in a register other than r0, you can override "result".) |
| 5515 | * |
| 5516 | * For: add-int/lit8, rsub-int/lit8 |
| 5517 | * and-int/lit8, or-int/lit8, xor-int/lit8, |
| 5518 | * shl-int/lit8, shr-int/lit8, ushr-int/lit8 |
| 5519 | */ |
| 5520 | /* binop/lit8 vAA, vBB, #+CC */ |
| 5521 | movzbq 2(rPC), %rax # rax <- BB |
| 5522 | movsbl 3(rPC), %ecx # rcx <- ssssssCC |
| 5523 | GET_VREG %eax, %rax # eax <- rBB |
| 5524 | orl %ecx, %eax # ex: addl %ecx,%eax |
| 5525 | SET_VREG %eax, rINSTq |
| 5526 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5527 | |
| 5528 | |
| 5529 | /* ------------------------------ */ |
| 5530 | .balign 128 |
| 5531 | .L_op_xor_int_lit8: /* 0xdf */ |
| 5532 | /* File: x86_64/op_xor_int_lit8.S */ |
| 5533 | /* File: x86_64/binopLit8.S */ |
| 5534 | /* |
| 5535 | * Generic 32-bit "lit8" binary operation. Provide an "instr" line |
| 5536 | * that specifies an instruction that performs "result = eax op ecx". |
| 5537 | * This could be an x86 instruction or a function call. (If the result |
| 5538 | * comes back in a register other than r0, you can override "result".) |
| 5539 | * |
| 5540 | * For: add-int/lit8, rsub-int/lit8 |
| 5541 | * and-int/lit8, or-int/lit8, xor-int/lit8, |
| 5542 | * shl-int/lit8, shr-int/lit8, ushr-int/lit8 |
| 5543 | */ |
| 5544 | /* binop/lit8 vAA, vBB, #+CC */ |
| 5545 | movzbq 2(rPC), %rax # rax <- BB |
| 5546 | movsbl 3(rPC), %ecx # rcx <- ssssssCC |
| 5547 | GET_VREG %eax, %rax # eax <- rBB |
| 5548 | xorl %ecx, %eax # ex: addl %ecx,%eax |
| 5549 | SET_VREG %eax, rINSTq |
| 5550 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5551 | |
| 5552 | |
| 5553 | /* ------------------------------ */ |
| 5554 | .balign 128 |
| 5555 | .L_op_shl_int_lit8: /* 0xe0 */ |
| 5556 | /* File: x86_64/op_shl_int_lit8.S */ |
| 5557 | /* File: x86_64/binopLit8.S */ |
| 5558 | /* |
| 5559 | * Generic 32-bit "lit8" binary operation. Provide an "instr" line |
| 5560 | * that specifies an instruction that performs "result = eax op ecx". |
| 5561 | * This could be an x86 instruction or a function call. (If the result |
| 5562 | * comes back in a register other than r0, you can override "result".) |
| 5563 | * |
| 5564 | * For: add-int/lit8, rsub-int/lit8 |
| 5565 | * and-int/lit8, or-int/lit8, xor-int/lit8, |
| 5566 | * shl-int/lit8, shr-int/lit8, ushr-int/lit8 |
| 5567 | */ |
| 5568 | /* binop/lit8 vAA, vBB, #+CC */ |
| 5569 | movzbq 2(rPC), %rax # rax <- BB |
| 5570 | movsbl 3(rPC), %ecx # rcx <- ssssssCC |
| 5571 | GET_VREG %eax, %rax # eax <- rBB |
| 5572 | sall %cl, %eax # ex: addl %ecx,%eax |
| 5573 | SET_VREG %eax, rINSTq |
| 5574 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5575 | |
| 5576 | |
| 5577 | /* ------------------------------ */ |
| 5578 | .balign 128 |
| 5579 | .L_op_shr_int_lit8: /* 0xe1 */ |
| 5580 | /* File: x86_64/op_shr_int_lit8.S */ |
| 5581 | /* File: x86_64/binopLit8.S */ |
| 5582 | /* |
| 5583 | * Generic 32-bit "lit8" binary operation. Provide an "instr" line |
| 5584 | * that specifies an instruction that performs "result = eax op ecx". |
| 5585 | * This could be an x86 instruction or a function call. (If the result |
| 5586 | * comes back in a register other than r0, you can override "result".) |
| 5587 | * |
| 5588 | * For: add-int/lit8, rsub-int/lit8 |
| 5589 | * and-int/lit8, or-int/lit8, xor-int/lit8, |
| 5590 | * shl-int/lit8, shr-int/lit8, ushr-int/lit8 |
| 5591 | */ |
| 5592 | /* binop/lit8 vAA, vBB, #+CC */ |
| 5593 | movzbq 2(rPC), %rax # rax <- BB |
| 5594 | movsbl 3(rPC), %ecx # rcx <- ssssssCC |
| 5595 | GET_VREG %eax, %rax # eax <- rBB |
| 5596 | sarl %cl, %eax # ex: addl %ecx,%eax |
| 5597 | SET_VREG %eax, rINSTq |
| 5598 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5599 | |
| 5600 | |
| 5601 | /* ------------------------------ */ |
| 5602 | .balign 128 |
| 5603 | .L_op_ushr_int_lit8: /* 0xe2 */ |
| 5604 | /* File: x86_64/op_ushr_int_lit8.S */ |
| 5605 | /* File: x86_64/binopLit8.S */ |
| 5606 | /* |
| 5607 | * Generic 32-bit "lit8" binary operation. Provide an "instr" line |
| 5608 | * that specifies an instruction that performs "result = eax op ecx". |
| 5609 | * This could be an x86 instruction or a function call. (If the result |
| 5610 | * comes back in a register other than r0, you can override "result".) |
| 5611 | * |
| 5612 | * For: add-int/lit8, rsub-int/lit8 |
| 5613 | * and-int/lit8, or-int/lit8, xor-int/lit8, |
| 5614 | * shl-int/lit8, shr-int/lit8, ushr-int/lit8 |
| 5615 | */ |
| 5616 | /* binop/lit8 vAA, vBB, #+CC */ |
| 5617 | movzbq 2(rPC), %rax # rax <- BB |
| 5618 | movsbl 3(rPC), %ecx # rcx <- ssssssCC |
| 5619 | GET_VREG %eax, %rax # eax <- rBB |
| 5620 | shrl %cl, %eax # ex: addl %ecx,%eax |
| 5621 | SET_VREG %eax, rINSTq |
| 5622 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5623 | |
| 5624 | |
| 5625 | /* ------------------------------ */ |
| 5626 | .balign 128 |
| 5627 | .L_op_iget_quick: /* 0xe3 */ |
| 5628 | /* File: x86_64/op_iget_quick.S */ |
| 5629 | /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ |
| 5630 | /* op vA, vB, offset@CCCC */ |
| 5631 | movl rINST, %ecx # rcx <- BA |
| 5632 | sarl $4, %ecx # ecx <- B |
| 5633 | GET_VREG %ecx, %rcx # vB (object we're operating on) |
| 5634 | movzwq 2(rPC), %rax # eax <- field byte offset |
| 5635 | testl %ecx, %ecx # is object null? |
| 5636 | je common_errNullObject |
| 5637 | andb $0xf,rINSTbl # rINST <- A |
| 5638 | .if 0 |
| 5639 | movq (%rcx,%rax,1), %rax |
| 5640 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 5641 | .else |
| 5642 | movl (%rcx,%rax,1), %eax |
| 5643 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 5644 | .endif |
| 5645 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5646 | |
| 5647 | /* ------------------------------ */ |
| 5648 | .balign 128 |
| 5649 | .L_op_iget_wide_quick: /* 0xe4 */ |
| 5650 | /* File: x86_64/op_iget_wide_quick.S */ |
| 5651 | /* File: x86_64/op_iget_quick.S */ |
| 5652 | /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ |
| 5653 | /* op vA, vB, offset@CCCC */ |
| 5654 | movl rINST, %ecx # rcx <- BA |
| 5655 | sarl $4, %ecx # ecx <- B |
| 5656 | GET_VREG %ecx, %rcx # vB (object we're operating on) |
| 5657 | movzwq 2(rPC), %rax # eax <- field byte offset |
| 5658 | testl %ecx, %ecx # is object null? |
| 5659 | je common_errNullObject |
| 5660 | andb $0xf,rINSTbl # rINST <- A |
| 5661 | .if 1 |
| 5662 | movq (%rcx,%rax,1), %rax |
| 5663 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 5664 | .else |
| 5665 | movswl (%rcx,%rax,1), %eax |
| 5666 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 5667 | .endif |
| 5668 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5669 | |
| 5670 | |
| 5671 | /* ------------------------------ */ |
| 5672 | .balign 128 |
| 5673 | .L_op_iget_object_quick: /* 0xe5 */ |
| 5674 | /* File: x86_64/op_iget_object_quick.S */ |
| 5675 | /* For: iget-object-quick */ |
| 5676 | /* op vA, vB, offset@CCCC */ |
| 5677 | .extern artIGetObjectFromMterp |
| 5678 | movzbq rINSTbl, %rcx # rcx <- BA |
| 5679 | sarl $4, %ecx # ecx <- B |
| 5680 | GET_VREG OUT_32_ARG0, %rcx # vB (object we're operating on) |
| 5681 | movzwl 2(rPC), OUT_32_ARG1 # eax <- field byte offset |
| 5682 | EXPORT_PC |
| 5683 | callq SYMBOL(artIGetObjectFromMterp) # (obj, offset) |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 5684 | movq rSELF, %rcx |
| 5685 | cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 5686 | jnz MterpException # bail out |
| 5687 | andb $0xf, rINSTbl # rINST <- A |
| 5688 | SET_VREG_OBJECT %eax, rINSTq # fp[A] <- value |
| 5689 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5690 | |
| 5691 | /* ------------------------------ */ |
| 5692 | .balign 128 |
| 5693 | .L_op_iput_quick: /* 0xe6 */ |
| 5694 | /* File: x86_64/op_iput_quick.S */ |
| 5695 | /* For: iput-quick, iput-object-quick */ |
| 5696 | /* op vA, vB, offset@CCCC */ |
| 5697 | movzbq rINSTbl, %rcx # rcx <- BA |
| 5698 | sarl $4, %ecx # ecx <- B |
| 5699 | GET_VREG %ecx, %rcx # vB (object we're operating on) |
| 5700 | testl %ecx, %ecx # is object null? |
| 5701 | je common_errNullObject |
| 5702 | andb $0xf, rINSTbl # rINST <- A |
| 5703 | GET_VREG rINST, rINSTq # rINST <- v[A] |
| 5704 | movzwq 2(rPC), %rax # rax <- field byte offset |
| 5705 | movl rINST, (%rcx,%rax,1) |
| 5706 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5707 | |
| 5708 | /* ------------------------------ */ |
| 5709 | .balign 128 |
| 5710 | .L_op_iput_wide_quick: /* 0xe7 */ |
| 5711 | /* File: x86_64/op_iput_wide_quick.S */ |
| 5712 | /* iput-wide-quick vA, vB, offset@CCCC */ |
| 5713 | movzbq rINSTbl, %rcx # rcx<- BA |
| 5714 | sarl $4, %ecx # ecx<- B |
| 5715 | GET_VREG %ecx, %rcx # vB (object we're operating on) |
| 5716 | testl %ecx, %ecx # is object null? |
| 5717 | je common_errNullObject |
| 5718 | movzwq 2(rPC), %rax # rax<- field byte offset |
| 5719 | leaq (%rcx,%rax,1), %rcx # ecx<- Address of 64-bit target |
| 5720 | andb $0xf, rINSTbl # rINST<- A |
| 5721 | GET_WIDE_VREG %rax, rINSTq # rax<- fp[A]/fp[A+1] |
| 5722 | movq %rax, (%rcx) # obj.field<- r0/r1 |
| 5723 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5724 | |
| 5725 | /* ------------------------------ */ |
| 5726 | .balign 128 |
| 5727 | .L_op_iput_object_quick: /* 0xe8 */ |
| 5728 | /* File: x86_64/op_iput_object_quick.S */ |
| 5729 | EXPORT_PC |
| 5730 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG0 |
| 5731 | movq rPC, OUT_ARG1 |
| 5732 | REFRESH_INST 232 |
| 5733 | movl rINST, OUT_32_ARG2 |
| 5734 | call SYMBOL(MterpIputObjectQuick) |
| 5735 | testb %al, %al |
| 5736 | jz MterpException |
| 5737 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5738 | |
| 5739 | /* ------------------------------ */ |
| 5740 | .balign 128 |
| 5741 | .L_op_invoke_virtual_quick: /* 0xe9 */ |
| 5742 | /* File: x86_64/op_invoke_virtual_quick.S */ |
| 5743 | /* File: x86_64/invoke.S */ |
| 5744 | /* |
| 5745 | * Generic invoke handler wrapper. |
| 5746 | */ |
| 5747 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 5748 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 5749 | .extern MterpInvokeVirtualQuick |
| 5750 | EXPORT_PC |
| 5751 | movq rSELF, OUT_ARG0 |
| 5752 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 5753 | movq rPC, OUT_ARG2 |
| 5754 | REFRESH_INST 233 |
| 5755 | movl rINST, OUT_32_ARG3 |
| 5756 | call SYMBOL(MterpInvokeVirtualQuick) |
| 5757 | testb %al, %al |
| 5758 | jz MterpException |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 5759 | ADVANCE_PC 3 |
| 5760 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 5761 | testb %al, %al |
| 5762 | jnz MterpFallback |
| 5763 | FETCH_INST |
| 5764 | GOTO_NEXT |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 5765 | |
| 5766 | |
| 5767 | /* ------------------------------ */ |
| 5768 | .balign 128 |
| 5769 | .L_op_invoke_virtual_range_quick: /* 0xea */ |
| 5770 | /* File: x86_64/op_invoke_virtual_range_quick.S */ |
| 5771 | /* File: x86_64/invoke.S */ |
| 5772 | /* |
| 5773 | * Generic invoke handler wrapper. |
| 5774 | */ |
| 5775 | /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ |
| 5776 | /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ |
| 5777 | .extern MterpInvokeVirtualQuickRange |
| 5778 | EXPORT_PC |
| 5779 | movq rSELF, OUT_ARG0 |
| 5780 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 5781 | movq rPC, OUT_ARG2 |
| 5782 | REFRESH_INST 234 |
| 5783 | movl rINST, OUT_32_ARG3 |
| 5784 | call SYMBOL(MterpInvokeVirtualQuickRange) |
| 5785 | testb %al, %al |
| 5786 | jz MterpException |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 5787 | ADVANCE_PC 3 |
| 5788 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 5789 | testb %al, %al |
| 5790 | jnz MterpFallback |
| 5791 | FETCH_INST |
| 5792 | GOTO_NEXT |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 5793 | |
| 5794 | |
| 5795 | /* ------------------------------ */ |
| 5796 | .balign 128 |
| 5797 | .L_op_iput_boolean_quick: /* 0xeb */ |
| 5798 | /* File: x86_64/op_iput_boolean_quick.S */ |
| 5799 | /* File: x86_64/op_iput_quick.S */ |
| 5800 | /* For: iput-quick, iput-object-quick */ |
| 5801 | /* op vA, vB, offset@CCCC */ |
| 5802 | movzbq rINSTbl, %rcx # rcx <- BA |
| 5803 | sarl $4, %ecx # ecx <- B |
| 5804 | GET_VREG %ecx, %rcx # vB (object we're operating on) |
| 5805 | testl %ecx, %ecx # is object null? |
| 5806 | je common_errNullObject |
| 5807 | andb $0xf, rINSTbl # rINST <- A |
| 5808 | GET_VREG rINST, rINSTq # rINST <- v[A] |
| 5809 | movzwq 2(rPC), %rax # rax <- field byte offset |
| 5810 | movb rINSTbl, (%rcx,%rax,1) |
| 5811 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5812 | |
| 5813 | |
| 5814 | /* ------------------------------ */ |
| 5815 | .balign 128 |
| 5816 | .L_op_iput_byte_quick: /* 0xec */ |
| 5817 | /* File: x86_64/op_iput_byte_quick.S */ |
| 5818 | /* File: x86_64/op_iput_quick.S */ |
| 5819 | /* For: iput-quick, iput-object-quick */ |
| 5820 | /* op vA, vB, offset@CCCC */ |
| 5821 | movzbq rINSTbl, %rcx # rcx <- BA |
| 5822 | sarl $4, %ecx # ecx <- B |
| 5823 | GET_VREG %ecx, %rcx # vB (object we're operating on) |
| 5824 | testl %ecx, %ecx # is object null? |
| 5825 | je common_errNullObject |
| 5826 | andb $0xf, rINSTbl # rINST <- A |
| 5827 | GET_VREG rINST, rINSTq # rINST <- v[A] |
| 5828 | movzwq 2(rPC), %rax # rax <- field byte offset |
| 5829 | movb rINSTbl, (%rcx,%rax,1) |
| 5830 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5831 | |
| 5832 | |
| 5833 | /* ------------------------------ */ |
| 5834 | .balign 128 |
| 5835 | .L_op_iput_char_quick: /* 0xed */ |
| 5836 | /* File: x86_64/op_iput_char_quick.S */ |
| 5837 | /* File: x86_64/op_iput_quick.S */ |
| 5838 | /* For: iput-quick, iput-object-quick */ |
| 5839 | /* op vA, vB, offset@CCCC */ |
| 5840 | movzbq rINSTbl, %rcx # rcx <- BA |
| 5841 | sarl $4, %ecx # ecx <- B |
| 5842 | GET_VREG %ecx, %rcx # vB (object we're operating on) |
| 5843 | testl %ecx, %ecx # is object null? |
| 5844 | je common_errNullObject |
| 5845 | andb $0xf, rINSTbl # rINST <- A |
| 5846 | GET_VREG rINST, rINSTq # rINST <- v[A] |
| 5847 | movzwq 2(rPC), %rax # rax <- field byte offset |
| 5848 | movw rINSTw, (%rcx,%rax,1) |
| 5849 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5850 | |
| 5851 | |
| 5852 | /* ------------------------------ */ |
| 5853 | .balign 128 |
| 5854 | .L_op_iput_short_quick: /* 0xee */ |
| 5855 | /* File: x86_64/op_iput_short_quick.S */ |
| 5856 | /* File: x86_64/op_iput_quick.S */ |
| 5857 | /* For: iput-quick, iput-object-quick */ |
| 5858 | /* op vA, vB, offset@CCCC */ |
| 5859 | movzbq rINSTbl, %rcx # rcx <- BA |
| 5860 | sarl $4, %ecx # ecx <- B |
| 5861 | GET_VREG %ecx, %rcx # vB (object we're operating on) |
| 5862 | testl %ecx, %ecx # is object null? |
| 5863 | je common_errNullObject |
| 5864 | andb $0xf, rINSTbl # rINST <- A |
| 5865 | GET_VREG rINST, rINSTq # rINST <- v[A] |
| 5866 | movzwq 2(rPC), %rax # rax <- field byte offset |
| 5867 | movw rINSTw, (%rcx,%rax,1) |
| 5868 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5869 | |
| 5870 | |
| 5871 | /* ------------------------------ */ |
| 5872 | .balign 128 |
| 5873 | .L_op_iget_boolean_quick: /* 0xef */ |
| 5874 | /* File: x86_64/op_iget_boolean_quick.S */ |
| 5875 | /* File: x86_64/op_iget_quick.S */ |
| 5876 | /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ |
| 5877 | /* op vA, vB, offset@CCCC */ |
| 5878 | movl rINST, %ecx # rcx <- BA |
| 5879 | sarl $4, %ecx # ecx <- B |
| 5880 | GET_VREG %ecx, %rcx # vB (object we're operating on) |
| 5881 | movzwq 2(rPC), %rax # eax <- field byte offset |
| 5882 | testl %ecx, %ecx # is object null? |
| 5883 | je common_errNullObject |
| 5884 | andb $0xf,rINSTbl # rINST <- A |
| 5885 | .if 0 |
| 5886 | movq (%rcx,%rax,1), %rax |
| 5887 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 5888 | .else |
| 5889 | movsbl (%rcx,%rax,1), %eax |
| 5890 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 5891 | .endif |
| 5892 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5893 | |
| 5894 | |
| 5895 | /* ------------------------------ */ |
| 5896 | .balign 128 |
| 5897 | .L_op_iget_byte_quick: /* 0xf0 */ |
| 5898 | /* File: x86_64/op_iget_byte_quick.S */ |
| 5899 | /* File: x86_64/op_iget_quick.S */ |
| 5900 | /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ |
| 5901 | /* op vA, vB, offset@CCCC */ |
| 5902 | movl rINST, %ecx # rcx <- BA |
| 5903 | sarl $4, %ecx # ecx <- B |
| 5904 | GET_VREG %ecx, %rcx # vB (object we're operating on) |
| 5905 | movzwq 2(rPC), %rax # eax <- field byte offset |
| 5906 | testl %ecx, %ecx # is object null? |
| 5907 | je common_errNullObject |
| 5908 | andb $0xf,rINSTbl # rINST <- A |
| 5909 | .if 0 |
| 5910 | movq (%rcx,%rax,1), %rax |
| 5911 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 5912 | .else |
| 5913 | movsbl (%rcx,%rax,1), %eax |
| 5914 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 5915 | .endif |
| 5916 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5917 | |
| 5918 | |
| 5919 | /* ------------------------------ */ |
| 5920 | .balign 128 |
| 5921 | .L_op_iget_char_quick: /* 0xf1 */ |
| 5922 | /* File: x86_64/op_iget_char_quick.S */ |
| 5923 | /* File: x86_64/op_iget_quick.S */ |
| 5924 | /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ |
| 5925 | /* op vA, vB, offset@CCCC */ |
| 5926 | movl rINST, %ecx # rcx <- BA |
| 5927 | sarl $4, %ecx # ecx <- B |
| 5928 | GET_VREG %ecx, %rcx # vB (object we're operating on) |
| 5929 | movzwq 2(rPC), %rax # eax <- field byte offset |
| 5930 | testl %ecx, %ecx # is object null? |
| 5931 | je common_errNullObject |
| 5932 | andb $0xf,rINSTbl # rINST <- A |
| 5933 | .if 0 |
| 5934 | movq (%rcx,%rax,1), %rax |
| 5935 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 5936 | .else |
| 5937 | movzwl (%rcx,%rax,1), %eax |
| 5938 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 5939 | .endif |
| 5940 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5941 | |
| 5942 | |
| 5943 | /* ------------------------------ */ |
| 5944 | .balign 128 |
| 5945 | .L_op_iget_short_quick: /* 0xf2 */ |
| 5946 | /* File: x86_64/op_iget_short_quick.S */ |
| 5947 | /* File: x86_64/op_iget_quick.S */ |
| 5948 | /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick, iget-wide-quick */ |
| 5949 | /* op vA, vB, offset@CCCC */ |
| 5950 | movl rINST, %ecx # rcx <- BA |
| 5951 | sarl $4, %ecx # ecx <- B |
| 5952 | GET_VREG %ecx, %rcx # vB (object we're operating on) |
| 5953 | movzwq 2(rPC), %rax # eax <- field byte offset |
| 5954 | testl %ecx, %ecx # is object null? |
| 5955 | je common_errNullObject |
| 5956 | andb $0xf,rINSTbl # rINST <- A |
| 5957 | .if 0 |
| 5958 | movq (%rcx,%rax,1), %rax |
| 5959 | SET_WIDE_VREG %rax, rINSTq # fp[A] <- value |
| 5960 | .else |
| 5961 | movswl (%rcx,%rax,1), %eax |
| 5962 | SET_VREG %eax, rINSTq # fp[A] <- value |
| 5963 | .endif |
| 5964 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 5965 | |
| 5966 | |
| 5967 | /* ------------------------------ */ |
| 5968 | .balign 128 |
| 5969 | .L_op_invoke_lambda: /* 0xf3 */ |
| 5970 | /* Transfer stub to alternate interpreter */ |
| 5971 | jmp MterpFallback |
| 5972 | |
| 5973 | |
| 5974 | /* ------------------------------ */ |
| 5975 | .balign 128 |
| 5976 | .L_op_unused_f4: /* 0xf4 */ |
| 5977 | /* File: x86_64/op_unused_f4.S */ |
| 5978 | /* File: x86_64/unused.S */ |
| 5979 | /* |
| 5980 | * Bail to reference interpreter to throw. |
| 5981 | */ |
| 5982 | jmp MterpFallback |
| 5983 | |
| 5984 | |
| 5985 | /* ------------------------------ */ |
| 5986 | .balign 128 |
| 5987 | .L_op_capture_variable: /* 0xf5 */ |
| 5988 | /* Transfer stub to alternate interpreter */ |
| 5989 | jmp MterpFallback |
| 5990 | |
| 5991 | |
| 5992 | /* ------------------------------ */ |
| 5993 | .balign 128 |
| 5994 | .L_op_create_lambda: /* 0xf6 */ |
| 5995 | /* Transfer stub to alternate interpreter */ |
| 5996 | jmp MterpFallback |
| 5997 | |
| 5998 | |
| 5999 | /* ------------------------------ */ |
| 6000 | .balign 128 |
| 6001 | .L_op_liberate_variable: /* 0xf7 */ |
| 6002 | /* Transfer stub to alternate interpreter */ |
| 6003 | jmp MterpFallback |
| 6004 | |
| 6005 | |
| 6006 | /* ------------------------------ */ |
| 6007 | .balign 128 |
| 6008 | .L_op_box_lambda: /* 0xf8 */ |
| 6009 | /* Transfer stub to alternate interpreter */ |
| 6010 | jmp MterpFallback |
| 6011 | |
| 6012 | |
| 6013 | /* ------------------------------ */ |
| 6014 | .balign 128 |
| 6015 | .L_op_unbox_lambda: /* 0xf9 */ |
| 6016 | /* Transfer stub to alternate interpreter */ |
| 6017 | jmp MterpFallback |
| 6018 | |
| 6019 | |
| 6020 | /* ------------------------------ */ |
| 6021 | .balign 128 |
| 6022 | .L_op_unused_fa: /* 0xfa */ |
| 6023 | /* File: x86_64/op_unused_fa.S */ |
| 6024 | /* File: x86_64/unused.S */ |
| 6025 | /* |
| 6026 | * Bail to reference interpreter to throw. |
| 6027 | */ |
| 6028 | jmp MterpFallback |
| 6029 | |
| 6030 | |
| 6031 | /* ------------------------------ */ |
| 6032 | .balign 128 |
| 6033 | .L_op_unused_fb: /* 0xfb */ |
| 6034 | /* File: x86_64/op_unused_fb.S */ |
| 6035 | /* File: x86_64/unused.S */ |
| 6036 | /* |
| 6037 | * Bail to reference interpreter to throw. |
| 6038 | */ |
| 6039 | jmp MterpFallback |
| 6040 | |
| 6041 | |
| 6042 | /* ------------------------------ */ |
| 6043 | .balign 128 |
| 6044 | .L_op_unused_fc: /* 0xfc */ |
| 6045 | /* File: x86_64/op_unused_fc.S */ |
| 6046 | /* File: x86_64/unused.S */ |
| 6047 | /* |
| 6048 | * Bail to reference interpreter to throw. |
| 6049 | */ |
| 6050 | jmp MterpFallback |
| 6051 | |
| 6052 | |
| 6053 | /* ------------------------------ */ |
| 6054 | .balign 128 |
| 6055 | .L_op_unused_fd: /* 0xfd */ |
| 6056 | /* File: x86_64/op_unused_fd.S */ |
| 6057 | /* File: x86_64/unused.S */ |
| 6058 | /* |
| 6059 | * Bail to reference interpreter to throw. |
| 6060 | */ |
| 6061 | jmp MterpFallback |
| 6062 | |
| 6063 | |
| 6064 | /* ------------------------------ */ |
| 6065 | .balign 128 |
| 6066 | .L_op_unused_fe: /* 0xfe */ |
| 6067 | /* File: x86_64/op_unused_fe.S */ |
| 6068 | /* File: x86_64/unused.S */ |
| 6069 | /* |
| 6070 | * Bail to reference interpreter to throw. |
| 6071 | */ |
| 6072 | jmp MterpFallback |
| 6073 | |
| 6074 | |
| 6075 | /* ------------------------------ */ |
| 6076 | .balign 128 |
| 6077 | .L_op_unused_ff: /* 0xff */ |
| 6078 | /* File: x86_64/op_unused_ff.S */ |
| 6079 | /* File: x86_64/unused.S */ |
| 6080 | /* |
| 6081 | * Bail to reference interpreter to throw. |
| 6082 | */ |
| 6083 | jmp MterpFallback |
| 6084 | |
| 6085 | |
| 6086 | .balign 128 |
| 6087 | SIZE(SYMBOL(artMterpAsmInstructionStart),SYMBOL(artMterpAsmInstructionStart)) |
| 6088 | .global SYMBOL(artMterpAsmInstructionEnd) |
| 6089 | SYMBOL(artMterpAsmInstructionEnd): |
| 6090 | |
| 6091 | /* |
| 6092 | * =========================================================================== |
| 6093 | * Sister implementations |
| 6094 | * =========================================================================== |
| 6095 | */ |
| 6096 | .global SYMBOL(artMterpAsmSisterStart) |
| 6097 | FUNCTION_TYPE(SYMBOL(artMterpAsmSisterStart)) |
| 6098 | .text |
| 6099 | .balign 4 |
| 6100 | SYMBOL(artMterpAsmSisterStart): |
| 6101 | |
| 6102 | SIZE(SYMBOL(artMterpAsmSisterStart),SYMBOL(artMterpAsmSisterStart)) |
| 6103 | .global SYMBOL(artMterpAsmSisterEnd) |
| 6104 | SYMBOL(artMterpAsmSisterEnd): |
| 6105 | |
| 6106 | |
| 6107 | .global SYMBOL(artMterpAsmAltInstructionStart) |
| 6108 | FUNCTION_TYPE(SYMBOL(artMterpAsmAltInstructionStart)) |
| 6109 | .text |
| 6110 | |
| 6111 | SYMBOL(artMterpAsmAltInstructionStart) = .L_ALT_op_nop |
| 6112 | /* ------------------------------ */ |
| 6113 | .balign 128 |
| 6114 | .L_ALT_op_nop: /* 0x00 */ |
| 6115 | /* File: x86_64/alt_stub.S */ |
| 6116 | /* |
| 6117 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6118 | * any interesting requests and then jump to the real instruction |
| 6119 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6120 | * because rIBASE is caller save and we need to reload it. |
| 6121 | * |
| 6122 | * Note that unlike in the Arm implementation, we should never arrive |
| 6123 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6124 | * return. |
| 6125 | */ |
| 6126 | .extern MterpCheckBefore |
| 6127 | EXPORT_PC |
| 6128 | REFRESH_IBASE |
| 6129 | movq rSELF, OUT_ARG0 |
| 6130 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6131 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6132 | jmp .L_op_nop+(0*128) |
| 6133 | |
| 6134 | /* ------------------------------ */ |
| 6135 | .balign 128 |
| 6136 | .L_ALT_op_move: /* 0x01 */ |
| 6137 | /* File: x86_64/alt_stub.S */ |
| 6138 | /* |
| 6139 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6140 | * any interesting requests and then jump to the real instruction |
| 6141 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6142 | * because rIBASE is caller save and we need to reload it. |
| 6143 | * |
| 6144 | * Note that unlike in the Arm implementation, we should never arrive |
| 6145 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6146 | * return. |
| 6147 | */ |
| 6148 | .extern MterpCheckBefore |
| 6149 | EXPORT_PC |
| 6150 | REFRESH_IBASE |
| 6151 | movq rSELF, OUT_ARG0 |
| 6152 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6153 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6154 | jmp .L_op_nop+(1*128) |
| 6155 | |
| 6156 | /* ------------------------------ */ |
| 6157 | .balign 128 |
| 6158 | .L_ALT_op_move_from16: /* 0x02 */ |
| 6159 | /* File: x86_64/alt_stub.S */ |
| 6160 | /* |
| 6161 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6162 | * any interesting requests and then jump to the real instruction |
| 6163 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6164 | * because rIBASE is caller save and we need to reload it. |
| 6165 | * |
| 6166 | * Note that unlike in the Arm implementation, we should never arrive |
| 6167 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6168 | * return. |
| 6169 | */ |
| 6170 | .extern MterpCheckBefore |
| 6171 | EXPORT_PC |
| 6172 | REFRESH_IBASE |
| 6173 | movq rSELF, OUT_ARG0 |
| 6174 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6175 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6176 | jmp .L_op_nop+(2*128) |
| 6177 | |
| 6178 | /* ------------------------------ */ |
| 6179 | .balign 128 |
| 6180 | .L_ALT_op_move_16: /* 0x03 */ |
| 6181 | /* File: x86_64/alt_stub.S */ |
| 6182 | /* |
| 6183 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6184 | * any interesting requests and then jump to the real instruction |
| 6185 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6186 | * because rIBASE is caller save and we need to reload it. |
| 6187 | * |
| 6188 | * Note that unlike in the Arm implementation, we should never arrive |
| 6189 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6190 | * return. |
| 6191 | */ |
| 6192 | .extern MterpCheckBefore |
| 6193 | EXPORT_PC |
| 6194 | REFRESH_IBASE |
| 6195 | movq rSELF, OUT_ARG0 |
| 6196 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6197 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6198 | jmp .L_op_nop+(3*128) |
| 6199 | |
| 6200 | /* ------------------------------ */ |
| 6201 | .balign 128 |
| 6202 | .L_ALT_op_move_wide: /* 0x04 */ |
| 6203 | /* File: x86_64/alt_stub.S */ |
| 6204 | /* |
| 6205 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6206 | * any interesting requests and then jump to the real instruction |
| 6207 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6208 | * because rIBASE is caller save and we need to reload it. |
| 6209 | * |
| 6210 | * Note that unlike in the Arm implementation, we should never arrive |
| 6211 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6212 | * return. |
| 6213 | */ |
| 6214 | .extern MterpCheckBefore |
| 6215 | EXPORT_PC |
| 6216 | REFRESH_IBASE |
| 6217 | movq rSELF, OUT_ARG0 |
| 6218 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6219 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6220 | jmp .L_op_nop+(4*128) |
| 6221 | |
| 6222 | /* ------------------------------ */ |
| 6223 | .balign 128 |
| 6224 | .L_ALT_op_move_wide_from16: /* 0x05 */ |
| 6225 | /* File: x86_64/alt_stub.S */ |
| 6226 | /* |
| 6227 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6228 | * any interesting requests and then jump to the real instruction |
| 6229 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6230 | * because rIBASE is caller save and we need to reload it. |
| 6231 | * |
| 6232 | * Note that unlike in the Arm implementation, we should never arrive |
| 6233 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6234 | * return. |
| 6235 | */ |
| 6236 | .extern MterpCheckBefore |
| 6237 | EXPORT_PC |
| 6238 | REFRESH_IBASE |
| 6239 | movq rSELF, OUT_ARG0 |
| 6240 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6241 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6242 | jmp .L_op_nop+(5*128) |
| 6243 | |
| 6244 | /* ------------------------------ */ |
| 6245 | .balign 128 |
| 6246 | .L_ALT_op_move_wide_16: /* 0x06 */ |
| 6247 | /* File: x86_64/alt_stub.S */ |
| 6248 | /* |
| 6249 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6250 | * any interesting requests and then jump to the real instruction |
| 6251 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6252 | * because rIBASE is caller save and we need to reload it. |
| 6253 | * |
| 6254 | * Note that unlike in the Arm implementation, we should never arrive |
| 6255 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6256 | * return. |
| 6257 | */ |
| 6258 | .extern MterpCheckBefore |
| 6259 | EXPORT_PC |
| 6260 | REFRESH_IBASE |
| 6261 | movq rSELF, OUT_ARG0 |
| 6262 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6263 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6264 | jmp .L_op_nop+(6*128) |
| 6265 | |
| 6266 | /* ------------------------------ */ |
| 6267 | .balign 128 |
| 6268 | .L_ALT_op_move_object: /* 0x07 */ |
| 6269 | /* File: x86_64/alt_stub.S */ |
| 6270 | /* |
| 6271 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6272 | * any interesting requests and then jump to the real instruction |
| 6273 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6274 | * because rIBASE is caller save and we need to reload it. |
| 6275 | * |
| 6276 | * Note that unlike in the Arm implementation, we should never arrive |
| 6277 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6278 | * return. |
| 6279 | */ |
| 6280 | .extern MterpCheckBefore |
| 6281 | EXPORT_PC |
| 6282 | REFRESH_IBASE |
| 6283 | movq rSELF, OUT_ARG0 |
| 6284 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6285 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6286 | jmp .L_op_nop+(7*128) |
| 6287 | |
| 6288 | /* ------------------------------ */ |
| 6289 | .balign 128 |
| 6290 | .L_ALT_op_move_object_from16: /* 0x08 */ |
| 6291 | /* File: x86_64/alt_stub.S */ |
| 6292 | /* |
| 6293 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6294 | * any interesting requests and then jump to the real instruction |
| 6295 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6296 | * because rIBASE is caller save and we need to reload it. |
| 6297 | * |
| 6298 | * Note that unlike in the Arm implementation, we should never arrive |
| 6299 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6300 | * return. |
| 6301 | */ |
| 6302 | .extern MterpCheckBefore |
| 6303 | EXPORT_PC |
| 6304 | REFRESH_IBASE |
| 6305 | movq rSELF, OUT_ARG0 |
| 6306 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6307 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6308 | jmp .L_op_nop+(8*128) |
| 6309 | |
| 6310 | /* ------------------------------ */ |
| 6311 | .balign 128 |
| 6312 | .L_ALT_op_move_object_16: /* 0x09 */ |
| 6313 | /* File: x86_64/alt_stub.S */ |
| 6314 | /* |
| 6315 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6316 | * any interesting requests and then jump to the real instruction |
| 6317 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6318 | * because rIBASE is caller save and we need to reload it. |
| 6319 | * |
| 6320 | * Note that unlike in the Arm implementation, we should never arrive |
| 6321 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6322 | * return. |
| 6323 | */ |
| 6324 | .extern MterpCheckBefore |
| 6325 | EXPORT_PC |
| 6326 | REFRESH_IBASE |
| 6327 | movq rSELF, OUT_ARG0 |
| 6328 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6329 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6330 | jmp .L_op_nop+(9*128) |
| 6331 | |
| 6332 | /* ------------------------------ */ |
| 6333 | .balign 128 |
| 6334 | .L_ALT_op_move_result: /* 0x0a */ |
| 6335 | /* File: x86_64/alt_stub.S */ |
| 6336 | /* |
| 6337 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6338 | * any interesting requests and then jump to the real instruction |
| 6339 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6340 | * because rIBASE is caller save and we need to reload it. |
| 6341 | * |
| 6342 | * Note that unlike in the Arm implementation, we should never arrive |
| 6343 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6344 | * return. |
| 6345 | */ |
| 6346 | .extern MterpCheckBefore |
| 6347 | EXPORT_PC |
| 6348 | REFRESH_IBASE |
| 6349 | movq rSELF, OUT_ARG0 |
| 6350 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6351 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6352 | jmp .L_op_nop+(10*128) |
| 6353 | |
| 6354 | /* ------------------------------ */ |
| 6355 | .balign 128 |
| 6356 | .L_ALT_op_move_result_wide: /* 0x0b */ |
| 6357 | /* File: x86_64/alt_stub.S */ |
| 6358 | /* |
| 6359 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6360 | * any interesting requests and then jump to the real instruction |
| 6361 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6362 | * because rIBASE is caller save and we need to reload it. |
| 6363 | * |
| 6364 | * Note that unlike in the Arm implementation, we should never arrive |
| 6365 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6366 | * return. |
| 6367 | */ |
| 6368 | .extern MterpCheckBefore |
| 6369 | EXPORT_PC |
| 6370 | REFRESH_IBASE |
| 6371 | movq rSELF, OUT_ARG0 |
| 6372 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6373 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6374 | jmp .L_op_nop+(11*128) |
| 6375 | |
| 6376 | /* ------------------------------ */ |
| 6377 | .balign 128 |
| 6378 | .L_ALT_op_move_result_object: /* 0x0c */ |
| 6379 | /* File: x86_64/alt_stub.S */ |
| 6380 | /* |
| 6381 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6382 | * any interesting requests and then jump to the real instruction |
| 6383 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6384 | * because rIBASE is caller save and we need to reload it. |
| 6385 | * |
| 6386 | * Note that unlike in the Arm implementation, we should never arrive |
| 6387 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6388 | * return. |
| 6389 | */ |
| 6390 | .extern MterpCheckBefore |
| 6391 | EXPORT_PC |
| 6392 | REFRESH_IBASE |
| 6393 | movq rSELF, OUT_ARG0 |
| 6394 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6395 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6396 | jmp .L_op_nop+(12*128) |
| 6397 | |
| 6398 | /* ------------------------------ */ |
| 6399 | .balign 128 |
| 6400 | .L_ALT_op_move_exception: /* 0x0d */ |
| 6401 | /* File: x86_64/alt_stub.S */ |
| 6402 | /* |
| 6403 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6404 | * any interesting requests and then jump to the real instruction |
| 6405 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6406 | * because rIBASE is caller save and we need to reload it. |
| 6407 | * |
| 6408 | * Note that unlike in the Arm implementation, we should never arrive |
| 6409 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6410 | * return. |
| 6411 | */ |
| 6412 | .extern MterpCheckBefore |
| 6413 | EXPORT_PC |
| 6414 | REFRESH_IBASE |
| 6415 | movq rSELF, OUT_ARG0 |
| 6416 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6417 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6418 | jmp .L_op_nop+(13*128) |
| 6419 | |
| 6420 | /* ------------------------------ */ |
| 6421 | .balign 128 |
| 6422 | .L_ALT_op_return_void: /* 0x0e */ |
| 6423 | /* File: x86_64/alt_stub.S */ |
| 6424 | /* |
| 6425 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6426 | * any interesting requests and then jump to the real instruction |
| 6427 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6428 | * because rIBASE is caller save and we need to reload it. |
| 6429 | * |
| 6430 | * Note that unlike in the Arm implementation, we should never arrive |
| 6431 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6432 | * return. |
| 6433 | */ |
| 6434 | .extern MterpCheckBefore |
| 6435 | EXPORT_PC |
| 6436 | REFRESH_IBASE |
| 6437 | movq rSELF, OUT_ARG0 |
| 6438 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6439 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6440 | jmp .L_op_nop+(14*128) |
| 6441 | |
| 6442 | /* ------------------------------ */ |
| 6443 | .balign 128 |
| 6444 | .L_ALT_op_return: /* 0x0f */ |
| 6445 | /* File: x86_64/alt_stub.S */ |
| 6446 | /* |
| 6447 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6448 | * any interesting requests and then jump to the real instruction |
| 6449 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6450 | * because rIBASE is caller save and we need to reload it. |
| 6451 | * |
| 6452 | * Note that unlike in the Arm implementation, we should never arrive |
| 6453 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6454 | * return. |
| 6455 | */ |
| 6456 | .extern MterpCheckBefore |
| 6457 | EXPORT_PC |
| 6458 | REFRESH_IBASE |
| 6459 | movq rSELF, OUT_ARG0 |
| 6460 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6461 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6462 | jmp .L_op_nop+(15*128) |
| 6463 | |
| 6464 | /* ------------------------------ */ |
| 6465 | .balign 128 |
| 6466 | .L_ALT_op_return_wide: /* 0x10 */ |
| 6467 | /* File: x86_64/alt_stub.S */ |
| 6468 | /* |
| 6469 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6470 | * any interesting requests and then jump to the real instruction |
| 6471 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6472 | * because rIBASE is caller save and we need to reload it. |
| 6473 | * |
| 6474 | * Note that unlike in the Arm implementation, we should never arrive |
| 6475 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6476 | * return. |
| 6477 | */ |
| 6478 | .extern MterpCheckBefore |
| 6479 | EXPORT_PC |
| 6480 | REFRESH_IBASE |
| 6481 | movq rSELF, OUT_ARG0 |
| 6482 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6483 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6484 | jmp .L_op_nop+(16*128) |
| 6485 | |
| 6486 | /* ------------------------------ */ |
| 6487 | .balign 128 |
| 6488 | .L_ALT_op_return_object: /* 0x11 */ |
| 6489 | /* File: x86_64/alt_stub.S */ |
| 6490 | /* |
| 6491 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6492 | * any interesting requests and then jump to the real instruction |
| 6493 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6494 | * because rIBASE is caller save and we need to reload it. |
| 6495 | * |
| 6496 | * Note that unlike in the Arm implementation, we should never arrive |
| 6497 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6498 | * return. |
| 6499 | */ |
| 6500 | .extern MterpCheckBefore |
| 6501 | EXPORT_PC |
| 6502 | REFRESH_IBASE |
| 6503 | movq rSELF, OUT_ARG0 |
| 6504 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6505 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6506 | jmp .L_op_nop+(17*128) |
| 6507 | |
| 6508 | /* ------------------------------ */ |
| 6509 | .balign 128 |
| 6510 | .L_ALT_op_const_4: /* 0x12 */ |
| 6511 | /* File: x86_64/alt_stub.S */ |
| 6512 | /* |
| 6513 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6514 | * any interesting requests and then jump to the real instruction |
| 6515 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6516 | * because rIBASE is caller save and we need to reload it. |
| 6517 | * |
| 6518 | * Note that unlike in the Arm implementation, we should never arrive |
| 6519 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6520 | * return. |
| 6521 | */ |
| 6522 | .extern MterpCheckBefore |
| 6523 | EXPORT_PC |
| 6524 | REFRESH_IBASE |
| 6525 | movq rSELF, OUT_ARG0 |
| 6526 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6527 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6528 | jmp .L_op_nop+(18*128) |
| 6529 | |
| 6530 | /* ------------------------------ */ |
| 6531 | .balign 128 |
| 6532 | .L_ALT_op_const_16: /* 0x13 */ |
| 6533 | /* File: x86_64/alt_stub.S */ |
| 6534 | /* |
| 6535 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6536 | * any interesting requests and then jump to the real instruction |
| 6537 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6538 | * because rIBASE is caller save and we need to reload it. |
| 6539 | * |
| 6540 | * Note that unlike in the Arm implementation, we should never arrive |
| 6541 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6542 | * return. |
| 6543 | */ |
| 6544 | .extern MterpCheckBefore |
| 6545 | EXPORT_PC |
| 6546 | REFRESH_IBASE |
| 6547 | movq rSELF, OUT_ARG0 |
| 6548 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6549 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6550 | jmp .L_op_nop+(19*128) |
| 6551 | |
| 6552 | /* ------------------------------ */ |
| 6553 | .balign 128 |
| 6554 | .L_ALT_op_const: /* 0x14 */ |
| 6555 | /* File: x86_64/alt_stub.S */ |
| 6556 | /* |
| 6557 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6558 | * any interesting requests and then jump to the real instruction |
| 6559 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6560 | * because rIBASE is caller save and we need to reload it. |
| 6561 | * |
| 6562 | * Note that unlike in the Arm implementation, we should never arrive |
| 6563 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6564 | * return. |
| 6565 | */ |
| 6566 | .extern MterpCheckBefore |
| 6567 | EXPORT_PC |
| 6568 | REFRESH_IBASE |
| 6569 | movq rSELF, OUT_ARG0 |
| 6570 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6571 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6572 | jmp .L_op_nop+(20*128) |
| 6573 | |
| 6574 | /* ------------------------------ */ |
| 6575 | .balign 128 |
| 6576 | .L_ALT_op_const_high16: /* 0x15 */ |
| 6577 | /* File: x86_64/alt_stub.S */ |
| 6578 | /* |
| 6579 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6580 | * any interesting requests and then jump to the real instruction |
| 6581 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6582 | * because rIBASE is caller save and we need to reload it. |
| 6583 | * |
| 6584 | * Note that unlike in the Arm implementation, we should never arrive |
| 6585 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6586 | * return. |
| 6587 | */ |
| 6588 | .extern MterpCheckBefore |
| 6589 | EXPORT_PC |
| 6590 | REFRESH_IBASE |
| 6591 | movq rSELF, OUT_ARG0 |
| 6592 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6593 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6594 | jmp .L_op_nop+(21*128) |
| 6595 | |
| 6596 | /* ------------------------------ */ |
| 6597 | .balign 128 |
| 6598 | .L_ALT_op_const_wide_16: /* 0x16 */ |
| 6599 | /* File: x86_64/alt_stub.S */ |
| 6600 | /* |
| 6601 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6602 | * any interesting requests and then jump to the real instruction |
| 6603 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6604 | * because rIBASE is caller save and we need to reload it. |
| 6605 | * |
| 6606 | * Note that unlike in the Arm implementation, we should never arrive |
| 6607 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6608 | * return. |
| 6609 | */ |
| 6610 | .extern MterpCheckBefore |
| 6611 | EXPORT_PC |
| 6612 | REFRESH_IBASE |
| 6613 | movq rSELF, OUT_ARG0 |
| 6614 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6615 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6616 | jmp .L_op_nop+(22*128) |
| 6617 | |
| 6618 | /* ------------------------------ */ |
| 6619 | .balign 128 |
| 6620 | .L_ALT_op_const_wide_32: /* 0x17 */ |
| 6621 | /* File: x86_64/alt_stub.S */ |
| 6622 | /* |
| 6623 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6624 | * any interesting requests and then jump to the real instruction |
| 6625 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6626 | * because rIBASE is caller save and we need to reload it. |
| 6627 | * |
| 6628 | * Note that unlike in the Arm implementation, we should never arrive |
| 6629 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6630 | * return. |
| 6631 | */ |
| 6632 | .extern MterpCheckBefore |
| 6633 | EXPORT_PC |
| 6634 | REFRESH_IBASE |
| 6635 | movq rSELF, OUT_ARG0 |
| 6636 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6637 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6638 | jmp .L_op_nop+(23*128) |
| 6639 | |
| 6640 | /* ------------------------------ */ |
| 6641 | .balign 128 |
| 6642 | .L_ALT_op_const_wide: /* 0x18 */ |
| 6643 | /* File: x86_64/alt_stub.S */ |
| 6644 | /* |
| 6645 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6646 | * any interesting requests and then jump to the real instruction |
| 6647 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6648 | * because rIBASE is caller save and we need to reload it. |
| 6649 | * |
| 6650 | * Note that unlike in the Arm implementation, we should never arrive |
| 6651 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6652 | * return. |
| 6653 | */ |
| 6654 | .extern MterpCheckBefore |
| 6655 | EXPORT_PC |
| 6656 | REFRESH_IBASE |
| 6657 | movq rSELF, OUT_ARG0 |
| 6658 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6659 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6660 | jmp .L_op_nop+(24*128) |
| 6661 | |
| 6662 | /* ------------------------------ */ |
| 6663 | .balign 128 |
| 6664 | .L_ALT_op_const_wide_high16: /* 0x19 */ |
| 6665 | /* File: x86_64/alt_stub.S */ |
| 6666 | /* |
| 6667 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6668 | * any interesting requests and then jump to the real instruction |
| 6669 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6670 | * because rIBASE is caller save and we need to reload it. |
| 6671 | * |
| 6672 | * Note that unlike in the Arm implementation, we should never arrive |
| 6673 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6674 | * return. |
| 6675 | */ |
| 6676 | .extern MterpCheckBefore |
| 6677 | EXPORT_PC |
| 6678 | REFRESH_IBASE |
| 6679 | movq rSELF, OUT_ARG0 |
| 6680 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6681 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6682 | jmp .L_op_nop+(25*128) |
| 6683 | |
| 6684 | /* ------------------------------ */ |
| 6685 | .balign 128 |
| 6686 | .L_ALT_op_const_string: /* 0x1a */ |
| 6687 | /* File: x86_64/alt_stub.S */ |
| 6688 | /* |
| 6689 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6690 | * any interesting requests and then jump to the real instruction |
| 6691 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6692 | * because rIBASE is caller save and we need to reload it. |
| 6693 | * |
| 6694 | * Note that unlike in the Arm implementation, we should never arrive |
| 6695 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6696 | * return. |
| 6697 | */ |
| 6698 | .extern MterpCheckBefore |
| 6699 | EXPORT_PC |
| 6700 | REFRESH_IBASE |
| 6701 | movq rSELF, OUT_ARG0 |
| 6702 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6703 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6704 | jmp .L_op_nop+(26*128) |
| 6705 | |
| 6706 | /* ------------------------------ */ |
| 6707 | .balign 128 |
| 6708 | .L_ALT_op_const_string_jumbo: /* 0x1b */ |
| 6709 | /* File: x86_64/alt_stub.S */ |
| 6710 | /* |
| 6711 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6712 | * any interesting requests and then jump to the real instruction |
| 6713 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6714 | * because rIBASE is caller save and we need to reload it. |
| 6715 | * |
| 6716 | * Note that unlike in the Arm implementation, we should never arrive |
| 6717 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6718 | * return. |
| 6719 | */ |
| 6720 | .extern MterpCheckBefore |
| 6721 | EXPORT_PC |
| 6722 | REFRESH_IBASE |
| 6723 | movq rSELF, OUT_ARG0 |
| 6724 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6725 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6726 | jmp .L_op_nop+(27*128) |
| 6727 | |
| 6728 | /* ------------------------------ */ |
| 6729 | .balign 128 |
| 6730 | .L_ALT_op_const_class: /* 0x1c */ |
| 6731 | /* File: x86_64/alt_stub.S */ |
| 6732 | /* |
| 6733 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6734 | * any interesting requests and then jump to the real instruction |
| 6735 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6736 | * because rIBASE is caller save and we need to reload it. |
| 6737 | * |
| 6738 | * Note that unlike in the Arm implementation, we should never arrive |
| 6739 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6740 | * return. |
| 6741 | */ |
| 6742 | .extern MterpCheckBefore |
| 6743 | EXPORT_PC |
| 6744 | REFRESH_IBASE |
| 6745 | movq rSELF, OUT_ARG0 |
| 6746 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6747 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6748 | jmp .L_op_nop+(28*128) |
| 6749 | |
| 6750 | /* ------------------------------ */ |
| 6751 | .balign 128 |
| 6752 | .L_ALT_op_monitor_enter: /* 0x1d */ |
| 6753 | /* File: x86_64/alt_stub.S */ |
| 6754 | /* |
| 6755 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6756 | * any interesting requests and then jump to the real instruction |
| 6757 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6758 | * because rIBASE is caller save and we need to reload it. |
| 6759 | * |
| 6760 | * Note that unlike in the Arm implementation, we should never arrive |
| 6761 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6762 | * return. |
| 6763 | */ |
| 6764 | .extern MterpCheckBefore |
| 6765 | EXPORT_PC |
| 6766 | REFRESH_IBASE |
| 6767 | movq rSELF, OUT_ARG0 |
| 6768 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6769 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6770 | jmp .L_op_nop+(29*128) |
| 6771 | |
| 6772 | /* ------------------------------ */ |
| 6773 | .balign 128 |
| 6774 | .L_ALT_op_monitor_exit: /* 0x1e */ |
| 6775 | /* File: x86_64/alt_stub.S */ |
| 6776 | /* |
| 6777 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6778 | * any interesting requests and then jump to the real instruction |
| 6779 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6780 | * because rIBASE is caller save and we need to reload it. |
| 6781 | * |
| 6782 | * Note that unlike in the Arm implementation, we should never arrive |
| 6783 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6784 | * return. |
| 6785 | */ |
| 6786 | .extern MterpCheckBefore |
| 6787 | EXPORT_PC |
| 6788 | REFRESH_IBASE |
| 6789 | movq rSELF, OUT_ARG0 |
| 6790 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6791 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6792 | jmp .L_op_nop+(30*128) |
| 6793 | |
| 6794 | /* ------------------------------ */ |
| 6795 | .balign 128 |
| 6796 | .L_ALT_op_check_cast: /* 0x1f */ |
| 6797 | /* File: x86_64/alt_stub.S */ |
| 6798 | /* |
| 6799 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6800 | * any interesting requests and then jump to the real instruction |
| 6801 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6802 | * because rIBASE is caller save and we need to reload it. |
| 6803 | * |
| 6804 | * Note that unlike in the Arm implementation, we should never arrive |
| 6805 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6806 | * return. |
| 6807 | */ |
| 6808 | .extern MterpCheckBefore |
| 6809 | EXPORT_PC |
| 6810 | REFRESH_IBASE |
| 6811 | movq rSELF, OUT_ARG0 |
| 6812 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6813 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6814 | jmp .L_op_nop+(31*128) |
| 6815 | |
| 6816 | /* ------------------------------ */ |
| 6817 | .balign 128 |
| 6818 | .L_ALT_op_instance_of: /* 0x20 */ |
| 6819 | /* File: x86_64/alt_stub.S */ |
| 6820 | /* |
| 6821 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6822 | * any interesting requests and then jump to the real instruction |
| 6823 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6824 | * because rIBASE is caller save and we need to reload it. |
| 6825 | * |
| 6826 | * Note that unlike in the Arm implementation, we should never arrive |
| 6827 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6828 | * return. |
| 6829 | */ |
| 6830 | .extern MterpCheckBefore |
| 6831 | EXPORT_PC |
| 6832 | REFRESH_IBASE |
| 6833 | movq rSELF, OUT_ARG0 |
| 6834 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6835 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6836 | jmp .L_op_nop+(32*128) |
| 6837 | |
| 6838 | /* ------------------------------ */ |
| 6839 | .balign 128 |
| 6840 | .L_ALT_op_array_length: /* 0x21 */ |
| 6841 | /* File: x86_64/alt_stub.S */ |
| 6842 | /* |
| 6843 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6844 | * any interesting requests and then jump to the real instruction |
| 6845 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6846 | * because rIBASE is caller save and we need to reload it. |
| 6847 | * |
| 6848 | * Note that unlike in the Arm implementation, we should never arrive |
| 6849 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6850 | * return. |
| 6851 | */ |
| 6852 | .extern MterpCheckBefore |
| 6853 | EXPORT_PC |
| 6854 | REFRESH_IBASE |
| 6855 | movq rSELF, OUT_ARG0 |
| 6856 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6857 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6858 | jmp .L_op_nop+(33*128) |
| 6859 | |
| 6860 | /* ------------------------------ */ |
| 6861 | .balign 128 |
| 6862 | .L_ALT_op_new_instance: /* 0x22 */ |
| 6863 | /* File: x86_64/alt_stub.S */ |
| 6864 | /* |
| 6865 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6866 | * any interesting requests and then jump to the real instruction |
| 6867 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6868 | * because rIBASE is caller save and we need to reload it. |
| 6869 | * |
| 6870 | * Note that unlike in the Arm implementation, we should never arrive |
| 6871 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6872 | * return. |
| 6873 | */ |
| 6874 | .extern MterpCheckBefore |
| 6875 | EXPORT_PC |
| 6876 | REFRESH_IBASE |
| 6877 | movq rSELF, OUT_ARG0 |
| 6878 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6879 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6880 | jmp .L_op_nop+(34*128) |
| 6881 | |
| 6882 | /* ------------------------------ */ |
| 6883 | .balign 128 |
| 6884 | .L_ALT_op_new_array: /* 0x23 */ |
| 6885 | /* File: x86_64/alt_stub.S */ |
| 6886 | /* |
| 6887 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6888 | * any interesting requests and then jump to the real instruction |
| 6889 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6890 | * because rIBASE is caller save and we need to reload it. |
| 6891 | * |
| 6892 | * Note that unlike in the Arm implementation, we should never arrive |
| 6893 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6894 | * return. |
| 6895 | */ |
| 6896 | .extern MterpCheckBefore |
| 6897 | EXPORT_PC |
| 6898 | REFRESH_IBASE |
| 6899 | movq rSELF, OUT_ARG0 |
| 6900 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6901 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6902 | jmp .L_op_nop+(35*128) |
| 6903 | |
| 6904 | /* ------------------------------ */ |
| 6905 | .balign 128 |
| 6906 | .L_ALT_op_filled_new_array: /* 0x24 */ |
| 6907 | /* File: x86_64/alt_stub.S */ |
| 6908 | /* |
| 6909 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6910 | * any interesting requests and then jump to the real instruction |
| 6911 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6912 | * because rIBASE is caller save and we need to reload it. |
| 6913 | * |
| 6914 | * Note that unlike in the Arm implementation, we should never arrive |
| 6915 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6916 | * return. |
| 6917 | */ |
| 6918 | .extern MterpCheckBefore |
| 6919 | EXPORT_PC |
| 6920 | REFRESH_IBASE |
| 6921 | movq rSELF, OUT_ARG0 |
| 6922 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6923 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6924 | jmp .L_op_nop+(36*128) |
| 6925 | |
| 6926 | /* ------------------------------ */ |
| 6927 | .balign 128 |
| 6928 | .L_ALT_op_filled_new_array_range: /* 0x25 */ |
| 6929 | /* File: x86_64/alt_stub.S */ |
| 6930 | /* |
| 6931 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6932 | * any interesting requests and then jump to the real instruction |
| 6933 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6934 | * because rIBASE is caller save and we need to reload it. |
| 6935 | * |
| 6936 | * Note that unlike in the Arm implementation, we should never arrive |
| 6937 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6938 | * return. |
| 6939 | */ |
| 6940 | .extern MterpCheckBefore |
| 6941 | EXPORT_PC |
| 6942 | REFRESH_IBASE |
| 6943 | movq rSELF, OUT_ARG0 |
| 6944 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6945 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6946 | jmp .L_op_nop+(37*128) |
| 6947 | |
| 6948 | /* ------------------------------ */ |
| 6949 | .balign 128 |
| 6950 | .L_ALT_op_fill_array_data: /* 0x26 */ |
| 6951 | /* File: x86_64/alt_stub.S */ |
| 6952 | /* |
| 6953 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6954 | * any interesting requests and then jump to the real instruction |
| 6955 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6956 | * because rIBASE is caller save and we need to reload it. |
| 6957 | * |
| 6958 | * Note that unlike in the Arm implementation, we should never arrive |
| 6959 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6960 | * return. |
| 6961 | */ |
| 6962 | .extern MterpCheckBefore |
| 6963 | EXPORT_PC |
| 6964 | REFRESH_IBASE |
| 6965 | movq rSELF, OUT_ARG0 |
| 6966 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6967 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6968 | jmp .L_op_nop+(38*128) |
| 6969 | |
| 6970 | /* ------------------------------ */ |
| 6971 | .balign 128 |
| 6972 | .L_ALT_op_throw: /* 0x27 */ |
| 6973 | /* File: x86_64/alt_stub.S */ |
| 6974 | /* |
| 6975 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6976 | * any interesting requests and then jump to the real instruction |
| 6977 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 6978 | * because rIBASE is caller save and we need to reload it. |
| 6979 | * |
| 6980 | * Note that unlike in the Arm implementation, we should never arrive |
| 6981 | * here with a zero breakFlag because we always refresh rIBASE on |
| 6982 | * return. |
| 6983 | */ |
| 6984 | .extern MterpCheckBefore |
| 6985 | EXPORT_PC |
| 6986 | REFRESH_IBASE |
| 6987 | movq rSELF, OUT_ARG0 |
| 6988 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 6989 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 6990 | jmp .L_op_nop+(39*128) |
| 6991 | |
| 6992 | /* ------------------------------ */ |
| 6993 | .balign 128 |
| 6994 | .L_ALT_op_goto: /* 0x28 */ |
| 6995 | /* File: x86_64/alt_stub.S */ |
| 6996 | /* |
| 6997 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 6998 | * any interesting requests and then jump to the real instruction |
| 6999 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7000 | * because rIBASE is caller save and we need to reload it. |
| 7001 | * |
| 7002 | * Note that unlike in the Arm implementation, we should never arrive |
| 7003 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7004 | * return. |
| 7005 | */ |
| 7006 | .extern MterpCheckBefore |
| 7007 | EXPORT_PC |
| 7008 | REFRESH_IBASE |
| 7009 | movq rSELF, OUT_ARG0 |
| 7010 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7011 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7012 | jmp .L_op_nop+(40*128) |
| 7013 | |
| 7014 | /* ------------------------------ */ |
| 7015 | .balign 128 |
| 7016 | .L_ALT_op_goto_16: /* 0x29 */ |
| 7017 | /* File: x86_64/alt_stub.S */ |
| 7018 | /* |
| 7019 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7020 | * any interesting requests and then jump to the real instruction |
| 7021 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7022 | * because rIBASE is caller save and we need to reload it. |
| 7023 | * |
| 7024 | * Note that unlike in the Arm implementation, we should never arrive |
| 7025 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7026 | * return. |
| 7027 | */ |
| 7028 | .extern MterpCheckBefore |
| 7029 | EXPORT_PC |
| 7030 | REFRESH_IBASE |
| 7031 | movq rSELF, OUT_ARG0 |
| 7032 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7033 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7034 | jmp .L_op_nop+(41*128) |
| 7035 | |
| 7036 | /* ------------------------------ */ |
| 7037 | .balign 128 |
| 7038 | .L_ALT_op_goto_32: /* 0x2a */ |
| 7039 | /* File: x86_64/alt_stub.S */ |
| 7040 | /* |
| 7041 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7042 | * any interesting requests and then jump to the real instruction |
| 7043 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7044 | * because rIBASE is caller save and we need to reload it. |
| 7045 | * |
| 7046 | * Note that unlike in the Arm implementation, we should never arrive |
| 7047 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7048 | * return. |
| 7049 | */ |
| 7050 | .extern MterpCheckBefore |
| 7051 | EXPORT_PC |
| 7052 | REFRESH_IBASE |
| 7053 | movq rSELF, OUT_ARG0 |
| 7054 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7055 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7056 | jmp .L_op_nop+(42*128) |
| 7057 | |
| 7058 | /* ------------------------------ */ |
| 7059 | .balign 128 |
| 7060 | .L_ALT_op_packed_switch: /* 0x2b */ |
| 7061 | /* File: x86_64/alt_stub.S */ |
| 7062 | /* |
| 7063 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7064 | * any interesting requests and then jump to the real instruction |
| 7065 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7066 | * because rIBASE is caller save and we need to reload it. |
| 7067 | * |
| 7068 | * Note that unlike in the Arm implementation, we should never arrive |
| 7069 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7070 | * return. |
| 7071 | */ |
| 7072 | .extern MterpCheckBefore |
| 7073 | EXPORT_PC |
| 7074 | REFRESH_IBASE |
| 7075 | movq rSELF, OUT_ARG0 |
| 7076 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7077 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7078 | jmp .L_op_nop+(43*128) |
| 7079 | |
| 7080 | /* ------------------------------ */ |
| 7081 | .balign 128 |
| 7082 | .L_ALT_op_sparse_switch: /* 0x2c */ |
| 7083 | /* File: x86_64/alt_stub.S */ |
| 7084 | /* |
| 7085 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7086 | * any interesting requests and then jump to the real instruction |
| 7087 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7088 | * because rIBASE is caller save and we need to reload it. |
| 7089 | * |
| 7090 | * Note that unlike in the Arm implementation, we should never arrive |
| 7091 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7092 | * return. |
| 7093 | */ |
| 7094 | .extern MterpCheckBefore |
| 7095 | EXPORT_PC |
| 7096 | REFRESH_IBASE |
| 7097 | movq rSELF, OUT_ARG0 |
| 7098 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7099 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7100 | jmp .L_op_nop+(44*128) |
| 7101 | |
| 7102 | /* ------------------------------ */ |
| 7103 | .balign 128 |
| 7104 | .L_ALT_op_cmpl_float: /* 0x2d */ |
| 7105 | /* File: x86_64/alt_stub.S */ |
| 7106 | /* |
| 7107 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7108 | * any interesting requests and then jump to the real instruction |
| 7109 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7110 | * because rIBASE is caller save and we need to reload it. |
| 7111 | * |
| 7112 | * Note that unlike in the Arm implementation, we should never arrive |
| 7113 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7114 | * return. |
| 7115 | */ |
| 7116 | .extern MterpCheckBefore |
| 7117 | EXPORT_PC |
| 7118 | REFRESH_IBASE |
| 7119 | movq rSELF, OUT_ARG0 |
| 7120 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7121 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7122 | jmp .L_op_nop+(45*128) |
| 7123 | |
| 7124 | /* ------------------------------ */ |
| 7125 | .balign 128 |
| 7126 | .L_ALT_op_cmpg_float: /* 0x2e */ |
| 7127 | /* File: x86_64/alt_stub.S */ |
| 7128 | /* |
| 7129 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7130 | * any interesting requests and then jump to the real instruction |
| 7131 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7132 | * because rIBASE is caller save and we need to reload it. |
| 7133 | * |
| 7134 | * Note that unlike in the Arm implementation, we should never arrive |
| 7135 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7136 | * return. |
| 7137 | */ |
| 7138 | .extern MterpCheckBefore |
| 7139 | EXPORT_PC |
| 7140 | REFRESH_IBASE |
| 7141 | movq rSELF, OUT_ARG0 |
| 7142 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7143 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7144 | jmp .L_op_nop+(46*128) |
| 7145 | |
| 7146 | /* ------------------------------ */ |
| 7147 | .balign 128 |
| 7148 | .L_ALT_op_cmpl_double: /* 0x2f */ |
| 7149 | /* File: x86_64/alt_stub.S */ |
| 7150 | /* |
| 7151 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7152 | * any interesting requests and then jump to the real instruction |
| 7153 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7154 | * because rIBASE is caller save and we need to reload it. |
| 7155 | * |
| 7156 | * Note that unlike in the Arm implementation, we should never arrive |
| 7157 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7158 | * return. |
| 7159 | */ |
| 7160 | .extern MterpCheckBefore |
| 7161 | EXPORT_PC |
| 7162 | REFRESH_IBASE |
| 7163 | movq rSELF, OUT_ARG0 |
| 7164 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7165 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7166 | jmp .L_op_nop+(47*128) |
| 7167 | |
| 7168 | /* ------------------------------ */ |
| 7169 | .balign 128 |
| 7170 | .L_ALT_op_cmpg_double: /* 0x30 */ |
| 7171 | /* File: x86_64/alt_stub.S */ |
| 7172 | /* |
| 7173 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7174 | * any interesting requests and then jump to the real instruction |
| 7175 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7176 | * because rIBASE is caller save and we need to reload it. |
| 7177 | * |
| 7178 | * Note that unlike in the Arm implementation, we should never arrive |
| 7179 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7180 | * return. |
| 7181 | */ |
| 7182 | .extern MterpCheckBefore |
| 7183 | EXPORT_PC |
| 7184 | REFRESH_IBASE |
| 7185 | movq rSELF, OUT_ARG0 |
| 7186 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7187 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7188 | jmp .L_op_nop+(48*128) |
| 7189 | |
| 7190 | /* ------------------------------ */ |
| 7191 | .balign 128 |
| 7192 | .L_ALT_op_cmp_long: /* 0x31 */ |
| 7193 | /* File: x86_64/alt_stub.S */ |
| 7194 | /* |
| 7195 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7196 | * any interesting requests and then jump to the real instruction |
| 7197 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7198 | * because rIBASE is caller save and we need to reload it. |
| 7199 | * |
| 7200 | * Note that unlike in the Arm implementation, we should never arrive |
| 7201 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7202 | * return. |
| 7203 | */ |
| 7204 | .extern MterpCheckBefore |
| 7205 | EXPORT_PC |
| 7206 | REFRESH_IBASE |
| 7207 | movq rSELF, OUT_ARG0 |
| 7208 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7209 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7210 | jmp .L_op_nop+(49*128) |
| 7211 | |
| 7212 | /* ------------------------------ */ |
| 7213 | .balign 128 |
| 7214 | .L_ALT_op_if_eq: /* 0x32 */ |
| 7215 | /* File: x86_64/alt_stub.S */ |
| 7216 | /* |
| 7217 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7218 | * any interesting requests and then jump to the real instruction |
| 7219 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7220 | * because rIBASE is caller save and we need to reload it. |
| 7221 | * |
| 7222 | * Note that unlike in the Arm implementation, we should never arrive |
| 7223 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7224 | * return. |
| 7225 | */ |
| 7226 | .extern MterpCheckBefore |
| 7227 | EXPORT_PC |
| 7228 | REFRESH_IBASE |
| 7229 | movq rSELF, OUT_ARG0 |
| 7230 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7231 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7232 | jmp .L_op_nop+(50*128) |
| 7233 | |
| 7234 | /* ------------------------------ */ |
| 7235 | .balign 128 |
| 7236 | .L_ALT_op_if_ne: /* 0x33 */ |
| 7237 | /* File: x86_64/alt_stub.S */ |
| 7238 | /* |
| 7239 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7240 | * any interesting requests and then jump to the real instruction |
| 7241 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7242 | * because rIBASE is caller save and we need to reload it. |
| 7243 | * |
| 7244 | * Note that unlike in the Arm implementation, we should never arrive |
| 7245 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7246 | * return. |
| 7247 | */ |
| 7248 | .extern MterpCheckBefore |
| 7249 | EXPORT_PC |
| 7250 | REFRESH_IBASE |
| 7251 | movq rSELF, OUT_ARG0 |
| 7252 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7253 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7254 | jmp .L_op_nop+(51*128) |
| 7255 | |
| 7256 | /* ------------------------------ */ |
| 7257 | .balign 128 |
| 7258 | .L_ALT_op_if_lt: /* 0x34 */ |
| 7259 | /* File: x86_64/alt_stub.S */ |
| 7260 | /* |
| 7261 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7262 | * any interesting requests and then jump to the real instruction |
| 7263 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7264 | * because rIBASE is caller save and we need to reload it. |
| 7265 | * |
| 7266 | * Note that unlike in the Arm implementation, we should never arrive |
| 7267 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7268 | * return. |
| 7269 | */ |
| 7270 | .extern MterpCheckBefore |
| 7271 | EXPORT_PC |
| 7272 | REFRESH_IBASE |
| 7273 | movq rSELF, OUT_ARG0 |
| 7274 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7275 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7276 | jmp .L_op_nop+(52*128) |
| 7277 | |
| 7278 | /* ------------------------------ */ |
| 7279 | .balign 128 |
| 7280 | .L_ALT_op_if_ge: /* 0x35 */ |
| 7281 | /* File: x86_64/alt_stub.S */ |
| 7282 | /* |
| 7283 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7284 | * any interesting requests and then jump to the real instruction |
| 7285 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7286 | * because rIBASE is caller save and we need to reload it. |
| 7287 | * |
| 7288 | * Note that unlike in the Arm implementation, we should never arrive |
| 7289 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7290 | * return. |
| 7291 | */ |
| 7292 | .extern MterpCheckBefore |
| 7293 | EXPORT_PC |
| 7294 | REFRESH_IBASE |
| 7295 | movq rSELF, OUT_ARG0 |
| 7296 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7297 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7298 | jmp .L_op_nop+(53*128) |
| 7299 | |
| 7300 | /* ------------------------------ */ |
| 7301 | .balign 128 |
| 7302 | .L_ALT_op_if_gt: /* 0x36 */ |
| 7303 | /* File: x86_64/alt_stub.S */ |
| 7304 | /* |
| 7305 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7306 | * any interesting requests and then jump to the real instruction |
| 7307 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7308 | * because rIBASE is caller save and we need to reload it. |
| 7309 | * |
| 7310 | * Note that unlike in the Arm implementation, we should never arrive |
| 7311 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7312 | * return. |
| 7313 | */ |
| 7314 | .extern MterpCheckBefore |
| 7315 | EXPORT_PC |
| 7316 | REFRESH_IBASE |
| 7317 | movq rSELF, OUT_ARG0 |
| 7318 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7319 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7320 | jmp .L_op_nop+(54*128) |
| 7321 | |
| 7322 | /* ------------------------------ */ |
| 7323 | .balign 128 |
| 7324 | .L_ALT_op_if_le: /* 0x37 */ |
| 7325 | /* File: x86_64/alt_stub.S */ |
| 7326 | /* |
| 7327 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7328 | * any interesting requests and then jump to the real instruction |
| 7329 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7330 | * because rIBASE is caller save and we need to reload it. |
| 7331 | * |
| 7332 | * Note that unlike in the Arm implementation, we should never arrive |
| 7333 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7334 | * return. |
| 7335 | */ |
| 7336 | .extern MterpCheckBefore |
| 7337 | EXPORT_PC |
| 7338 | REFRESH_IBASE |
| 7339 | movq rSELF, OUT_ARG0 |
| 7340 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7341 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7342 | jmp .L_op_nop+(55*128) |
| 7343 | |
| 7344 | /* ------------------------------ */ |
| 7345 | .balign 128 |
| 7346 | .L_ALT_op_if_eqz: /* 0x38 */ |
| 7347 | /* File: x86_64/alt_stub.S */ |
| 7348 | /* |
| 7349 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7350 | * any interesting requests and then jump to the real instruction |
| 7351 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7352 | * because rIBASE is caller save and we need to reload it. |
| 7353 | * |
| 7354 | * Note that unlike in the Arm implementation, we should never arrive |
| 7355 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7356 | * return. |
| 7357 | */ |
| 7358 | .extern MterpCheckBefore |
| 7359 | EXPORT_PC |
| 7360 | REFRESH_IBASE |
| 7361 | movq rSELF, OUT_ARG0 |
| 7362 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7363 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7364 | jmp .L_op_nop+(56*128) |
| 7365 | |
| 7366 | /* ------------------------------ */ |
| 7367 | .balign 128 |
| 7368 | .L_ALT_op_if_nez: /* 0x39 */ |
| 7369 | /* File: x86_64/alt_stub.S */ |
| 7370 | /* |
| 7371 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7372 | * any interesting requests and then jump to the real instruction |
| 7373 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7374 | * because rIBASE is caller save and we need to reload it. |
| 7375 | * |
| 7376 | * Note that unlike in the Arm implementation, we should never arrive |
| 7377 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7378 | * return. |
| 7379 | */ |
| 7380 | .extern MterpCheckBefore |
| 7381 | EXPORT_PC |
| 7382 | REFRESH_IBASE |
| 7383 | movq rSELF, OUT_ARG0 |
| 7384 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7385 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7386 | jmp .L_op_nop+(57*128) |
| 7387 | |
| 7388 | /* ------------------------------ */ |
| 7389 | .balign 128 |
| 7390 | .L_ALT_op_if_ltz: /* 0x3a */ |
| 7391 | /* File: x86_64/alt_stub.S */ |
| 7392 | /* |
| 7393 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7394 | * any interesting requests and then jump to the real instruction |
| 7395 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7396 | * because rIBASE is caller save and we need to reload it. |
| 7397 | * |
| 7398 | * Note that unlike in the Arm implementation, we should never arrive |
| 7399 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7400 | * return. |
| 7401 | */ |
| 7402 | .extern MterpCheckBefore |
| 7403 | EXPORT_PC |
| 7404 | REFRESH_IBASE |
| 7405 | movq rSELF, OUT_ARG0 |
| 7406 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7407 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7408 | jmp .L_op_nop+(58*128) |
| 7409 | |
| 7410 | /* ------------------------------ */ |
| 7411 | .balign 128 |
| 7412 | .L_ALT_op_if_gez: /* 0x3b */ |
| 7413 | /* File: x86_64/alt_stub.S */ |
| 7414 | /* |
| 7415 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7416 | * any interesting requests and then jump to the real instruction |
| 7417 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7418 | * because rIBASE is caller save and we need to reload it. |
| 7419 | * |
| 7420 | * Note that unlike in the Arm implementation, we should never arrive |
| 7421 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7422 | * return. |
| 7423 | */ |
| 7424 | .extern MterpCheckBefore |
| 7425 | EXPORT_PC |
| 7426 | REFRESH_IBASE |
| 7427 | movq rSELF, OUT_ARG0 |
| 7428 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7429 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7430 | jmp .L_op_nop+(59*128) |
| 7431 | |
| 7432 | /* ------------------------------ */ |
| 7433 | .balign 128 |
| 7434 | .L_ALT_op_if_gtz: /* 0x3c */ |
| 7435 | /* File: x86_64/alt_stub.S */ |
| 7436 | /* |
| 7437 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7438 | * any interesting requests and then jump to the real instruction |
| 7439 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7440 | * because rIBASE is caller save and we need to reload it. |
| 7441 | * |
| 7442 | * Note that unlike in the Arm implementation, we should never arrive |
| 7443 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7444 | * return. |
| 7445 | */ |
| 7446 | .extern MterpCheckBefore |
| 7447 | EXPORT_PC |
| 7448 | REFRESH_IBASE |
| 7449 | movq rSELF, OUT_ARG0 |
| 7450 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7451 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7452 | jmp .L_op_nop+(60*128) |
| 7453 | |
| 7454 | /* ------------------------------ */ |
| 7455 | .balign 128 |
| 7456 | .L_ALT_op_if_lez: /* 0x3d */ |
| 7457 | /* File: x86_64/alt_stub.S */ |
| 7458 | /* |
| 7459 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7460 | * any interesting requests and then jump to the real instruction |
| 7461 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7462 | * because rIBASE is caller save and we need to reload it. |
| 7463 | * |
| 7464 | * Note that unlike in the Arm implementation, we should never arrive |
| 7465 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7466 | * return. |
| 7467 | */ |
| 7468 | .extern MterpCheckBefore |
| 7469 | EXPORT_PC |
| 7470 | REFRESH_IBASE |
| 7471 | movq rSELF, OUT_ARG0 |
| 7472 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7473 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7474 | jmp .L_op_nop+(61*128) |
| 7475 | |
| 7476 | /* ------------------------------ */ |
| 7477 | .balign 128 |
| 7478 | .L_ALT_op_unused_3e: /* 0x3e */ |
| 7479 | /* File: x86_64/alt_stub.S */ |
| 7480 | /* |
| 7481 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7482 | * any interesting requests and then jump to the real instruction |
| 7483 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7484 | * because rIBASE is caller save and we need to reload it. |
| 7485 | * |
| 7486 | * Note that unlike in the Arm implementation, we should never arrive |
| 7487 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7488 | * return. |
| 7489 | */ |
| 7490 | .extern MterpCheckBefore |
| 7491 | EXPORT_PC |
| 7492 | REFRESH_IBASE |
| 7493 | movq rSELF, OUT_ARG0 |
| 7494 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7495 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7496 | jmp .L_op_nop+(62*128) |
| 7497 | |
| 7498 | /* ------------------------------ */ |
| 7499 | .balign 128 |
| 7500 | .L_ALT_op_unused_3f: /* 0x3f */ |
| 7501 | /* File: x86_64/alt_stub.S */ |
| 7502 | /* |
| 7503 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7504 | * any interesting requests and then jump to the real instruction |
| 7505 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7506 | * because rIBASE is caller save and we need to reload it. |
| 7507 | * |
| 7508 | * Note that unlike in the Arm implementation, we should never arrive |
| 7509 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7510 | * return. |
| 7511 | */ |
| 7512 | .extern MterpCheckBefore |
| 7513 | EXPORT_PC |
| 7514 | REFRESH_IBASE |
| 7515 | movq rSELF, OUT_ARG0 |
| 7516 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7517 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7518 | jmp .L_op_nop+(63*128) |
| 7519 | |
| 7520 | /* ------------------------------ */ |
| 7521 | .balign 128 |
| 7522 | .L_ALT_op_unused_40: /* 0x40 */ |
| 7523 | /* File: x86_64/alt_stub.S */ |
| 7524 | /* |
| 7525 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7526 | * any interesting requests and then jump to the real instruction |
| 7527 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7528 | * because rIBASE is caller save and we need to reload it. |
| 7529 | * |
| 7530 | * Note that unlike in the Arm implementation, we should never arrive |
| 7531 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7532 | * return. |
| 7533 | */ |
| 7534 | .extern MterpCheckBefore |
| 7535 | EXPORT_PC |
| 7536 | REFRESH_IBASE |
| 7537 | movq rSELF, OUT_ARG0 |
| 7538 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7539 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7540 | jmp .L_op_nop+(64*128) |
| 7541 | |
| 7542 | /* ------------------------------ */ |
| 7543 | .balign 128 |
| 7544 | .L_ALT_op_unused_41: /* 0x41 */ |
| 7545 | /* File: x86_64/alt_stub.S */ |
| 7546 | /* |
| 7547 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7548 | * any interesting requests and then jump to the real instruction |
| 7549 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7550 | * because rIBASE is caller save and we need to reload it. |
| 7551 | * |
| 7552 | * Note that unlike in the Arm implementation, we should never arrive |
| 7553 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7554 | * return. |
| 7555 | */ |
| 7556 | .extern MterpCheckBefore |
| 7557 | EXPORT_PC |
| 7558 | REFRESH_IBASE |
| 7559 | movq rSELF, OUT_ARG0 |
| 7560 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7561 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7562 | jmp .L_op_nop+(65*128) |
| 7563 | |
| 7564 | /* ------------------------------ */ |
| 7565 | .balign 128 |
| 7566 | .L_ALT_op_unused_42: /* 0x42 */ |
| 7567 | /* File: x86_64/alt_stub.S */ |
| 7568 | /* |
| 7569 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7570 | * any interesting requests and then jump to the real instruction |
| 7571 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7572 | * because rIBASE is caller save and we need to reload it. |
| 7573 | * |
| 7574 | * Note that unlike in the Arm implementation, we should never arrive |
| 7575 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7576 | * return. |
| 7577 | */ |
| 7578 | .extern MterpCheckBefore |
| 7579 | EXPORT_PC |
| 7580 | REFRESH_IBASE |
| 7581 | movq rSELF, OUT_ARG0 |
| 7582 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7583 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7584 | jmp .L_op_nop+(66*128) |
| 7585 | |
| 7586 | /* ------------------------------ */ |
| 7587 | .balign 128 |
| 7588 | .L_ALT_op_unused_43: /* 0x43 */ |
| 7589 | /* File: x86_64/alt_stub.S */ |
| 7590 | /* |
| 7591 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7592 | * any interesting requests and then jump to the real instruction |
| 7593 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7594 | * because rIBASE is caller save and we need to reload it. |
| 7595 | * |
| 7596 | * Note that unlike in the Arm implementation, we should never arrive |
| 7597 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7598 | * return. |
| 7599 | */ |
| 7600 | .extern MterpCheckBefore |
| 7601 | EXPORT_PC |
| 7602 | REFRESH_IBASE |
| 7603 | movq rSELF, OUT_ARG0 |
| 7604 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7605 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7606 | jmp .L_op_nop+(67*128) |
| 7607 | |
| 7608 | /* ------------------------------ */ |
| 7609 | .balign 128 |
| 7610 | .L_ALT_op_aget: /* 0x44 */ |
| 7611 | /* File: x86_64/alt_stub.S */ |
| 7612 | /* |
| 7613 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7614 | * any interesting requests and then jump to the real instruction |
| 7615 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7616 | * because rIBASE is caller save and we need to reload it. |
| 7617 | * |
| 7618 | * Note that unlike in the Arm implementation, we should never arrive |
| 7619 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7620 | * return. |
| 7621 | */ |
| 7622 | .extern MterpCheckBefore |
| 7623 | EXPORT_PC |
| 7624 | REFRESH_IBASE |
| 7625 | movq rSELF, OUT_ARG0 |
| 7626 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7627 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7628 | jmp .L_op_nop+(68*128) |
| 7629 | |
| 7630 | /* ------------------------------ */ |
| 7631 | .balign 128 |
| 7632 | .L_ALT_op_aget_wide: /* 0x45 */ |
| 7633 | /* File: x86_64/alt_stub.S */ |
| 7634 | /* |
| 7635 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7636 | * any interesting requests and then jump to the real instruction |
| 7637 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7638 | * because rIBASE is caller save and we need to reload it. |
| 7639 | * |
| 7640 | * Note that unlike in the Arm implementation, we should never arrive |
| 7641 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7642 | * return. |
| 7643 | */ |
| 7644 | .extern MterpCheckBefore |
| 7645 | EXPORT_PC |
| 7646 | REFRESH_IBASE |
| 7647 | movq rSELF, OUT_ARG0 |
| 7648 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7649 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7650 | jmp .L_op_nop+(69*128) |
| 7651 | |
| 7652 | /* ------------------------------ */ |
| 7653 | .balign 128 |
| 7654 | .L_ALT_op_aget_object: /* 0x46 */ |
| 7655 | /* File: x86_64/alt_stub.S */ |
| 7656 | /* |
| 7657 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7658 | * any interesting requests and then jump to the real instruction |
| 7659 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7660 | * because rIBASE is caller save and we need to reload it. |
| 7661 | * |
| 7662 | * Note that unlike in the Arm implementation, we should never arrive |
| 7663 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7664 | * return. |
| 7665 | */ |
| 7666 | .extern MterpCheckBefore |
| 7667 | EXPORT_PC |
| 7668 | REFRESH_IBASE |
| 7669 | movq rSELF, OUT_ARG0 |
| 7670 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7671 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7672 | jmp .L_op_nop+(70*128) |
| 7673 | |
| 7674 | /* ------------------------------ */ |
| 7675 | .balign 128 |
| 7676 | .L_ALT_op_aget_boolean: /* 0x47 */ |
| 7677 | /* File: x86_64/alt_stub.S */ |
| 7678 | /* |
| 7679 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7680 | * any interesting requests and then jump to the real instruction |
| 7681 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7682 | * because rIBASE is caller save and we need to reload it. |
| 7683 | * |
| 7684 | * Note that unlike in the Arm implementation, we should never arrive |
| 7685 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7686 | * return. |
| 7687 | */ |
| 7688 | .extern MterpCheckBefore |
| 7689 | EXPORT_PC |
| 7690 | REFRESH_IBASE |
| 7691 | movq rSELF, OUT_ARG0 |
| 7692 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7693 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7694 | jmp .L_op_nop+(71*128) |
| 7695 | |
| 7696 | /* ------------------------------ */ |
| 7697 | .balign 128 |
| 7698 | .L_ALT_op_aget_byte: /* 0x48 */ |
| 7699 | /* File: x86_64/alt_stub.S */ |
| 7700 | /* |
| 7701 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7702 | * any interesting requests and then jump to the real instruction |
| 7703 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7704 | * because rIBASE is caller save and we need to reload it. |
| 7705 | * |
| 7706 | * Note that unlike in the Arm implementation, we should never arrive |
| 7707 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7708 | * return. |
| 7709 | */ |
| 7710 | .extern MterpCheckBefore |
| 7711 | EXPORT_PC |
| 7712 | REFRESH_IBASE |
| 7713 | movq rSELF, OUT_ARG0 |
| 7714 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7715 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7716 | jmp .L_op_nop+(72*128) |
| 7717 | |
| 7718 | /* ------------------------------ */ |
| 7719 | .balign 128 |
| 7720 | .L_ALT_op_aget_char: /* 0x49 */ |
| 7721 | /* File: x86_64/alt_stub.S */ |
| 7722 | /* |
| 7723 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7724 | * any interesting requests and then jump to the real instruction |
| 7725 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7726 | * because rIBASE is caller save and we need to reload it. |
| 7727 | * |
| 7728 | * Note that unlike in the Arm implementation, we should never arrive |
| 7729 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7730 | * return. |
| 7731 | */ |
| 7732 | .extern MterpCheckBefore |
| 7733 | EXPORT_PC |
| 7734 | REFRESH_IBASE |
| 7735 | movq rSELF, OUT_ARG0 |
| 7736 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7737 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7738 | jmp .L_op_nop+(73*128) |
| 7739 | |
| 7740 | /* ------------------------------ */ |
| 7741 | .balign 128 |
| 7742 | .L_ALT_op_aget_short: /* 0x4a */ |
| 7743 | /* File: x86_64/alt_stub.S */ |
| 7744 | /* |
| 7745 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7746 | * any interesting requests and then jump to the real instruction |
| 7747 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7748 | * because rIBASE is caller save and we need to reload it. |
| 7749 | * |
| 7750 | * Note that unlike in the Arm implementation, we should never arrive |
| 7751 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7752 | * return. |
| 7753 | */ |
| 7754 | .extern MterpCheckBefore |
| 7755 | EXPORT_PC |
| 7756 | REFRESH_IBASE |
| 7757 | movq rSELF, OUT_ARG0 |
| 7758 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7759 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7760 | jmp .L_op_nop+(74*128) |
| 7761 | |
| 7762 | /* ------------------------------ */ |
| 7763 | .balign 128 |
| 7764 | .L_ALT_op_aput: /* 0x4b */ |
| 7765 | /* File: x86_64/alt_stub.S */ |
| 7766 | /* |
| 7767 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7768 | * any interesting requests and then jump to the real instruction |
| 7769 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7770 | * because rIBASE is caller save and we need to reload it. |
| 7771 | * |
| 7772 | * Note that unlike in the Arm implementation, we should never arrive |
| 7773 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7774 | * return. |
| 7775 | */ |
| 7776 | .extern MterpCheckBefore |
| 7777 | EXPORT_PC |
| 7778 | REFRESH_IBASE |
| 7779 | movq rSELF, OUT_ARG0 |
| 7780 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7781 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7782 | jmp .L_op_nop+(75*128) |
| 7783 | |
| 7784 | /* ------------------------------ */ |
| 7785 | .balign 128 |
| 7786 | .L_ALT_op_aput_wide: /* 0x4c */ |
| 7787 | /* File: x86_64/alt_stub.S */ |
| 7788 | /* |
| 7789 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7790 | * any interesting requests and then jump to the real instruction |
| 7791 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7792 | * because rIBASE is caller save and we need to reload it. |
| 7793 | * |
| 7794 | * Note that unlike in the Arm implementation, we should never arrive |
| 7795 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7796 | * return. |
| 7797 | */ |
| 7798 | .extern MterpCheckBefore |
| 7799 | EXPORT_PC |
| 7800 | REFRESH_IBASE |
| 7801 | movq rSELF, OUT_ARG0 |
| 7802 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7803 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7804 | jmp .L_op_nop+(76*128) |
| 7805 | |
| 7806 | /* ------------------------------ */ |
| 7807 | .balign 128 |
| 7808 | .L_ALT_op_aput_object: /* 0x4d */ |
| 7809 | /* File: x86_64/alt_stub.S */ |
| 7810 | /* |
| 7811 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7812 | * any interesting requests and then jump to the real instruction |
| 7813 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7814 | * because rIBASE is caller save and we need to reload it. |
| 7815 | * |
| 7816 | * Note that unlike in the Arm implementation, we should never arrive |
| 7817 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7818 | * return. |
| 7819 | */ |
| 7820 | .extern MterpCheckBefore |
| 7821 | EXPORT_PC |
| 7822 | REFRESH_IBASE |
| 7823 | movq rSELF, OUT_ARG0 |
| 7824 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7825 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7826 | jmp .L_op_nop+(77*128) |
| 7827 | |
| 7828 | /* ------------------------------ */ |
| 7829 | .balign 128 |
| 7830 | .L_ALT_op_aput_boolean: /* 0x4e */ |
| 7831 | /* File: x86_64/alt_stub.S */ |
| 7832 | /* |
| 7833 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7834 | * any interesting requests and then jump to the real instruction |
| 7835 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7836 | * because rIBASE is caller save and we need to reload it. |
| 7837 | * |
| 7838 | * Note that unlike in the Arm implementation, we should never arrive |
| 7839 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7840 | * return. |
| 7841 | */ |
| 7842 | .extern MterpCheckBefore |
| 7843 | EXPORT_PC |
| 7844 | REFRESH_IBASE |
| 7845 | movq rSELF, OUT_ARG0 |
| 7846 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7847 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7848 | jmp .L_op_nop+(78*128) |
| 7849 | |
| 7850 | /* ------------------------------ */ |
| 7851 | .balign 128 |
| 7852 | .L_ALT_op_aput_byte: /* 0x4f */ |
| 7853 | /* File: x86_64/alt_stub.S */ |
| 7854 | /* |
| 7855 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7856 | * any interesting requests and then jump to the real instruction |
| 7857 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7858 | * because rIBASE is caller save and we need to reload it. |
| 7859 | * |
| 7860 | * Note that unlike in the Arm implementation, we should never arrive |
| 7861 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7862 | * return. |
| 7863 | */ |
| 7864 | .extern MterpCheckBefore |
| 7865 | EXPORT_PC |
| 7866 | REFRESH_IBASE |
| 7867 | movq rSELF, OUT_ARG0 |
| 7868 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7869 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7870 | jmp .L_op_nop+(79*128) |
| 7871 | |
| 7872 | /* ------------------------------ */ |
| 7873 | .balign 128 |
| 7874 | .L_ALT_op_aput_char: /* 0x50 */ |
| 7875 | /* File: x86_64/alt_stub.S */ |
| 7876 | /* |
| 7877 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7878 | * any interesting requests and then jump to the real instruction |
| 7879 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7880 | * because rIBASE is caller save and we need to reload it. |
| 7881 | * |
| 7882 | * Note that unlike in the Arm implementation, we should never arrive |
| 7883 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7884 | * return. |
| 7885 | */ |
| 7886 | .extern MterpCheckBefore |
| 7887 | EXPORT_PC |
| 7888 | REFRESH_IBASE |
| 7889 | movq rSELF, OUT_ARG0 |
| 7890 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7891 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7892 | jmp .L_op_nop+(80*128) |
| 7893 | |
| 7894 | /* ------------------------------ */ |
| 7895 | .balign 128 |
| 7896 | .L_ALT_op_aput_short: /* 0x51 */ |
| 7897 | /* File: x86_64/alt_stub.S */ |
| 7898 | /* |
| 7899 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7900 | * any interesting requests and then jump to the real instruction |
| 7901 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7902 | * because rIBASE is caller save and we need to reload it. |
| 7903 | * |
| 7904 | * Note that unlike in the Arm implementation, we should never arrive |
| 7905 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7906 | * return. |
| 7907 | */ |
| 7908 | .extern MterpCheckBefore |
| 7909 | EXPORT_PC |
| 7910 | REFRESH_IBASE |
| 7911 | movq rSELF, OUT_ARG0 |
| 7912 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7913 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7914 | jmp .L_op_nop+(81*128) |
| 7915 | |
| 7916 | /* ------------------------------ */ |
| 7917 | .balign 128 |
| 7918 | .L_ALT_op_iget: /* 0x52 */ |
| 7919 | /* File: x86_64/alt_stub.S */ |
| 7920 | /* |
| 7921 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7922 | * any interesting requests and then jump to the real instruction |
| 7923 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7924 | * because rIBASE is caller save and we need to reload it. |
| 7925 | * |
| 7926 | * Note that unlike in the Arm implementation, we should never arrive |
| 7927 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7928 | * return. |
| 7929 | */ |
| 7930 | .extern MterpCheckBefore |
| 7931 | EXPORT_PC |
| 7932 | REFRESH_IBASE |
| 7933 | movq rSELF, OUT_ARG0 |
| 7934 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7935 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7936 | jmp .L_op_nop+(82*128) |
| 7937 | |
| 7938 | /* ------------------------------ */ |
| 7939 | .balign 128 |
| 7940 | .L_ALT_op_iget_wide: /* 0x53 */ |
| 7941 | /* File: x86_64/alt_stub.S */ |
| 7942 | /* |
| 7943 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7944 | * any interesting requests and then jump to the real instruction |
| 7945 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7946 | * because rIBASE is caller save and we need to reload it. |
| 7947 | * |
| 7948 | * Note that unlike in the Arm implementation, we should never arrive |
| 7949 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7950 | * return. |
| 7951 | */ |
| 7952 | .extern MterpCheckBefore |
| 7953 | EXPORT_PC |
| 7954 | REFRESH_IBASE |
| 7955 | movq rSELF, OUT_ARG0 |
| 7956 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7957 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7958 | jmp .L_op_nop+(83*128) |
| 7959 | |
| 7960 | /* ------------------------------ */ |
| 7961 | .balign 128 |
| 7962 | .L_ALT_op_iget_object: /* 0x54 */ |
| 7963 | /* File: x86_64/alt_stub.S */ |
| 7964 | /* |
| 7965 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7966 | * any interesting requests and then jump to the real instruction |
| 7967 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7968 | * because rIBASE is caller save and we need to reload it. |
| 7969 | * |
| 7970 | * Note that unlike in the Arm implementation, we should never arrive |
| 7971 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7972 | * return. |
| 7973 | */ |
| 7974 | .extern MterpCheckBefore |
| 7975 | EXPORT_PC |
| 7976 | REFRESH_IBASE |
| 7977 | movq rSELF, OUT_ARG0 |
| 7978 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 7979 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 7980 | jmp .L_op_nop+(84*128) |
| 7981 | |
| 7982 | /* ------------------------------ */ |
| 7983 | .balign 128 |
| 7984 | .L_ALT_op_iget_boolean: /* 0x55 */ |
| 7985 | /* File: x86_64/alt_stub.S */ |
| 7986 | /* |
| 7987 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 7988 | * any interesting requests and then jump to the real instruction |
| 7989 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 7990 | * because rIBASE is caller save and we need to reload it. |
| 7991 | * |
| 7992 | * Note that unlike in the Arm implementation, we should never arrive |
| 7993 | * here with a zero breakFlag because we always refresh rIBASE on |
| 7994 | * return. |
| 7995 | */ |
| 7996 | .extern MterpCheckBefore |
| 7997 | EXPORT_PC |
| 7998 | REFRESH_IBASE |
| 7999 | movq rSELF, OUT_ARG0 |
| 8000 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8001 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8002 | jmp .L_op_nop+(85*128) |
| 8003 | |
| 8004 | /* ------------------------------ */ |
| 8005 | .balign 128 |
| 8006 | .L_ALT_op_iget_byte: /* 0x56 */ |
| 8007 | /* File: x86_64/alt_stub.S */ |
| 8008 | /* |
| 8009 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8010 | * any interesting requests and then jump to the real instruction |
| 8011 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8012 | * because rIBASE is caller save and we need to reload it. |
| 8013 | * |
| 8014 | * Note that unlike in the Arm implementation, we should never arrive |
| 8015 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8016 | * return. |
| 8017 | */ |
| 8018 | .extern MterpCheckBefore |
| 8019 | EXPORT_PC |
| 8020 | REFRESH_IBASE |
| 8021 | movq rSELF, OUT_ARG0 |
| 8022 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8023 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8024 | jmp .L_op_nop+(86*128) |
| 8025 | |
| 8026 | /* ------------------------------ */ |
| 8027 | .balign 128 |
| 8028 | .L_ALT_op_iget_char: /* 0x57 */ |
| 8029 | /* File: x86_64/alt_stub.S */ |
| 8030 | /* |
| 8031 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8032 | * any interesting requests and then jump to the real instruction |
| 8033 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8034 | * because rIBASE is caller save and we need to reload it. |
| 8035 | * |
| 8036 | * Note that unlike in the Arm implementation, we should never arrive |
| 8037 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8038 | * return. |
| 8039 | */ |
| 8040 | .extern MterpCheckBefore |
| 8041 | EXPORT_PC |
| 8042 | REFRESH_IBASE |
| 8043 | movq rSELF, OUT_ARG0 |
| 8044 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8045 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8046 | jmp .L_op_nop+(87*128) |
| 8047 | |
| 8048 | /* ------------------------------ */ |
| 8049 | .balign 128 |
| 8050 | .L_ALT_op_iget_short: /* 0x58 */ |
| 8051 | /* File: x86_64/alt_stub.S */ |
| 8052 | /* |
| 8053 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8054 | * any interesting requests and then jump to the real instruction |
| 8055 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8056 | * because rIBASE is caller save and we need to reload it. |
| 8057 | * |
| 8058 | * Note that unlike in the Arm implementation, we should never arrive |
| 8059 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8060 | * return. |
| 8061 | */ |
| 8062 | .extern MterpCheckBefore |
| 8063 | EXPORT_PC |
| 8064 | REFRESH_IBASE |
| 8065 | movq rSELF, OUT_ARG0 |
| 8066 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8067 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8068 | jmp .L_op_nop+(88*128) |
| 8069 | |
| 8070 | /* ------------------------------ */ |
| 8071 | .balign 128 |
| 8072 | .L_ALT_op_iput: /* 0x59 */ |
| 8073 | /* File: x86_64/alt_stub.S */ |
| 8074 | /* |
| 8075 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8076 | * any interesting requests and then jump to the real instruction |
| 8077 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8078 | * because rIBASE is caller save and we need to reload it. |
| 8079 | * |
| 8080 | * Note that unlike in the Arm implementation, we should never arrive |
| 8081 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8082 | * return. |
| 8083 | */ |
| 8084 | .extern MterpCheckBefore |
| 8085 | EXPORT_PC |
| 8086 | REFRESH_IBASE |
| 8087 | movq rSELF, OUT_ARG0 |
| 8088 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8089 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8090 | jmp .L_op_nop+(89*128) |
| 8091 | |
| 8092 | /* ------------------------------ */ |
| 8093 | .balign 128 |
| 8094 | .L_ALT_op_iput_wide: /* 0x5a */ |
| 8095 | /* File: x86_64/alt_stub.S */ |
| 8096 | /* |
| 8097 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8098 | * any interesting requests and then jump to the real instruction |
| 8099 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8100 | * because rIBASE is caller save and we need to reload it. |
| 8101 | * |
| 8102 | * Note that unlike in the Arm implementation, we should never arrive |
| 8103 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8104 | * return. |
| 8105 | */ |
| 8106 | .extern MterpCheckBefore |
| 8107 | EXPORT_PC |
| 8108 | REFRESH_IBASE |
| 8109 | movq rSELF, OUT_ARG0 |
| 8110 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8111 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8112 | jmp .L_op_nop+(90*128) |
| 8113 | |
| 8114 | /* ------------------------------ */ |
| 8115 | .balign 128 |
| 8116 | .L_ALT_op_iput_object: /* 0x5b */ |
| 8117 | /* File: x86_64/alt_stub.S */ |
| 8118 | /* |
| 8119 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8120 | * any interesting requests and then jump to the real instruction |
| 8121 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8122 | * because rIBASE is caller save and we need to reload it. |
| 8123 | * |
| 8124 | * Note that unlike in the Arm implementation, we should never arrive |
| 8125 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8126 | * return. |
| 8127 | */ |
| 8128 | .extern MterpCheckBefore |
| 8129 | EXPORT_PC |
| 8130 | REFRESH_IBASE |
| 8131 | movq rSELF, OUT_ARG0 |
| 8132 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8133 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8134 | jmp .L_op_nop+(91*128) |
| 8135 | |
| 8136 | /* ------------------------------ */ |
| 8137 | .balign 128 |
| 8138 | .L_ALT_op_iput_boolean: /* 0x5c */ |
| 8139 | /* File: x86_64/alt_stub.S */ |
| 8140 | /* |
| 8141 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8142 | * any interesting requests and then jump to the real instruction |
| 8143 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8144 | * because rIBASE is caller save and we need to reload it. |
| 8145 | * |
| 8146 | * Note that unlike in the Arm implementation, we should never arrive |
| 8147 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8148 | * return. |
| 8149 | */ |
| 8150 | .extern MterpCheckBefore |
| 8151 | EXPORT_PC |
| 8152 | REFRESH_IBASE |
| 8153 | movq rSELF, OUT_ARG0 |
| 8154 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8155 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8156 | jmp .L_op_nop+(92*128) |
| 8157 | |
| 8158 | /* ------------------------------ */ |
| 8159 | .balign 128 |
| 8160 | .L_ALT_op_iput_byte: /* 0x5d */ |
| 8161 | /* File: x86_64/alt_stub.S */ |
| 8162 | /* |
| 8163 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8164 | * any interesting requests and then jump to the real instruction |
| 8165 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8166 | * because rIBASE is caller save and we need to reload it. |
| 8167 | * |
| 8168 | * Note that unlike in the Arm implementation, we should never arrive |
| 8169 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8170 | * return. |
| 8171 | */ |
| 8172 | .extern MterpCheckBefore |
| 8173 | EXPORT_PC |
| 8174 | REFRESH_IBASE |
| 8175 | movq rSELF, OUT_ARG0 |
| 8176 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8177 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8178 | jmp .L_op_nop+(93*128) |
| 8179 | |
| 8180 | /* ------------------------------ */ |
| 8181 | .balign 128 |
| 8182 | .L_ALT_op_iput_char: /* 0x5e */ |
| 8183 | /* File: x86_64/alt_stub.S */ |
| 8184 | /* |
| 8185 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8186 | * any interesting requests and then jump to the real instruction |
| 8187 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8188 | * because rIBASE is caller save and we need to reload it. |
| 8189 | * |
| 8190 | * Note that unlike in the Arm implementation, we should never arrive |
| 8191 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8192 | * return. |
| 8193 | */ |
| 8194 | .extern MterpCheckBefore |
| 8195 | EXPORT_PC |
| 8196 | REFRESH_IBASE |
| 8197 | movq rSELF, OUT_ARG0 |
| 8198 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8199 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8200 | jmp .L_op_nop+(94*128) |
| 8201 | |
| 8202 | /* ------------------------------ */ |
| 8203 | .balign 128 |
| 8204 | .L_ALT_op_iput_short: /* 0x5f */ |
| 8205 | /* File: x86_64/alt_stub.S */ |
| 8206 | /* |
| 8207 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8208 | * any interesting requests and then jump to the real instruction |
| 8209 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8210 | * because rIBASE is caller save and we need to reload it. |
| 8211 | * |
| 8212 | * Note that unlike in the Arm implementation, we should never arrive |
| 8213 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8214 | * return. |
| 8215 | */ |
| 8216 | .extern MterpCheckBefore |
| 8217 | EXPORT_PC |
| 8218 | REFRESH_IBASE |
| 8219 | movq rSELF, OUT_ARG0 |
| 8220 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8221 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8222 | jmp .L_op_nop+(95*128) |
| 8223 | |
| 8224 | /* ------------------------------ */ |
| 8225 | .balign 128 |
| 8226 | .L_ALT_op_sget: /* 0x60 */ |
| 8227 | /* File: x86_64/alt_stub.S */ |
| 8228 | /* |
| 8229 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8230 | * any interesting requests and then jump to the real instruction |
| 8231 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8232 | * because rIBASE is caller save and we need to reload it. |
| 8233 | * |
| 8234 | * Note that unlike in the Arm implementation, we should never arrive |
| 8235 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8236 | * return. |
| 8237 | */ |
| 8238 | .extern MterpCheckBefore |
| 8239 | EXPORT_PC |
| 8240 | REFRESH_IBASE |
| 8241 | movq rSELF, OUT_ARG0 |
| 8242 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8243 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8244 | jmp .L_op_nop+(96*128) |
| 8245 | |
| 8246 | /* ------------------------------ */ |
| 8247 | .balign 128 |
| 8248 | .L_ALT_op_sget_wide: /* 0x61 */ |
| 8249 | /* File: x86_64/alt_stub.S */ |
| 8250 | /* |
| 8251 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8252 | * any interesting requests and then jump to the real instruction |
| 8253 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8254 | * because rIBASE is caller save and we need to reload it. |
| 8255 | * |
| 8256 | * Note that unlike in the Arm implementation, we should never arrive |
| 8257 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8258 | * return. |
| 8259 | */ |
| 8260 | .extern MterpCheckBefore |
| 8261 | EXPORT_PC |
| 8262 | REFRESH_IBASE |
| 8263 | movq rSELF, OUT_ARG0 |
| 8264 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8265 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8266 | jmp .L_op_nop+(97*128) |
| 8267 | |
| 8268 | /* ------------------------------ */ |
| 8269 | .balign 128 |
| 8270 | .L_ALT_op_sget_object: /* 0x62 */ |
| 8271 | /* File: x86_64/alt_stub.S */ |
| 8272 | /* |
| 8273 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8274 | * any interesting requests and then jump to the real instruction |
| 8275 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8276 | * because rIBASE is caller save and we need to reload it. |
| 8277 | * |
| 8278 | * Note that unlike in the Arm implementation, we should never arrive |
| 8279 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8280 | * return. |
| 8281 | */ |
| 8282 | .extern MterpCheckBefore |
| 8283 | EXPORT_PC |
| 8284 | REFRESH_IBASE |
| 8285 | movq rSELF, OUT_ARG0 |
| 8286 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8287 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8288 | jmp .L_op_nop+(98*128) |
| 8289 | |
| 8290 | /* ------------------------------ */ |
| 8291 | .balign 128 |
| 8292 | .L_ALT_op_sget_boolean: /* 0x63 */ |
| 8293 | /* File: x86_64/alt_stub.S */ |
| 8294 | /* |
| 8295 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8296 | * any interesting requests and then jump to the real instruction |
| 8297 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8298 | * because rIBASE is caller save and we need to reload it. |
| 8299 | * |
| 8300 | * Note that unlike in the Arm implementation, we should never arrive |
| 8301 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8302 | * return. |
| 8303 | */ |
| 8304 | .extern MterpCheckBefore |
| 8305 | EXPORT_PC |
| 8306 | REFRESH_IBASE |
| 8307 | movq rSELF, OUT_ARG0 |
| 8308 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8309 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8310 | jmp .L_op_nop+(99*128) |
| 8311 | |
| 8312 | /* ------------------------------ */ |
| 8313 | .balign 128 |
| 8314 | .L_ALT_op_sget_byte: /* 0x64 */ |
| 8315 | /* File: x86_64/alt_stub.S */ |
| 8316 | /* |
| 8317 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8318 | * any interesting requests and then jump to the real instruction |
| 8319 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8320 | * because rIBASE is caller save and we need to reload it. |
| 8321 | * |
| 8322 | * Note that unlike in the Arm implementation, we should never arrive |
| 8323 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8324 | * return. |
| 8325 | */ |
| 8326 | .extern MterpCheckBefore |
| 8327 | EXPORT_PC |
| 8328 | REFRESH_IBASE |
| 8329 | movq rSELF, OUT_ARG0 |
| 8330 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8331 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8332 | jmp .L_op_nop+(100*128) |
| 8333 | |
| 8334 | /* ------------------------------ */ |
| 8335 | .balign 128 |
| 8336 | .L_ALT_op_sget_char: /* 0x65 */ |
| 8337 | /* File: x86_64/alt_stub.S */ |
| 8338 | /* |
| 8339 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8340 | * any interesting requests and then jump to the real instruction |
| 8341 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8342 | * because rIBASE is caller save and we need to reload it. |
| 8343 | * |
| 8344 | * Note that unlike in the Arm implementation, we should never arrive |
| 8345 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8346 | * return. |
| 8347 | */ |
| 8348 | .extern MterpCheckBefore |
| 8349 | EXPORT_PC |
| 8350 | REFRESH_IBASE |
| 8351 | movq rSELF, OUT_ARG0 |
| 8352 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8353 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8354 | jmp .L_op_nop+(101*128) |
| 8355 | |
| 8356 | /* ------------------------------ */ |
| 8357 | .balign 128 |
| 8358 | .L_ALT_op_sget_short: /* 0x66 */ |
| 8359 | /* File: x86_64/alt_stub.S */ |
| 8360 | /* |
| 8361 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8362 | * any interesting requests and then jump to the real instruction |
| 8363 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8364 | * because rIBASE is caller save and we need to reload it. |
| 8365 | * |
| 8366 | * Note that unlike in the Arm implementation, we should never arrive |
| 8367 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8368 | * return. |
| 8369 | */ |
| 8370 | .extern MterpCheckBefore |
| 8371 | EXPORT_PC |
| 8372 | REFRESH_IBASE |
| 8373 | movq rSELF, OUT_ARG0 |
| 8374 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8375 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8376 | jmp .L_op_nop+(102*128) |
| 8377 | |
| 8378 | /* ------------------------------ */ |
| 8379 | .balign 128 |
| 8380 | .L_ALT_op_sput: /* 0x67 */ |
| 8381 | /* File: x86_64/alt_stub.S */ |
| 8382 | /* |
| 8383 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8384 | * any interesting requests and then jump to the real instruction |
| 8385 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8386 | * because rIBASE is caller save and we need to reload it. |
| 8387 | * |
| 8388 | * Note that unlike in the Arm implementation, we should never arrive |
| 8389 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8390 | * return. |
| 8391 | */ |
| 8392 | .extern MterpCheckBefore |
| 8393 | EXPORT_PC |
| 8394 | REFRESH_IBASE |
| 8395 | movq rSELF, OUT_ARG0 |
| 8396 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8397 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8398 | jmp .L_op_nop+(103*128) |
| 8399 | |
| 8400 | /* ------------------------------ */ |
| 8401 | .balign 128 |
| 8402 | .L_ALT_op_sput_wide: /* 0x68 */ |
| 8403 | /* File: x86_64/alt_stub.S */ |
| 8404 | /* |
| 8405 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8406 | * any interesting requests and then jump to the real instruction |
| 8407 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8408 | * because rIBASE is caller save and we need to reload it. |
| 8409 | * |
| 8410 | * Note that unlike in the Arm implementation, we should never arrive |
| 8411 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8412 | * return. |
| 8413 | */ |
| 8414 | .extern MterpCheckBefore |
| 8415 | EXPORT_PC |
| 8416 | REFRESH_IBASE |
| 8417 | movq rSELF, OUT_ARG0 |
| 8418 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8419 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8420 | jmp .L_op_nop+(104*128) |
| 8421 | |
| 8422 | /* ------------------------------ */ |
| 8423 | .balign 128 |
| 8424 | .L_ALT_op_sput_object: /* 0x69 */ |
| 8425 | /* File: x86_64/alt_stub.S */ |
| 8426 | /* |
| 8427 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8428 | * any interesting requests and then jump to the real instruction |
| 8429 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8430 | * because rIBASE is caller save and we need to reload it. |
| 8431 | * |
| 8432 | * Note that unlike in the Arm implementation, we should never arrive |
| 8433 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8434 | * return. |
| 8435 | */ |
| 8436 | .extern MterpCheckBefore |
| 8437 | EXPORT_PC |
| 8438 | REFRESH_IBASE |
| 8439 | movq rSELF, OUT_ARG0 |
| 8440 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8441 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8442 | jmp .L_op_nop+(105*128) |
| 8443 | |
| 8444 | /* ------------------------------ */ |
| 8445 | .balign 128 |
| 8446 | .L_ALT_op_sput_boolean: /* 0x6a */ |
| 8447 | /* File: x86_64/alt_stub.S */ |
| 8448 | /* |
| 8449 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8450 | * any interesting requests and then jump to the real instruction |
| 8451 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8452 | * because rIBASE is caller save and we need to reload it. |
| 8453 | * |
| 8454 | * Note that unlike in the Arm implementation, we should never arrive |
| 8455 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8456 | * return. |
| 8457 | */ |
| 8458 | .extern MterpCheckBefore |
| 8459 | EXPORT_PC |
| 8460 | REFRESH_IBASE |
| 8461 | movq rSELF, OUT_ARG0 |
| 8462 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8463 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8464 | jmp .L_op_nop+(106*128) |
| 8465 | |
| 8466 | /* ------------------------------ */ |
| 8467 | .balign 128 |
| 8468 | .L_ALT_op_sput_byte: /* 0x6b */ |
| 8469 | /* File: x86_64/alt_stub.S */ |
| 8470 | /* |
| 8471 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8472 | * any interesting requests and then jump to the real instruction |
| 8473 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8474 | * because rIBASE is caller save and we need to reload it. |
| 8475 | * |
| 8476 | * Note that unlike in the Arm implementation, we should never arrive |
| 8477 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8478 | * return. |
| 8479 | */ |
| 8480 | .extern MterpCheckBefore |
| 8481 | EXPORT_PC |
| 8482 | REFRESH_IBASE |
| 8483 | movq rSELF, OUT_ARG0 |
| 8484 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8485 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8486 | jmp .L_op_nop+(107*128) |
| 8487 | |
| 8488 | /* ------------------------------ */ |
| 8489 | .balign 128 |
| 8490 | .L_ALT_op_sput_char: /* 0x6c */ |
| 8491 | /* File: x86_64/alt_stub.S */ |
| 8492 | /* |
| 8493 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8494 | * any interesting requests and then jump to the real instruction |
| 8495 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8496 | * because rIBASE is caller save and we need to reload it. |
| 8497 | * |
| 8498 | * Note that unlike in the Arm implementation, we should never arrive |
| 8499 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8500 | * return. |
| 8501 | */ |
| 8502 | .extern MterpCheckBefore |
| 8503 | EXPORT_PC |
| 8504 | REFRESH_IBASE |
| 8505 | movq rSELF, OUT_ARG0 |
| 8506 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8507 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8508 | jmp .L_op_nop+(108*128) |
| 8509 | |
| 8510 | /* ------------------------------ */ |
| 8511 | .balign 128 |
| 8512 | .L_ALT_op_sput_short: /* 0x6d */ |
| 8513 | /* File: x86_64/alt_stub.S */ |
| 8514 | /* |
| 8515 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8516 | * any interesting requests and then jump to the real instruction |
| 8517 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8518 | * because rIBASE is caller save and we need to reload it. |
| 8519 | * |
| 8520 | * Note that unlike in the Arm implementation, we should never arrive |
| 8521 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8522 | * return. |
| 8523 | */ |
| 8524 | .extern MterpCheckBefore |
| 8525 | EXPORT_PC |
| 8526 | REFRESH_IBASE |
| 8527 | movq rSELF, OUT_ARG0 |
| 8528 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8529 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8530 | jmp .L_op_nop+(109*128) |
| 8531 | |
| 8532 | /* ------------------------------ */ |
| 8533 | .balign 128 |
| 8534 | .L_ALT_op_invoke_virtual: /* 0x6e */ |
| 8535 | /* File: x86_64/alt_stub.S */ |
| 8536 | /* |
| 8537 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8538 | * any interesting requests and then jump to the real instruction |
| 8539 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8540 | * because rIBASE is caller save and we need to reload it. |
| 8541 | * |
| 8542 | * Note that unlike in the Arm implementation, we should never arrive |
| 8543 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8544 | * return. |
| 8545 | */ |
| 8546 | .extern MterpCheckBefore |
| 8547 | EXPORT_PC |
| 8548 | REFRESH_IBASE |
| 8549 | movq rSELF, OUT_ARG0 |
| 8550 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8551 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8552 | jmp .L_op_nop+(110*128) |
| 8553 | |
| 8554 | /* ------------------------------ */ |
| 8555 | .balign 128 |
| 8556 | .L_ALT_op_invoke_super: /* 0x6f */ |
| 8557 | /* File: x86_64/alt_stub.S */ |
| 8558 | /* |
| 8559 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8560 | * any interesting requests and then jump to the real instruction |
| 8561 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8562 | * because rIBASE is caller save and we need to reload it. |
| 8563 | * |
| 8564 | * Note that unlike in the Arm implementation, we should never arrive |
| 8565 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8566 | * return. |
| 8567 | */ |
| 8568 | .extern MterpCheckBefore |
| 8569 | EXPORT_PC |
| 8570 | REFRESH_IBASE |
| 8571 | movq rSELF, OUT_ARG0 |
| 8572 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8573 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8574 | jmp .L_op_nop+(111*128) |
| 8575 | |
| 8576 | /* ------------------------------ */ |
| 8577 | .balign 128 |
| 8578 | .L_ALT_op_invoke_direct: /* 0x70 */ |
| 8579 | /* File: x86_64/alt_stub.S */ |
| 8580 | /* |
| 8581 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8582 | * any interesting requests and then jump to the real instruction |
| 8583 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8584 | * because rIBASE is caller save and we need to reload it. |
| 8585 | * |
| 8586 | * Note that unlike in the Arm implementation, we should never arrive |
| 8587 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8588 | * return. |
| 8589 | */ |
| 8590 | .extern MterpCheckBefore |
| 8591 | EXPORT_PC |
| 8592 | REFRESH_IBASE |
| 8593 | movq rSELF, OUT_ARG0 |
| 8594 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8595 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8596 | jmp .L_op_nop+(112*128) |
| 8597 | |
| 8598 | /* ------------------------------ */ |
| 8599 | .balign 128 |
| 8600 | .L_ALT_op_invoke_static: /* 0x71 */ |
| 8601 | /* File: x86_64/alt_stub.S */ |
| 8602 | /* |
| 8603 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8604 | * any interesting requests and then jump to the real instruction |
| 8605 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8606 | * because rIBASE is caller save and we need to reload it. |
| 8607 | * |
| 8608 | * Note that unlike in the Arm implementation, we should never arrive |
| 8609 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8610 | * return. |
| 8611 | */ |
| 8612 | .extern MterpCheckBefore |
| 8613 | EXPORT_PC |
| 8614 | REFRESH_IBASE |
| 8615 | movq rSELF, OUT_ARG0 |
| 8616 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8617 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8618 | jmp .L_op_nop+(113*128) |
| 8619 | |
| 8620 | /* ------------------------------ */ |
| 8621 | .balign 128 |
| 8622 | .L_ALT_op_invoke_interface: /* 0x72 */ |
| 8623 | /* File: x86_64/alt_stub.S */ |
| 8624 | /* |
| 8625 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8626 | * any interesting requests and then jump to the real instruction |
| 8627 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8628 | * because rIBASE is caller save and we need to reload it. |
| 8629 | * |
| 8630 | * Note that unlike in the Arm implementation, we should never arrive |
| 8631 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8632 | * return. |
| 8633 | */ |
| 8634 | .extern MterpCheckBefore |
| 8635 | EXPORT_PC |
| 8636 | REFRESH_IBASE |
| 8637 | movq rSELF, OUT_ARG0 |
| 8638 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8639 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8640 | jmp .L_op_nop+(114*128) |
| 8641 | |
| 8642 | /* ------------------------------ */ |
| 8643 | .balign 128 |
| 8644 | .L_ALT_op_return_void_no_barrier: /* 0x73 */ |
| 8645 | /* File: x86_64/alt_stub.S */ |
| 8646 | /* |
| 8647 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8648 | * any interesting requests and then jump to the real instruction |
| 8649 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8650 | * because rIBASE is caller save and we need to reload it. |
| 8651 | * |
| 8652 | * Note that unlike in the Arm implementation, we should never arrive |
| 8653 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8654 | * return. |
| 8655 | */ |
| 8656 | .extern MterpCheckBefore |
| 8657 | EXPORT_PC |
| 8658 | REFRESH_IBASE |
| 8659 | movq rSELF, OUT_ARG0 |
| 8660 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8661 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8662 | jmp .L_op_nop+(115*128) |
| 8663 | |
| 8664 | /* ------------------------------ */ |
| 8665 | .balign 128 |
| 8666 | .L_ALT_op_invoke_virtual_range: /* 0x74 */ |
| 8667 | /* File: x86_64/alt_stub.S */ |
| 8668 | /* |
| 8669 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8670 | * any interesting requests and then jump to the real instruction |
| 8671 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8672 | * because rIBASE is caller save and we need to reload it. |
| 8673 | * |
| 8674 | * Note that unlike in the Arm implementation, we should never arrive |
| 8675 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8676 | * return. |
| 8677 | */ |
| 8678 | .extern MterpCheckBefore |
| 8679 | EXPORT_PC |
| 8680 | REFRESH_IBASE |
| 8681 | movq rSELF, OUT_ARG0 |
| 8682 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8683 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8684 | jmp .L_op_nop+(116*128) |
| 8685 | |
| 8686 | /* ------------------------------ */ |
| 8687 | .balign 128 |
| 8688 | .L_ALT_op_invoke_super_range: /* 0x75 */ |
| 8689 | /* File: x86_64/alt_stub.S */ |
| 8690 | /* |
| 8691 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8692 | * any interesting requests and then jump to the real instruction |
| 8693 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8694 | * because rIBASE is caller save and we need to reload it. |
| 8695 | * |
| 8696 | * Note that unlike in the Arm implementation, we should never arrive |
| 8697 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8698 | * return. |
| 8699 | */ |
| 8700 | .extern MterpCheckBefore |
| 8701 | EXPORT_PC |
| 8702 | REFRESH_IBASE |
| 8703 | movq rSELF, OUT_ARG0 |
| 8704 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8705 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8706 | jmp .L_op_nop+(117*128) |
| 8707 | |
| 8708 | /* ------------------------------ */ |
| 8709 | .balign 128 |
| 8710 | .L_ALT_op_invoke_direct_range: /* 0x76 */ |
| 8711 | /* File: x86_64/alt_stub.S */ |
| 8712 | /* |
| 8713 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8714 | * any interesting requests and then jump to the real instruction |
| 8715 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8716 | * because rIBASE is caller save and we need to reload it. |
| 8717 | * |
| 8718 | * Note that unlike in the Arm implementation, we should never arrive |
| 8719 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8720 | * return. |
| 8721 | */ |
| 8722 | .extern MterpCheckBefore |
| 8723 | EXPORT_PC |
| 8724 | REFRESH_IBASE |
| 8725 | movq rSELF, OUT_ARG0 |
| 8726 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8727 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8728 | jmp .L_op_nop+(118*128) |
| 8729 | |
| 8730 | /* ------------------------------ */ |
| 8731 | .balign 128 |
| 8732 | .L_ALT_op_invoke_static_range: /* 0x77 */ |
| 8733 | /* File: x86_64/alt_stub.S */ |
| 8734 | /* |
| 8735 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8736 | * any interesting requests and then jump to the real instruction |
| 8737 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8738 | * because rIBASE is caller save and we need to reload it. |
| 8739 | * |
| 8740 | * Note that unlike in the Arm implementation, we should never arrive |
| 8741 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8742 | * return. |
| 8743 | */ |
| 8744 | .extern MterpCheckBefore |
| 8745 | EXPORT_PC |
| 8746 | REFRESH_IBASE |
| 8747 | movq rSELF, OUT_ARG0 |
| 8748 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8749 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8750 | jmp .L_op_nop+(119*128) |
| 8751 | |
| 8752 | /* ------------------------------ */ |
| 8753 | .balign 128 |
| 8754 | .L_ALT_op_invoke_interface_range: /* 0x78 */ |
| 8755 | /* File: x86_64/alt_stub.S */ |
| 8756 | /* |
| 8757 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8758 | * any interesting requests and then jump to the real instruction |
| 8759 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8760 | * because rIBASE is caller save and we need to reload it. |
| 8761 | * |
| 8762 | * Note that unlike in the Arm implementation, we should never arrive |
| 8763 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8764 | * return. |
| 8765 | */ |
| 8766 | .extern MterpCheckBefore |
| 8767 | EXPORT_PC |
| 8768 | REFRESH_IBASE |
| 8769 | movq rSELF, OUT_ARG0 |
| 8770 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8771 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8772 | jmp .L_op_nop+(120*128) |
| 8773 | |
| 8774 | /* ------------------------------ */ |
| 8775 | .balign 128 |
| 8776 | .L_ALT_op_unused_79: /* 0x79 */ |
| 8777 | /* File: x86_64/alt_stub.S */ |
| 8778 | /* |
| 8779 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8780 | * any interesting requests and then jump to the real instruction |
| 8781 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8782 | * because rIBASE is caller save and we need to reload it. |
| 8783 | * |
| 8784 | * Note that unlike in the Arm implementation, we should never arrive |
| 8785 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8786 | * return. |
| 8787 | */ |
| 8788 | .extern MterpCheckBefore |
| 8789 | EXPORT_PC |
| 8790 | REFRESH_IBASE |
| 8791 | movq rSELF, OUT_ARG0 |
| 8792 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8793 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8794 | jmp .L_op_nop+(121*128) |
| 8795 | |
| 8796 | /* ------------------------------ */ |
| 8797 | .balign 128 |
| 8798 | .L_ALT_op_unused_7a: /* 0x7a */ |
| 8799 | /* File: x86_64/alt_stub.S */ |
| 8800 | /* |
| 8801 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8802 | * any interesting requests and then jump to the real instruction |
| 8803 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8804 | * because rIBASE is caller save and we need to reload it. |
| 8805 | * |
| 8806 | * Note that unlike in the Arm implementation, we should never arrive |
| 8807 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8808 | * return. |
| 8809 | */ |
| 8810 | .extern MterpCheckBefore |
| 8811 | EXPORT_PC |
| 8812 | REFRESH_IBASE |
| 8813 | movq rSELF, OUT_ARG0 |
| 8814 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8815 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8816 | jmp .L_op_nop+(122*128) |
| 8817 | |
| 8818 | /* ------------------------------ */ |
| 8819 | .balign 128 |
| 8820 | .L_ALT_op_neg_int: /* 0x7b */ |
| 8821 | /* File: x86_64/alt_stub.S */ |
| 8822 | /* |
| 8823 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8824 | * any interesting requests and then jump to the real instruction |
| 8825 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8826 | * because rIBASE is caller save and we need to reload it. |
| 8827 | * |
| 8828 | * Note that unlike in the Arm implementation, we should never arrive |
| 8829 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8830 | * return. |
| 8831 | */ |
| 8832 | .extern MterpCheckBefore |
| 8833 | EXPORT_PC |
| 8834 | REFRESH_IBASE |
| 8835 | movq rSELF, OUT_ARG0 |
| 8836 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8837 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8838 | jmp .L_op_nop+(123*128) |
| 8839 | |
| 8840 | /* ------------------------------ */ |
| 8841 | .balign 128 |
| 8842 | .L_ALT_op_not_int: /* 0x7c */ |
| 8843 | /* File: x86_64/alt_stub.S */ |
| 8844 | /* |
| 8845 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8846 | * any interesting requests and then jump to the real instruction |
| 8847 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8848 | * because rIBASE is caller save and we need to reload it. |
| 8849 | * |
| 8850 | * Note that unlike in the Arm implementation, we should never arrive |
| 8851 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8852 | * return. |
| 8853 | */ |
| 8854 | .extern MterpCheckBefore |
| 8855 | EXPORT_PC |
| 8856 | REFRESH_IBASE |
| 8857 | movq rSELF, OUT_ARG0 |
| 8858 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8859 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8860 | jmp .L_op_nop+(124*128) |
| 8861 | |
| 8862 | /* ------------------------------ */ |
| 8863 | .balign 128 |
| 8864 | .L_ALT_op_neg_long: /* 0x7d */ |
| 8865 | /* File: x86_64/alt_stub.S */ |
| 8866 | /* |
| 8867 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8868 | * any interesting requests and then jump to the real instruction |
| 8869 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8870 | * because rIBASE is caller save and we need to reload it. |
| 8871 | * |
| 8872 | * Note that unlike in the Arm implementation, we should never arrive |
| 8873 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8874 | * return. |
| 8875 | */ |
| 8876 | .extern MterpCheckBefore |
| 8877 | EXPORT_PC |
| 8878 | REFRESH_IBASE |
| 8879 | movq rSELF, OUT_ARG0 |
| 8880 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8881 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8882 | jmp .L_op_nop+(125*128) |
| 8883 | |
| 8884 | /* ------------------------------ */ |
| 8885 | .balign 128 |
| 8886 | .L_ALT_op_not_long: /* 0x7e */ |
| 8887 | /* File: x86_64/alt_stub.S */ |
| 8888 | /* |
| 8889 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8890 | * any interesting requests and then jump to the real instruction |
| 8891 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8892 | * because rIBASE is caller save and we need to reload it. |
| 8893 | * |
| 8894 | * Note that unlike in the Arm implementation, we should never arrive |
| 8895 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8896 | * return. |
| 8897 | */ |
| 8898 | .extern MterpCheckBefore |
| 8899 | EXPORT_PC |
| 8900 | REFRESH_IBASE |
| 8901 | movq rSELF, OUT_ARG0 |
| 8902 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8903 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8904 | jmp .L_op_nop+(126*128) |
| 8905 | |
| 8906 | /* ------------------------------ */ |
| 8907 | .balign 128 |
| 8908 | .L_ALT_op_neg_float: /* 0x7f */ |
| 8909 | /* File: x86_64/alt_stub.S */ |
| 8910 | /* |
| 8911 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8912 | * any interesting requests and then jump to the real instruction |
| 8913 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8914 | * because rIBASE is caller save and we need to reload it. |
| 8915 | * |
| 8916 | * Note that unlike in the Arm implementation, we should never arrive |
| 8917 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8918 | * return. |
| 8919 | */ |
| 8920 | .extern MterpCheckBefore |
| 8921 | EXPORT_PC |
| 8922 | REFRESH_IBASE |
| 8923 | movq rSELF, OUT_ARG0 |
| 8924 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8925 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8926 | jmp .L_op_nop+(127*128) |
| 8927 | |
| 8928 | /* ------------------------------ */ |
| 8929 | .balign 128 |
| 8930 | .L_ALT_op_neg_double: /* 0x80 */ |
| 8931 | /* File: x86_64/alt_stub.S */ |
| 8932 | /* |
| 8933 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8934 | * any interesting requests and then jump to the real instruction |
| 8935 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8936 | * because rIBASE is caller save and we need to reload it. |
| 8937 | * |
| 8938 | * Note that unlike in the Arm implementation, we should never arrive |
| 8939 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8940 | * return. |
| 8941 | */ |
| 8942 | .extern MterpCheckBefore |
| 8943 | EXPORT_PC |
| 8944 | REFRESH_IBASE |
| 8945 | movq rSELF, OUT_ARG0 |
| 8946 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8947 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8948 | jmp .L_op_nop+(128*128) |
| 8949 | |
| 8950 | /* ------------------------------ */ |
| 8951 | .balign 128 |
| 8952 | .L_ALT_op_int_to_long: /* 0x81 */ |
| 8953 | /* File: x86_64/alt_stub.S */ |
| 8954 | /* |
| 8955 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8956 | * any interesting requests and then jump to the real instruction |
| 8957 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8958 | * because rIBASE is caller save and we need to reload it. |
| 8959 | * |
| 8960 | * Note that unlike in the Arm implementation, we should never arrive |
| 8961 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8962 | * return. |
| 8963 | */ |
| 8964 | .extern MterpCheckBefore |
| 8965 | EXPORT_PC |
| 8966 | REFRESH_IBASE |
| 8967 | movq rSELF, OUT_ARG0 |
| 8968 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8969 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8970 | jmp .L_op_nop+(129*128) |
| 8971 | |
| 8972 | /* ------------------------------ */ |
| 8973 | .balign 128 |
| 8974 | .L_ALT_op_int_to_float: /* 0x82 */ |
| 8975 | /* File: x86_64/alt_stub.S */ |
| 8976 | /* |
| 8977 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 8978 | * any interesting requests and then jump to the real instruction |
| 8979 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 8980 | * because rIBASE is caller save and we need to reload it. |
| 8981 | * |
| 8982 | * Note that unlike in the Arm implementation, we should never arrive |
| 8983 | * here with a zero breakFlag because we always refresh rIBASE on |
| 8984 | * return. |
| 8985 | */ |
| 8986 | .extern MterpCheckBefore |
| 8987 | EXPORT_PC |
| 8988 | REFRESH_IBASE |
| 8989 | movq rSELF, OUT_ARG0 |
| 8990 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 8991 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 8992 | jmp .L_op_nop+(130*128) |
| 8993 | |
| 8994 | /* ------------------------------ */ |
| 8995 | .balign 128 |
| 8996 | .L_ALT_op_int_to_double: /* 0x83 */ |
| 8997 | /* File: x86_64/alt_stub.S */ |
| 8998 | /* |
| 8999 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9000 | * any interesting requests and then jump to the real instruction |
| 9001 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9002 | * because rIBASE is caller save and we need to reload it. |
| 9003 | * |
| 9004 | * Note that unlike in the Arm implementation, we should never arrive |
| 9005 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9006 | * return. |
| 9007 | */ |
| 9008 | .extern MterpCheckBefore |
| 9009 | EXPORT_PC |
| 9010 | REFRESH_IBASE |
| 9011 | movq rSELF, OUT_ARG0 |
| 9012 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9013 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9014 | jmp .L_op_nop+(131*128) |
| 9015 | |
| 9016 | /* ------------------------------ */ |
| 9017 | .balign 128 |
| 9018 | .L_ALT_op_long_to_int: /* 0x84 */ |
| 9019 | /* File: x86_64/alt_stub.S */ |
| 9020 | /* |
| 9021 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9022 | * any interesting requests and then jump to the real instruction |
| 9023 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9024 | * because rIBASE is caller save and we need to reload it. |
| 9025 | * |
| 9026 | * Note that unlike in the Arm implementation, we should never arrive |
| 9027 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9028 | * return. |
| 9029 | */ |
| 9030 | .extern MterpCheckBefore |
| 9031 | EXPORT_PC |
| 9032 | REFRESH_IBASE |
| 9033 | movq rSELF, OUT_ARG0 |
| 9034 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9035 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9036 | jmp .L_op_nop+(132*128) |
| 9037 | |
| 9038 | /* ------------------------------ */ |
| 9039 | .balign 128 |
| 9040 | .L_ALT_op_long_to_float: /* 0x85 */ |
| 9041 | /* File: x86_64/alt_stub.S */ |
| 9042 | /* |
| 9043 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9044 | * any interesting requests and then jump to the real instruction |
| 9045 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9046 | * because rIBASE is caller save and we need to reload it. |
| 9047 | * |
| 9048 | * Note that unlike in the Arm implementation, we should never arrive |
| 9049 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9050 | * return. |
| 9051 | */ |
| 9052 | .extern MterpCheckBefore |
| 9053 | EXPORT_PC |
| 9054 | REFRESH_IBASE |
| 9055 | movq rSELF, OUT_ARG0 |
| 9056 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9057 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9058 | jmp .L_op_nop+(133*128) |
| 9059 | |
| 9060 | /* ------------------------------ */ |
| 9061 | .balign 128 |
| 9062 | .L_ALT_op_long_to_double: /* 0x86 */ |
| 9063 | /* File: x86_64/alt_stub.S */ |
| 9064 | /* |
| 9065 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9066 | * any interesting requests and then jump to the real instruction |
| 9067 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9068 | * because rIBASE is caller save and we need to reload it. |
| 9069 | * |
| 9070 | * Note that unlike in the Arm implementation, we should never arrive |
| 9071 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9072 | * return. |
| 9073 | */ |
| 9074 | .extern MterpCheckBefore |
| 9075 | EXPORT_PC |
| 9076 | REFRESH_IBASE |
| 9077 | movq rSELF, OUT_ARG0 |
| 9078 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9079 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9080 | jmp .L_op_nop+(134*128) |
| 9081 | |
| 9082 | /* ------------------------------ */ |
| 9083 | .balign 128 |
| 9084 | .L_ALT_op_float_to_int: /* 0x87 */ |
| 9085 | /* File: x86_64/alt_stub.S */ |
| 9086 | /* |
| 9087 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9088 | * any interesting requests and then jump to the real instruction |
| 9089 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9090 | * because rIBASE is caller save and we need to reload it. |
| 9091 | * |
| 9092 | * Note that unlike in the Arm implementation, we should never arrive |
| 9093 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9094 | * return. |
| 9095 | */ |
| 9096 | .extern MterpCheckBefore |
| 9097 | EXPORT_PC |
| 9098 | REFRESH_IBASE |
| 9099 | movq rSELF, OUT_ARG0 |
| 9100 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9101 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9102 | jmp .L_op_nop+(135*128) |
| 9103 | |
| 9104 | /* ------------------------------ */ |
| 9105 | .balign 128 |
| 9106 | .L_ALT_op_float_to_long: /* 0x88 */ |
| 9107 | /* File: x86_64/alt_stub.S */ |
| 9108 | /* |
| 9109 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9110 | * any interesting requests and then jump to the real instruction |
| 9111 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9112 | * because rIBASE is caller save and we need to reload it. |
| 9113 | * |
| 9114 | * Note that unlike in the Arm implementation, we should never arrive |
| 9115 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9116 | * return. |
| 9117 | */ |
| 9118 | .extern MterpCheckBefore |
| 9119 | EXPORT_PC |
| 9120 | REFRESH_IBASE |
| 9121 | movq rSELF, OUT_ARG0 |
| 9122 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9123 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9124 | jmp .L_op_nop+(136*128) |
| 9125 | |
| 9126 | /* ------------------------------ */ |
| 9127 | .balign 128 |
| 9128 | .L_ALT_op_float_to_double: /* 0x89 */ |
| 9129 | /* File: x86_64/alt_stub.S */ |
| 9130 | /* |
| 9131 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9132 | * any interesting requests and then jump to the real instruction |
| 9133 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9134 | * because rIBASE is caller save and we need to reload it. |
| 9135 | * |
| 9136 | * Note that unlike in the Arm implementation, we should never arrive |
| 9137 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9138 | * return. |
| 9139 | */ |
| 9140 | .extern MterpCheckBefore |
| 9141 | EXPORT_PC |
| 9142 | REFRESH_IBASE |
| 9143 | movq rSELF, OUT_ARG0 |
| 9144 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9145 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9146 | jmp .L_op_nop+(137*128) |
| 9147 | |
| 9148 | /* ------------------------------ */ |
| 9149 | .balign 128 |
| 9150 | .L_ALT_op_double_to_int: /* 0x8a */ |
| 9151 | /* File: x86_64/alt_stub.S */ |
| 9152 | /* |
| 9153 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9154 | * any interesting requests and then jump to the real instruction |
| 9155 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9156 | * because rIBASE is caller save and we need to reload it. |
| 9157 | * |
| 9158 | * Note that unlike in the Arm implementation, we should never arrive |
| 9159 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9160 | * return. |
| 9161 | */ |
| 9162 | .extern MterpCheckBefore |
| 9163 | EXPORT_PC |
| 9164 | REFRESH_IBASE |
| 9165 | movq rSELF, OUT_ARG0 |
| 9166 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9167 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9168 | jmp .L_op_nop+(138*128) |
| 9169 | |
| 9170 | /* ------------------------------ */ |
| 9171 | .balign 128 |
| 9172 | .L_ALT_op_double_to_long: /* 0x8b */ |
| 9173 | /* File: x86_64/alt_stub.S */ |
| 9174 | /* |
| 9175 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9176 | * any interesting requests and then jump to the real instruction |
| 9177 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9178 | * because rIBASE is caller save and we need to reload it. |
| 9179 | * |
| 9180 | * Note that unlike in the Arm implementation, we should never arrive |
| 9181 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9182 | * return. |
| 9183 | */ |
| 9184 | .extern MterpCheckBefore |
| 9185 | EXPORT_PC |
| 9186 | REFRESH_IBASE |
| 9187 | movq rSELF, OUT_ARG0 |
| 9188 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9189 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9190 | jmp .L_op_nop+(139*128) |
| 9191 | |
| 9192 | /* ------------------------------ */ |
| 9193 | .balign 128 |
| 9194 | .L_ALT_op_double_to_float: /* 0x8c */ |
| 9195 | /* File: x86_64/alt_stub.S */ |
| 9196 | /* |
| 9197 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9198 | * any interesting requests and then jump to the real instruction |
| 9199 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9200 | * because rIBASE is caller save and we need to reload it. |
| 9201 | * |
| 9202 | * Note that unlike in the Arm implementation, we should never arrive |
| 9203 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9204 | * return. |
| 9205 | */ |
| 9206 | .extern MterpCheckBefore |
| 9207 | EXPORT_PC |
| 9208 | REFRESH_IBASE |
| 9209 | movq rSELF, OUT_ARG0 |
| 9210 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9211 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9212 | jmp .L_op_nop+(140*128) |
| 9213 | |
| 9214 | /* ------------------------------ */ |
| 9215 | .balign 128 |
| 9216 | .L_ALT_op_int_to_byte: /* 0x8d */ |
| 9217 | /* File: x86_64/alt_stub.S */ |
| 9218 | /* |
| 9219 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9220 | * any interesting requests and then jump to the real instruction |
| 9221 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9222 | * because rIBASE is caller save and we need to reload it. |
| 9223 | * |
| 9224 | * Note that unlike in the Arm implementation, we should never arrive |
| 9225 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9226 | * return. |
| 9227 | */ |
| 9228 | .extern MterpCheckBefore |
| 9229 | EXPORT_PC |
| 9230 | REFRESH_IBASE |
| 9231 | movq rSELF, OUT_ARG0 |
| 9232 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9233 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9234 | jmp .L_op_nop+(141*128) |
| 9235 | |
| 9236 | /* ------------------------------ */ |
| 9237 | .balign 128 |
| 9238 | .L_ALT_op_int_to_char: /* 0x8e */ |
| 9239 | /* File: x86_64/alt_stub.S */ |
| 9240 | /* |
| 9241 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9242 | * any interesting requests and then jump to the real instruction |
| 9243 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9244 | * because rIBASE is caller save and we need to reload it. |
| 9245 | * |
| 9246 | * Note that unlike in the Arm implementation, we should never arrive |
| 9247 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9248 | * return. |
| 9249 | */ |
| 9250 | .extern MterpCheckBefore |
| 9251 | EXPORT_PC |
| 9252 | REFRESH_IBASE |
| 9253 | movq rSELF, OUT_ARG0 |
| 9254 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9255 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9256 | jmp .L_op_nop+(142*128) |
| 9257 | |
| 9258 | /* ------------------------------ */ |
| 9259 | .balign 128 |
| 9260 | .L_ALT_op_int_to_short: /* 0x8f */ |
| 9261 | /* File: x86_64/alt_stub.S */ |
| 9262 | /* |
| 9263 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9264 | * any interesting requests and then jump to the real instruction |
| 9265 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9266 | * because rIBASE is caller save and we need to reload it. |
| 9267 | * |
| 9268 | * Note that unlike in the Arm implementation, we should never arrive |
| 9269 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9270 | * return. |
| 9271 | */ |
| 9272 | .extern MterpCheckBefore |
| 9273 | EXPORT_PC |
| 9274 | REFRESH_IBASE |
| 9275 | movq rSELF, OUT_ARG0 |
| 9276 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9277 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9278 | jmp .L_op_nop+(143*128) |
| 9279 | |
| 9280 | /* ------------------------------ */ |
| 9281 | .balign 128 |
| 9282 | .L_ALT_op_add_int: /* 0x90 */ |
| 9283 | /* File: x86_64/alt_stub.S */ |
| 9284 | /* |
| 9285 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9286 | * any interesting requests and then jump to the real instruction |
| 9287 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9288 | * because rIBASE is caller save and we need to reload it. |
| 9289 | * |
| 9290 | * Note that unlike in the Arm implementation, we should never arrive |
| 9291 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9292 | * return. |
| 9293 | */ |
| 9294 | .extern MterpCheckBefore |
| 9295 | EXPORT_PC |
| 9296 | REFRESH_IBASE |
| 9297 | movq rSELF, OUT_ARG0 |
| 9298 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9299 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9300 | jmp .L_op_nop+(144*128) |
| 9301 | |
| 9302 | /* ------------------------------ */ |
| 9303 | .balign 128 |
| 9304 | .L_ALT_op_sub_int: /* 0x91 */ |
| 9305 | /* File: x86_64/alt_stub.S */ |
| 9306 | /* |
| 9307 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9308 | * any interesting requests and then jump to the real instruction |
| 9309 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9310 | * because rIBASE is caller save and we need to reload it. |
| 9311 | * |
| 9312 | * Note that unlike in the Arm implementation, we should never arrive |
| 9313 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9314 | * return. |
| 9315 | */ |
| 9316 | .extern MterpCheckBefore |
| 9317 | EXPORT_PC |
| 9318 | REFRESH_IBASE |
| 9319 | movq rSELF, OUT_ARG0 |
| 9320 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9321 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9322 | jmp .L_op_nop+(145*128) |
| 9323 | |
| 9324 | /* ------------------------------ */ |
| 9325 | .balign 128 |
| 9326 | .L_ALT_op_mul_int: /* 0x92 */ |
| 9327 | /* File: x86_64/alt_stub.S */ |
| 9328 | /* |
| 9329 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9330 | * any interesting requests and then jump to the real instruction |
| 9331 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9332 | * because rIBASE is caller save and we need to reload it. |
| 9333 | * |
| 9334 | * Note that unlike in the Arm implementation, we should never arrive |
| 9335 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9336 | * return. |
| 9337 | */ |
| 9338 | .extern MterpCheckBefore |
| 9339 | EXPORT_PC |
| 9340 | REFRESH_IBASE |
| 9341 | movq rSELF, OUT_ARG0 |
| 9342 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9343 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9344 | jmp .L_op_nop+(146*128) |
| 9345 | |
| 9346 | /* ------------------------------ */ |
| 9347 | .balign 128 |
| 9348 | .L_ALT_op_div_int: /* 0x93 */ |
| 9349 | /* File: x86_64/alt_stub.S */ |
| 9350 | /* |
| 9351 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9352 | * any interesting requests and then jump to the real instruction |
| 9353 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9354 | * because rIBASE is caller save and we need to reload it. |
| 9355 | * |
| 9356 | * Note that unlike in the Arm implementation, we should never arrive |
| 9357 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9358 | * return. |
| 9359 | */ |
| 9360 | .extern MterpCheckBefore |
| 9361 | EXPORT_PC |
| 9362 | REFRESH_IBASE |
| 9363 | movq rSELF, OUT_ARG0 |
| 9364 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9365 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9366 | jmp .L_op_nop+(147*128) |
| 9367 | |
| 9368 | /* ------------------------------ */ |
| 9369 | .balign 128 |
| 9370 | .L_ALT_op_rem_int: /* 0x94 */ |
| 9371 | /* File: x86_64/alt_stub.S */ |
| 9372 | /* |
| 9373 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9374 | * any interesting requests and then jump to the real instruction |
| 9375 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9376 | * because rIBASE is caller save and we need to reload it. |
| 9377 | * |
| 9378 | * Note that unlike in the Arm implementation, we should never arrive |
| 9379 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9380 | * return. |
| 9381 | */ |
| 9382 | .extern MterpCheckBefore |
| 9383 | EXPORT_PC |
| 9384 | REFRESH_IBASE |
| 9385 | movq rSELF, OUT_ARG0 |
| 9386 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9387 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9388 | jmp .L_op_nop+(148*128) |
| 9389 | |
| 9390 | /* ------------------------------ */ |
| 9391 | .balign 128 |
| 9392 | .L_ALT_op_and_int: /* 0x95 */ |
| 9393 | /* File: x86_64/alt_stub.S */ |
| 9394 | /* |
| 9395 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9396 | * any interesting requests and then jump to the real instruction |
| 9397 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9398 | * because rIBASE is caller save and we need to reload it. |
| 9399 | * |
| 9400 | * Note that unlike in the Arm implementation, we should never arrive |
| 9401 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9402 | * return. |
| 9403 | */ |
| 9404 | .extern MterpCheckBefore |
| 9405 | EXPORT_PC |
| 9406 | REFRESH_IBASE |
| 9407 | movq rSELF, OUT_ARG0 |
| 9408 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9409 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9410 | jmp .L_op_nop+(149*128) |
| 9411 | |
| 9412 | /* ------------------------------ */ |
| 9413 | .balign 128 |
| 9414 | .L_ALT_op_or_int: /* 0x96 */ |
| 9415 | /* File: x86_64/alt_stub.S */ |
| 9416 | /* |
| 9417 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9418 | * any interesting requests and then jump to the real instruction |
| 9419 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9420 | * because rIBASE is caller save and we need to reload it. |
| 9421 | * |
| 9422 | * Note that unlike in the Arm implementation, we should never arrive |
| 9423 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9424 | * return. |
| 9425 | */ |
| 9426 | .extern MterpCheckBefore |
| 9427 | EXPORT_PC |
| 9428 | REFRESH_IBASE |
| 9429 | movq rSELF, OUT_ARG0 |
| 9430 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9431 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9432 | jmp .L_op_nop+(150*128) |
| 9433 | |
| 9434 | /* ------------------------------ */ |
| 9435 | .balign 128 |
| 9436 | .L_ALT_op_xor_int: /* 0x97 */ |
| 9437 | /* File: x86_64/alt_stub.S */ |
| 9438 | /* |
| 9439 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9440 | * any interesting requests and then jump to the real instruction |
| 9441 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9442 | * because rIBASE is caller save and we need to reload it. |
| 9443 | * |
| 9444 | * Note that unlike in the Arm implementation, we should never arrive |
| 9445 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9446 | * return. |
| 9447 | */ |
| 9448 | .extern MterpCheckBefore |
| 9449 | EXPORT_PC |
| 9450 | REFRESH_IBASE |
| 9451 | movq rSELF, OUT_ARG0 |
| 9452 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9453 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9454 | jmp .L_op_nop+(151*128) |
| 9455 | |
| 9456 | /* ------------------------------ */ |
| 9457 | .balign 128 |
| 9458 | .L_ALT_op_shl_int: /* 0x98 */ |
| 9459 | /* File: x86_64/alt_stub.S */ |
| 9460 | /* |
| 9461 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9462 | * any interesting requests and then jump to the real instruction |
| 9463 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9464 | * because rIBASE is caller save and we need to reload it. |
| 9465 | * |
| 9466 | * Note that unlike in the Arm implementation, we should never arrive |
| 9467 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9468 | * return. |
| 9469 | */ |
| 9470 | .extern MterpCheckBefore |
| 9471 | EXPORT_PC |
| 9472 | REFRESH_IBASE |
| 9473 | movq rSELF, OUT_ARG0 |
| 9474 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9475 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9476 | jmp .L_op_nop+(152*128) |
| 9477 | |
| 9478 | /* ------------------------------ */ |
| 9479 | .balign 128 |
| 9480 | .L_ALT_op_shr_int: /* 0x99 */ |
| 9481 | /* File: x86_64/alt_stub.S */ |
| 9482 | /* |
| 9483 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9484 | * any interesting requests and then jump to the real instruction |
| 9485 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9486 | * because rIBASE is caller save and we need to reload it. |
| 9487 | * |
| 9488 | * Note that unlike in the Arm implementation, we should never arrive |
| 9489 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9490 | * return. |
| 9491 | */ |
| 9492 | .extern MterpCheckBefore |
| 9493 | EXPORT_PC |
| 9494 | REFRESH_IBASE |
| 9495 | movq rSELF, OUT_ARG0 |
| 9496 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9497 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9498 | jmp .L_op_nop+(153*128) |
| 9499 | |
| 9500 | /* ------------------------------ */ |
| 9501 | .balign 128 |
| 9502 | .L_ALT_op_ushr_int: /* 0x9a */ |
| 9503 | /* File: x86_64/alt_stub.S */ |
| 9504 | /* |
| 9505 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9506 | * any interesting requests and then jump to the real instruction |
| 9507 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9508 | * because rIBASE is caller save and we need to reload it. |
| 9509 | * |
| 9510 | * Note that unlike in the Arm implementation, we should never arrive |
| 9511 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9512 | * return. |
| 9513 | */ |
| 9514 | .extern MterpCheckBefore |
| 9515 | EXPORT_PC |
| 9516 | REFRESH_IBASE |
| 9517 | movq rSELF, OUT_ARG0 |
| 9518 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9519 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9520 | jmp .L_op_nop+(154*128) |
| 9521 | |
| 9522 | /* ------------------------------ */ |
| 9523 | .balign 128 |
| 9524 | .L_ALT_op_add_long: /* 0x9b */ |
| 9525 | /* File: x86_64/alt_stub.S */ |
| 9526 | /* |
| 9527 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9528 | * any interesting requests and then jump to the real instruction |
| 9529 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9530 | * because rIBASE is caller save and we need to reload it. |
| 9531 | * |
| 9532 | * Note that unlike in the Arm implementation, we should never arrive |
| 9533 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9534 | * return. |
| 9535 | */ |
| 9536 | .extern MterpCheckBefore |
| 9537 | EXPORT_PC |
| 9538 | REFRESH_IBASE |
| 9539 | movq rSELF, OUT_ARG0 |
| 9540 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9541 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9542 | jmp .L_op_nop+(155*128) |
| 9543 | |
| 9544 | /* ------------------------------ */ |
| 9545 | .balign 128 |
| 9546 | .L_ALT_op_sub_long: /* 0x9c */ |
| 9547 | /* File: x86_64/alt_stub.S */ |
| 9548 | /* |
| 9549 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9550 | * any interesting requests and then jump to the real instruction |
| 9551 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9552 | * because rIBASE is caller save and we need to reload it. |
| 9553 | * |
| 9554 | * Note that unlike in the Arm implementation, we should never arrive |
| 9555 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9556 | * return. |
| 9557 | */ |
| 9558 | .extern MterpCheckBefore |
| 9559 | EXPORT_PC |
| 9560 | REFRESH_IBASE |
| 9561 | movq rSELF, OUT_ARG0 |
| 9562 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9563 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9564 | jmp .L_op_nop+(156*128) |
| 9565 | |
| 9566 | /* ------------------------------ */ |
| 9567 | .balign 128 |
| 9568 | .L_ALT_op_mul_long: /* 0x9d */ |
| 9569 | /* File: x86_64/alt_stub.S */ |
| 9570 | /* |
| 9571 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9572 | * any interesting requests and then jump to the real instruction |
| 9573 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9574 | * because rIBASE is caller save and we need to reload it. |
| 9575 | * |
| 9576 | * Note that unlike in the Arm implementation, we should never arrive |
| 9577 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9578 | * return. |
| 9579 | */ |
| 9580 | .extern MterpCheckBefore |
| 9581 | EXPORT_PC |
| 9582 | REFRESH_IBASE |
| 9583 | movq rSELF, OUT_ARG0 |
| 9584 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9585 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9586 | jmp .L_op_nop+(157*128) |
| 9587 | |
| 9588 | /* ------------------------------ */ |
| 9589 | .balign 128 |
| 9590 | .L_ALT_op_div_long: /* 0x9e */ |
| 9591 | /* File: x86_64/alt_stub.S */ |
| 9592 | /* |
| 9593 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9594 | * any interesting requests and then jump to the real instruction |
| 9595 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9596 | * because rIBASE is caller save and we need to reload it. |
| 9597 | * |
| 9598 | * Note that unlike in the Arm implementation, we should never arrive |
| 9599 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9600 | * return. |
| 9601 | */ |
| 9602 | .extern MterpCheckBefore |
| 9603 | EXPORT_PC |
| 9604 | REFRESH_IBASE |
| 9605 | movq rSELF, OUT_ARG0 |
| 9606 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9607 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9608 | jmp .L_op_nop+(158*128) |
| 9609 | |
| 9610 | /* ------------------------------ */ |
| 9611 | .balign 128 |
| 9612 | .L_ALT_op_rem_long: /* 0x9f */ |
| 9613 | /* File: x86_64/alt_stub.S */ |
| 9614 | /* |
| 9615 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9616 | * any interesting requests and then jump to the real instruction |
| 9617 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9618 | * because rIBASE is caller save and we need to reload it. |
| 9619 | * |
| 9620 | * Note that unlike in the Arm implementation, we should never arrive |
| 9621 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9622 | * return. |
| 9623 | */ |
| 9624 | .extern MterpCheckBefore |
| 9625 | EXPORT_PC |
| 9626 | REFRESH_IBASE |
| 9627 | movq rSELF, OUT_ARG0 |
| 9628 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9629 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9630 | jmp .L_op_nop+(159*128) |
| 9631 | |
| 9632 | /* ------------------------------ */ |
| 9633 | .balign 128 |
| 9634 | .L_ALT_op_and_long: /* 0xa0 */ |
| 9635 | /* File: x86_64/alt_stub.S */ |
| 9636 | /* |
| 9637 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9638 | * any interesting requests and then jump to the real instruction |
| 9639 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9640 | * because rIBASE is caller save and we need to reload it. |
| 9641 | * |
| 9642 | * Note that unlike in the Arm implementation, we should never arrive |
| 9643 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9644 | * return. |
| 9645 | */ |
| 9646 | .extern MterpCheckBefore |
| 9647 | EXPORT_PC |
| 9648 | REFRESH_IBASE |
| 9649 | movq rSELF, OUT_ARG0 |
| 9650 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9651 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9652 | jmp .L_op_nop+(160*128) |
| 9653 | |
| 9654 | /* ------------------------------ */ |
| 9655 | .balign 128 |
| 9656 | .L_ALT_op_or_long: /* 0xa1 */ |
| 9657 | /* File: x86_64/alt_stub.S */ |
| 9658 | /* |
| 9659 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9660 | * any interesting requests and then jump to the real instruction |
| 9661 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9662 | * because rIBASE is caller save and we need to reload it. |
| 9663 | * |
| 9664 | * Note that unlike in the Arm implementation, we should never arrive |
| 9665 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9666 | * return. |
| 9667 | */ |
| 9668 | .extern MterpCheckBefore |
| 9669 | EXPORT_PC |
| 9670 | REFRESH_IBASE |
| 9671 | movq rSELF, OUT_ARG0 |
| 9672 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9673 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9674 | jmp .L_op_nop+(161*128) |
| 9675 | |
| 9676 | /* ------------------------------ */ |
| 9677 | .balign 128 |
| 9678 | .L_ALT_op_xor_long: /* 0xa2 */ |
| 9679 | /* File: x86_64/alt_stub.S */ |
| 9680 | /* |
| 9681 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9682 | * any interesting requests and then jump to the real instruction |
| 9683 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9684 | * because rIBASE is caller save and we need to reload it. |
| 9685 | * |
| 9686 | * Note that unlike in the Arm implementation, we should never arrive |
| 9687 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9688 | * return. |
| 9689 | */ |
| 9690 | .extern MterpCheckBefore |
| 9691 | EXPORT_PC |
| 9692 | REFRESH_IBASE |
| 9693 | movq rSELF, OUT_ARG0 |
| 9694 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9695 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9696 | jmp .L_op_nop+(162*128) |
| 9697 | |
| 9698 | /* ------------------------------ */ |
| 9699 | .balign 128 |
| 9700 | .L_ALT_op_shl_long: /* 0xa3 */ |
| 9701 | /* File: x86_64/alt_stub.S */ |
| 9702 | /* |
| 9703 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9704 | * any interesting requests and then jump to the real instruction |
| 9705 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9706 | * because rIBASE is caller save and we need to reload it. |
| 9707 | * |
| 9708 | * Note that unlike in the Arm implementation, we should never arrive |
| 9709 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9710 | * return. |
| 9711 | */ |
| 9712 | .extern MterpCheckBefore |
| 9713 | EXPORT_PC |
| 9714 | REFRESH_IBASE |
| 9715 | movq rSELF, OUT_ARG0 |
| 9716 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9717 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9718 | jmp .L_op_nop+(163*128) |
| 9719 | |
| 9720 | /* ------------------------------ */ |
| 9721 | .balign 128 |
| 9722 | .L_ALT_op_shr_long: /* 0xa4 */ |
| 9723 | /* File: x86_64/alt_stub.S */ |
| 9724 | /* |
| 9725 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9726 | * any interesting requests and then jump to the real instruction |
| 9727 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9728 | * because rIBASE is caller save and we need to reload it. |
| 9729 | * |
| 9730 | * Note that unlike in the Arm implementation, we should never arrive |
| 9731 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9732 | * return. |
| 9733 | */ |
| 9734 | .extern MterpCheckBefore |
| 9735 | EXPORT_PC |
| 9736 | REFRESH_IBASE |
| 9737 | movq rSELF, OUT_ARG0 |
| 9738 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9739 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9740 | jmp .L_op_nop+(164*128) |
| 9741 | |
| 9742 | /* ------------------------------ */ |
| 9743 | .balign 128 |
| 9744 | .L_ALT_op_ushr_long: /* 0xa5 */ |
| 9745 | /* File: x86_64/alt_stub.S */ |
| 9746 | /* |
| 9747 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9748 | * any interesting requests and then jump to the real instruction |
| 9749 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9750 | * because rIBASE is caller save and we need to reload it. |
| 9751 | * |
| 9752 | * Note that unlike in the Arm implementation, we should never arrive |
| 9753 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9754 | * return. |
| 9755 | */ |
| 9756 | .extern MterpCheckBefore |
| 9757 | EXPORT_PC |
| 9758 | REFRESH_IBASE |
| 9759 | movq rSELF, OUT_ARG0 |
| 9760 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9761 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9762 | jmp .L_op_nop+(165*128) |
| 9763 | |
| 9764 | /* ------------------------------ */ |
| 9765 | .balign 128 |
| 9766 | .L_ALT_op_add_float: /* 0xa6 */ |
| 9767 | /* File: x86_64/alt_stub.S */ |
| 9768 | /* |
| 9769 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9770 | * any interesting requests and then jump to the real instruction |
| 9771 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9772 | * because rIBASE is caller save and we need to reload it. |
| 9773 | * |
| 9774 | * Note that unlike in the Arm implementation, we should never arrive |
| 9775 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9776 | * return. |
| 9777 | */ |
| 9778 | .extern MterpCheckBefore |
| 9779 | EXPORT_PC |
| 9780 | REFRESH_IBASE |
| 9781 | movq rSELF, OUT_ARG0 |
| 9782 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9783 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9784 | jmp .L_op_nop+(166*128) |
| 9785 | |
| 9786 | /* ------------------------------ */ |
| 9787 | .balign 128 |
| 9788 | .L_ALT_op_sub_float: /* 0xa7 */ |
| 9789 | /* File: x86_64/alt_stub.S */ |
| 9790 | /* |
| 9791 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9792 | * any interesting requests and then jump to the real instruction |
| 9793 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9794 | * because rIBASE is caller save and we need to reload it. |
| 9795 | * |
| 9796 | * Note that unlike in the Arm implementation, we should never arrive |
| 9797 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9798 | * return. |
| 9799 | */ |
| 9800 | .extern MterpCheckBefore |
| 9801 | EXPORT_PC |
| 9802 | REFRESH_IBASE |
| 9803 | movq rSELF, OUT_ARG0 |
| 9804 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9805 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9806 | jmp .L_op_nop+(167*128) |
| 9807 | |
| 9808 | /* ------------------------------ */ |
| 9809 | .balign 128 |
| 9810 | .L_ALT_op_mul_float: /* 0xa8 */ |
| 9811 | /* File: x86_64/alt_stub.S */ |
| 9812 | /* |
| 9813 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9814 | * any interesting requests and then jump to the real instruction |
| 9815 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9816 | * because rIBASE is caller save and we need to reload it. |
| 9817 | * |
| 9818 | * Note that unlike in the Arm implementation, we should never arrive |
| 9819 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9820 | * return. |
| 9821 | */ |
| 9822 | .extern MterpCheckBefore |
| 9823 | EXPORT_PC |
| 9824 | REFRESH_IBASE |
| 9825 | movq rSELF, OUT_ARG0 |
| 9826 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9827 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9828 | jmp .L_op_nop+(168*128) |
| 9829 | |
| 9830 | /* ------------------------------ */ |
| 9831 | .balign 128 |
| 9832 | .L_ALT_op_div_float: /* 0xa9 */ |
| 9833 | /* File: x86_64/alt_stub.S */ |
| 9834 | /* |
| 9835 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9836 | * any interesting requests and then jump to the real instruction |
| 9837 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9838 | * because rIBASE is caller save and we need to reload it. |
| 9839 | * |
| 9840 | * Note that unlike in the Arm implementation, we should never arrive |
| 9841 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9842 | * return. |
| 9843 | */ |
| 9844 | .extern MterpCheckBefore |
| 9845 | EXPORT_PC |
| 9846 | REFRESH_IBASE |
| 9847 | movq rSELF, OUT_ARG0 |
| 9848 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9849 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9850 | jmp .L_op_nop+(169*128) |
| 9851 | |
| 9852 | /* ------------------------------ */ |
| 9853 | .balign 128 |
| 9854 | .L_ALT_op_rem_float: /* 0xaa */ |
| 9855 | /* File: x86_64/alt_stub.S */ |
| 9856 | /* |
| 9857 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9858 | * any interesting requests and then jump to the real instruction |
| 9859 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9860 | * because rIBASE is caller save and we need to reload it. |
| 9861 | * |
| 9862 | * Note that unlike in the Arm implementation, we should never arrive |
| 9863 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9864 | * return. |
| 9865 | */ |
| 9866 | .extern MterpCheckBefore |
| 9867 | EXPORT_PC |
| 9868 | REFRESH_IBASE |
| 9869 | movq rSELF, OUT_ARG0 |
| 9870 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9871 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9872 | jmp .L_op_nop+(170*128) |
| 9873 | |
| 9874 | /* ------------------------------ */ |
| 9875 | .balign 128 |
| 9876 | .L_ALT_op_add_double: /* 0xab */ |
| 9877 | /* File: x86_64/alt_stub.S */ |
| 9878 | /* |
| 9879 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9880 | * any interesting requests and then jump to the real instruction |
| 9881 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9882 | * because rIBASE is caller save and we need to reload it. |
| 9883 | * |
| 9884 | * Note that unlike in the Arm implementation, we should never arrive |
| 9885 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9886 | * return. |
| 9887 | */ |
| 9888 | .extern MterpCheckBefore |
| 9889 | EXPORT_PC |
| 9890 | REFRESH_IBASE |
| 9891 | movq rSELF, OUT_ARG0 |
| 9892 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9893 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9894 | jmp .L_op_nop+(171*128) |
| 9895 | |
| 9896 | /* ------------------------------ */ |
| 9897 | .balign 128 |
| 9898 | .L_ALT_op_sub_double: /* 0xac */ |
| 9899 | /* File: x86_64/alt_stub.S */ |
| 9900 | /* |
| 9901 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9902 | * any interesting requests and then jump to the real instruction |
| 9903 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9904 | * because rIBASE is caller save and we need to reload it. |
| 9905 | * |
| 9906 | * Note that unlike in the Arm implementation, we should never arrive |
| 9907 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9908 | * return. |
| 9909 | */ |
| 9910 | .extern MterpCheckBefore |
| 9911 | EXPORT_PC |
| 9912 | REFRESH_IBASE |
| 9913 | movq rSELF, OUT_ARG0 |
| 9914 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9915 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9916 | jmp .L_op_nop+(172*128) |
| 9917 | |
| 9918 | /* ------------------------------ */ |
| 9919 | .balign 128 |
| 9920 | .L_ALT_op_mul_double: /* 0xad */ |
| 9921 | /* File: x86_64/alt_stub.S */ |
| 9922 | /* |
| 9923 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9924 | * any interesting requests and then jump to the real instruction |
| 9925 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9926 | * because rIBASE is caller save and we need to reload it. |
| 9927 | * |
| 9928 | * Note that unlike in the Arm implementation, we should never arrive |
| 9929 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9930 | * return. |
| 9931 | */ |
| 9932 | .extern MterpCheckBefore |
| 9933 | EXPORT_PC |
| 9934 | REFRESH_IBASE |
| 9935 | movq rSELF, OUT_ARG0 |
| 9936 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9937 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9938 | jmp .L_op_nop+(173*128) |
| 9939 | |
| 9940 | /* ------------------------------ */ |
| 9941 | .balign 128 |
| 9942 | .L_ALT_op_div_double: /* 0xae */ |
| 9943 | /* File: x86_64/alt_stub.S */ |
| 9944 | /* |
| 9945 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9946 | * any interesting requests and then jump to the real instruction |
| 9947 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9948 | * because rIBASE is caller save and we need to reload it. |
| 9949 | * |
| 9950 | * Note that unlike in the Arm implementation, we should never arrive |
| 9951 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9952 | * return. |
| 9953 | */ |
| 9954 | .extern MterpCheckBefore |
| 9955 | EXPORT_PC |
| 9956 | REFRESH_IBASE |
| 9957 | movq rSELF, OUT_ARG0 |
| 9958 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9959 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9960 | jmp .L_op_nop+(174*128) |
| 9961 | |
| 9962 | /* ------------------------------ */ |
| 9963 | .balign 128 |
| 9964 | .L_ALT_op_rem_double: /* 0xaf */ |
| 9965 | /* File: x86_64/alt_stub.S */ |
| 9966 | /* |
| 9967 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9968 | * any interesting requests and then jump to the real instruction |
| 9969 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9970 | * because rIBASE is caller save and we need to reload it. |
| 9971 | * |
| 9972 | * Note that unlike in the Arm implementation, we should never arrive |
| 9973 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9974 | * return. |
| 9975 | */ |
| 9976 | .extern MterpCheckBefore |
| 9977 | EXPORT_PC |
| 9978 | REFRESH_IBASE |
| 9979 | movq rSELF, OUT_ARG0 |
| 9980 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 9981 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 9982 | jmp .L_op_nop+(175*128) |
| 9983 | |
| 9984 | /* ------------------------------ */ |
| 9985 | .balign 128 |
| 9986 | .L_ALT_op_add_int_2addr: /* 0xb0 */ |
| 9987 | /* File: x86_64/alt_stub.S */ |
| 9988 | /* |
| 9989 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 9990 | * any interesting requests and then jump to the real instruction |
| 9991 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 9992 | * because rIBASE is caller save and we need to reload it. |
| 9993 | * |
| 9994 | * Note that unlike in the Arm implementation, we should never arrive |
| 9995 | * here with a zero breakFlag because we always refresh rIBASE on |
| 9996 | * return. |
| 9997 | */ |
| 9998 | .extern MterpCheckBefore |
| 9999 | EXPORT_PC |
| 10000 | REFRESH_IBASE |
| 10001 | movq rSELF, OUT_ARG0 |
| 10002 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10003 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10004 | jmp .L_op_nop+(176*128) |
| 10005 | |
| 10006 | /* ------------------------------ */ |
| 10007 | .balign 128 |
| 10008 | .L_ALT_op_sub_int_2addr: /* 0xb1 */ |
| 10009 | /* File: x86_64/alt_stub.S */ |
| 10010 | /* |
| 10011 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10012 | * any interesting requests and then jump to the real instruction |
| 10013 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10014 | * because rIBASE is caller save and we need to reload it. |
| 10015 | * |
| 10016 | * Note that unlike in the Arm implementation, we should never arrive |
| 10017 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10018 | * return. |
| 10019 | */ |
| 10020 | .extern MterpCheckBefore |
| 10021 | EXPORT_PC |
| 10022 | REFRESH_IBASE |
| 10023 | movq rSELF, OUT_ARG0 |
| 10024 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10025 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10026 | jmp .L_op_nop+(177*128) |
| 10027 | |
| 10028 | /* ------------------------------ */ |
| 10029 | .balign 128 |
| 10030 | .L_ALT_op_mul_int_2addr: /* 0xb2 */ |
| 10031 | /* File: x86_64/alt_stub.S */ |
| 10032 | /* |
| 10033 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10034 | * any interesting requests and then jump to the real instruction |
| 10035 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10036 | * because rIBASE is caller save and we need to reload it. |
| 10037 | * |
| 10038 | * Note that unlike in the Arm implementation, we should never arrive |
| 10039 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10040 | * return. |
| 10041 | */ |
| 10042 | .extern MterpCheckBefore |
| 10043 | EXPORT_PC |
| 10044 | REFRESH_IBASE |
| 10045 | movq rSELF, OUT_ARG0 |
| 10046 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10047 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10048 | jmp .L_op_nop+(178*128) |
| 10049 | |
| 10050 | /* ------------------------------ */ |
| 10051 | .balign 128 |
| 10052 | .L_ALT_op_div_int_2addr: /* 0xb3 */ |
| 10053 | /* File: x86_64/alt_stub.S */ |
| 10054 | /* |
| 10055 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10056 | * any interesting requests and then jump to the real instruction |
| 10057 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10058 | * because rIBASE is caller save and we need to reload it. |
| 10059 | * |
| 10060 | * Note that unlike in the Arm implementation, we should never arrive |
| 10061 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10062 | * return. |
| 10063 | */ |
| 10064 | .extern MterpCheckBefore |
| 10065 | EXPORT_PC |
| 10066 | REFRESH_IBASE |
| 10067 | movq rSELF, OUT_ARG0 |
| 10068 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10069 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10070 | jmp .L_op_nop+(179*128) |
| 10071 | |
| 10072 | /* ------------------------------ */ |
| 10073 | .balign 128 |
| 10074 | .L_ALT_op_rem_int_2addr: /* 0xb4 */ |
| 10075 | /* File: x86_64/alt_stub.S */ |
| 10076 | /* |
| 10077 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10078 | * any interesting requests and then jump to the real instruction |
| 10079 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10080 | * because rIBASE is caller save and we need to reload it. |
| 10081 | * |
| 10082 | * Note that unlike in the Arm implementation, we should never arrive |
| 10083 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10084 | * return. |
| 10085 | */ |
| 10086 | .extern MterpCheckBefore |
| 10087 | EXPORT_PC |
| 10088 | REFRESH_IBASE |
| 10089 | movq rSELF, OUT_ARG0 |
| 10090 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10091 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10092 | jmp .L_op_nop+(180*128) |
| 10093 | |
| 10094 | /* ------------------------------ */ |
| 10095 | .balign 128 |
| 10096 | .L_ALT_op_and_int_2addr: /* 0xb5 */ |
| 10097 | /* File: x86_64/alt_stub.S */ |
| 10098 | /* |
| 10099 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10100 | * any interesting requests and then jump to the real instruction |
| 10101 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10102 | * because rIBASE is caller save and we need to reload it. |
| 10103 | * |
| 10104 | * Note that unlike in the Arm implementation, we should never arrive |
| 10105 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10106 | * return. |
| 10107 | */ |
| 10108 | .extern MterpCheckBefore |
| 10109 | EXPORT_PC |
| 10110 | REFRESH_IBASE |
| 10111 | movq rSELF, OUT_ARG0 |
| 10112 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10113 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10114 | jmp .L_op_nop+(181*128) |
| 10115 | |
| 10116 | /* ------------------------------ */ |
| 10117 | .balign 128 |
| 10118 | .L_ALT_op_or_int_2addr: /* 0xb6 */ |
| 10119 | /* File: x86_64/alt_stub.S */ |
| 10120 | /* |
| 10121 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10122 | * any interesting requests and then jump to the real instruction |
| 10123 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10124 | * because rIBASE is caller save and we need to reload it. |
| 10125 | * |
| 10126 | * Note that unlike in the Arm implementation, we should never arrive |
| 10127 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10128 | * return. |
| 10129 | */ |
| 10130 | .extern MterpCheckBefore |
| 10131 | EXPORT_PC |
| 10132 | REFRESH_IBASE |
| 10133 | movq rSELF, OUT_ARG0 |
| 10134 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10135 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10136 | jmp .L_op_nop+(182*128) |
| 10137 | |
| 10138 | /* ------------------------------ */ |
| 10139 | .balign 128 |
| 10140 | .L_ALT_op_xor_int_2addr: /* 0xb7 */ |
| 10141 | /* File: x86_64/alt_stub.S */ |
| 10142 | /* |
| 10143 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10144 | * any interesting requests and then jump to the real instruction |
| 10145 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10146 | * because rIBASE is caller save and we need to reload it. |
| 10147 | * |
| 10148 | * Note that unlike in the Arm implementation, we should never arrive |
| 10149 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10150 | * return. |
| 10151 | */ |
| 10152 | .extern MterpCheckBefore |
| 10153 | EXPORT_PC |
| 10154 | REFRESH_IBASE |
| 10155 | movq rSELF, OUT_ARG0 |
| 10156 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10157 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10158 | jmp .L_op_nop+(183*128) |
| 10159 | |
| 10160 | /* ------------------------------ */ |
| 10161 | .balign 128 |
| 10162 | .L_ALT_op_shl_int_2addr: /* 0xb8 */ |
| 10163 | /* File: x86_64/alt_stub.S */ |
| 10164 | /* |
| 10165 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10166 | * any interesting requests and then jump to the real instruction |
| 10167 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10168 | * because rIBASE is caller save and we need to reload it. |
| 10169 | * |
| 10170 | * Note that unlike in the Arm implementation, we should never arrive |
| 10171 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10172 | * return. |
| 10173 | */ |
| 10174 | .extern MterpCheckBefore |
| 10175 | EXPORT_PC |
| 10176 | REFRESH_IBASE |
| 10177 | movq rSELF, OUT_ARG0 |
| 10178 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10179 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10180 | jmp .L_op_nop+(184*128) |
| 10181 | |
| 10182 | /* ------------------------------ */ |
| 10183 | .balign 128 |
| 10184 | .L_ALT_op_shr_int_2addr: /* 0xb9 */ |
| 10185 | /* File: x86_64/alt_stub.S */ |
| 10186 | /* |
| 10187 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10188 | * any interesting requests and then jump to the real instruction |
| 10189 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10190 | * because rIBASE is caller save and we need to reload it. |
| 10191 | * |
| 10192 | * Note that unlike in the Arm implementation, we should never arrive |
| 10193 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10194 | * return. |
| 10195 | */ |
| 10196 | .extern MterpCheckBefore |
| 10197 | EXPORT_PC |
| 10198 | REFRESH_IBASE |
| 10199 | movq rSELF, OUT_ARG0 |
| 10200 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10201 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10202 | jmp .L_op_nop+(185*128) |
| 10203 | |
| 10204 | /* ------------------------------ */ |
| 10205 | .balign 128 |
| 10206 | .L_ALT_op_ushr_int_2addr: /* 0xba */ |
| 10207 | /* File: x86_64/alt_stub.S */ |
| 10208 | /* |
| 10209 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10210 | * any interesting requests and then jump to the real instruction |
| 10211 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10212 | * because rIBASE is caller save and we need to reload it. |
| 10213 | * |
| 10214 | * Note that unlike in the Arm implementation, we should never arrive |
| 10215 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10216 | * return. |
| 10217 | */ |
| 10218 | .extern MterpCheckBefore |
| 10219 | EXPORT_PC |
| 10220 | REFRESH_IBASE |
| 10221 | movq rSELF, OUT_ARG0 |
| 10222 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10223 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10224 | jmp .L_op_nop+(186*128) |
| 10225 | |
| 10226 | /* ------------------------------ */ |
| 10227 | .balign 128 |
| 10228 | .L_ALT_op_add_long_2addr: /* 0xbb */ |
| 10229 | /* File: x86_64/alt_stub.S */ |
| 10230 | /* |
| 10231 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10232 | * any interesting requests and then jump to the real instruction |
| 10233 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10234 | * because rIBASE is caller save and we need to reload it. |
| 10235 | * |
| 10236 | * Note that unlike in the Arm implementation, we should never arrive |
| 10237 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10238 | * return. |
| 10239 | */ |
| 10240 | .extern MterpCheckBefore |
| 10241 | EXPORT_PC |
| 10242 | REFRESH_IBASE |
| 10243 | movq rSELF, OUT_ARG0 |
| 10244 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10245 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10246 | jmp .L_op_nop+(187*128) |
| 10247 | |
| 10248 | /* ------------------------------ */ |
| 10249 | .balign 128 |
| 10250 | .L_ALT_op_sub_long_2addr: /* 0xbc */ |
| 10251 | /* File: x86_64/alt_stub.S */ |
| 10252 | /* |
| 10253 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10254 | * any interesting requests and then jump to the real instruction |
| 10255 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10256 | * because rIBASE is caller save and we need to reload it. |
| 10257 | * |
| 10258 | * Note that unlike in the Arm implementation, we should never arrive |
| 10259 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10260 | * return. |
| 10261 | */ |
| 10262 | .extern MterpCheckBefore |
| 10263 | EXPORT_PC |
| 10264 | REFRESH_IBASE |
| 10265 | movq rSELF, OUT_ARG0 |
| 10266 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10267 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10268 | jmp .L_op_nop+(188*128) |
| 10269 | |
| 10270 | /* ------------------------------ */ |
| 10271 | .balign 128 |
| 10272 | .L_ALT_op_mul_long_2addr: /* 0xbd */ |
| 10273 | /* File: x86_64/alt_stub.S */ |
| 10274 | /* |
| 10275 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10276 | * any interesting requests and then jump to the real instruction |
| 10277 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10278 | * because rIBASE is caller save and we need to reload it. |
| 10279 | * |
| 10280 | * Note that unlike in the Arm implementation, we should never arrive |
| 10281 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10282 | * return. |
| 10283 | */ |
| 10284 | .extern MterpCheckBefore |
| 10285 | EXPORT_PC |
| 10286 | REFRESH_IBASE |
| 10287 | movq rSELF, OUT_ARG0 |
| 10288 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10289 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10290 | jmp .L_op_nop+(189*128) |
| 10291 | |
| 10292 | /* ------------------------------ */ |
| 10293 | .balign 128 |
| 10294 | .L_ALT_op_div_long_2addr: /* 0xbe */ |
| 10295 | /* File: x86_64/alt_stub.S */ |
| 10296 | /* |
| 10297 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10298 | * any interesting requests and then jump to the real instruction |
| 10299 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10300 | * because rIBASE is caller save and we need to reload it. |
| 10301 | * |
| 10302 | * Note that unlike in the Arm implementation, we should never arrive |
| 10303 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10304 | * return. |
| 10305 | */ |
| 10306 | .extern MterpCheckBefore |
| 10307 | EXPORT_PC |
| 10308 | REFRESH_IBASE |
| 10309 | movq rSELF, OUT_ARG0 |
| 10310 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10311 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10312 | jmp .L_op_nop+(190*128) |
| 10313 | |
| 10314 | /* ------------------------------ */ |
| 10315 | .balign 128 |
| 10316 | .L_ALT_op_rem_long_2addr: /* 0xbf */ |
| 10317 | /* File: x86_64/alt_stub.S */ |
| 10318 | /* |
| 10319 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10320 | * any interesting requests and then jump to the real instruction |
| 10321 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10322 | * because rIBASE is caller save and we need to reload it. |
| 10323 | * |
| 10324 | * Note that unlike in the Arm implementation, we should never arrive |
| 10325 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10326 | * return. |
| 10327 | */ |
| 10328 | .extern MterpCheckBefore |
| 10329 | EXPORT_PC |
| 10330 | REFRESH_IBASE |
| 10331 | movq rSELF, OUT_ARG0 |
| 10332 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10333 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10334 | jmp .L_op_nop+(191*128) |
| 10335 | |
| 10336 | /* ------------------------------ */ |
| 10337 | .balign 128 |
| 10338 | .L_ALT_op_and_long_2addr: /* 0xc0 */ |
| 10339 | /* File: x86_64/alt_stub.S */ |
| 10340 | /* |
| 10341 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10342 | * any interesting requests and then jump to the real instruction |
| 10343 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10344 | * because rIBASE is caller save and we need to reload it. |
| 10345 | * |
| 10346 | * Note that unlike in the Arm implementation, we should never arrive |
| 10347 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10348 | * return. |
| 10349 | */ |
| 10350 | .extern MterpCheckBefore |
| 10351 | EXPORT_PC |
| 10352 | REFRESH_IBASE |
| 10353 | movq rSELF, OUT_ARG0 |
| 10354 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10355 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10356 | jmp .L_op_nop+(192*128) |
| 10357 | |
| 10358 | /* ------------------------------ */ |
| 10359 | .balign 128 |
| 10360 | .L_ALT_op_or_long_2addr: /* 0xc1 */ |
| 10361 | /* File: x86_64/alt_stub.S */ |
| 10362 | /* |
| 10363 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10364 | * any interesting requests and then jump to the real instruction |
| 10365 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10366 | * because rIBASE is caller save and we need to reload it. |
| 10367 | * |
| 10368 | * Note that unlike in the Arm implementation, we should never arrive |
| 10369 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10370 | * return. |
| 10371 | */ |
| 10372 | .extern MterpCheckBefore |
| 10373 | EXPORT_PC |
| 10374 | REFRESH_IBASE |
| 10375 | movq rSELF, OUT_ARG0 |
| 10376 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10377 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10378 | jmp .L_op_nop+(193*128) |
| 10379 | |
| 10380 | /* ------------------------------ */ |
| 10381 | .balign 128 |
| 10382 | .L_ALT_op_xor_long_2addr: /* 0xc2 */ |
| 10383 | /* File: x86_64/alt_stub.S */ |
| 10384 | /* |
| 10385 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10386 | * any interesting requests and then jump to the real instruction |
| 10387 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10388 | * because rIBASE is caller save and we need to reload it. |
| 10389 | * |
| 10390 | * Note that unlike in the Arm implementation, we should never arrive |
| 10391 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10392 | * return. |
| 10393 | */ |
| 10394 | .extern MterpCheckBefore |
| 10395 | EXPORT_PC |
| 10396 | REFRESH_IBASE |
| 10397 | movq rSELF, OUT_ARG0 |
| 10398 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10399 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10400 | jmp .L_op_nop+(194*128) |
| 10401 | |
| 10402 | /* ------------------------------ */ |
| 10403 | .balign 128 |
| 10404 | .L_ALT_op_shl_long_2addr: /* 0xc3 */ |
| 10405 | /* File: x86_64/alt_stub.S */ |
| 10406 | /* |
| 10407 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10408 | * any interesting requests and then jump to the real instruction |
| 10409 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10410 | * because rIBASE is caller save and we need to reload it. |
| 10411 | * |
| 10412 | * Note that unlike in the Arm implementation, we should never arrive |
| 10413 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10414 | * return. |
| 10415 | */ |
| 10416 | .extern MterpCheckBefore |
| 10417 | EXPORT_PC |
| 10418 | REFRESH_IBASE |
| 10419 | movq rSELF, OUT_ARG0 |
| 10420 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10421 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10422 | jmp .L_op_nop+(195*128) |
| 10423 | |
| 10424 | /* ------------------------------ */ |
| 10425 | .balign 128 |
| 10426 | .L_ALT_op_shr_long_2addr: /* 0xc4 */ |
| 10427 | /* File: x86_64/alt_stub.S */ |
| 10428 | /* |
| 10429 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10430 | * any interesting requests and then jump to the real instruction |
| 10431 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10432 | * because rIBASE is caller save and we need to reload it. |
| 10433 | * |
| 10434 | * Note that unlike in the Arm implementation, we should never arrive |
| 10435 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10436 | * return. |
| 10437 | */ |
| 10438 | .extern MterpCheckBefore |
| 10439 | EXPORT_PC |
| 10440 | REFRESH_IBASE |
| 10441 | movq rSELF, OUT_ARG0 |
| 10442 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10443 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10444 | jmp .L_op_nop+(196*128) |
| 10445 | |
| 10446 | /* ------------------------------ */ |
| 10447 | .balign 128 |
| 10448 | .L_ALT_op_ushr_long_2addr: /* 0xc5 */ |
| 10449 | /* File: x86_64/alt_stub.S */ |
| 10450 | /* |
| 10451 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10452 | * any interesting requests and then jump to the real instruction |
| 10453 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10454 | * because rIBASE is caller save and we need to reload it. |
| 10455 | * |
| 10456 | * Note that unlike in the Arm implementation, we should never arrive |
| 10457 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10458 | * return. |
| 10459 | */ |
| 10460 | .extern MterpCheckBefore |
| 10461 | EXPORT_PC |
| 10462 | REFRESH_IBASE |
| 10463 | movq rSELF, OUT_ARG0 |
| 10464 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10465 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10466 | jmp .L_op_nop+(197*128) |
| 10467 | |
| 10468 | /* ------------------------------ */ |
| 10469 | .balign 128 |
| 10470 | .L_ALT_op_add_float_2addr: /* 0xc6 */ |
| 10471 | /* File: x86_64/alt_stub.S */ |
| 10472 | /* |
| 10473 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10474 | * any interesting requests and then jump to the real instruction |
| 10475 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10476 | * because rIBASE is caller save and we need to reload it. |
| 10477 | * |
| 10478 | * Note that unlike in the Arm implementation, we should never arrive |
| 10479 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10480 | * return. |
| 10481 | */ |
| 10482 | .extern MterpCheckBefore |
| 10483 | EXPORT_PC |
| 10484 | REFRESH_IBASE |
| 10485 | movq rSELF, OUT_ARG0 |
| 10486 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10487 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10488 | jmp .L_op_nop+(198*128) |
| 10489 | |
| 10490 | /* ------------------------------ */ |
| 10491 | .balign 128 |
| 10492 | .L_ALT_op_sub_float_2addr: /* 0xc7 */ |
| 10493 | /* File: x86_64/alt_stub.S */ |
| 10494 | /* |
| 10495 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10496 | * any interesting requests and then jump to the real instruction |
| 10497 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10498 | * because rIBASE is caller save and we need to reload it. |
| 10499 | * |
| 10500 | * Note that unlike in the Arm implementation, we should never arrive |
| 10501 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10502 | * return. |
| 10503 | */ |
| 10504 | .extern MterpCheckBefore |
| 10505 | EXPORT_PC |
| 10506 | REFRESH_IBASE |
| 10507 | movq rSELF, OUT_ARG0 |
| 10508 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10509 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10510 | jmp .L_op_nop+(199*128) |
| 10511 | |
| 10512 | /* ------------------------------ */ |
| 10513 | .balign 128 |
| 10514 | .L_ALT_op_mul_float_2addr: /* 0xc8 */ |
| 10515 | /* File: x86_64/alt_stub.S */ |
| 10516 | /* |
| 10517 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10518 | * any interesting requests and then jump to the real instruction |
| 10519 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10520 | * because rIBASE is caller save and we need to reload it. |
| 10521 | * |
| 10522 | * Note that unlike in the Arm implementation, we should never arrive |
| 10523 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10524 | * return. |
| 10525 | */ |
| 10526 | .extern MterpCheckBefore |
| 10527 | EXPORT_PC |
| 10528 | REFRESH_IBASE |
| 10529 | movq rSELF, OUT_ARG0 |
| 10530 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10531 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10532 | jmp .L_op_nop+(200*128) |
| 10533 | |
| 10534 | /* ------------------------------ */ |
| 10535 | .balign 128 |
| 10536 | .L_ALT_op_div_float_2addr: /* 0xc9 */ |
| 10537 | /* File: x86_64/alt_stub.S */ |
| 10538 | /* |
| 10539 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10540 | * any interesting requests and then jump to the real instruction |
| 10541 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10542 | * because rIBASE is caller save and we need to reload it. |
| 10543 | * |
| 10544 | * Note that unlike in the Arm implementation, we should never arrive |
| 10545 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10546 | * return. |
| 10547 | */ |
| 10548 | .extern MterpCheckBefore |
| 10549 | EXPORT_PC |
| 10550 | REFRESH_IBASE |
| 10551 | movq rSELF, OUT_ARG0 |
| 10552 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10553 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10554 | jmp .L_op_nop+(201*128) |
| 10555 | |
| 10556 | /* ------------------------------ */ |
| 10557 | .balign 128 |
| 10558 | .L_ALT_op_rem_float_2addr: /* 0xca */ |
| 10559 | /* File: x86_64/alt_stub.S */ |
| 10560 | /* |
| 10561 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10562 | * any interesting requests and then jump to the real instruction |
| 10563 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10564 | * because rIBASE is caller save and we need to reload it. |
| 10565 | * |
| 10566 | * Note that unlike in the Arm implementation, we should never arrive |
| 10567 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10568 | * return. |
| 10569 | */ |
| 10570 | .extern MterpCheckBefore |
| 10571 | EXPORT_PC |
| 10572 | REFRESH_IBASE |
| 10573 | movq rSELF, OUT_ARG0 |
| 10574 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10575 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10576 | jmp .L_op_nop+(202*128) |
| 10577 | |
| 10578 | /* ------------------------------ */ |
| 10579 | .balign 128 |
| 10580 | .L_ALT_op_add_double_2addr: /* 0xcb */ |
| 10581 | /* File: x86_64/alt_stub.S */ |
| 10582 | /* |
| 10583 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10584 | * any interesting requests and then jump to the real instruction |
| 10585 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10586 | * because rIBASE is caller save and we need to reload it. |
| 10587 | * |
| 10588 | * Note that unlike in the Arm implementation, we should never arrive |
| 10589 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10590 | * return. |
| 10591 | */ |
| 10592 | .extern MterpCheckBefore |
| 10593 | EXPORT_PC |
| 10594 | REFRESH_IBASE |
| 10595 | movq rSELF, OUT_ARG0 |
| 10596 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10597 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10598 | jmp .L_op_nop+(203*128) |
| 10599 | |
| 10600 | /* ------------------------------ */ |
| 10601 | .balign 128 |
| 10602 | .L_ALT_op_sub_double_2addr: /* 0xcc */ |
| 10603 | /* File: x86_64/alt_stub.S */ |
| 10604 | /* |
| 10605 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10606 | * any interesting requests and then jump to the real instruction |
| 10607 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10608 | * because rIBASE is caller save and we need to reload it. |
| 10609 | * |
| 10610 | * Note that unlike in the Arm implementation, we should never arrive |
| 10611 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10612 | * return. |
| 10613 | */ |
| 10614 | .extern MterpCheckBefore |
| 10615 | EXPORT_PC |
| 10616 | REFRESH_IBASE |
| 10617 | movq rSELF, OUT_ARG0 |
| 10618 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10619 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10620 | jmp .L_op_nop+(204*128) |
| 10621 | |
| 10622 | /* ------------------------------ */ |
| 10623 | .balign 128 |
| 10624 | .L_ALT_op_mul_double_2addr: /* 0xcd */ |
| 10625 | /* File: x86_64/alt_stub.S */ |
| 10626 | /* |
| 10627 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10628 | * any interesting requests and then jump to the real instruction |
| 10629 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10630 | * because rIBASE is caller save and we need to reload it. |
| 10631 | * |
| 10632 | * Note that unlike in the Arm implementation, we should never arrive |
| 10633 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10634 | * return. |
| 10635 | */ |
| 10636 | .extern MterpCheckBefore |
| 10637 | EXPORT_PC |
| 10638 | REFRESH_IBASE |
| 10639 | movq rSELF, OUT_ARG0 |
| 10640 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10641 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10642 | jmp .L_op_nop+(205*128) |
| 10643 | |
| 10644 | /* ------------------------------ */ |
| 10645 | .balign 128 |
| 10646 | .L_ALT_op_div_double_2addr: /* 0xce */ |
| 10647 | /* File: x86_64/alt_stub.S */ |
| 10648 | /* |
| 10649 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10650 | * any interesting requests and then jump to the real instruction |
| 10651 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10652 | * because rIBASE is caller save and we need to reload it. |
| 10653 | * |
| 10654 | * Note that unlike in the Arm implementation, we should never arrive |
| 10655 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10656 | * return. |
| 10657 | */ |
| 10658 | .extern MterpCheckBefore |
| 10659 | EXPORT_PC |
| 10660 | REFRESH_IBASE |
| 10661 | movq rSELF, OUT_ARG0 |
| 10662 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10663 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10664 | jmp .L_op_nop+(206*128) |
| 10665 | |
| 10666 | /* ------------------------------ */ |
| 10667 | .balign 128 |
| 10668 | .L_ALT_op_rem_double_2addr: /* 0xcf */ |
| 10669 | /* File: x86_64/alt_stub.S */ |
| 10670 | /* |
| 10671 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10672 | * any interesting requests and then jump to the real instruction |
| 10673 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10674 | * because rIBASE is caller save and we need to reload it. |
| 10675 | * |
| 10676 | * Note that unlike in the Arm implementation, we should never arrive |
| 10677 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10678 | * return. |
| 10679 | */ |
| 10680 | .extern MterpCheckBefore |
| 10681 | EXPORT_PC |
| 10682 | REFRESH_IBASE |
| 10683 | movq rSELF, OUT_ARG0 |
| 10684 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10685 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10686 | jmp .L_op_nop+(207*128) |
| 10687 | |
| 10688 | /* ------------------------------ */ |
| 10689 | .balign 128 |
| 10690 | .L_ALT_op_add_int_lit16: /* 0xd0 */ |
| 10691 | /* File: x86_64/alt_stub.S */ |
| 10692 | /* |
| 10693 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10694 | * any interesting requests and then jump to the real instruction |
| 10695 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10696 | * because rIBASE is caller save and we need to reload it. |
| 10697 | * |
| 10698 | * Note that unlike in the Arm implementation, we should never arrive |
| 10699 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10700 | * return. |
| 10701 | */ |
| 10702 | .extern MterpCheckBefore |
| 10703 | EXPORT_PC |
| 10704 | REFRESH_IBASE |
| 10705 | movq rSELF, OUT_ARG0 |
| 10706 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10707 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10708 | jmp .L_op_nop+(208*128) |
| 10709 | |
| 10710 | /* ------------------------------ */ |
| 10711 | .balign 128 |
| 10712 | .L_ALT_op_rsub_int: /* 0xd1 */ |
| 10713 | /* File: x86_64/alt_stub.S */ |
| 10714 | /* |
| 10715 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10716 | * any interesting requests and then jump to the real instruction |
| 10717 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10718 | * because rIBASE is caller save and we need to reload it. |
| 10719 | * |
| 10720 | * Note that unlike in the Arm implementation, we should never arrive |
| 10721 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10722 | * return. |
| 10723 | */ |
| 10724 | .extern MterpCheckBefore |
| 10725 | EXPORT_PC |
| 10726 | REFRESH_IBASE |
| 10727 | movq rSELF, OUT_ARG0 |
| 10728 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10729 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10730 | jmp .L_op_nop+(209*128) |
| 10731 | |
| 10732 | /* ------------------------------ */ |
| 10733 | .balign 128 |
| 10734 | .L_ALT_op_mul_int_lit16: /* 0xd2 */ |
| 10735 | /* File: x86_64/alt_stub.S */ |
| 10736 | /* |
| 10737 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10738 | * any interesting requests and then jump to the real instruction |
| 10739 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10740 | * because rIBASE is caller save and we need to reload it. |
| 10741 | * |
| 10742 | * Note that unlike in the Arm implementation, we should never arrive |
| 10743 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10744 | * return. |
| 10745 | */ |
| 10746 | .extern MterpCheckBefore |
| 10747 | EXPORT_PC |
| 10748 | REFRESH_IBASE |
| 10749 | movq rSELF, OUT_ARG0 |
| 10750 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10751 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10752 | jmp .L_op_nop+(210*128) |
| 10753 | |
| 10754 | /* ------------------------------ */ |
| 10755 | .balign 128 |
| 10756 | .L_ALT_op_div_int_lit16: /* 0xd3 */ |
| 10757 | /* File: x86_64/alt_stub.S */ |
| 10758 | /* |
| 10759 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10760 | * any interesting requests and then jump to the real instruction |
| 10761 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10762 | * because rIBASE is caller save and we need to reload it. |
| 10763 | * |
| 10764 | * Note that unlike in the Arm implementation, we should never arrive |
| 10765 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10766 | * return. |
| 10767 | */ |
| 10768 | .extern MterpCheckBefore |
| 10769 | EXPORT_PC |
| 10770 | REFRESH_IBASE |
| 10771 | movq rSELF, OUT_ARG0 |
| 10772 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10773 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10774 | jmp .L_op_nop+(211*128) |
| 10775 | |
| 10776 | /* ------------------------------ */ |
| 10777 | .balign 128 |
| 10778 | .L_ALT_op_rem_int_lit16: /* 0xd4 */ |
| 10779 | /* File: x86_64/alt_stub.S */ |
| 10780 | /* |
| 10781 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10782 | * any interesting requests and then jump to the real instruction |
| 10783 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10784 | * because rIBASE is caller save and we need to reload it. |
| 10785 | * |
| 10786 | * Note that unlike in the Arm implementation, we should never arrive |
| 10787 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10788 | * return. |
| 10789 | */ |
| 10790 | .extern MterpCheckBefore |
| 10791 | EXPORT_PC |
| 10792 | REFRESH_IBASE |
| 10793 | movq rSELF, OUT_ARG0 |
| 10794 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10795 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10796 | jmp .L_op_nop+(212*128) |
| 10797 | |
| 10798 | /* ------------------------------ */ |
| 10799 | .balign 128 |
| 10800 | .L_ALT_op_and_int_lit16: /* 0xd5 */ |
| 10801 | /* File: x86_64/alt_stub.S */ |
| 10802 | /* |
| 10803 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10804 | * any interesting requests and then jump to the real instruction |
| 10805 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10806 | * because rIBASE is caller save and we need to reload it. |
| 10807 | * |
| 10808 | * Note that unlike in the Arm implementation, we should never arrive |
| 10809 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10810 | * return. |
| 10811 | */ |
| 10812 | .extern MterpCheckBefore |
| 10813 | EXPORT_PC |
| 10814 | REFRESH_IBASE |
| 10815 | movq rSELF, OUT_ARG0 |
| 10816 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10817 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10818 | jmp .L_op_nop+(213*128) |
| 10819 | |
| 10820 | /* ------------------------------ */ |
| 10821 | .balign 128 |
| 10822 | .L_ALT_op_or_int_lit16: /* 0xd6 */ |
| 10823 | /* File: x86_64/alt_stub.S */ |
| 10824 | /* |
| 10825 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10826 | * any interesting requests and then jump to the real instruction |
| 10827 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10828 | * because rIBASE is caller save and we need to reload it. |
| 10829 | * |
| 10830 | * Note that unlike in the Arm implementation, we should never arrive |
| 10831 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10832 | * return. |
| 10833 | */ |
| 10834 | .extern MterpCheckBefore |
| 10835 | EXPORT_PC |
| 10836 | REFRESH_IBASE |
| 10837 | movq rSELF, OUT_ARG0 |
| 10838 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10839 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10840 | jmp .L_op_nop+(214*128) |
| 10841 | |
| 10842 | /* ------------------------------ */ |
| 10843 | .balign 128 |
| 10844 | .L_ALT_op_xor_int_lit16: /* 0xd7 */ |
| 10845 | /* File: x86_64/alt_stub.S */ |
| 10846 | /* |
| 10847 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10848 | * any interesting requests and then jump to the real instruction |
| 10849 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10850 | * because rIBASE is caller save and we need to reload it. |
| 10851 | * |
| 10852 | * Note that unlike in the Arm implementation, we should never arrive |
| 10853 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10854 | * return. |
| 10855 | */ |
| 10856 | .extern MterpCheckBefore |
| 10857 | EXPORT_PC |
| 10858 | REFRESH_IBASE |
| 10859 | movq rSELF, OUT_ARG0 |
| 10860 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10861 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10862 | jmp .L_op_nop+(215*128) |
| 10863 | |
| 10864 | /* ------------------------------ */ |
| 10865 | .balign 128 |
| 10866 | .L_ALT_op_add_int_lit8: /* 0xd8 */ |
| 10867 | /* File: x86_64/alt_stub.S */ |
| 10868 | /* |
| 10869 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10870 | * any interesting requests and then jump to the real instruction |
| 10871 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10872 | * because rIBASE is caller save and we need to reload it. |
| 10873 | * |
| 10874 | * Note that unlike in the Arm implementation, we should never arrive |
| 10875 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10876 | * return. |
| 10877 | */ |
| 10878 | .extern MterpCheckBefore |
| 10879 | EXPORT_PC |
| 10880 | REFRESH_IBASE |
| 10881 | movq rSELF, OUT_ARG0 |
| 10882 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10883 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10884 | jmp .L_op_nop+(216*128) |
| 10885 | |
| 10886 | /* ------------------------------ */ |
| 10887 | .balign 128 |
| 10888 | .L_ALT_op_rsub_int_lit8: /* 0xd9 */ |
| 10889 | /* File: x86_64/alt_stub.S */ |
| 10890 | /* |
| 10891 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10892 | * any interesting requests and then jump to the real instruction |
| 10893 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10894 | * because rIBASE is caller save and we need to reload it. |
| 10895 | * |
| 10896 | * Note that unlike in the Arm implementation, we should never arrive |
| 10897 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10898 | * return. |
| 10899 | */ |
| 10900 | .extern MterpCheckBefore |
| 10901 | EXPORT_PC |
| 10902 | REFRESH_IBASE |
| 10903 | movq rSELF, OUT_ARG0 |
| 10904 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10905 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10906 | jmp .L_op_nop+(217*128) |
| 10907 | |
| 10908 | /* ------------------------------ */ |
| 10909 | .balign 128 |
| 10910 | .L_ALT_op_mul_int_lit8: /* 0xda */ |
| 10911 | /* File: x86_64/alt_stub.S */ |
| 10912 | /* |
| 10913 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10914 | * any interesting requests and then jump to the real instruction |
| 10915 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10916 | * because rIBASE is caller save and we need to reload it. |
| 10917 | * |
| 10918 | * Note that unlike in the Arm implementation, we should never arrive |
| 10919 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10920 | * return. |
| 10921 | */ |
| 10922 | .extern MterpCheckBefore |
| 10923 | EXPORT_PC |
| 10924 | REFRESH_IBASE |
| 10925 | movq rSELF, OUT_ARG0 |
| 10926 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10927 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10928 | jmp .L_op_nop+(218*128) |
| 10929 | |
| 10930 | /* ------------------------------ */ |
| 10931 | .balign 128 |
| 10932 | .L_ALT_op_div_int_lit8: /* 0xdb */ |
| 10933 | /* File: x86_64/alt_stub.S */ |
| 10934 | /* |
| 10935 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10936 | * any interesting requests and then jump to the real instruction |
| 10937 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10938 | * because rIBASE is caller save and we need to reload it. |
| 10939 | * |
| 10940 | * Note that unlike in the Arm implementation, we should never arrive |
| 10941 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10942 | * return. |
| 10943 | */ |
| 10944 | .extern MterpCheckBefore |
| 10945 | EXPORT_PC |
| 10946 | REFRESH_IBASE |
| 10947 | movq rSELF, OUT_ARG0 |
| 10948 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10949 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10950 | jmp .L_op_nop+(219*128) |
| 10951 | |
| 10952 | /* ------------------------------ */ |
| 10953 | .balign 128 |
| 10954 | .L_ALT_op_rem_int_lit8: /* 0xdc */ |
| 10955 | /* File: x86_64/alt_stub.S */ |
| 10956 | /* |
| 10957 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10958 | * any interesting requests and then jump to the real instruction |
| 10959 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10960 | * because rIBASE is caller save and we need to reload it. |
| 10961 | * |
| 10962 | * Note that unlike in the Arm implementation, we should never arrive |
| 10963 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10964 | * return. |
| 10965 | */ |
| 10966 | .extern MterpCheckBefore |
| 10967 | EXPORT_PC |
| 10968 | REFRESH_IBASE |
| 10969 | movq rSELF, OUT_ARG0 |
| 10970 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10971 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10972 | jmp .L_op_nop+(220*128) |
| 10973 | |
| 10974 | /* ------------------------------ */ |
| 10975 | .balign 128 |
| 10976 | .L_ALT_op_and_int_lit8: /* 0xdd */ |
| 10977 | /* File: x86_64/alt_stub.S */ |
| 10978 | /* |
| 10979 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 10980 | * any interesting requests and then jump to the real instruction |
| 10981 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 10982 | * because rIBASE is caller save and we need to reload it. |
| 10983 | * |
| 10984 | * Note that unlike in the Arm implementation, we should never arrive |
| 10985 | * here with a zero breakFlag because we always refresh rIBASE on |
| 10986 | * return. |
| 10987 | */ |
| 10988 | .extern MterpCheckBefore |
| 10989 | EXPORT_PC |
| 10990 | REFRESH_IBASE |
| 10991 | movq rSELF, OUT_ARG0 |
| 10992 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 10993 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 10994 | jmp .L_op_nop+(221*128) |
| 10995 | |
| 10996 | /* ------------------------------ */ |
| 10997 | .balign 128 |
| 10998 | .L_ALT_op_or_int_lit8: /* 0xde */ |
| 10999 | /* File: x86_64/alt_stub.S */ |
| 11000 | /* |
| 11001 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11002 | * any interesting requests and then jump to the real instruction |
| 11003 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11004 | * because rIBASE is caller save and we need to reload it. |
| 11005 | * |
| 11006 | * Note that unlike in the Arm implementation, we should never arrive |
| 11007 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11008 | * return. |
| 11009 | */ |
| 11010 | .extern MterpCheckBefore |
| 11011 | EXPORT_PC |
| 11012 | REFRESH_IBASE |
| 11013 | movq rSELF, OUT_ARG0 |
| 11014 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11015 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11016 | jmp .L_op_nop+(222*128) |
| 11017 | |
| 11018 | /* ------------------------------ */ |
| 11019 | .balign 128 |
| 11020 | .L_ALT_op_xor_int_lit8: /* 0xdf */ |
| 11021 | /* File: x86_64/alt_stub.S */ |
| 11022 | /* |
| 11023 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11024 | * any interesting requests and then jump to the real instruction |
| 11025 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11026 | * because rIBASE is caller save and we need to reload it. |
| 11027 | * |
| 11028 | * Note that unlike in the Arm implementation, we should never arrive |
| 11029 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11030 | * return. |
| 11031 | */ |
| 11032 | .extern MterpCheckBefore |
| 11033 | EXPORT_PC |
| 11034 | REFRESH_IBASE |
| 11035 | movq rSELF, OUT_ARG0 |
| 11036 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11037 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11038 | jmp .L_op_nop+(223*128) |
| 11039 | |
| 11040 | /* ------------------------------ */ |
| 11041 | .balign 128 |
| 11042 | .L_ALT_op_shl_int_lit8: /* 0xe0 */ |
| 11043 | /* File: x86_64/alt_stub.S */ |
| 11044 | /* |
| 11045 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11046 | * any interesting requests and then jump to the real instruction |
| 11047 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11048 | * because rIBASE is caller save and we need to reload it. |
| 11049 | * |
| 11050 | * Note that unlike in the Arm implementation, we should never arrive |
| 11051 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11052 | * return. |
| 11053 | */ |
| 11054 | .extern MterpCheckBefore |
| 11055 | EXPORT_PC |
| 11056 | REFRESH_IBASE |
| 11057 | movq rSELF, OUT_ARG0 |
| 11058 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11059 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11060 | jmp .L_op_nop+(224*128) |
| 11061 | |
| 11062 | /* ------------------------------ */ |
| 11063 | .balign 128 |
| 11064 | .L_ALT_op_shr_int_lit8: /* 0xe1 */ |
| 11065 | /* File: x86_64/alt_stub.S */ |
| 11066 | /* |
| 11067 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11068 | * any interesting requests and then jump to the real instruction |
| 11069 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11070 | * because rIBASE is caller save and we need to reload it. |
| 11071 | * |
| 11072 | * Note that unlike in the Arm implementation, we should never arrive |
| 11073 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11074 | * return. |
| 11075 | */ |
| 11076 | .extern MterpCheckBefore |
| 11077 | EXPORT_PC |
| 11078 | REFRESH_IBASE |
| 11079 | movq rSELF, OUT_ARG0 |
| 11080 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11081 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11082 | jmp .L_op_nop+(225*128) |
| 11083 | |
| 11084 | /* ------------------------------ */ |
| 11085 | .balign 128 |
| 11086 | .L_ALT_op_ushr_int_lit8: /* 0xe2 */ |
| 11087 | /* File: x86_64/alt_stub.S */ |
| 11088 | /* |
| 11089 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11090 | * any interesting requests and then jump to the real instruction |
| 11091 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11092 | * because rIBASE is caller save and we need to reload it. |
| 11093 | * |
| 11094 | * Note that unlike in the Arm implementation, we should never arrive |
| 11095 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11096 | * return. |
| 11097 | */ |
| 11098 | .extern MterpCheckBefore |
| 11099 | EXPORT_PC |
| 11100 | REFRESH_IBASE |
| 11101 | movq rSELF, OUT_ARG0 |
| 11102 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11103 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11104 | jmp .L_op_nop+(226*128) |
| 11105 | |
| 11106 | /* ------------------------------ */ |
| 11107 | .balign 128 |
| 11108 | .L_ALT_op_iget_quick: /* 0xe3 */ |
| 11109 | /* File: x86_64/alt_stub.S */ |
| 11110 | /* |
| 11111 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11112 | * any interesting requests and then jump to the real instruction |
| 11113 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11114 | * because rIBASE is caller save and we need to reload it. |
| 11115 | * |
| 11116 | * Note that unlike in the Arm implementation, we should never arrive |
| 11117 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11118 | * return. |
| 11119 | */ |
| 11120 | .extern MterpCheckBefore |
| 11121 | EXPORT_PC |
| 11122 | REFRESH_IBASE |
| 11123 | movq rSELF, OUT_ARG0 |
| 11124 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11125 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11126 | jmp .L_op_nop+(227*128) |
| 11127 | |
| 11128 | /* ------------------------------ */ |
| 11129 | .balign 128 |
| 11130 | .L_ALT_op_iget_wide_quick: /* 0xe4 */ |
| 11131 | /* File: x86_64/alt_stub.S */ |
| 11132 | /* |
| 11133 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11134 | * any interesting requests and then jump to the real instruction |
| 11135 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11136 | * because rIBASE is caller save and we need to reload it. |
| 11137 | * |
| 11138 | * Note that unlike in the Arm implementation, we should never arrive |
| 11139 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11140 | * return. |
| 11141 | */ |
| 11142 | .extern MterpCheckBefore |
| 11143 | EXPORT_PC |
| 11144 | REFRESH_IBASE |
| 11145 | movq rSELF, OUT_ARG0 |
| 11146 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11147 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11148 | jmp .L_op_nop+(228*128) |
| 11149 | |
| 11150 | /* ------------------------------ */ |
| 11151 | .balign 128 |
| 11152 | .L_ALT_op_iget_object_quick: /* 0xe5 */ |
| 11153 | /* File: x86_64/alt_stub.S */ |
| 11154 | /* |
| 11155 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11156 | * any interesting requests and then jump to the real instruction |
| 11157 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11158 | * because rIBASE is caller save and we need to reload it. |
| 11159 | * |
| 11160 | * Note that unlike in the Arm implementation, we should never arrive |
| 11161 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11162 | * return. |
| 11163 | */ |
| 11164 | .extern MterpCheckBefore |
| 11165 | EXPORT_PC |
| 11166 | REFRESH_IBASE |
| 11167 | movq rSELF, OUT_ARG0 |
| 11168 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11169 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11170 | jmp .L_op_nop+(229*128) |
| 11171 | |
| 11172 | /* ------------------------------ */ |
| 11173 | .balign 128 |
| 11174 | .L_ALT_op_iput_quick: /* 0xe6 */ |
| 11175 | /* File: x86_64/alt_stub.S */ |
| 11176 | /* |
| 11177 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11178 | * any interesting requests and then jump to the real instruction |
| 11179 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11180 | * because rIBASE is caller save and we need to reload it. |
| 11181 | * |
| 11182 | * Note that unlike in the Arm implementation, we should never arrive |
| 11183 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11184 | * return. |
| 11185 | */ |
| 11186 | .extern MterpCheckBefore |
| 11187 | EXPORT_PC |
| 11188 | REFRESH_IBASE |
| 11189 | movq rSELF, OUT_ARG0 |
| 11190 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11191 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11192 | jmp .L_op_nop+(230*128) |
| 11193 | |
| 11194 | /* ------------------------------ */ |
| 11195 | .balign 128 |
| 11196 | .L_ALT_op_iput_wide_quick: /* 0xe7 */ |
| 11197 | /* File: x86_64/alt_stub.S */ |
| 11198 | /* |
| 11199 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11200 | * any interesting requests and then jump to the real instruction |
| 11201 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11202 | * because rIBASE is caller save and we need to reload it. |
| 11203 | * |
| 11204 | * Note that unlike in the Arm implementation, we should never arrive |
| 11205 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11206 | * return. |
| 11207 | */ |
| 11208 | .extern MterpCheckBefore |
| 11209 | EXPORT_PC |
| 11210 | REFRESH_IBASE |
| 11211 | movq rSELF, OUT_ARG0 |
| 11212 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11213 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11214 | jmp .L_op_nop+(231*128) |
| 11215 | |
| 11216 | /* ------------------------------ */ |
| 11217 | .balign 128 |
| 11218 | .L_ALT_op_iput_object_quick: /* 0xe8 */ |
| 11219 | /* File: x86_64/alt_stub.S */ |
| 11220 | /* |
| 11221 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11222 | * any interesting requests and then jump to the real instruction |
| 11223 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11224 | * because rIBASE is caller save and we need to reload it. |
| 11225 | * |
| 11226 | * Note that unlike in the Arm implementation, we should never arrive |
| 11227 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11228 | * return. |
| 11229 | */ |
| 11230 | .extern MterpCheckBefore |
| 11231 | EXPORT_PC |
| 11232 | REFRESH_IBASE |
| 11233 | movq rSELF, OUT_ARG0 |
| 11234 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11235 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11236 | jmp .L_op_nop+(232*128) |
| 11237 | |
| 11238 | /* ------------------------------ */ |
| 11239 | .balign 128 |
| 11240 | .L_ALT_op_invoke_virtual_quick: /* 0xe9 */ |
| 11241 | /* File: x86_64/alt_stub.S */ |
| 11242 | /* |
| 11243 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11244 | * any interesting requests and then jump to the real instruction |
| 11245 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11246 | * because rIBASE is caller save and we need to reload it. |
| 11247 | * |
| 11248 | * Note that unlike in the Arm implementation, we should never arrive |
| 11249 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11250 | * return. |
| 11251 | */ |
| 11252 | .extern MterpCheckBefore |
| 11253 | EXPORT_PC |
| 11254 | REFRESH_IBASE |
| 11255 | movq rSELF, OUT_ARG0 |
| 11256 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11257 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11258 | jmp .L_op_nop+(233*128) |
| 11259 | |
| 11260 | /* ------------------------------ */ |
| 11261 | .balign 128 |
| 11262 | .L_ALT_op_invoke_virtual_range_quick: /* 0xea */ |
| 11263 | /* File: x86_64/alt_stub.S */ |
| 11264 | /* |
| 11265 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11266 | * any interesting requests and then jump to the real instruction |
| 11267 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11268 | * because rIBASE is caller save and we need to reload it. |
| 11269 | * |
| 11270 | * Note that unlike in the Arm implementation, we should never arrive |
| 11271 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11272 | * return. |
| 11273 | */ |
| 11274 | .extern MterpCheckBefore |
| 11275 | EXPORT_PC |
| 11276 | REFRESH_IBASE |
| 11277 | movq rSELF, OUT_ARG0 |
| 11278 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11279 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11280 | jmp .L_op_nop+(234*128) |
| 11281 | |
| 11282 | /* ------------------------------ */ |
| 11283 | .balign 128 |
| 11284 | .L_ALT_op_iput_boolean_quick: /* 0xeb */ |
| 11285 | /* File: x86_64/alt_stub.S */ |
| 11286 | /* |
| 11287 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11288 | * any interesting requests and then jump to the real instruction |
| 11289 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11290 | * because rIBASE is caller save and we need to reload it. |
| 11291 | * |
| 11292 | * Note that unlike in the Arm implementation, we should never arrive |
| 11293 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11294 | * return. |
| 11295 | */ |
| 11296 | .extern MterpCheckBefore |
| 11297 | EXPORT_PC |
| 11298 | REFRESH_IBASE |
| 11299 | movq rSELF, OUT_ARG0 |
| 11300 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11301 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11302 | jmp .L_op_nop+(235*128) |
| 11303 | |
| 11304 | /* ------------------------------ */ |
| 11305 | .balign 128 |
| 11306 | .L_ALT_op_iput_byte_quick: /* 0xec */ |
| 11307 | /* File: x86_64/alt_stub.S */ |
| 11308 | /* |
| 11309 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11310 | * any interesting requests and then jump to the real instruction |
| 11311 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11312 | * because rIBASE is caller save and we need to reload it. |
| 11313 | * |
| 11314 | * Note that unlike in the Arm implementation, we should never arrive |
| 11315 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11316 | * return. |
| 11317 | */ |
| 11318 | .extern MterpCheckBefore |
| 11319 | EXPORT_PC |
| 11320 | REFRESH_IBASE |
| 11321 | movq rSELF, OUT_ARG0 |
| 11322 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11323 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11324 | jmp .L_op_nop+(236*128) |
| 11325 | |
| 11326 | /* ------------------------------ */ |
| 11327 | .balign 128 |
| 11328 | .L_ALT_op_iput_char_quick: /* 0xed */ |
| 11329 | /* File: x86_64/alt_stub.S */ |
| 11330 | /* |
| 11331 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11332 | * any interesting requests and then jump to the real instruction |
| 11333 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11334 | * because rIBASE is caller save and we need to reload it. |
| 11335 | * |
| 11336 | * Note that unlike in the Arm implementation, we should never arrive |
| 11337 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11338 | * return. |
| 11339 | */ |
| 11340 | .extern MterpCheckBefore |
| 11341 | EXPORT_PC |
| 11342 | REFRESH_IBASE |
| 11343 | movq rSELF, OUT_ARG0 |
| 11344 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11345 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11346 | jmp .L_op_nop+(237*128) |
| 11347 | |
| 11348 | /* ------------------------------ */ |
| 11349 | .balign 128 |
| 11350 | .L_ALT_op_iput_short_quick: /* 0xee */ |
| 11351 | /* File: x86_64/alt_stub.S */ |
| 11352 | /* |
| 11353 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11354 | * any interesting requests and then jump to the real instruction |
| 11355 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11356 | * because rIBASE is caller save and we need to reload it. |
| 11357 | * |
| 11358 | * Note that unlike in the Arm implementation, we should never arrive |
| 11359 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11360 | * return. |
| 11361 | */ |
| 11362 | .extern MterpCheckBefore |
| 11363 | EXPORT_PC |
| 11364 | REFRESH_IBASE |
| 11365 | movq rSELF, OUT_ARG0 |
| 11366 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11367 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11368 | jmp .L_op_nop+(238*128) |
| 11369 | |
| 11370 | /* ------------------------------ */ |
| 11371 | .balign 128 |
| 11372 | .L_ALT_op_iget_boolean_quick: /* 0xef */ |
| 11373 | /* File: x86_64/alt_stub.S */ |
| 11374 | /* |
| 11375 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11376 | * any interesting requests and then jump to the real instruction |
| 11377 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11378 | * because rIBASE is caller save and we need to reload it. |
| 11379 | * |
| 11380 | * Note that unlike in the Arm implementation, we should never arrive |
| 11381 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11382 | * return. |
| 11383 | */ |
| 11384 | .extern MterpCheckBefore |
| 11385 | EXPORT_PC |
| 11386 | REFRESH_IBASE |
| 11387 | movq rSELF, OUT_ARG0 |
| 11388 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11389 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11390 | jmp .L_op_nop+(239*128) |
| 11391 | |
| 11392 | /* ------------------------------ */ |
| 11393 | .balign 128 |
| 11394 | .L_ALT_op_iget_byte_quick: /* 0xf0 */ |
| 11395 | /* File: x86_64/alt_stub.S */ |
| 11396 | /* |
| 11397 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11398 | * any interesting requests and then jump to the real instruction |
| 11399 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11400 | * because rIBASE is caller save and we need to reload it. |
| 11401 | * |
| 11402 | * Note that unlike in the Arm implementation, we should never arrive |
| 11403 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11404 | * return. |
| 11405 | */ |
| 11406 | .extern MterpCheckBefore |
| 11407 | EXPORT_PC |
| 11408 | REFRESH_IBASE |
| 11409 | movq rSELF, OUT_ARG0 |
| 11410 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11411 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11412 | jmp .L_op_nop+(240*128) |
| 11413 | |
| 11414 | /* ------------------------------ */ |
| 11415 | .balign 128 |
| 11416 | .L_ALT_op_iget_char_quick: /* 0xf1 */ |
| 11417 | /* File: x86_64/alt_stub.S */ |
| 11418 | /* |
| 11419 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11420 | * any interesting requests and then jump to the real instruction |
| 11421 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11422 | * because rIBASE is caller save and we need to reload it. |
| 11423 | * |
| 11424 | * Note that unlike in the Arm implementation, we should never arrive |
| 11425 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11426 | * return. |
| 11427 | */ |
| 11428 | .extern MterpCheckBefore |
| 11429 | EXPORT_PC |
| 11430 | REFRESH_IBASE |
| 11431 | movq rSELF, OUT_ARG0 |
| 11432 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11433 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11434 | jmp .L_op_nop+(241*128) |
| 11435 | |
| 11436 | /* ------------------------------ */ |
| 11437 | .balign 128 |
| 11438 | .L_ALT_op_iget_short_quick: /* 0xf2 */ |
| 11439 | /* File: x86_64/alt_stub.S */ |
| 11440 | /* |
| 11441 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11442 | * any interesting requests and then jump to the real instruction |
| 11443 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11444 | * because rIBASE is caller save and we need to reload it. |
| 11445 | * |
| 11446 | * Note that unlike in the Arm implementation, we should never arrive |
| 11447 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11448 | * return. |
| 11449 | */ |
| 11450 | .extern MterpCheckBefore |
| 11451 | EXPORT_PC |
| 11452 | REFRESH_IBASE |
| 11453 | movq rSELF, OUT_ARG0 |
| 11454 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11455 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11456 | jmp .L_op_nop+(242*128) |
| 11457 | |
| 11458 | /* ------------------------------ */ |
| 11459 | .balign 128 |
| 11460 | .L_ALT_op_invoke_lambda: /* 0xf3 */ |
| 11461 | /* File: x86_64/alt_stub.S */ |
| 11462 | /* |
| 11463 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11464 | * any interesting requests and then jump to the real instruction |
| 11465 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11466 | * because rIBASE is caller save and we need to reload it. |
| 11467 | * |
| 11468 | * Note that unlike in the Arm implementation, we should never arrive |
| 11469 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11470 | * return. |
| 11471 | */ |
| 11472 | .extern MterpCheckBefore |
| 11473 | EXPORT_PC |
| 11474 | REFRESH_IBASE |
| 11475 | movq rSELF, OUT_ARG0 |
| 11476 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11477 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11478 | jmp .L_op_nop+(243*128) |
| 11479 | |
| 11480 | /* ------------------------------ */ |
| 11481 | .balign 128 |
| 11482 | .L_ALT_op_unused_f4: /* 0xf4 */ |
| 11483 | /* File: x86_64/alt_stub.S */ |
| 11484 | /* |
| 11485 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11486 | * any interesting requests and then jump to the real instruction |
| 11487 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11488 | * because rIBASE is caller save and we need to reload it. |
| 11489 | * |
| 11490 | * Note that unlike in the Arm implementation, we should never arrive |
| 11491 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11492 | * return. |
| 11493 | */ |
| 11494 | .extern MterpCheckBefore |
| 11495 | EXPORT_PC |
| 11496 | REFRESH_IBASE |
| 11497 | movq rSELF, OUT_ARG0 |
| 11498 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11499 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11500 | jmp .L_op_nop+(244*128) |
| 11501 | |
| 11502 | /* ------------------------------ */ |
| 11503 | .balign 128 |
| 11504 | .L_ALT_op_capture_variable: /* 0xf5 */ |
| 11505 | /* File: x86_64/alt_stub.S */ |
| 11506 | /* |
| 11507 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11508 | * any interesting requests and then jump to the real instruction |
| 11509 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11510 | * because rIBASE is caller save and we need to reload it. |
| 11511 | * |
| 11512 | * Note that unlike in the Arm implementation, we should never arrive |
| 11513 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11514 | * return. |
| 11515 | */ |
| 11516 | .extern MterpCheckBefore |
| 11517 | EXPORT_PC |
| 11518 | REFRESH_IBASE |
| 11519 | movq rSELF, OUT_ARG0 |
| 11520 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11521 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11522 | jmp .L_op_nop+(245*128) |
| 11523 | |
| 11524 | /* ------------------------------ */ |
| 11525 | .balign 128 |
| 11526 | .L_ALT_op_create_lambda: /* 0xf6 */ |
| 11527 | /* File: x86_64/alt_stub.S */ |
| 11528 | /* |
| 11529 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11530 | * any interesting requests and then jump to the real instruction |
| 11531 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11532 | * because rIBASE is caller save and we need to reload it. |
| 11533 | * |
| 11534 | * Note that unlike in the Arm implementation, we should never arrive |
| 11535 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11536 | * return. |
| 11537 | */ |
| 11538 | .extern MterpCheckBefore |
| 11539 | EXPORT_PC |
| 11540 | REFRESH_IBASE |
| 11541 | movq rSELF, OUT_ARG0 |
| 11542 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11543 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11544 | jmp .L_op_nop+(246*128) |
| 11545 | |
| 11546 | /* ------------------------------ */ |
| 11547 | .balign 128 |
| 11548 | .L_ALT_op_liberate_variable: /* 0xf7 */ |
| 11549 | /* File: x86_64/alt_stub.S */ |
| 11550 | /* |
| 11551 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11552 | * any interesting requests and then jump to the real instruction |
| 11553 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11554 | * because rIBASE is caller save and we need to reload it. |
| 11555 | * |
| 11556 | * Note that unlike in the Arm implementation, we should never arrive |
| 11557 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11558 | * return. |
| 11559 | */ |
| 11560 | .extern MterpCheckBefore |
| 11561 | EXPORT_PC |
| 11562 | REFRESH_IBASE |
| 11563 | movq rSELF, OUT_ARG0 |
| 11564 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11565 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11566 | jmp .L_op_nop+(247*128) |
| 11567 | |
| 11568 | /* ------------------------------ */ |
| 11569 | .balign 128 |
| 11570 | .L_ALT_op_box_lambda: /* 0xf8 */ |
| 11571 | /* File: x86_64/alt_stub.S */ |
| 11572 | /* |
| 11573 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11574 | * any interesting requests and then jump to the real instruction |
| 11575 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11576 | * because rIBASE is caller save and we need to reload it. |
| 11577 | * |
| 11578 | * Note that unlike in the Arm implementation, we should never arrive |
| 11579 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11580 | * return. |
| 11581 | */ |
| 11582 | .extern MterpCheckBefore |
| 11583 | EXPORT_PC |
| 11584 | REFRESH_IBASE |
| 11585 | movq rSELF, OUT_ARG0 |
| 11586 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11587 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11588 | jmp .L_op_nop+(248*128) |
| 11589 | |
| 11590 | /* ------------------------------ */ |
| 11591 | .balign 128 |
| 11592 | .L_ALT_op_unbox_lambda: /* 0xf9 */ |
| 11593 | /* File: x86_64/alt_stub.S */ |
| 11594 | /* |
| 11595 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11596 | * any interesting requests and then jump to the real instruction |
| 11597 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11598 | * because rIBASE is caller save and we need to reload it. |
| 11599 | * |
| 11600 | * Note that unlike in the Arm implementation, we should never arrive |
| 11601 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11602 | * return. |
| 11603 | */ |
| 11604 | .extern MterpCheckBefore |
| 11605 | EXPORT_PC |
| 11606 | REFRESH_IBASE |
| 11607 | movq rSELF, OUT_ARG0 |
| 11608 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11609 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11610 | jmp .L_op_nop+(249*128) |
| 11611 | |
| 11612 | /* ------------------------------ */ |
| 11613 | .balign 128 |
| 11614 | .L_ALT_op_unused_fa: /* 0xfa */ |
| 11615 | /* File: x86_64/alt_stub.S */ |
| 11616 | /* |
| 11617 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11618 | * any interesting requests and then jump to the real instruction |
| 11619 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11620 | * because rIBASE is caller save and we need to reload it. |
| 11621 | * |
| 11622 | * Note that unlike in the Arm implementation, we should never arrive |
| 11623 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11624 | * return. |
| 11625 | */ |
| 11626 | .extern MterpCheckBefore |
| 11627 | EXPORT_PC |
| 11628 | REFRESH_IBASE |
| 11629 | movq rSELF, OUT_ARG0 |
| 11630 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11631 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11632 | jmp .L_op_nop+(250*128) |
| 11633 | |
| 11634 | /* ------------------------------ */ |
| 11635 | .balign 128 |
| 11636 | .L_ALT_op_unused_fb: /* 0xfb */ |
| 11637 | /* File: x86_64/alt_stub.S */ |
| 11638 | /* |
| 11639 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11640 | * any interesting requests and then jump to the real instruction |
| 11641 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11642 | * because rIBASE is caller save and we need to reload it. |
| 11643 | * |
| 11644 | * Note that unlike in the Arm implementation, we should never arrive |
| 11645 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11646 | * return. |
| 11647 | */ |
| 11648 | .extern MterpCheckBefore |
| 11649 | EXPORT_PC |
| 11650 | REFRESH_IBASE |
| 11651 | movq rSELF, OUT_ARG0 |
| 11652 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11653 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11654 | jmp .L_op_nop+(251*128) |
| 11655 | |
| 11656 | /* ------------------------------ */ |
| 11657 | .balign 128 |
| 11658 | .L_ALT_op_unused_fc: /* 0xfc */ |
| 11659 | /* File: x86_64/alt_stub.S */ |
| 11660 | /* |
| 11661 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11662 | * any interesting requests and then jump to the real instruction |
| 11663 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11664 | * because rIBASE is caller save and we need to reload it. |
| 11665 | * |
| 11666 | * Note that unlike in the Arm implementation, we should never arrive |
| 11667 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11668 | * return. |
| 11669 | */ |
| 11670 | .extern MterpCheckBefore |
| 11671 | EXPORT_PC |
| 11672 | REFRESH_IBASE |
| 11673 | movq rSELF, OUT_ARG0 |
| 11674 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11675 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11676 | jmp .L_op_nop+(252*128) |
| 11677 | |
| 11678 | /* ------------------------------ */ |
| 11679 | .balign 128 |
| 11680 | .L_ALT_op_unused_fd: /* 0xfd */ |
| 11681 | /* File: x86_64/alt_stub.S */ |
| 11682 | /* |
| 11683 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11684 | * any interesting requests and then jump to the real instruction |
| 11685 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11686 | * because rIBASE is caller save and we need to reload it. |
| 11687 | * |
| 11688 | * Note that unlike in the Arm implementation, we should never arrive |
| 11689 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11690 | * return. |
| 11691 | */ |
| 11692 | .extern MterpCheckBefore |
| 11693 | EXPORT_PC |
| 11694 | REFRESH_IBASE |
| 11695 | movq rSELF, OUT_ARG0 |
| 11696 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11697 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11698 | jmp .L_op_nop+(253*128) |
| 11699 | |
| 11700 | /* ------------------------------ */ |
| 11701 | .balign 128 |
| 11702 | .L_ALT_op_unused_fe: /* 0xfe */ |
| 11703 | /* File: x86_64/alt_stub.S */ |
| 11704 | /* |
| 11705 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11706 | * any interesting requests and then jump to the real instruction |
| 11707 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11708 | * because rIBASE is caller save and we need to reload it. |
| 11709 | * |
| 11710 | * Note that unlike in the Arm implementation, we should never arrive |
| 11711 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11712 | * return. |
| 11713 | */ |
| 11714 | .extern MterpCheckBefore |
| 11715 | EXPORT_PC |
| 11716 | REFRESH_IBASE |
| 11717 | movq rSELF, OUT_ARG0 |
| 11718 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11719 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11720 | jmp .L_op_nop+(254*128) |
| 11721 | |
| 11722 | /* ------------------------------ */ |
| 11723 | .balign 128 |
| 11724 | .L_ALT_op_unused_ff: /* 0xff */ |
| 11725 | /* File: x86_64/alt_stub.S */ |
| 11726 | /* |
| 11727 | * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle |
| 11728 | * any interesting requests and then jump to the real instruction |
| 11729 | * handler. Unlike the Arm handler, we can't do this as a tail call |
| 11730 | * because rIBASE is caller save and we need to reload it. |
| 11731 | * |
| 11732 | * Note that unlike in the Arm implementation, we should never arrive |
| 11733 | * here with a zero breakFlag because we always refresh rIBASE on |
| 11734 | * return. |
| 11735 | */ |
| 11736 | .extern MterpCheckBefore |
| 11737 | EXPORT_PC |
| 11738 | REFRESH_IBASE |
| 11739 | movq rSELF, OUT_ARG0 |
| 11740 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11741 | call SYMBOL(MterpCheckBefore) # (self, shadow_frame) |
| 11742 | jmp .L_op_nop+(255*128) |
| 11743 | |
| 11744 | .balign 128 |
| 11745 | SIZE(SYMBOL(artMterpAsmAltInstructionStart),SYMBOL(artMterpAsmAltInstructionStart)) |
| 11746 | .global SYMBOL(artMterpAsmAltInstructionEnd) |
| 11747 | SYMBOL(artMterpAsmAltInstructionEnd): |
| 11748 | /* File: x86_64/footer.S */ |
| 11749 | /* |
| 11750 | * =========================================================================== |
| 11751 | * Common subroutines and data |
| 11752 | * =========================================================================== |
| 11753 | */ |
| 11754 | |
| 11755 | .text |
| 11756 | .align 2 |
| 11757 | |
| 11758 | /* |
| 11759 | * We've detected a condition that will result in an exception, but the exception |
| 11760 | * has not yet been thrown. Just bail out to the reference interpreter to deal with it. |
| 11761 | * TUNING: for consistency, we may want to just go ahead and handle these here. |
| 11762 | */ |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 11763 | common_errDivideByZero: |
| 11764 | EXPORT_PC |
| 11765 | #if MTERP_LOGGING |
| 11766 | movq rSELF, OUT_ARG0 |
| 11767 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11768 | call SYMBOL(MterpLogDivideByZeroException) |
| 11769 | #endif |
| 11770 | jmp MterpCommonFallback |
| 11771 | |
| 11772 | common_errArrayIndex: |
| 11773 | EXPORT_PC |
| 11774 | #if MTERP_LOGGING |
| 11775 | movq rSELF, OUT_ARG0 |
| 11776 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11777 | call SYMBOL(MterpLogArrayIndexException) |
| 11778 | #endif |
| 11779 | jmp MterpCommonFallback |
| 11780 | |
| 11781 | common_errNegativeArraySize: |
| 11782 | EXPORT_PC |
| 11783 | #if MTERP_LOGGING |
| 11784 | movq rSELF, OUT_ARG0 |
| 11785 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11786 | call SYMBOL(MterpLogNegativeArraySizeException) |
| 11787 | #endif |
| 11788 | jmp MterpCommonFallback |
| 11789 | |
| 11790 | common_errNoSuchMethod: |
| 11791 | EXPORT_PC |
| 11792 | #if MTERP_LOGGING |
| 11793 | movq rSELF, OUT_ARG0 |
| 11794 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11795 | call SYMBOL(MterpLogNoSuchMethodException) |
| 11796 | #endif |
| 11797 | jmp MterpCommonFallback |
| 11798 | |
| 11799 | common_errNullObject: |
| 11800 | EXPORT_PC |
| 11801 | #if MTERP_LOGGING |
| 11802 | movq rSELF, OUT_ARG0 |
| 11803 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11804 | call SYMBOL(MterpLogNullObjectException) |
| 11805 | #endif |
| 11806 | jmp MterpCommonFallback |
| 11807 | |
| 11808 | common_exceptionThrown: |
| 11809 | EXPORT_PC |
| 11810 | #if MTERP_LOGGING |
| 11811 | movq rSELF, OUT_ARG0 |
| 11812 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11813 | call SYMBOL(MterpLogExceptionThrownException) |
| 11814 | #endif |
| 11815 | jmp MterpCommonFallback |
| 11816 | |
| 11817 | MterpSuspendFallback: |
| 11818 | EXPORT_PC |
| 11819 | #if MTERP_LOGGING |
| 11820 | movq rSELF, OUT_ARG0 |
| 11821 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 11822 | movl THREAD_FLAGS_OFFSET(OUT_ARG0), OUT_32_ARG2 |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 11823 | call SYMBOL(MterpLogSuspendFallback) |
| 11824 | #endif |
| 11825 | jmp MterpCommonFallback |
| 11826 | |
| 11827 | /* |
| 11828 | * If we're here, something is out of the ordinary. If there is a pending |
| 11829 | * exception, handle it. Otherwise, roll back and retry with the reference |
| 11830 | * interpreter. |
| 11831 | */ |
| 11832 | MterpPossibleException: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 11833 | movq rSELF, %rcx |
| 11834 | cmpq $0, THREAD_EXCEPTION_OFFSET(%rcx) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 11835 | jz MterpFallback |
| 11836 | /* intentional fallthrough - handle pending exception. */ |
| 11837 | |
| 11838 | /* |
| 11839 | * On return from a runtime helper routine, we've found a pending exception. |
| 11840 | * Can we handle it here - or need to bail out to caller? |
| 11841 | * |
| 11842 | */ |
| 11843 | MterpException: |
| 11844 | movq rSELF, OUT_ARG0 |
| 11845 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11846 | call SYMBOL(MterpHandleException) |
| 11847 | testb %al, %al |
| 11848 | jz MterpExceptionReturn |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 11849 | movq OFF_FP_CODE_ITEM(rFP), %rax |
| 11850 | mov OFF_FP_DEX_PC(rFP), %ecx |
| 11851 | leaq CODEITEM_INSNS_OFFSET(%rax), rPC |
| 11852 | leaq (rPC, %rcx, 2), rPC |
| 11853 | movq rPC, OFF_FP_DEX_PC_PTR(rFP) |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 11854 | /* Do we need to switch interpreters? */ |
| 11855 | call SYMBOL(MterpShouldSwitchInterpreters) |
| 11856 | testb %al, %al |
| 11857 | jnz MterpFallback |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 11858 | /* resume execution at catch block */ |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 11859 | REFRESH_IBASE |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 11860 | FETCH_INST |
| 11861 | GOTO_NEXT |
| 11862 | /* NOTE: no fallthrough */ |
| 11863 | |
| 11864 | /* |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 11865 | * Common handling for branches with support for Jit profiling. |
| 11866 | * On entry: |
| 11867 | * rINST <= signed offset |
| 11868 | * rPROFILE <= signed hotness countdown (expanded to 32 bits) |
| 11869 | * condition bits <= set to establish sign of offset (use "NoFlags" entry if not) |
| 11870 | * |
| 11871 | * We have quite a few different cases for branch profiling, OSR detection and |
| 11872 | * suspend check support here. |
| 11873 | * |
| 11874 | * Taken backward branches: |
| 11875 | * If profiling active, do hotness countdown and report if we hit zero. |
| 11876 | * If in osr check mode, see if our target is a compiled loop header entry and do OSR if so. |
| 11877 | * Is there a pending suspend request? If so, suspend. |
| 11878 | * |
| 11879 | * Taken forward branches and not-taken backward branches: |
| 11880 | * If in osr check mode, see if our target is a compiled loop header entry and do OSR if so. |
| 11881 | * |
| 11882 | * Our most common case is expected to be a taken backward branch with active jit profiling, |
| 11883 | * but no full OSR check and no pending suspend request. |
| 11884 | * Next most common case is not-taken branch with no full OSR check. |
| 11885 | * |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 11886 | */ |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 11887 | MterpCommonTakenBranch: |
| 11888 | jg .L_forward_branch # don't add forward branches to hotness |
| 11889 | /* |
| 11890 | * We need to subtract 1 from positive values and we should not see 0 here, |
| 11891 | * so we may use the result of the comparison with -1. |
| 11892 | */ |
| 11893 | #if JIT_CHECK_OSR != -1 |
| 11894 | # error "JIT_CHECK_OSR must be -1." |
| 11895 | #endif |
| 11896 | cmpl $JIT_CHECK_OSR, rPROFILE |
| 11897 | je .L_osr_check |
| 11898 | decl rPROFILE |
| 11899 | je .L_add_batch # counted down to zero - report |
| 11900 | .L_resume_backward_branch: |
| 11901 | movq rSELF, %rax |
| 11902 | testl $(THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%rax) |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 11903 | REFRESH_IBASE |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 11904 | leaq (rPC, rINSTq, 2), rPC |
| 11905 | FETCH_INST |
| 11906 | jnz .L_suspend_request_pending |
| 11907 | GOTO_NEXT |
| 11908 | |
| 11909 | .L_suspend_request_pending: |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 11910 | EXPORT_PC |
| 11911 | movq rSELF, OUT_ARG0 |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 11912 | call SYMBOL(MterpSuspendCheck) # (self) |
| 11913 | testb %al, %al |
| 11914 | jnz MterpFallback |
| 11915 | REFRESH_IBASE # might have changed during suspend |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 11916 | GOTO_NEXT |
| 11917 | |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 11918 | .L_no_count_backwards: |
| 11919 | cmpl $JIT_CHECK_OSR, rPROFILE # possible OSR re-entry? |
| 11920 | jne .L_resume_backward_branch |
| 11921 | .L_osr_check: |
| 11922 | EXPORT_PC |
| 11923 | movq rSELF, OUT_ARG0 |
| 11924 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11925 | movq rINSTq, OUT_ARG2 |
| 11926 | call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) |
| 11927 | testb %al, %al |
| 11928 | jz .L_resume_backward_branch |
| 11929 | jmp MterpOnStackReplacement |
| 11930 | |
| 11931 | .L_forward_branch: |
| 11932 | cmpl $JIT_CHECK_OSR, rPROFILE # possible OSR re-entry? |
| 11933 | je .L_check_osr_forward |
| 11934 | .L_resume_forward_branch: |
| 11935 | leaq (rPC, rINSTq, 2), rPC |
| 11936 | FETCH_INST |
| 11937 | GOTO_NEXT |
| 11938 | |
| 11939 | .L_check_osr_forward: |
| 11940 | EXPORT_PC |
| 11941 | movq rSELF, OUT_ARG0 |
| 11942 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11943 | movq rINSTq, OUT_ARG2 |
| 11944 | call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) |
| 11945 | testb %al, %al |
| 11946 | jz .L_resume_forward_branch |
| 11947 | jmp MterpOnStackReplacement |
| 11948 | |
| 11949 | .L_add_batch: |
| 11950 | movl rPROFILE, %eax |
| 11951 | movq OFF_FP_METHOD(rFP), OUT_ARG0 |
| 11952 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11953 | movw %ax, OFF_FP_COUNTDOWN_OFFSET(rFP) |
| 11954 | movq rSELF, OUT_ARG2 |
| 11955 | call SYMBOL(MterpAddHotnessBatch) # (method, shadow_frame, self) |
| 11956 | movswl %ax, rPROFILE |
| 11957 | jmp .L_no_count_backwards |
| 11958 | |
| 11959 | /* |
| 11960 | * Entered from the conditional branch handlers when OSR check request active on |
| 11961 | * not-taken path. All Dalvik not-taken conditional branch offsets are 2. |
| 11962 | */ |
| 11963 | .L_check_not_taken_osr: |
| 11964 | movq rSELF, OUT_ARG0 |
| 11965 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11966 | movl $2, OUT_32_ARG2 |
| 11967 | call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) |
| 11968 | testb %al, %al |
| 11969 | jnz MterpOnStackReplacement |
| 11970 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |
| 11971 | |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 11972 | /* |
Serguei Katkov | c8705a7 | 2016-02-26 13:00:40 +0600 | [diff] [blame] | 11973 | * On-stack replacement has happened, and now we've returned from the compiled method. |
| 11974 | */ |
| 11975 | MterpOnStackReplacement: |
| 11976 | #if MTERP_LOGGING |
| 11977 | movq rSELF, OUT_ARG0 |
| 11978 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11979 | movl rINST, OUT_32_ARG2 |
| 11980 | call SYMBOL(MterpLogOSR) |
| 11981 | #endif |
| 11982 | movl $1, %eax |
| 11983 | jmp MterpDone |
| 11984 | |
| 11985 | /* |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 11986 | * Bail out to reference interpreter. |
| 11987 | */ |
| 11988 | MterpFallback: |
| 11989 | EXPORT_PC |
| 11990 | #if MTERP_LOGGING |
| 11991 | movq rSELF, OUT_ARG0 |
| 11992 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 11993 | call SYMBOL(MterpLogFallback) |
| 11994 | #endif |
| 11995 | MterpCommonFallback: |
| 11996 | xorl %eax, %eax |
| 11997 | jmp MterpDone |
| 11998 | |
| 11999 | /* |
| 12000 | * On entry: |
| 12001 | * uint32_t* rFP (should still be live, pointer to base of vregs) |
| 12002 | */ |
| 12003 | MterpExceptionReturn: |
| 12004 | movl $1, %eax |
| 12005 | jmp MterpDone |
| 12006 | MterpReturn: |
| 12007 | movq OFF_FP_RESULT_REGISTER(rFP), %rdx |
| 12008 | movq %rax, (%rdx) |
| 12009 | movl $1, %eax |
| 12010 | MterpDone: |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 12011 | /* |
| 12012 | * At this point, we expect rPROFILE to be non-zero. If negative, hotness is disabled or we're |
| 12013 | * checking for OSR. If greater than zero, we might have unreported hotness to register |
| 12014 | * (the difference between the ending rPROFILE and the cached hotness counter). rPROFILE |
| 12015 | * should only reach zero immediately after a hotness decrement, and is then reset to either |
| 12016 | * a negative special state or the new non-zero countdown value. |
| 12017 | */ |
| 12018 | testl rPROFILE, rPROFILE |
| 12019 | jle MRestoreFrame # if > 0, we may have some counts to report. |
| 12020 | |
| 12021 | movl %eax, rINST # stash return value |
| 12022 | /* Report cached hotness counts */ |
| 12023 | movl rPROFILE, %eax |
| 12024 | movq OFF_FP_METHOD(rFP), OUT_ARG0 |
| 12025 | leaq OFF_FP_SHADOWFRAME(rFP), OUT_ARG1 |
| 12026 | movw %ax, OFF_FP_COUNTDOWN_OFFSET(rFP) |
| 12027 | movq rSELF, OUT_ARG2 |
| 12028 | call SYMBOL(MterpAddHotnessBatch) # (method, shadow_frame, self) |
| 12029 | movl rINST, %eax # restore return value |
| 12030 | |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 12031 | /* pop up frame */ |
Bill Buzbee | 9afaac4 | 2016-04-04 16:59:35 +0000 | [diff] [blame] | 12032 | MRestoreFrame: |
Serguei Katkov | 6cbe081 | 2016-03-01 16:10:48 +0600 | [diff] [blame] | 12033 | addq $FRAME_SIZE, %rsp |
| 12034 | .cfi_adjust_cfa_offset -FRAME_SIZE |
| 12035 | |
| 12036 | /* Restore callee save register */ |
| 12037 | POP %r15 |
| 12038 | POP %r14 |
| 12039 | POP %r13 |
| 12040 | POP %r12 |
| 12041 | POP %rbp |
| 12042 | POP %rbx |
| 12043 | ret |
| 12044 | .cfi_endproc |
| 12045 | SIZE(ExecuteMterpImpl,ExecuteMterpImpl) |
| 12046 | |