Blame - compiler/dex/quick/arm64/assemble_arm64.cc - platform/art

Matteo Franchin

43ec873

2014-03-31 15:00:14 +0100

[diff] [blame^]

/*

*

* Licensed under the Apache License, Version 2.0 (the "License");

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* you may not use this file except in compliance with the License.

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* You may obtain a copy of the License at

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*

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* http://www.apache.org/licenses/LICENSE-2.0

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*

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* Unless required by applicable law or agreed to in writing, software

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* distributed under the License is distributed on an "AS IS" BASIS,

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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

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* See the License for the specific language governing permissions and

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* limitations under the License.

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*/

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#include "arm64_lir.h"

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#include "codegen_arm64.h"

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#include "dex/quick/mir_to_lir-inl.h"

namespace art {

/*

* opcode: ArmOpcode enum

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* skeleton: pre-designated bit-pattern for this opcode

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* k0: key to applying ds/de

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* ds: dest start bit position

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* de: dest end bit position

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* k1: key to applying s1s/s1e

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* s1s: src1 start bit position

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* s1e: src1 end bit position

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* k2: key to applying s2s/s2e

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* s2s: src2 start bit position

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* s2e: src2 end bit position

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* operands: number of operands (for sanity check purposes)

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* name: mnemonic name

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* fmt: for pretty-printing

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*/

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#define ENCODING_MAP(opcode, skeleton, k0, ds, de, k1, s1s, s1e, k2, s2s, s2e, \

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k3, k3s, k3e, flags, name, fmt, size, fixup) \

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{skeleton, {{k0, ds, de}, {k1, s1s, s1e}, {k2, s2s, s2e}, \

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{k3, k3s, k3e}}, opcode, flags, name, fmt, size, fixup}

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/* Instruction dump string format keys: !pf, where "!" is the start

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* of the key, "p" is which numeric operand to use and "f" is the

* print format.

*

* [p]ositions:

* 0 -> operands[0] (dest)

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* 1 -> operands[1] (src1)

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* 2 -> operands[2] (src2)

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* 3 -> operands[3] (extra)

*

* [f]ormats:

* h -> 4-digit hex

* d -> decimal

* E -> decimal*4

* F -> decimal*2

* c -> branch condition (beq, bne, etc.)

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* t -> pc-relative target

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* u -> 1st half of bl[x] target

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* v -> 2nd half ob bl[x] target

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* R -> register list

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* s -> single precision floating point register

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* S -> double precision floating point register

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* m -> Thumb2 modified immediate

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* n -> complimented Thumb2 modified immediate

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* M -> Thumb2 16-bit zero-extended immediate

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* b -> 4-digit binary

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* B -> dmb option string (sy, st, ish, ishst, nsh, hshst)

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* H -> operand shift

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* C -> core register name

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* P -> fp cs register list (base of s16)

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* Q -> fp cs register list (base of s0)

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*

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* [!] escape. To insert "!", use "!!"

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*/

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/* NOTE: must be kept in sync with enum ArmOpcode from LIR.h */

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const ArmEncodingMap Arm64Mir2Lir::EncodingMap[kArmLast] = {

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ENCODING_MAP(kArm16BitData, 0x0000,

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kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_UNARY_OP, "data", "0x!0h(!0d)", 2, kFixupNone),

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ENCODING_MAP(kThumbAdcRR, 0x4140,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES | USES_CCODES,

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"adcs", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbAddRRI3, 0x1c00,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 8, 6,

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kFmtUnused, -1, -1,

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IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES,

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"adds", "!0C, !1C, #!2d", 2, kFixupNone),

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ENCODING_MAP(kThumbAddRI8, 0x3000,

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kFmtBitBlt, 10, 8, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE0 | SETS_CCODES,

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"adds", "!0C, !0C, #!1d", 2, kFixupNone),

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ENCODING_MAP(kThumbAddRRR, 0x1800,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 8, 6,

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kFmtUnused, -1, -1,

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IS_TERTIARY_OP | REG_DEF0_USE12 | SETS_CCODES,

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"adds", "!0C, !1C, !2C", 2, kFixupNone),

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ENCODING_MAP(kThumbAddRRLH, 0x4440,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE01,

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"add", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbAddRRHL, 0x4480,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE01,

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"add", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbAddRRHH, 0x44c0,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE01,

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"add", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbAddPcRel, 0xa000,

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kFmtBitBlt, 10, 8, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_TERTIARY_OP | IS_BRANCH | NEEDS_FIXUP,

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"add", "!0C, pc, #!1E", 2, kFixupLoad),

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ENCODING_MAP(kThumbAddSpRel, 0xa800,

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kFmtBitBlt, 10, 8, kFmtSkip, -1, -1, kFmtBitBlt, 7, 0,

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kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF_SP | REG_USE_SP,

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"add", "!0C, sp, #!2E", 2, kFixupNone),

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ENCODING_MAP(kThumbAddSpI7, 0xb000,

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kFmtBitBlt, 6, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_UNARY_OP | REG_DEF_SP | REG_USE_SP,

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"add", "sp, #!0d*4", 2, kFixupNone),

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ENCODING_MAP(kThumbAndRR, 0x4000,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES,

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"ands", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbAsrRRI5, 0x1000,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 10, 6,

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kFmtUnused, -1, -1,

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IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES,

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"asrs", "!0C, !1C, #!2d", 2, kFixupNone),

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ENCODING_MAP(kThumbAsrRR, 0x4100,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES,

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"asrs", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbBCond, 0xd000,

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kFmtBitBlt, 7, 0, kFmtBitBlt, 11, 8, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | USES_CCODES |

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NEEDS_FIXUP, "b!1c", "!0t", 2, kFixupCondBranch),

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ENCODING_MAP(kThumbBUncond, 0xe000,

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kFmtBitBlt, 10, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | NEEDS_FIXUP,

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"b", "!0t", 2, kFixupT1Branch),

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ENCODING_MAP(kThumbBicRR, 0x4380,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES,

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"bics", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbBkpt, 0xbe00,

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kFmtBitBlt, 7, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH,

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"bkpt", "!0d", 2, kFixupNone),

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ENCODING_MAP(kThumbBlx1, 0xf000,

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kFmtBitBlt, 10, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_DEF_LR |

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NEEDS_FIXUP, "blx_1", "!0u", 2, kFixupBlx1),

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ENCODING_MAP(kThumbBlx2, 0xe800,

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kFmtBitBlt, 10, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_DEF_LR |

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NEEDS_FIXUP, "blx_2", "!0v", 2, kFixupLabel),

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ENCODING_MAP(kThumbBl1, 0xf000,

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kFmtBitBlt, 10, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_DEF_LR | NEEDS_FIXUP,

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"bl_1", "!0u", 2, kFixupBl1),

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ENCODING_MAP(kThumbBl2, 0xf800,

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kFmtBitBlt, 10, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_DEF_LR | NEEDS_FIXUP,

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"bl_2", "!0v", 2, kFixupLabel),

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ENCODING_MAP(kThumbBlxR, 0x4780,

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kFmtBitBlt, 6, 3, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_UNARY_OP | REG_USE0 | IS_BRANCH | REG_DEF_LR,

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"blx", "!0C", 2, kFixupNone),

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ENCODING_MAP(kThumbBx, 0x4700,

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kFmtBitBlt, 6, 3, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH,

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"bx", "!0C", 2, kFixupNone),

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ENCODING_MAP(kThumbCmnRR, 0x42c0,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE01 | SETS_CCODES,

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"cmn", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbCmpRI8, 0x2800,

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kFmtBitBlt, 10, 8, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | SETS_CCODES,

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"cmp", "!0C, #!1d", 2, kFixupNone),

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ENCODING_MAP(kThumbCmpRR, 0x4280,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE01 | SETS_CCODES,

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"cmp", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbCmpLH, 0x4540,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE01 | SETS_CCODES,

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"cmp", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbCmpHL, 0x4580,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE01 | SETS_CCODES,

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"cmp", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbCmpHH, 0x45c0,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE01 | SETS_CCODES,

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"cmp", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbEorRR, 0x4040,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES,

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"eors", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbLdmia, 0xc800,

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kFmtBitBlt, 10, 8, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE0 | REG_DEF_LIST1 | IS_LOAD,

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"ldmia", "!0C!!, <!1R>", 2, kFixupNone),

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ENCODING_MAP(kThumbLdrRRI5, 0x6800,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 10, 6,

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kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD,

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"ldr", "!0C, [!1C, #!2E]", 2, kFixupNone),

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ENCODING_MAP(kThumbLdrRRR, 0x5800,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 8, 6,

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kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12 | IS_LOAD,

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"ldr", "!0C, [!1C, !2C]", 2, kFixupNone),

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ENCODING_MAP(kThumbLdrPcRel, 0x4800,

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kFmtBitBlt, 10, 8, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0 | REG_USE_PC

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| IS_LOAD | NEEDS_FIXUP, "ldr", "!0C, [pc, #!1E]", 2, kFixupLoad),

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ENCODING_MAP(kThumbLdrSpRel, 0x9800,

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kFmtBitBlt, 10, 8, kFmtSkip, -1, -1, kFmtBitBlt, 7, 0,

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kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0 | REG_USE_SP

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| IS_LOAD, "ldr", "!0C, [sp, #!2E]", 2, kFixupNone),

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ENCODING_MAP(kThumbLdrbRRI5, 0x7800,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 10, 6,

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kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD,

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"ldrb", "!0C, [!1C, #2d]", 2, kFixupNone),

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ENCODING_MAP(kThumbLdrbRRR, 0x5c00,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 8, 6,

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kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12 | IS_LOAD,

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"ldrb", "!0C, [!1C, !2C]", 2, kFixupNone),

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ENCODING_MAP(kThumbLdrhRRI5, 0x8800,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 10, 6,

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kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD,

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"ldrh", "!0C, [!1C, #!2F]", 2, kFixupNone),

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ENCODING_MAP(kThumbLdrhRRR, 0x5a00,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 8, 6,

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kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12 | IS_LOAD,

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"ldrh", "!0C, [!1C, !2C]", 2, kFixupNone),

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ENCODING_MAP(kThumbLdrsbRRR, 0x5600,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 8, 6,

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kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12 | IS_LOAD,

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"ldrsb", "!0C, [!1C, !2C]", 2, kFixupNone),

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ENCODING_MAP(kThumbLdrshRRR, 0x5e00,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 8, 6,

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kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12 | IS_LOAD,

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"ldrsh", "!0C, [!1C, !2C]", 2, kFixupNone),

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ENCODING_MAP(kThumbLslRRI5, 0x0000,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 10, 6,

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kFmtUnused, -1, -1,

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IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES,

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"lsls", "!0C, !1C, #!2d", 2, kFixupNone),

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ENCODING_MAP(kThumbLslRR, 0x4080,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES,

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"lsls", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbLsrRRI5, 0x0800,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 10, 6,

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kFmtUnused, -1, -1,

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IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES,

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"lsrs", "!0C, !1C, #!2d", 2, kFixupNone),

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ENCODING_MAP(kThumbLsrRR, 0x40c0,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES,

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"lsrs", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbMovImm, 0x2000,

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kFmtBitBlt, 10, 8, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0 | SETS_CCODES,

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"movs", "!0C, #!1d", 2, kFixupNone),

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ENCODING_MAP(kThumbMovRR, 0x1c00,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE1 | SETS_CCODES,

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"movs", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbMovRR_H2H, 0x46c0,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

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"mov", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbMovRR_H2L, 0x4640,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

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"mov", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbMovRR_L2H, 0x4680,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

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"mov", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbMul, 0x4340,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES,

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"muls", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbMvn, 0x43c0,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE1 | SETS_CCODES,

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"mvns", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbNeg, 0x4240,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE1 | SETS_CCODES,

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"negs", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbOrr, 0x4300,

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kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

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kFmtUnused, -1, -1,

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IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES,

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"orrs", "!0C, !1C", 2, kFixupNone),

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ENCODING_MAP(kThumbPop, 0xbc00,

321

kFmtBitBlt, 8, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

322

kFmtUnused, -1, -1,

323

IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_DEF_LIST0

324

| IS_LOAD, "pop", "<!0R>", 2, kFixupNone),

325

ENCODING_MAP(kThumbPush, 0xb400,

326

kFmtBitBlt, 8, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

327

kFmtUnused, -1, -1,

328

IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_USE_LIST0

329

| IS_STORE, "push", "<!0R>", 2, kFixupNone),

330

ENCODING_MAP(kThumbRev, 0xba00,

331

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

332

kFmtUnused, -1, -1,

333

IS_BINARY_OP | REG_DEF0_USE1,

334

"rev", "!0C, !1C", 2, kFixupNone),

335

ENCODING_MAP(kThumbRevsh, 0xbac0,

336

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

337

kFmtUnused, -1, -1,

338

IS_BINARY_OP | REG_DEF0_USE1,

339

"rev", "!0C, !1C", 2, kFixupNone),

340

ENCODING_MAP(kThumbRorRR, 0x41c0,

341

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

342

kFmtUnused, -1, -1,

343

IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES,

344

"rors", "!0C, !1C", 2, kFixupNone),

345

ENCODING_MAP(kThumbSbc, 0x4180,

346

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

347

kFmtUnused, -1, -1,

348

IS_BINARY_OP | REG_DEF0_USE01 | USES_CCODES | SETS_CCODES,

349

"sbcs", "!0C, !1C", 2, kFixupNone),

350

ENCODING_MAP(kThumbStmia, 0xc000,

351

kFmtBitBlt, 10, 8, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1,

352

kFmtUnused, -1, -1,

353

IS_BINARY_OP | REG_DEF0 | REG_USE0 | REG_USE_LIST1 | IS_STORE,

354

"stmia", "!0C!!, <!1R>", 2, kFixupNone),

355

ENCODING_MAP(kThumbStrRRI5, 0x6000,

356

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 10, 6,

357

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE01 | IS_STORE,

358

"str", "!0C, [!1C, #!2E]", 2, kFixupNone),

359

ENCODING_MAP(kThumbStrRRR, 0x5000,

360

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 8, 6,

361

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE012 | IS_STORE,

362

"str", "!0C, [!1C, !2C]", 2, kFixupNone),

363

ENCODING_MAP(kThumbStrSpRel, 0x9000,

364

kFmtBitBlt, 10, 8, kFmtSkip, -1, -1, kFmtBitBlt, 7, 0,

365

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE0 | REG_USE_SP

366

| IS_STORE, "str", "!0C, [sp, #!2E]", 2, kFixupNone),

367

ENCODING_MAP(kThumbStrbRRI5, 0x7000,

368

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 10, 6,

369

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE01 | IS_STORE,

370

"strb", "!0C, [!1C, #!2d]", 2, kFixupNone),

371

ENCODING_MAP(kThumbStrbRRR, 0x5400,

372

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 8, 6,

373

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE012 | IS_STORE,

374

"strb", "!0C, [!1C, !2C]", 2, kFixupNone),

375

ENCODING_MAP(kThumbStrhRRI5, 0x8000,

376

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 10, 6,

377

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE01 | IS_STORE,

378

"strh", "!0C, [!1C, #!2F]", 2, kFixupNone),

379

ENCODING_MAP(kThumbStrhRRR, 0x5200,

380

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 8, 6,

381

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE012 | IS_STORE,

382

"strh", "!0C, [!1C, !2C]", 2, kFixupNone),

383

ENCODING_MAP(kThumbSubRRI3, 0x1e00,

384

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 8, 6,

385

kFmtUnused, -1, -1,

386

IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES,

387

"subs", "!0C, !1C, #!2d", 2, kFixupNone),

388

ENCODING_MAP(kThumbSubRI8, 0x3800,

389

kFmtBitBlt, 10, 8, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1,

390

kFmtUnused, -1, -1,

391

IS_BINARY_OP | REG_DEF0_USE0 | SETS_CCODES,

392

"subs", "!0C, #!1d", 2, kFixupNone),

393

ENCODING_MAP(kThumbSubRRR, 0x1a00,

394

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtBitBlt, 8, 6,

395

kFmtUnused, -1, -1,

396

IS_TERTIARY_OP | REG_DEF0_USE12 | SETS_CCODES,

397

"subs", "!0C, !1C, !2C", 2, kFixupNone),

398

ENCODING_MAP(kThumbSubSpI7, 0xb080,

399

kFmtBitBlt, 6, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

400

kFmtUnused, -1, -1,

401

IS_UNARY_OP | REG_DEF_SP | REG_USE_SP,

402

"sub", "sp, #!0d*4", 2, kFixupNone),

403

ENCODING_MAP(kThumbSwi, 0xdf00,

404

kFmtBitBlt, 7, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

405

kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH,

406

"swi", "!0d", 2, kFixupNone),

407

ENCODING_MAP(kThumbTst, 0x4200,

408

kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1,

409

kFmtUnused, -1, -1, IS_UNARY_OP | REG_USE01 | SETS_CCODES,

410

"tst", "!0C, !1C", 2, kFixupNone),

411

/*

412

* Note: The encoding map entries for vldrd and vldrs include REG_DEF_LR, even though

413

* these instructions don't define lr. The reason is that these instructions

414

* are used for loading values from the literal pool, and the displacement may be found

415

* to be insuffient at assembly time. In that case, we need to materialize a new base

416

* register - and will use lr as the temp register. This works because lr is used as

417

* a temp register in very limited situations, and never in conjunction with a floating

418

* point constant load. However, it is possible that during instruction scheduling,

419

* another use of lr could be moved across a vldrd/vldrs. By setting REG_DEF_LR, we

420

* prevent that from happening. Note that we set REG_DEF_LR on all vldrd/vldrs - even those

421

* not used in a pc-relative case. It is really only needed on the pc-relative loads, but

422

* the case we're handling is rare enough that it seemed not worth the trouble to distinguish.

423

*/

424

ENCODING_MAP(kThumb2Vldrs, 0xed900a00,

425

kFmtSfp, 22, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 7, 0,

426

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD |

427

REG_DEF_LR | NEEDS_FIXUP, "vldr", "!0s, [!1C, #!2E]", 4, kFixupVLoad),

428

ENCODING_MAP(kThumb2Vldrd, 0xed900b00,

429

kFmtDfp, 22, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 7, 0,

430

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD |

431

REG_DEF_LR | NEEDS_FIXUP, "vldr", "!0S, [!1C, #!2E]", 4, kFixupVLoad),

432

ENCODING_MAP(kThumb2Vmuls, 0xee200a00,

433

kFmtSfp, 22, 12, kFmtSfp, 7, 16, kFmtSfp, 5, 0,

434

kFmtUnused, -1, -1,

435

IS_TERTIARY_OP | REG_DEF0_USE12,

436

"vmuls", "!0s, !1s, !2s", 4, kFixupNone),

437

ENCODING_MAP(kThumb2Vmuld, 0xee200b00,

438

kFmtDfp, 22, 12, kFmtDfp, 7, 16, kFmtDfp, 5, 0,

439

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

440

"vmuld", "!0S, !1S, !2S", 4, kFixupNone),

441

ENCODING_MAP(kThumb2Vstrs, 0xed800a00,

442

kFmtSfp, 22, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 7, 0,

443

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE01 | IS_STORE,

444

"vstr", "!0s, [!1C, #!2E]", 4, kFixupNone),

445

ENCODING_MAP(kThumb2Vstrd, 0xed800b00,

446

kFmtDfp, 22, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 7, 0,

447

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE01 | IS_STORE,

448

"vstr", "!0S, [!1C, #!2E]", 4, kFixupNone),

449

ENCODING_MAP(kThumb2Vsubs, 0xee300a40,

450

kFmtSfp, 22, 12, kFmtSfp, 7, 16, kFmtSfp, 5, 0,

451

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

452

"vsub", "!0s, !1s, !2s", 4, kFixupNone),

453

ENCODING_MAP(kThumb2Vsubd, 0xee300b40,

454

kFmtDfp, 22, 12, kFmtDfp, 7, 16, kFmtDfp, 5, 0,

455

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

456

"vsub", "!0S, !1S, !2S", 4, kFixupNone),

457

ENCODING_MAP(kThumb2Vadds, 0xee300a00,

458

kFmtSfp, 22, 12, kFmtSfp, 7, 16, kFmtSfp, 5, 0,

459

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

460

"vadd", "!0s, !1s, !2s", 4, kFixupNone),

461

ENCODING_MAP(kThumb2Vaddd, 0xee300b00,

462

kFmtDfp, 22, 12, kFmtDfp, 7, 16, kFmtDfp, 5, 0,

463

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

464

"vadd", "!0S, !1S, !2S", 4, kFixupNone),

465

ENCODING_MAP(kThumb2Vdivs, 0xee800a00,

466

kFmtSfp, 22, 12, kFmtSfp, 7, 16, kFmtSfp, 5, 0,

467

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

468

"vdivs", "!0s, !1s, !2s", 4, kFixupNone),

469

ENCODING_MAP(kThumb2Vdivd, 0xee800b00,

470

kFmtDfp, 22, 12, kFmtDfp, 7, 16, kFmtDfp, 5, 0,

471

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

472

"vdivd", "!0S, !1S, !2S", 4, kFixupNone),

473

ENCODING_MAP(kThumb2VmlaF64, 0xee000b00,

474

kFmtDfp, 22, 12, kFmtDfp, 7, 16, kFmtDfp, 5, 0,

475

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0 | REG_USE012,

476

"vmla", "!0S, !1S, !2S", 4, kFixupNone),

477

ENCODING_MAP(kThumb2VcvtIF, 0xeeb80ac0,

478

kFmtSfp, 22, 12, kFmtSfp, 5, 0, kFmtUnused, -1, -1,

479

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

480

"vcvt.f32.s32", "!0s, !1s", 4, kFixupNone),

481

ENCODING_MAP(kThumb2VcvtFI, 0xeebd0ac0,

482

kFmtSfp, 22, 12, kFmtSfp, 5, 0, kFmtUnused, -1, -1,

483

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

484

"vcvt.s32.f32 ", "!0s, !1s", 4, kFixupNone),

485

ENCODING_MAP(kThumb2VcvtDI, 0xeebd0bc0,

486

kFmtSfp, 22, 12, kFmtDfp, 5, 0, kFmtUnused, -1, -1,

487

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

488

"vcvt.s32.f64 ", "!0s, !1S", 4, kFixupNone),

489

ENCODING_MAP(kThumb2VcvtFd, 0xeeb70ac0,

490

kFmtDfp, 22, 12, kFmtSfp, 5, 0, kFmtUnused, -1, -1,

491

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

492

"vcvt.f64.f32 ", "!0S, !1s", 4, kFixupNone),

493

ENCODING_MAP(kThumb2VcvtDF, 0xeeb70bc0,

494

kFmtSfp, 22, 12, kFmtDfp, 5, 0, kFmtUnused, -1, -1,

495

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

496

"vcvt.f32.f64 ", "!0s, !1S", 4, kFixupNone),

497

ENCODING_MAP(kThumb2VcvtF64S32, 0xeeb80bc0,

498

kFmtDfp, 22, 12, kFmtSfp, 5, 0, kFmtUnused, -1, -1,

499

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

500

"vcvt.f64.s32 ", "!0S, !1s", 4, kFixupNone),

501

ENCODING_MAP(kThumb2VcvtF64U32, 0xeeb80b40,

502

kFmtDfp, 22, 12, kFmtSfp, 5, 0, kFmtUnused, -1, -1,

503

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

504

"vcvt.f64.u32 ", "!0S, !1s", 4, kFixupNone),

505

ENCODING_MAP(kThumb2Vsqrts, 0xeeb10ac0,

506

kFmtSfp, 22, 12, kFmtSfp, 5, 0, kFmtUnused, -1, -1,

507

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

508

"vsqrt.f32 ", "!0s, !1s", 4, kFixupNone),

509

ENCODING_MAP(kThumb2Vsqrtd, 0xeeb10bc0,

510

kFmtDfp, 22, 12, kFmtDfp, 5, 0, kFmtUnused, -1, -1,

511

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

512

"vsqrt.f64 ", "!0S, !1S", 4, kFixupNone),

513

ENCODING_MAP(kThumb2MovI8M, 0xf04f0000, /* no setflags encoding */

514

kFmtBitBlt, 11, 8, kFmtModImm, -1, -1, kFmtUnused, -1, -1,

515

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0,

516

"mov", "!0C, #!1m", 4, kFixupNone),

517

ENCODING_MAP(kThumb2MovImm16, 0xf2400000,

518

kFmtBitBlt, 11, 8, kFmtImm16, -1, -1, kFmtUnused, -1, -1,

519

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0,

520

"mov", "!0C, #!1M", 4, kFixupNone),

521

ENCODING_MAP(kThumb2StrRRI12, 0xf8c00000,

522

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 11, 0,

523

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE01 | IS_STORE,

524

"str", "!0C, [!1C, #!2d]", 4, kFixupNone),

525

ENCODING_MAP(kThumb2LdrRRI12, 0xf8d00000,

526

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 11, 0,

527

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD,

528

"ldr", "!0C, [!1C, #!2d]", 4, kFixupNone),

529

ENCODING_MAP(kThumb2StrRRI8Predec, 0xf8400c00,

530

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 8, 0,

531

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE01 | IS_STORE,

532

"str", "!0C, [!1C, #-!2d]", 4, kFixupNone),

533

ENCODING_MAP(kThumb2LdrRRI8Predec, 0xf8500c00,

534

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 8, 0,

535

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD,

536

"ldr", "!0C, [!1C, #-!2d]", 4, kFixupNone),

537

ENCODING_MAP(kThumb2Cbnz, 0xb900, /* Note: does not affect flags */

538

kFmtBitBlt, 2, 0, kFmtImm6, -1, -1, kFmtUnused, -1, -1,

539

kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | IS_BRANCH |

540

NEEDS_FIXUP, "cbnz", "!0C,!1t", 2, kFixupCBxZ),

541

ENCODING_MAP(kThumb2Cbz, 0xb100, /* Note: does not affect flags */

542

kFmtBitBlt, 2, 0, kFmtImm6, -1, -1, kFmtUnused, -1, -1,

543

kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | IS_BRANCH |

544

NEEDS_FIXUP, "cbz", "!0C,!1t", 2, kFixupCBxZ),

545

ENCODING_MAP(kThumb2AddRRI12, 0xf2000000,

546

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtImm12, -1, -1,

547

kFmtUnused, -1, -1,

548

IS_TERTIARY_OP | REG_DEF0_USE1,/* Note: doesn't affect flags */

549

"add", "!0C,!1C,#!2d", 4, kFixupNone),

550

ENCODING_MAP(kThumb2MovRR, 0xea4f0000, /* no setflags encoding */

551

kFmtBitBlt, 11, 8, kFmtBitBlt, 3, 0, kFmtUnused, -1, -1,

552

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

553

"mov", "!0C, !1C", 4, kFixupNone),

554

ENCODING_MAP(kThumb2Vmovs, 0xeeb00a40,

555

kFmtSfp, 22, 12, kFmtSfp, 5, 0, kFmtUnused, -1, -1,

556

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

557

"vmov.f32 ", " !0s, !1s", 4, kFixupNone),

558

ENCODING_MAP(kThumb2Vmovd, 0xeeb00b40,

559

kFmtDfp, 22, 12, kFmtDfp, 5, 0, kFmtUnused, -1, -1,

560

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

561

"vmov.f64 ", " !0S, !1S", 4, kFixupNone),

562

ENCODING_MAP(kThumb2Ldmia, 0xe8900000,

563

kFmtBitBlt, 19, 16, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1,

564

kFmtUnused, -1, -1,

565

IS_BINARY_OP | REG_DEF0_USE0 | REG_DEF_LIST1 | IS_LOAD,

566

"ldmia", "!0C!!, <!1R>", 4, kFixupNone),

567

ENCODING_MAP(kThumb2Stmia, 0xe8800000,

568

kFmtBitBlt, 19, 16, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1,

569

kFmtUnused, -1, -1,

570

IS_BINARY_OP | REG_DEF0_USE0 | REG_USE_LIST1 | IS_STORE,

571

"stmia", "!0C!!, <!1R>", 4, kFixupNone),

572

ENCODING_MAP(kThumb2AddRRR, 0xeb100000, /* setflags encoding */

573

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

574

kFmtShift, -1, -1,

575

IS_QUAD_OP | REG_DEF0_USE12 | SETS_CCODES,

576

"adds", "!0C, !1C, !2C!3H", 4, kFixupNone),

577

ENCODING_MAP(kThumb2SubRRR, 0xebb00000, /* setflags enconding */

578

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

579

kFmtShift, -1, -1,

580

IS_QUAD_OP | REG_DEF0_USE12 | SETS_CCODES,

581

"subs", "!0C, !1C, !2C!3H", 4, kFixupNone),

582

ENCODING_MAP(kThumb2SbcRRR, 0xeb700000, /* setflags encoding */

583

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

584

kFmtShift, -1, -1,

585

IS_QUAD_OP | REG_DEF0_USE12 | USES_CCODES | SETS_CCODES,

586

"sbcs", "!0C, !1C, !2C!3H", 4, kFixupNone),

587

ENCODING_MAP(kThumb2CmpRR, 0xebb00f00,

588

kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0, kFmtShift, -1, -1,

589

kFmtUnused, -1, -1,

590

IS_TERTIARY_OP | REG_USE01 | SETS_CCODES,

591

"cmp", "!0C, !1C", 4, kFixupNone),

592

ENCODING_MAP(kThumb2SubRRI12, 0xf2a00000,

593

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtImm12, -1, -1,

594

kFmtUnused, -1, -1,

595

IS_TERTIARY_OP | REG_DEF0_USE1,/* Note: doesn't affect flags */

596

"sub", "!0C,!1C,#!2d", 4, kFixupNone),

597

ENCODING_MAP(kThumb2MvnI8M, 0xf06f0000, /* no setflags encoding */

598

kFmtBitBlt, 11, 8, kFmtModImm, -1, -1, kFmtUnused, -1, -1,

599

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0,

600

"mvn", "!0C, #!1n", 4, kFixupNone),

601

ENCODING_MAP(kThumb2Sel, 0xfaa0f080,

602

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

603

kFmtUnused, -1, -1,

604

IS_TERTIARY_OP | REG_DEF0_USE12 | USES_CCODES,

605

"sel", "!0C, !1C, !2C", 4, kFixupNone),

606

ENCODING_MAP(kThumb2Ubfx, 0xf3c00000,

607

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtLsb, -1, -1,

608

kFmtBWidth, 4, 0, IS_QUAD_OP | REG_DEF0_USE1,

609

"ubfx", "!0C, !1C, #!2d, #!3d", 4, kFixupNone),

610

ENCODING_MAP(kThumb2Sbfx, 0xf3400000,

611

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtLsb, -1, -1,

612

kFmtBWidth, 4, 0, IS_QUAD_OP | REG_DEF0_USE1,

613

"sbfx", "!0C, !1C, #!2d, #!3d", 4, kFixupNone),

614

ENCODING_MAP(kThumb2LdrRRR, 0xf8500000,

615

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

616

kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_DEF0_USE12 | IS_LOAD,

617

"ldr", "!0C, [!1C, !2C, LSL #!3d]", 4, kFixupNone),

618

ENCODING_MAP(kThumb2LdrhRRR, 0xf8300000,

619

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

620

kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_DEF0_USE12 | IS_LOAD,

621

"ldrh", "!0C, [!1C, !2C, LSL #!3d]", 4, kFixupNone),

622

ENCODING_MAP(kThumb2LdrshRRR, 0xf9300000,

623

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

624

kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_DEF0_USE12 | IS_LOAD,

625

"ldrsh", "!0C, [!1C, !2C, LSL #!3d]", 4, kFixupNone),

626

ENCODING_MAP(kThumb2LdrbRRR, 0xf8100000,

627

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

628

kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_DEF0_USE12 | IS_LOAD,

629

"ldrb", "!0C, [!1C, !2C, LSL #!3d]", 4, kFixupNone),

630

ENCODING_MAP(kThumb2LdrsbRRR, 0xf9100000,

631

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

632

kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_DEF0_USE12 | IS_LOAD,

633

"ldrsb", "!0C, [!1C, !2C, LSL #!3d]", 4, kFixupNone),

634

ENCODING_MAP(kThumb2StrRRR, 0xf8400000,

635

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

636

kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_USE012 | IS_STORE,

637

"str", "!0C, [!1C, !2C, LSL #!3d]", 4, kFixupNone),

638

ENCODING_MAP(kThumb2StrhRRR, 0xf8200000,

639

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

640

kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_USE012 | IS_STORE,

641

"strh", "!0C, [!1C, !2C, LSL #!3d]", 4, kFixupNone),

642

ENCODING_MAP(kThumb2StrbRRR, 0xf8000000,

643

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

644

kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_USE012 | IS_STORE,

645

"strb", "!0C, [!1C, !2C, LSL #!3d]", 4, kFixupNone),

646

ENCODING_MAP(kThumb2LdrhRRI12, 0xf8b00000,

647

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 11, 0,

648

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD,

649

"ldrh", "!0C, [!1C, #!2d]", 4, kFixupNone),

650

ENCODING_MAP(kThumb2LdrshRRI12, 0xf9b00000,

651

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 11, 0,

652

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD,

653

"ldrsh", "!0C, [!1C, #!2d]", 4, kFixupNone),

654

ENCODING_MAP(kThumb2LdrbRRI12, 0xf8900000,

655

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 11, 0,

656

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD,

657

"ldrb", "!0C, [!1C, #!2d]", 4, kFixupNone),

658

ENCODING_MAP(kThumb2LdrsbRRI12, 0xf9900000,

659

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 11, 0,

660

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD,

661

"ldrsb", "!0C, [!1C, #!2d]", 4, kFixupNone),

662

ENCODING_MAP(kThumb2StrhRRI12, 0xf8a00000,

663

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 11, 0,

664

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE01 | IS_STORE,

665

"strh", "!0C, [!1C, #!2d]", 4, kFixupNone),

666

ENCODING_MAP(kThumb2StrbRRI12, 0xf8800000,

667

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 11, 0,

668

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE01 | IS_STORE,

669

"strb", "!0C, [!1C, #!2d]", 4, kFixupNone),

670

ENCODING_MAP(kThumb2Pop, 0xe8bd0000,

671

kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

672

kFmtUnused, -1, -1,

673

IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_DEF_LIST0

674

| IS_LOAD | NEEDS_FIXUP, "pop", "<!0R>", 4, kFixupPushPop),

675

ENCODING_MAP(kThumb2Push, 0xe92d0000,

676

kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

677

kFmtUnused, -1, -1,

678

IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_USE_LIST0

679

| IS_STORE | NEEDS_FIXUP, "push", "<!0R>", 4, kFixupPushPop),

680

ENCODING_MAP(kThumb2CmpRI8M, 0xf1b00f00,

681

kFmtBitBlt, 19, 16, kFmtModImm, -1, -1, kFmtUnused, -1, -1,

682

kFmtUnused, -1, -1,

683

IS_BINARY_OP | REG_USE0 | SETS_CCODES,

684

"cmp", "!0C, #!1m", 4, kFixupNone),

685

ENCODING_MAP(kThumb2CmnRI8M, 0xf1100f00,

686

kFmtBitBlt, 19, 16, kFmtModImm, -1, -1, kFmtUnused, -1, -1,

687

kFmtUnused, -1, -1,

688

IS_BINARY_OP | REG_USE0 | SETS_CCODES,

689

"cmn", "!0C, #!1m", 4, kFixupNone),

690

ENCODING_MAP(kThumb2AdcRRR, 0xeb500000, /* setflags encoding */

691

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

692

kFmtShift, -1, -1,

693

IS_QUAD_OP | REG_DEF0_USE12 | SETS_CCODES,

694

"adcs", "!0C, !1C, !2C!3H", 4, kFixupNone),

695

ENCODING_MAP(kThumb2AndRRR, 0xea000000,

696

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

697

kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,

698

"and", "!0C, !1C, !2C!3H", 4, kFixupNone),

699

ENCODING_MAP(kThumb2BicRRR, 0xea200000,

700

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

701

kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,

702

"bic", "!0C, !1C, !2C!3H", 4, kFixupNone),

703

ENCODING_MAP(kThumb2CmnRR, 0xeb000000,

704

kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0, kFmtShift, -1, -1,

705

kFmtUnused, -1, -1,

706

IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES,

707

"cmn", "!0C, !1C, shift !2d", 4, kFixupNone),

708

ENCODING_MAP(kThumb2EorRRR, 0xea800000,

709

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

710

kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,

711

"eor", "!0C, !1C, !2C!3H", 4, kFixupNone),

712

ENCODING_MAP(kThumb2MulRRR, 0xfb00f000,

713

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

714

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

715

"mul", "!0C, !1C, !2C", 4, kFixupNone),

716

ENCODING_MAP(kThumb2SdivRRR, 0xfb90f0f0,

717

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

718

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

719

"sdiv", "!0C, !1C, !2C", 4, kFixupNone),

720

ENCODING_MAP(kThumb2UdivRRR, 0xfbb0f0f0,

721

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

722

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

723

"udiv", "!0C, !1C, !2C", 4, kFixupNone),

724

ENCODING_MAP(kThumb2MnvRR, 0xea6f0000,

725

kFmtBitBlt, 11, 8, kFmtBitBlt, 3, 0, kFmtShift, -1, -1,

726

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,

727

"mvn", "!0C, !1C, shift !2d", 4, kFixupNone),

728

ENCODING_MAP(kThumb2RsubRRI8M, 0xf1d00000,

729

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtModImm, -1, -1,

730

kFmtUnused, -1, -1,

731

IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES,

732

"rsbs", "!0C,!1C,#!2m", 4, kFixupNone),

733

ENCODING_MAP(kThumb2NegRR, 0xf1d00000, /* instance of rsub */

734

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtUnused, -1, -1,

735

kFmtUnused, -1, -1,

736

IS_BINARY_OP | REG_DEF0_USE1 | SETS_CCODES,

737

"neg", "!0C,!1C", 4, kFixupNone),

738

ENCODING_MAP(kThumb2OrrRRR, 0xea400000,

739

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

740

kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12,

741

"orr", "!0C, !1C, !2C!3H", 4, kFixupNone),

742

ENCODING_MAP(kThumb2TstRR, 0xea100f00,

743

kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0, kFmtShift, -1, -1,

744

kFmtUnused, -1, -1,

745

IS_TERTIARY_OP | REG_USE01 | SETS_CCODES,

746

"tst", "!0C, !1C, shift !2d", 4, kFixupNone),

747

ENCODING_MAP(kThumb2LslRRR, 0xfa00f000,

748

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

749

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

750

"lsl", "!0C, !1C, !2C", 4, kFixupNone),

751

ENCODING_MAP(kThumb2LsrRRR, 0xfa20f000,

752

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

753

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

754

"lsr", "!0C, !1C, !2C", 4, kFixupNone),

755

ENCODING_MAP(kThumb2AsrRRR, 0xfa40f000,

756

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

757

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

758

"asr", "!0C, !1C, !2C", 4, kFixupNone),

759

ENCODING_MAP(kThumb2RorRRR, 0xfa60f000,

760

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

761

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

762

"ror", "!0C, !1C, !2C", 4, kFixupNone),

763

ENCODING_MAP(kThumb2LslRRI5, 0xea4f0000,

764

kFmtBitBlt, 11, 8, kFmtBitBlt, 3, 0, kFmtShift5, -1, -1,

765

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,

766

"lsl", "!0C, !1C, #!2d", 4, kFixupNone),

767

ENCODING_MAP(kThumb2LsrRRI5, 0xea4f0010,

768

kFmtBitBlt, 11, 8, kFmtBitBlt, 3, 0, kFmtShift5, -1, -1,

769

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,

770

"lsr", "!0C, !1C, #!2d", 4, kFixupNone),

771

ENCODING_MAP(kThumb2AsrRRI5, 0xea4f0020,

772

kFmtBitBlt, 11, 8, kFmtBitBlt, 3, 0, kFmtShift5, -1, -1,

773

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,

774

"asr", "!0C, !1C, #!2d", 4, kFixupNone),

775

ENCODING_MAP(kThumb2RorRRI5, 0xea4f0030,

776

kFmtBitBlt, 11, 8, kFmtBitBlt, 3, 0, kFmtShift5, -1, -1,

777

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,

778

"ror", "!0C, !1C, #!2d", 4, kFixupNone),

779

ENCODING_MAP(kThumb2BicRRI8M, 0xf0200000,

780

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtModImm, -1, -1,

781

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,

782

"bic", "!0C, !1C, #!2m", 4, kFixupNone),

783

ENCODING_MAP(kThumb2AndRRI8M, 0xf0000000,

784

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtModImm, -1, -1,

785

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,

786

"and", "!0C, !1C, #!2m", 4, kFixupNone),

787

ENCODING_MAP(kThumb2OrrRRI8M, 0xf0400000,

788

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtModImm, -1, -1,

789

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,

790

"orr", "!0C, !1C, #!2m", 4, kFixupNone),

791

ENCODING_MAP(kThumb2EorRRI8M, 0xf0800000,

792

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtModImm, -1, -1,

793

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,

794

"eor", "!0C, !1C, #!2m", 4, kFixupNone),

795

ENCODING_MAP(kThumb2AddRRI8M, 0xf1100000,

796

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtModImm, -1, -1,

797

kFmtUnused, -1, -1,

798

IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES,

799

"adds", "!0C, !1C, #!2m", 4, kFixupNone),

800

ENCODING_MAP(kThumb2AdcRRI8M, 0xf1500000,

801

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtModImm, -1, -1,

802

kFmtUnused, -1, -1,

803

IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES | USES_CCODES,

804

"adcs", "!0C, !1C, #!2m", 4, kFixupNone),

805

ENCODING_MAP(kThumb2SubRRI8M, 0xf1b00000,

806

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtModImm, -1, -1,

807

kFmtUnused, -1, -1,

808

IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES,

809

"subs", "!0C, !1C, #!2m", 4, kFixupNone),

810

ENCODING_MAP(kThumb2SbcRRI8M, 0xf1700000,

811

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtModImm, -1, -1,

812

kFmtUnused, -1, -1,

813

IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES | USES_CCODES,

814

"sbcs", "!0C, !1C, #!2m", 4, kFixupNone),

815

ENCODING_MAP(kThumb2RevRR, 0xfa90f080,

816

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

817

kFmtUnused, -1, -1,

818

IS_TERTIARY_OP | REG_DEF0_USE12, // Binary, but rm is stored twice.

819

"rev", "!0C, !1C", 4, kFixupNone),

820

ENCODING_MAP(kThumb2RevshRR, 0xfa90f0b0,

821

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

822

kFmtUnused, -1, -1,

823

IS_TERTIARY_OP | REG_DEF0_USE12, // Binary, but rm is stored twice.

824

"revsh", "!0C, !1C", 4, kFixupNone),

825

ENCODING_MAP(kThumb2It, 0xbf00,

826

kFmtBitBlt, 7, 4, kFmtBitBlt, 3, 0, kFmtModImm, -1, -1,

827

kFmtUnused, -1, -1, IS_BINARY_OP | IS_IT | USES_CCODES,

828

"it:!1b", "!0c", 2, kFixupNone),

829

ENCODING_MAP(kThumb2Fmstat, 0xeef1fa10,

830

kFmtUnused, -1, -1, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

831

kFmtUnused, -1, -1, NO_OPERAND | SETS_CCODES,

832

"fmstat", "", 4, kFixupNone),

833

ENCODING_MAP(kThumb2Vcmpd, 0xeeb40b40,

834

kFmtDfp, 22, 12, kFmtDfp, 5, 0, kFmtUnused, -1, -1,

835

kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE01,

836

"vcmp.f64", "!0S, !1S", 4, kFixupNone),

837

ENCODING_MAP(kThumb2Vcmps, 0xeeb40a40,

838

kFmtSfp, 22, 12, kFmtSfp, 5, 0, kFmtUnused, -1, -1,

839

kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE01,

840

"vcmp.f32", "!0s, !1s", 4, kFixupNone),

841

ENCODING_MAP(kThumb2LdrPcRel12, 0xf8df0000,

842

kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 0, kFmtUnused, -1, -1,

843

kFmtUnused, -1, -1,

844

IS_TERTIARY_OP | REG_DEF0 | REG_USE_PC | IS_LOAD | NEEDS_FIXUP,

845

"ldr", "!0C, [r15pc, #!1d]", 4, kFixupLoad),

846

ENCODING_MAP(kThumb2BCond, 0xf0008000,

847

kFmtBrOffset, -1, -1, kFmtBitBlt, 25, 22, kFmtUnused, -1, -1,

848

kFmtUnused, -1, -1,

849

IS_BINARY_OP | IS_BRANCH | USES_CCODES | NEEDS_FIXUP,

850

"b!1c", "!0t", 4, kFixupCondBranch),

851

ENCODING_MAP(kThumb2Fmrs, 0xee100a10,

852

kFmtBitBlt, 15, 12, kFmtSfp, 7, 16, kFmtUnused, -1, -1,

853

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

854

"fmrs", "!0C, !1s", 4, kFixupNone),

855

ENCODING_MAP(kThumb2Fmsr, 0xee000a10,

856

kFmtSfp, 7, 16, kFmtBitBlt, 15, 12, kFmtUnused, -1, -1,

857

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

858

"fmsr", "!0s, !1C", 4, kFixupNone),

859

ENCODING_MAP(kThumb2Fmrrd, 0xec500b10,

860

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtDfp, 5, 0,

861

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF01_USE2,

862

"fmrrd", "!0C, !1C, !2S", 4, kFixupNone),

863

ENCODING_MAP(kThumb2Fmdrr, 0xec400b10,

864

kFmtDfp, 5, 0, kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16,

865

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,

866

"fmdrr", "!0S, !1C, !2C", 4, kFixupNone),

867

ENCODING_MAP(kThumb2Vabsd, 0xeeb00bc0,

868

kFmtDfp, 22, 12, kFmtDfp, 5, 0, kFmtUnused, -1, -1,

869

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

870

"vabs.f64", "!0S, !1S", 4, kFixupNone),

871

ENCODING_MAP(kThumb2Vabss, 0xeeb00ac0,

872

kFmtSfp, 22, 12, kFmtSfp, 5, 0, kFmtUnused, -1, -1,

873

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

874

"vabs.f32", "!0s, !1s", 4, kFixupNone),

875

ENCODING_MAP(kThumb2Vnegd, 0xeeb10b40,

876

kFmtDfp, 22, 12, kFmtDfp, 5, 0, kFmtUnused, -1, -1,

877

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

878

"vneg.f64", "!0S, !1S", 4, kFixupNone),

879

ENCODING_MAP(kThumb2Vnegs, 0xeeb10a40,

880

kFmtSfp, 22, 12, kFmtSfp, 5, 0, kFmtUnused, -1, -1,

881

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,

882

"vneg.f32", "!0s, !1s", 4, kFixupNone),

883

ENCODING_MAP(kThumb2Vmovs_IMM8, 0xeeb00a00,

884

kFmtSfp, 22, 12, kFmtFPImm, 16, 0, kFmtUnused, -1, -1,

885

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0,

886

"vmov.f32", "!0s, #0x!1h", 4, kFixupNone),

887

ENCODING_MAP(kThumb2Vmovd_IMM8, 0xeeb00b00,

888

kFmtDfp, 22, 12, kFmtFPImm, 16, 0, kFmtUnused, -1, -1,

889

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0,

890

"vmov.f64", "!0S, #0x!1h", 4, kFixupNone),

891

ENCODING_MAP(kThumb2Mla, 0xfb000000,

892

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

893

kFmtBitBlt, 15, 12, IS_QUAD_OP | REG_DEF0_USE123,

894

"mla", "!0C, !1C, !2C, !3C", 4, kFixupNone),

895

ENCODING_MAP(kThumb2Umull, 0xfba00000,

896

kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16,

897

kFmtBitBlt, 3, 0,

898

IS_QUAD_OP | REG_DEF0 | REG_DEF1 | REG_USE2 | REG_USE3,

899

"umull", "!0C, !1C, !2C, !3C", 4, kFixupNone),

900

ENCODING_MAP(kThumb2Ldrex, 0xe8500f00,

901

kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 7, 0,

902

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD,

903

"ldrex", "!0C, [!1C, #!2E]", 4, kFixupNone),

904

ENCODING_MAP(kThumb2Ldrexd, 0xe8d0007f,

905

kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16,

906

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF01_USE2 | IS_LOAD,

907

"ldrexd", "!0C, !1C, [!2C]", 4, kFixupNone),

908

ENCODING_MAP(kThumb2Strex, 0xe8400000,

909

kFmtBitBlt, 11, 8, kFmtBitBlt, 15, 12, kFmtBitBlt, 19, 16,

910

kFmtBitBlt, 7, 0, IS_QUAD_OP | REG_DEF0_USE12 | IS_STORE,

911

"strex", "!0C, !1C, [!2C, #!2E]", 4, kFixupNone),

912

ENCODING_MAP(kThumb2Strexd, 0xe8c00070,

913

kFmtBitBlt, 3, 0, kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 8,

914

kFmtBitBlt, 19, 16, IS_QUAD_OP | REG_DEF0_USE123 | IS_STORE,

915

"strexd", "!0C, !1C, !2C, [!3C]", 4, kFixupNone),

916

ENCODING_MAP(kThumb2Clrex, 0xf3bf8f2f,

917

kFmtUnused, -1, -1, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

918

kFmtUnused, -1, -1, NO_OPERAND,

919

"clrex", "", 4, kFixupNone),

920

ENCODING_MAP(kThumb2Bfi, 0xf3600000,

921

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtShift5, -1, -1,

922

kFmtBitBlt, 4, 0, IS_QUAD_OP | REG_DEF0_USE1,

923

"bfi", "!0C,!1C,#!2d,#!3d", 4, kFixupNone),

924

ENCODING_MAP(kThumb2Bfc, 0xf36f0000,

925

kFmtBitBlt, 11, 8, kFmtShift5, -1, -1, kFmtBitBlt, 4, 0,

926

kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0,

927

"bfc", "!0C,#!1d,#!2d", 4, kFixupNone),

928

ENCODING_MAP(kThumb2Dmb, 0xf3bf8f50,

929

kFmtBitBlt, 3, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

930

kFmtUnused, -1, -1, IS_UNARY_OP,

931

"dmb", "#!0B", 4, kFixupNone),

932

ENCODING_MAP(kThumb2LdrPcReln12, 0xf85f0000,

933

kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 0, kFmtUnused, -1, -1,

934

kFmtUnused, -1, -1,

935

IS_BINARY_OP | REG_DEF0 | REG_USE_PC | IS_LOAD,

936

"ldr", "!0C, [r15pc, -#!1d]", 4, kFixupNone),

937

ENCODING_MAP(kThumb2Stm, 0xe9000000,

938

kFmtBitBlt, 19, 16, kFmtBitBlt, 12, 0, kFmtUnused, -1, -1,

939

kFmtUnused, -1, -1,

940

IS_BINARY_OP | REG_USE0 | REG_USE_LIST1 | IS_STORE,

941

"stm", "!0C, <!1R>", 4, kFixupNone),

942

ENCODING_MAP(kThumbUndefined, 0xde00,

943

kFmtUnused, -1, -1, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

944

kFmtUnused, -1, -1, NO_OPERAND,

945

"undefined", "", 2, kFixupNone),

946

// NOTE: vpop, vpush hard-encoded for s16+ reg list

947

ENCODING_MAP(kThumb2VPopCS, 0xecbd8a00,

948

kFmtBitBlt, 7, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

949

kFmtUnused, -1, -1,

950

IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_DEF_FPCS_LIST0

951

| IS_LOAD, "vpop", "<!0P>", 4, kFixupNone),

952

ENCODING_MAP(kThumb2VPushCS, 0xed2d8a00,

953

kFmtBitBlt, 7, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

954

kFmtUnused, -1, -1,

955

IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_USE_FPCS_LIST0

956

| IS_STORE, "vpush", "<!0P>", 4, kFixupNone),

957

ENCODING_MAP(kThumb2Vldms, 0xec900a00,

958

kFmtBitBlt, 19, 16, kFmtSfp, 22, 12, kFmtBitBlt, 7, 0,

959

kFmtUnused, -1, -1,

960

IS_TERTIARY_OP | REG_USE0 | REG_DEF_FPCS_LIST2

961

| IS_LOAD, "vldms", "!0C, <!2Q>", 4, kFixupNone),

962

ENCODING_MAP(kThumb2Vstms, 0xec800a00,

963

kFmtBitBlt, 19, 16, kFmtSfp, 22, 12, kFmtBitBlt, 7, 0,

964

kFmtUnused, -1, -1,

965

IS_TERTIARY_OP | REG_USE0 | REG_USE_FPCS_LIST2

966

| IS_STORE, "vstms", "!0C, <!2Q>", 4, kFixupNone),

967

ENCODING_MAP(kThumb2BUncond, 0xf0009000,

968

kFmtOff24, -1, -1, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

969

kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH,

970

"b", "!0t", 4, kFixupT2Branch),

971

ENCODING_MAP(kThumb2MovImm16H, 0xf2c00000,

972

kFmtBitBlt, 11, 8, kFmtImm16, -1, -1, kFmtUnused, -1, -1,

973

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0 | REG_USE0,

974

"movt", "!0C, #!1M", 4, kFixupNone),

975

ENCODING_MAP(kThumb2AddPCR, 0x4487,

976

kFmtBitBlt, 6, 3, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

977

kFmtUnused, -1, -1,

978

IS_UNARY_OP | REG_USE0 | IS_BRANCH | NEEDS_FIXUP,

979

"add", "rPC, !0C", 2, kFixupLabel),

980

ENCODING_MAP(kThumb2Adr, 0xf20f0000,

981

kFmtBitBlt, 11, 8, kFmtImm12, -1, -1, kFmtUnused, -1, -1,

982

kFmtUnused, -1, -1,

983

/* Note: doesn't affect flags */

984

IS_TERTIARY_OP | REG_DEF0 | NEEDS_FIXUP,

985

"adr", "!0C,#!1d", 4, kFixupAdr),

986

ENCODING_MAP(kThumb2MovImm16LST, 0xf2400000,

987

kFmtBitBlt, 11, 8, kFmtImm16, -1, -1, kFmtUnused, -1, -1,

988

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0 | NEEDS_FIXUP,

989

"mov", "!0C, #!1M", 4, kFixupMovImmLST),

990

ENCODING_MAP(kThumb2MovImm16HST, 0xf2c00000,

991

kFmtBitBlt, 11, 8, kFmtImm16, -1, -1, kFmtUnused, -1, -1,

992

kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0 | REG_USE0 | NEEDS_FIXUP,

993

"movt", "!0C, #!1M", 4, kFixupMovImmHST),

994

ENCODING_MAP(kThumb2LdmiaWB, 0xe8b00000,

995

kFmtBitBlt, 19, 16, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1,

996

kFmtUnused, -1, -1,

997

IS_BINARY_OP | REG_DEF0_USE0 | REG_DEF_LIST1 | IS_LOAD,

998

"ldmia", "!0C!!, <!1R>", 4, kFixupNone),

999

ENCODING_MAP(kThumb2OrrRRRs, 0xea500000,

1000

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

1001

kFmtShift, -1, -1, IS_QUAD_OP | REG_DEF0_USE12 | SETS_CCODES,

1002

"orrs", "!0C, !1C, !2C!3H", 4, kFixupNone),

1003

ENCODING_MAP(kThumb2Push1, 0xf84d0d04,

1004

kFmtBitBlt, 15, 12, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

1005

kFmtUnused, -1, -1,

1006

IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_USE0

1007

| IS_STORE, "push1", "!0C", 4, kFixupNone),

1008

ENCODING_MAP(kThumb2Pop1, 0xf85d0b04,

1009

kFmtBitBlt, 15, 12, kFmtUnused, -1, -1, kFmtUnused, -1, -1,

1010

kFmtUnused, -1, -1,

1011

IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_DEF0

1012

| IS_LOAD, "pop1", "!0C", 4, kFixupNone),

1013

ENCODING_MAP(kThumb2RsubRRR, 0xebd00000, /* setflags encoding */

1014

kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtBitBlt, 3, 0,

1015

kFmtShift, -1, -1,

1016

IS_QUAD_OP | REG_DEF0_USE12 | SETS_CCODES,

1017

"rsbs", "!0C, !1C, !2C!3H", 4, kFixupNone),

1018

ENCODING_MAP(kThumb2Smull, 0xfb800000,

1019

kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16,

1020

kFmtBitBlt, 3, 0,

1021

IS_QUAD_OP | REG_DEF0 | REG_DEF1 | REG_USE2 | REG_USE3,

1022

"smull", "!0C, !1C, !2C, !3C", 4, kFixupNone),

1023

ENCODING_MAP(kThumb2LdrdPcRel8, 0xe9df0000,

1024

kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 8, kFmtBitBlt, 7, 0,

1025

kFmtUnused, -1, -1,

1026

1027

"ldrd", "!0C, !1C, [pc, #!2E]", 4, kFixupLoad),

1028

ENCODING_MAP(kThumb2LdrdI8, 0xe9d00000,

1029

kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16,

1030

kFmtBitBlt, 7, 0,

1031

IS_QUAD_OP | REG_DEF0 | REG_DEF1 | REG_USE2 | IS_LOAD,

1032

"ldrd", "!0C, !1C, [!2C, #!3E]", 4, kFixupNone),

1033

ENCODING_MAP(kThumb2StrdI8, 0xe9c00000,

1034

kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16,

1035

kFmtBitBlt, 7, 0,

1036

IS_QUAD_OP | REG_USE0 | REG_USE1 | REG_USE2 | IS_STORE,

1037

"strd", "!0C, !1C, [!2C, #!3E]", 4, kFixupNone),

1038

};

1039

1040

// new_lir replaces orig_lir in the pcrel_fixup list.

1041

void Arm64Mir2Lir::ReplaceFixup(LIR* prev_lir, LIR* orig_lir, LIR* new_lir) {

1042

new_lir->u.a.pcrel_next = orig_lir->u.a.pcrel_next;

1043

if (UNLIKELY(prev_lir == NULL)) {

1044

first_fixup_ = new_lir;

1045

} else {

1046

prev_lir->u.a.pcrel_next = new_lir;

1047

}

1048

orig_lir->flags.fixup = kFixupNone;

1049

}

1050

1051

// new_lir is inserted before orig_lir in the pcrel_fixup list.

1052

void Arm64Mir2Lir::InsertFixupBefore(LIR* prev_lir, LIR* orig_lir, LIR* new_lir) {

1053

new_lir->u.a.pcrel_next = orig_lir;

1054

if (UNLIKELY(prev_lir == NULL)) {

1055

first_fixup_ = new_lir;

1056

} else {

1057

DCHECK(prev_lir->u.a.pcrel_next == orig_lir);

1058

prev_lir->u.a.pcrel_next = new_lir;

}

}

/*

* The fake NOP of moving r0 to r0 actually will incur data stalls if r0 is

1064

* not ready. Since r5FP is not updated often, it is less likely to

1065

* generate unnecessary stall cycles.

1066

* TUNING: No longer true - find new NOP pattern.

1067

*/

1068

#define PADDING_MOV_R5_R5 0x1C2D

1069

1070

uint8_t* Arm64Mir2Lir::EncodeLIRs(uint8_t* write_pos, LIR* lir) {

1071

for (; lir != NULL; lir = NEXT_LIR(lir)) {

1072

if (!lir->flags.is_nop) {

1073

int opcode = lir->opcode;

1074

if (IsPseudoLirOp(opcode)) {

1075

if (UNLIKELY(opcode == kPseudoPseudoAlign4)) {

1076

// Note: size for this opcode will be either 0 or 2 depending on final alignment.

1077

if (lir->offset & 0x2) {

1078

write_pos[0] = (PADDING_MOV_R5_R5 & 0xff);

1079

write_pos[1] = ((PADDING_MOV_R5_R5 >> 8) & 0xff);

write_pos += 2;

}

}

} else if (LIKELY(!lir->flags.is_nop)) {

1084

const ArmEncodingMap *encoder = &EncodingMap[lir->opcode];

1085

uint32_t bits = encoder->skeleton;

1086

for (int i = 0; i < 4; i++) {

1087

uint32_t operand;

1088

uint32_t value;

1089

operand = lir->operands[i];

1090

ArmEncodingKind kind = encoder->field_loc[i].kind;

1091

if (LIKELY(kind == kFmtBitBlt)) {

1092

value = (operand << encoder->field_loc[i].start) &

1093

((1 << (encoder->field_loc[i].end + 1)) - 1);

1094

bits |= value;

1095

} else {

1096

switch (encoder->field_loc[i].kind) {

1097

case kFmtSkip:

1098

break; // Nothing to do, but continue to next.

1099

case kFmtUnused:

1100

i = 4; // Done, break out of the enclosing loop.

1101

break;

1102

case kFmtFPImm:

1103

value = ((operand & 0xF0) >> 4) << encoder->field_loc[i].end;

1104

value |= (operand & 0x0F) << encoder->field_loc[i].start;

bits |= value;

break;

case kFmtBrOffset:

value = ((operand & 0x80000) >> 19) << 26;

1109

value |= ((operand & 0x40000) >> 18) << 11;

1110

value |= ((operand & 0x20000) >> 17) << 13;

1111

value |= ((operand & 0x1f800) >> 11) << 16;

1112

value |= (operand & 0x007ff);

bits |= value;

break;

case kFmtShift5:

value = ((operand & 0x1c) >> 2) << 12;

1117

value |= (operand & 0x03) << 6;

bits |= value;

break;

case kFmtShift:

value = ((operand & 0x70) >> 4) << 12;

1122

value |= (operand & 0x0f) << 4;

bits |= value;

break;

case kFmtBWidth:

value = operand - 1;

bits |= value;

break;

case kFmtLsb:

value = ((operand & 0x1c) >> 2) << 12;

1131

value |= (operand & 0x03) << 6;

bits |= value;

break;

case kFmtImm6:

value = ((operand & 0x20) >> 5) << 9;

1136

value |= (operand & 0x1f) << 3;

bits |= value;

break;

case kFmtDfp: {

DCHECK(RegStorage::IsDouble(operand)) << ", Operand = 0x" << std::hex << operand;

1141

uint32_t reg_num = RegStorage::RegNum(operand);

1142

/* Snag the 1-bit slice and position it */

1143

value = ((reg_num & 0x10) >> 4) << encoder->field_loc[i].end;

1144

/* Extract and position the 4-bit slice */

1145

value |= (reg_num & 0x0f) << encoder->field_loc[i].start;

bits |= value;

break;

}

case kFmtSfp: {

DCHECK(RegStorage::IsSingle(operand)) << ", Operand = 0x" << std::hex << operand;

1151

uint32_t reg_num = RegStorage::RegNum(operand);

1152

/* Snag the 1-bit slice and position it */

1153

value = (reg_num & 0x1) << encoder->field_loc[i].end;

1154

/* Extract and position the 4-bit slice */

1155

value |= ((reg_num & 0x1e) >> 1) << encoder->field_loc[i].start;

bits |= value;

break;

}

case kFmtImm12:

case kFmtModImm:

value = ((operand & 0x800) >> 11) << 26;

1162

value |= ((operand & 0x700) >> 8) << 12;

1163

value |= operand & 0x0ff;

bits |= value;

break;

case kFmtImm16:

value = ((operand & 0x0800) >> 11) << 26;

1168

value |= ((operand & 0xf000) >> 12) << 16;

1169

value |= ((operand & 0x0700) >> 8) << 12;

1170

value |= operand & 0x0ff;

bits |= value;

break;

case kFmtOff24: {

uint32_t signbit = (operand >> 31) & 0x1;

1175

uint32_t i1 = (operand >> 22) & 0x1;

1176

uint32_t i2 = (operand >> 21) & 0x1;

1177

uint32_t imm10 = (operand >> 11) & 0x03ff;

1178

uint32_t imm11 = operand & 0x07ff;

1179

uint32_t j1 = (i1 ^ signbit) ? 0 : 1;

1180

uint32_t j2 = (i2 ^ signbit) ? 0 : 1;

1181

value = (signbit << 26) | (j1 << 13) | (j2 << 11) | (imm10 << 16) |

imm11;

bits |= value;

}

break;

default:

LOG(FATAL) << "Bad fmt:" << encoder->field_loc[i].kind;

}

}

}

if (encoder->size == 4) {

1192

write_pos[0] = ((bits >> 16) & 0xff);

1193

write_pos[1] = ((bits >> 24) & 0xff);

1194

write_pos[2] = (bits & 0xff);

1195

write_pos[3] = ((bits >> 8) & 0xff);

1196

write_pos += 4;

1197

} else {

1198

DCHECK_EQ(encoder->size, 2);

1199

write_pos[0] = (bits & 0xff);

1200

write_pos[1] = ((bits >> 8) & 0xff);

write_pos += 2;

}

}

}

}

return write_pos;

}

// Assemble the LIR into binary instruction format.

1210

void Arm64Mir2Lir::AssembleLIR() {

1211

LIR* lir;

1212

LIR* prev_lir;

1213

cu_->NewTimingSplit("Assemble");

1214

int assembler_retries = 0;

1215

CodeOffset starting_offset = LinkFixupInsns(first_lir_insn_, last_lir_insn_, 0);

1216

data_offset_ = (starting_offset + 0x3) & ~0x3;

1217

int32_t offset_adjustment;

AssignDataOffsets();

/*

* Note: generation must be 1 on first pass (to distinguish from initialized state of 0 for

1222

* non-visited nodes). Start at zero here, and bit will be flipped to 1 on entry to the loop.

*/

int generation = 0;

while (true) {

offset_adjustment = 0;

1227

AssemblerStatus res = kSuccess; // Assume success

1228

generation ^= 1;

1229

// Note: nodes requring possible fixup linked in ascending order.

1230

lir = first_fixup_;

1231

prev_lir = NULL;

1232

while (lir != NULL) {

1233

/*

1234

* NOTE: the lir being considered here will be encoded following the switch (so long as

1235

* we're not in a retry situation). However, any new non-pc_rel instructions inserted

1236

* due to retry must be explicitly encoded at the time of insertion. Note that

1237

* inserted instructions don't need use/def flags, but do need size and pc-rel status

1238

* properly updated.

1239

*/

1240

lir->offset += offset_adjustment;

1241

// During pass, allows us to tell whether a node has been updated with offset_adjustment yet.

1242

lir->flags.generation = generation;

1243

switch (static_cast<FixupKind>(lir->flags.fixup)) {

case kFixupLabel:

case kFixupNone:

break;

case kFixupVLoad:

if (lir->operands[1] != rs_r15pc.GetReg()) {

1249

break;

1250

}

1251

// NOTE: intentional fallthrough.

1252

case kFixupLoad: {

1253

/*

1254

* PC-relative loads are mostly used to load immediates

1255

* that are too large to materialize directly in one shot.

1256

* However, if the load displacement exceeds the limit,

1257

* we revert to a multiple-instruction materialization sequence.

1258

*/

1259

LIR *lir_target = lir->target;

1260

CodeOffset pc = (lir->offset + 4) & ~3;

1261

CodeOffset target = lir_target->offset +

1262

((lir_target->flags.generation == lir->flags.generation) ? 0 : offset_adjustment);

1263

int32_t delta = target - pc;

1264

if (res != kSuccess) {

1265

/*

1266

* In this case, we're just estimating and will do it again for real. Ensure offset

* is legal.

*/

delta &= ~0x3;

}

DCHECK_EQ((delta & 0x3), 0);

1272

// First, a sanity check for cases we shouldn't see now

1273

if (kIsDebugBuild && (((lir->opcode == kThumbAddPcRel) && (delta > 1020)) ||

1274

((lir->opcode == kThumbLdrPcRel) && (delta > 1020)))) {

1275

// Shouldn't happen in current codegen.

1276

LOG(FATAL) << "Unexpected pc-rel offset " << delta;

1277

}

1278

// Now, check for the difficult cases

1279

if (((lir->opcode == kThumb2LdrPcRel12) && (delta > 4091)) ||

1280

((lir->opcode == kThumb2LdrdPcRel8) && (delta > 1020)) ||

1281

((lir->opcode == kThumb2Vldrs) && (delta > 1020)) ||

1282

((lir->opcode == kThumb2Vldrd) && (delta > 1020))) {

1283

/*

1284

* Note: The reason vldrs/vldrd include rARM_LR in their use/def masks is that we

1285

* sometimes have to use it to fix up out-of-range accesses. This is where that

1286

* happens.

1287

*/

1288

int base_reg = ((lir->opcode == kThumb2LdrdPcRel8) ||

1289

(lir->opcode == kThumb2LdrPcRel12)) ? lir->operands[0] :

1290

rs_rARM_LR.GetReg();

1291

1292

// Add new Adr to generate the address.

1293

LIR* new_adr = RawLIR(lir->dalvik_offset, kThumb2Adr,

1294

base_reg, 0, 0, 0, 0, lir->target);

1295

new_adr->offset = lir->offset;

1296

new_adr->flags.fixup = kFixupAdr;

1297

new_adr->flags.size = EncodingMap[kThumb2Adr].size;

1298

InsertLIRBefore(lir, new_adr);

1299

lir->offset += new_adr->flags.size;

1300

offset_adjustment += new_adr->flags.size;

1301

1302

// lir no longer pcrel, unlink and link in new_adr.

1303

ReplaceFixup(prev_lir, lir, new_adr);

1304

1305

// Convert to normal load.

1306

offset_adjustment -= lir->flags.size;

1307

if (lir->opcode == kThumb2LdrPcRel12) {

1308

lir->opcode = kThumb2LdrRRI12;

1309

} else if (lir->opcode == kThumb2LdrdPcRel8) {

1310

lir->opcode = kThumb2LdrdI8;

1311

}

1312

lir->flags.size = EncodingMap[lir->opcode].size;

1313

offset_adjustment += lir->flags.size;

1314

// Change the load to be relative to the new Adr base.

1315

if (lir->opcode == kThumb2LdrdI8) {

1316

lir->operands[3] = 0;

1317

lir->operands[2] = base_reg;

1318

} else {

1319

lir->operands[2] = 0;

1320

lir->operands[1] = base_reg;

1321

}

1322

prev_lir = new_adr; // Continue scan with new_adr;

1323

lir = new_adr->u.a.pcrel_next;

res = kRetryAll;

continue;

} else {

if ((lir->opcode == kThumb2Vldrs) ||

1328

(lir->opcode == kThumb2Vldrd) ||

1329

(lir->opcode == kThumb2LdrdPcRel8)) {

1330

lir->operands[2] = delta >> 2;

1331

} else {

1332

lir->operands[1] = (lir->opcode == kThumb2LdrPcRel12) ? delta :

delta >> 2;

}

}

break;

}

case kFixupCBxZ: {

LIR *target_lir = lir->target;

1340

CodeOffset pc = lir->offset + 4;

1341

CodeOffset target = target_lir->offset +

1342

((target_lir->flags.generation == lir->flags.generation) ? 0 : offset_adjustment);

1343

int32_t delta = target - pc;

1344

if (delta > 126 || delta < 0) {

1345

/*

1346

* Convert to cmp rx,#0 / b[eq/ne] tgt pair

1347

* Make new branch instruction and insert after

1348

*/

1349

LIR* new_inst =

1350

RawLIR(lir->dalvik_offset, kThumbBCond, 0,

1351

(lir->opcode == kThumb2Cbz) ? kArmCondEq : kArmCondNe,

1352

0, 0, 0, lir->target);

1353

InsertLIRAfter(lir, new_inst);

1354

1355

/* Convert the cb[n]z to a cmp rx, #0 ] */

1356

// Subtract the old size.

1357

offset_adjustment -= lir->flags.size;

1358

lir->opcode = kThumbCmpRI8;

1359

/* operand[0] is src1 in both cb[n]z & CmpRI8 */

1360

lir->operands[1] = 0;

1361

lir->target = 0;

1362

lir->flags.size = EncodingMap[lir->opcode].size;

1363

// Add back the new size.

1364

offset_adjustment += lir->flags.size;

1365

// Set up the new following inst.

1366

new_inst->offset = lir->offset + lir->flags.size;

1367

new_inst->flags.fixup = kFixupCondBranch;

1368

new_inst->flags.size = EncodingMap[new_inst->opcode].size;

1369

offset_adjustment += new_inst->flags.size;

1370

1371

// lir no longer pcrel, unlink and link in new_inst.

1372

ReplaceFixup(prev_lir, lir, new_inst);

1373

prev_lir = new_inst; // Continue with the new instruction.

1374

lir = new_inst->u.a.pcrel_next;

res = kRetryAll;

continue;

} else {

lir->operands[1] = delta >> 1;

}

break;

}

case kFixupPushPop: {

1383

if (__builtin_popcount(lir->operands[0]) == 1) {

1384

/*

1385

* The standard push/pop multiple instruction

1386

* requires at least two registers in the list.

1387

* If we've got just one, switch to the single-reg

1388

* encoding.

1389

*/

1390

lir->opcode = (lir->opcode == kThumb2Push) ? kThumb2Push1 :

1391

kThumb2Pop1;

1392

int reg = 0;

1393

while (lir->operands[0]) {

1394

if (lir->operands[0] & 0x1) {

break;

} else {

reg++;

lir->operands[0] >>= 1;

1399

}

1400

}

1401

lir->operands[0] = reg;

1402

// This won't change again, don't bother unlinking, just reset fixup kind

1403

lir->flags.fixup = kFixupNone;

}

break;

}

case kFixupCondBranch: {

1408

LIR *target_lir = lir->target;

1409

int32_t delta = 0;

1410

DCHECK(target_lir);

1411

CodeOffset pc = lir->offset + 4;

1412

CodeOffset target = target_lir->offset +

1413

((target_lir->flags.generation == lir->flags.generation) ? 0 : offset_adjustment);

1414

delta = target - pc;

1415

if ((lir->opcode == kThumbBCond) && (delta > 254 || delta < -256)) {

1416

offset_adjustment -= lir->flags.size;

1417

lir->opcode = kThumb2BCond;

1418

lir->flags.size = EncodingMap[lir->opcode].size;

1419

// Fixup kind remains the same.

1420

offset_adjustment += lir->flags.size;

1421

res = kRetryAll;

1422

}

1423

lir->operands[0] = delta >> 1;

1424

break;

1425

}

1426

case kFixupT2Branch: {

1427

LIR *target_lir = lir->target;

1428

CodeOffset pc = lir->offset + 4;

1429

CodeOffset target = target_lir->offset +

1430

((target_lir->flags.generation == lir->flags.generation) ? 0 : offset_adjustment);

1431

int32_t delta = target - pc;

1432

lir->operands[0] = delta >> 1;

1433

if (!(cu_->disable_opt & (1 << kSafeOptimizations)) && lir->operands[0] == 0) {

1434

// Useless branch

1435

offset_adjustment -= lir->flags.size;

1436

lir->flags.is_nop = true;

1437

// Don't unlink - just set to do-nothing.

1438

lir->flags.fixup = kFixupNone;

res = kRetryAll;

}

break;

}

case kFixupT1Branch: {

1444

LIR *target_lir = lir->target;

1445

CodeOffset pc = lir->offset + 4;

1446

CodeOffset target = target_lir->offset +

1447

((target_lir->flags.generation == lir->flags.generation) ? 0 : offset_adjustment);

1448

int32_t delta = target - pc;

1449

if (delta > 2046 || delta < -2048) {

1450

// Convert to Thumb2BCond w/ kArmCondAl

1451

offset_adjustment -= lir->flags.size;

1452

lir->opcode = kThumb2BUncond;

1453

lir->operands[0] = 0;

1454

lir->flags.size = EncodingMap[lir->opcode].size;

1455

lir->flags.fixup = kFixupT2Branch;

1456

offset_adjustment += lir->flags.size;

1457

res = kRetryAll;

1458

} else {

1459

lir->operands[0] = delta >> 1;

1460

if (!(cu_->disable_opt & (1 << kSafeOptimizations)) && lir->operands[0] == -1) {

1461

// Useless branch

1462

offset_adjustment -= lir->flags.size;

1463

lir->flags.is_nop = true;

1464

// Don't unlink - just set to do-nothing.

1465

lir->flags.fixup = kFixupNone;

res = kRetryAll;

}

}

break;

}

case kFixupBlx1: {

DCHECK(NEXT_LIR(lir)->opcode == kThumbBlx2);

1473

/* cur_pc is Thumb */

1474

CodeOffset cur_pc = (lir->offset + 4) & ~3;

1475

CodeOffset target = lir->operands[1];

1476

1477

/* Match bit[1] in target with base */

if (cur_pc & 0x2) {

target |= 0x2;

}

int32_t delta = target - cur_pc;

1482

DCHECK((delta >= -(1<<22)) && (delta <= ((1<<22)-2)));

1483

1484

lir->operands[0] = (delta >> 12) & 0x7ff;

1485

NEXT_LIR(lir)->operands[0] = (delta>> 1) & 0x7ff;

break;

}

case kFixupBl1: {

DCHECK(NEXT_LIR(lir)->opcode == kThumbBl2);

1490

/* Both cur_pc and target are Thumb */

1491

CodeOffset cur_pc = lir->offset + 4;

1492

CodeOffset target = lir->operands[1];

1493

1494

int32_t delta = target - cur_pc;

1495

DCHECK((delta >= -(1<<22)) && (delta <= ((1<<22)-2)));

1496

1497

lir->operands[0] = (delta >> 12) & 0x7ff;

1498

NEXT_LIR(lir)->operands[0] = (delta>> 1) & 0x7ff;

break;

}

case kFixupAdr: {

EmbeddedData *tab_rec = reinterpret_cast<EmbeddedData*>(UnwrapPointer(lir->operands[2]));

1503

LIR* target = lir->target;

1504

int32_t target_disp = (tab_rec != NULL) ? tab_rec->offset + offset_adjustment

1505

: target->offset + ((target->flags.generation == lir->flags.generation) ? 0 :

1506

offset_adjustment);

1507

int32_t disp = target_disp - ((lir->offset + 4) & ~3);

1508

if (disp < 4096) {

1509

lir->operands[1] = disp;

1510

} else {

1511

// convert to ldimm16l, ldimm16h, add tgt, pc, operands[0]

1512

// TUNING: if this case fires often, it can be improved. Not expected to be common.

1513

LIR *new_mov16L =

1514

RawLIR(lir->dalvik_offset, kThumb2MovImm16LST, lir->operands[0], 0,

1515

WrapPointer(lir), WrapPointer(tab_rec), 0, lir->target);

1516

new_mov16L->flags.size = EncodingMap[new_mov16L->opcode].size;

1517

new_mov16L->flags.fixup = kFixupMovImmLST;

1518

new_mov16L->offset = lir->offset;

1519

// Link the new instruction, retaining lir.

1520

InsertLIRBefore(lir, new_mov16L);

1521

lir->offset += new_mov16L->flags.size;

1522

offset_adjustment += new_mov16L->flags.size;

1523

InsertFixupBefore(prev_lir, lir, new_mov16L);

1524

prev_lir = new_mov16L; // Now we've got a new prev.

1525

LIR *new_mov16H =

1526

RawLIR(lir->dalvik_offset, kThumb2MovImm16HST, lir->operands[0], 0,

1527

WrapPointer(lir), WrapPointer(tab_rec), 0, lir->target);

1528

new_mov16H->flags.size = EncodingMap[new_mov16H->opcode].size;

1529

new_mov16H->flags.fixup = kFixupMovImmHST;

1530

new_mov16H->offset = lir->offset;

1531

// Link the new instruction, retaining lir.

1532

InsertLIRBefore(lir, new_mov16H);

1533

lir->offset += new_mov16H->flags.size;

1534

offset_adjustment += new_mov16H->flags.size;

1535

InsertFixupBefore(prev_lir, lir, new_mov16H);

1536

prev_lir = new_mov16H; // Now we've got a new prev.

1537

1538

offset_adjustment -= lir->flags.size;

1539

if (RegStorage::RegNum(lir->operands[0]) < 8) {

1540

lir->opcode = kThumbAddRRLH;

1541

} else {

1542

lir->opcode = kThumbAddRRHH;

1543

}

1544

lir->operands[1] = rs_rARM_PC.GetReg();

1545

lir->flags.size = EncodingMap[lir->opcode].size;

1546

offset_adjustment += lir->flags.size;

1547

// Must stay in fixup list and have offset updated; will be used by LST/HSP pair.

1548

lir->flags.fixup = kFixupNone;

res = kRetryAll;

}

break;

}

case kFixupMovImmLST: {

1554

// operands[1] should hold disp, [2] has add, [3] has tab_rec

1555

LIR *addPCInst = reinterpret_cast<LIR*>(UnwrapPointer(lir->operands[2]));

1556

EmbeddedData *tab_rec = reinterpret_cast<EmbeddedData*>(UnwrapPointer(lir->operands[3]));

1557

// If tab_rec is null, this is a literal load. Use target

1558

LIR* target = lir->target;

1559

int32_t target_disp = tab_rec ? tab_rec->offset : target->offset;

1560

lir->operands[1] = (target_disp - (addPCInst->offset + 4)) & 0xffff;

1561

break;

1562

}

1563

case kFixupMovImmHST: {

1564

// operands[1] should hold disp, [2] has add, [3] has tab_rec

1565

LIR *addPCInst = reinterpret_cast<LIR*>(UnwrapPointer(lir->operands[2]));

1566

EmbeddedData *tab_rec = reinterpret_cast<EmbeddedData*>(UnwrapPointer(lir->operands[3]));

1567

// If tab_rec is null, this is a literal load. Use target

1568

LIR* target = lir->target;

1569

int32_t target_disp = tab_rec ? tab_rec->offset : target->offset;

1570

lir->operands[1] =

1571

((target_disp - (addPCInst->offset + 4)) >> 16) & 0xffff;

break;

}

case kFixupAlign4: {

int32_t required_size = lir->offset & 0x2;

1576

if (lir->flags.size != required_size) {

1577

offset_adjustment += required_size - lir->flags.size;

1578

lir->flags.size = required_size;

res = kRetryAll;

}

break;

}

default:

LOG(FATAL) << "Unexpected case " << lir->flags.fixup;

1585

}

1586

prev_lir = lir;

1587

lir = lir->u.a.pcrel_next;

1588

}

1589

1590

if (res == kSuccess) {

break;

} else {

assembler_retries++;

if (assembler_retries > MAX_ASSEMBLER_RETRIES) {

1595

CodegenDump();

1596

LOG(FATAL) << "Assembler error - too many retries";

1597

}

1598

starting_offset += offset_adjustment;

1599

data_offset_ = (starting_offset + 0x3) & ~0x3;

AssignDataOffsets();

}

}

// Build the CodeBuffer.

1605

DCHECK_LE(data_offset_, total_size_);

1606

code_buffer_.reserve(total_size_);

1607

code_buffer_.resize(starting_offset);

1608

uint8_t* write_pos = &code_buffer_[0];

1609

write_pos = EncodeLIRs(write_pos, first_lir_insn_);

1610

DCHECK_EQ(static_cast<CodeOffset>(write_pos - &code_buffer_[0]), starting_offset);

1611

1612

DCHECK_EQ(data_offset_, (code_buffer_.size() + 0x3) & ~0x3);

1613

1614

// Install literals

1615

InstallLiteralPools();

1616

1617

// Install switch tables

1618

InstallSwitchTables();

1619

1620

// Install fill array data

1621

InstallFillArrayData();

1622

1623

// Create the mapping table and native offset to reference map.

1624

cu_->NewTimingSplit("PcMappingTable");

1625

CreateMappingTables();

1626

1627

cu_->NewTimingSplit("GcMap");

CreateNativeGcMap();

}

int Arm64Mir2Lir::GetInsnSize(LIR* lir) {

1632

DCHECK(!IsPseudoLirOp(lir->opcode));

1633

return EncodingMap[lir->opcode].size;

1634

}

1635

1636

// Encode instruction bit pattern and assign offsets.

1637

uint32_t Arm64Mir2Lir::LinkFixupInsns(LIR* head_lir, LIR* tail_lir, uint32_t offset) {

1638

LIR* end_lir = tail_lir->next;

1639

1640

LIR* last_fixup = NULL;

1641

for (LIR* lir = head_lir; lir != end_lir; lir = NEXT_LIR(lir)) {

1642

if (!lir->flags.is_nop) {

1643

if (lir->flags.fixup != kFixupNone) {

1644

if (!IsPseudoLirOp(lir->opcode)) {

1645

lir->flags.size = EncodingMap[lir->opcode].size;

1646

lir->flags.fixup = EncodingMap[lir->opcode].fixup;

1647

} else if (UNLIKELY(lir->opcode == kPseudoPseudoAlign4)) {

1648

lir->flags.size = (offset & 0x2);

1649

lir->flags.fixup = kFixupAlign4;

1650

} else {

1651

lir->flags.size = 0;

1652

lir->flags.fixup = kFixupLabel;

1653

}

1654

// Link into the fixup chain.

1655

lir->flags.use_def_invalid = true;

1656

lir->u.a.pcrel_next = NULL;

1657

if (first_fixup_ == NULL) {

1658

first_fixup_ = lir;

1659

} else {

1660

last_fixup->u.a.pcrel_next = lir;

1661

}

1662

last_fixup = lir;

1663

lir->offset = offset;

1664

}

1665

offset += lir->flags.size;

}

}

return offset;

}

void Arm64Mir2Lir::AssignDataOffsets() {

1672

/* Set up offsets for literals */

1673

CodeOffset offset = data_offset_;

1674

1675

offset = AssignLiteralOffset(offset);

1676

1677

offset = AssignSwitchTablesOffset(offset);

1678

1679

total_size_ = AssignFillArrayDataOffset(offset);

1680

}

1681

1682

} // namespace art