| Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2014 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ART_RUNTIME_ARCH_MIPS64_REGISTERS_MIPS64_H_ |
| 18 | #define ART_RUNTIME_ARCH_MIPS64_REGISTERS_MIPS64_H_ |
| 19 | |
| 20 | #include <iosfwd> |
| 21 | |
| 22 | #include "base/logging.h" |
| 23 | #include "base/macros.h" |
| 24 | #include "globals.h" |
| 25 | |
| 26 | namespace art { |
| 27 | namespace mips64 { |
| 28 | |
| 29 | enum GpuRegister { |
| 30 | ZERO = 0, |
| 31 | AT = 1, // Assembler temporary. |
| 32 | V0 = 2, // Values. |
| 33 | V1 = 3, |
| 34 | A0 = 4, // Arguments. |
| 35 | A1 = 5, |
| 36 | A2 = 6, |
| 37 | A3 = 7, |
| 38 | A4 = 8, |
| 39 | A5 = 9, |
| 40 | A6 = 10, |
| 41 | A7 = 11, |
| 42 | T0 = 12, // Temporaries. |
| 43 | T1 = 13, |
| 44 | T2 = 14, |
| 45 | T3 = 15, |
| 46 | S0 = 16, // Saved values. |
| 47 | S1 = 17, |
| 48 | S2 = 18, |
| 49 | S3 = 19, |
| 50 | S4 = 20, |
| 51 | S5 = 21, |
| 52 | S6 = 22, |
| 53 | S7 = 23, |
| 54 | T8 = 24, // More temporaries. |
| 55 | T9 = 25, |
| 56 | K0 = 26, // Reserved for trap handler. |
| 57 | K1 = 27, |
| 58 | GP = 28, // Global pointer. |
| 59 | SP = 29, // Stack pointer. |
| 60 | S8 = 30, // Saved value/frame pointer. |
| 61 | RA = 31, // Return address. |
| 62 | kNumberOfGpuRegisters = 32, |
| 63 | kNoGpuRegister = -1 // Signals an illegal register. |
| 64 | }; |
| 65 | std::ostream& operator<<(std::ostream& os, const GpuRegister& rhs); |
| 66 | |
| 67 | // Values for floating point registers. |
| 68 | enum FpuRegister { |
| 69 | F0 = 0, |
| 70 | F1 = 1, |
| 71 | F2 = 2, |
| 72 | F3 = 3, |
| 73 | F4 = 4, |
| 74 | F5 = 5, |
| 75 | F6 = 6, |
| 76 | F7 = 7, |
| 77 | F8 = 8, |
| 78 | F9 = 9, |
| 79 | F10 = 10, |
| 80 | F11 = 11, |
| 81 | F12 = 12, |
| 82 | F13 = 13, |
| 83 | F14 = 14, |
| 84 | F15 = 15, |
| 85 | F16 = 16, |
| 86 | F17 = 17, |
| 87 | F18 = 18, |
| 88 | F19 = 19, |
| 89 | F20 = 20, |
| 90 | F21 = 21, |
| 91 | F22 = 22, |
| 92 | F23 = 23, |
| 93 | F24 = 24, |
| 94 | F25 = 25, |
| 95 | F26 = 26, |
| 96 | F27 = 27, |
| 97 | F28 = 28, |
| 98 | F29 = 29, |
| 99 | F30 = 30, |
| 100 | F31 = 31, |
| 101 | kNumberOfFpuRegisters = 32, |
| 102 | kNoFpuRegister = -1, |
| 103 | }; |
| 104 | std::ostream& operator<<(std::ostream& os, const FpuRegister& rhs); |
| 105 | |
| 106 | } // namespace mips64 |
| 107 | } // namespace art |
| 108 | |
| 109 | #endif // ART_RUNTIME_ARCH_MIPS64_REGISTERS_MIPS64_H_ |