Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include "trampoline_compiler.h" |
| 18 | |
Ian Rogers | 68d8b42 | 2014-07-17 11:09:10 -0700 | [diff] [blame] | 19 | #include "jni_env_ext.h" |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 20 | |
| 21 | #ifdef ART_ENABLE_CODEGEN_arm |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 22 | #include "utils/arm/assembler_thumb2.h" |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 23 | #endif |
| 24 | |
| 25 | #ifdef ART_ENABLE_CODEGEN_arm64 |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 26 | #include "utils/arm64/assembler_arm64.h" |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 27 | #endif |
| 28 | |
| 29 | #ifdef ART_ENABLE_CODEGEN_mips |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 30 | #include "utils/mips/assembler_mips.h" |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 31 | #endif |
| 32 | |
| 33 | #ifdef ART_ENABLE_CODEGEN_mips64 |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 34 | #include "utils/mips64/assembler_mips64.h" |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 35 | #endif |
| 36 | |
| 37 | #ifdef ART_ENABLE_CODEGEN_x86 |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 38 | #include "utils/x86/assembler_x86.h" |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 39 | #endif |
| 40 | |
| 41 | #ifdef ART_ENABLE_CODEGEN_x86_64 |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 42 | #include "utils/x86_64/assembler_x86_64.h" |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 43 | #endif |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 44 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 45 | #define __ assembler. |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 46 | |
| 47 | namespace art { |
| 48 | |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 49 | #ifdef ART_ENABLE_CODEGEN_arm |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 50 | namespace arm { |
| 51 | static const std::vector<uint8_t>* CreateTrampoline(EntryPointCallingConvention abi, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 52 | ThreadOffset<4> offset) { |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 53 | Thumb2Assembler assembler; |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 54 | |
| 55 | switch (abi) { |
| 56 | case kInterpreterAbi: // Thread* is first argument (R0) in interpreter ABI. |
| 57 | __ LoadFromOffset(kLoadWord, PC, R0, offset.Int32Value()); |
| 58 | break; |
| 59 | case kJniAbi: // Load via Thread* held in JNIEnv* in first argument (R0). |
Andreas Gampe | 4d98c84 | 2015-12-09 15:14:04 -0800 | [diff] [blame] | 60 | __ LoadFromOffset(kLoadWord, IP, R0, JNIEnvExt::SelfOffset(4).Int32Value()); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 61 | __ LoadFromOffset(kLoadWord, PC, IP, offset.Int32Value()); |
| 62 | break; |
Elliott Hughes | 956af0f | 2014-12-11 14:34:28 -0800 | [diff] [blame] | 63 | case kQuickAbi: // R9 holds Thread*. |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 64 | __ LoadFromOffset(kLoadWord, PC, R9, offset.Int32Value()); |
| 65 | } |
| 66 | __ bkpt(0); |
| 67 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 68 | __ FinalizeCode(); |
| 69 | size_t cs = __ CodeSize(); |
Ian Rogers | 700a402 | 2014-05-19 16:49:03 -0700 | [diff] [blame] | 70 | std::unique_ptr<std::vector<uint8_t>> entry_stub(new std::vector<uint8_t>(cs)); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 71 | MemoryRegion code(&(*entry_stub)[0], entry_stub->size()); |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 72 | __ FinalizeInstructions(code); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 73 | |
| 74 | return entry_stub.release(); |
| 75 | } |
| 76 | } // namespace arm |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 77 | #endif // ART_ENABLE_CODEGEN_arm |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 78 | |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 79 | #ifdef ART_ENABLE_CODEGEN_arm64 |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 80 | namespace arm64 { |
| 81 | static const std::vector<uint8_t>* CreateTrampoline(EntryPointCallingConvention abi, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 82 | ThreadOffset<8> offset) { |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 83 | Arm64Assembler assembler; |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 84 | |
| 85 | switch (abi) { |
| 86 | case kInterpreterAbi: // Thread* is first argument (X0) in interpreter ABI. |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 87 | __ JumpTo(Arm64ManagedRegister::FromXRegister(X0), Offset(offset.Int32Value()), |
| 88 | Arm64ManagedRegister::FromXRegister(IP1)); |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 89 | |
| 90 | break; |
| 91 | case kJniAbi: // Load via Thread* held in JNIEnv* in first argument (X0). |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 92 | __ LoadRawPtr(Arm64ManagedRegister::FromXRegister(IP1), |
| 93 | Arm64ManagedRegister::FromXRegister(X0), |
Andreas Gampe | 4d98c84 | 2015-12-09 15:14:04 -0800 | [diff] [blame] | 94 | Offset(JNIEnvExt::SelfOffset(8).Int32Value())); |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 95 | |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 96 | __ JumpTo(Arm64ManagedRegister::FromXRegister(IP1), Offset(offset.Int32Value()), |
| 97 | Arm64ManagedRegister::FromXRegister(IP0)); |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 98 | |
| 99 | break; |
Elliott Hughes | 956af0f | 2014-12-11 14:34:28 -0800 | [diff] [blame] | 100 | case kQuickAbi: // X18 holds Thread*. |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 101 | __ JumpTo(Arm64ManagedRegister::FromXRegister(TR), Offset(offset.Int32Value()), |
| 102 | Arm64ManagedRegister::FromXRegister(IP0)); |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 103 | |
| 104 | break; |
| 105 | } |
| 106 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 107 | __ FinalizeCode(); |
| 108 | size_t cs = __ CodeSize(); |
Ian Rogers | 700a402 | 2014-05-19 16:49:03 -0700 | [diff] [blame] | 109 | std::unique_ptr<std::vector<uint8_t>> entry_stub(new std::vector<uint8_t>(cs)); |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 110 | MemoryRegion code(&(*entry_stub)[0], entry_stub->size()); |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 111 | __ FinalizeInstructions(code); |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 112 | |
| 113 | return entry_stub.release(); |
| 114 | } |
| 115 | } // namespace arm64 |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 116 | #endif // ART_ENABLE_CODEGEN_arm64 |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 117 | |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 118 | #ifdef ART_ENABLE_CODEGEN_mips |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 119 | namespace mips { |
| 120 | static const std::vector<uint8_t>* CreateTrampoline(EntryPointCallingConvention abi, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 121 | ThreadOffset<4> offset) { |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 122 | MipsAssembler assembler; |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 123 | |
| 124 | switch (abi) { |
| 125 | case kInterpreterAbi: // Thread* is first argument (A0) in interpreter ABI. |
| 126 | __ LoadFromOffset(kLoadWord, T9, A0, offset.Int32Value()); |
| 127 | break; |
| 128 | case kJniAbi: // Load via Thread* held in JNIEnv* in first argument (A0). |
Andreas Gampe | 4d98c84 | 2015-12-09 15:14:04 -0800 | [diff] [blame] | 129 | __ LoadFromOffset(kLoadWord, T9, A0, JNIEnvExt::SelfOffset(4).Int32Value()); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 130 | __ LoadFromOffset(kLoadWord, T9, T9, offset.Int32Value()); |
| 131 | break; |
Elliott Hughes | 956af0f | 2014-12-11 14:34:28 -0800 | [diff] [blame] | 132 | case kQuickAbi: // S1 holds Thread*. |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 133 | __ LoadFromOffset(kLoadWord, T9, S1, offset.Int32Value()); |
| 134 | } |
| 135 | __ Jr(T9); |
| 136 | __ Nop(); |
| 137 | __ Break(); |
| 138 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 139 | __ FinalizeCode(); |
| 140 | size_t cs = __ CodeSize(); |
Ian Rogers | 700a402 | 2014-05-19 16:49:03 -0700 | [diff] [blame] | 141 | std::unique_ptr<std::vector<uint8_t>> entry_stub(new std::vector<uint8_t>(cs)); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 142 | MemoryRegion code(&(*entry_stub)[0], entry_stub->size()); |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 143 | __ FinalizeInstructions(code); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 144 | |
| 145 | return entry_stub.release(); |
| 146 | } |
| 147 | } // namespace mips |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 148 | #endif // ART_ENABLE_CODEGEN_mips |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 149 | |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 150 | #ifdef ART_ENABLE_CODEGEN_mips64 |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 151 | namespace mips64 { |
| 152 | static const std::vector<uint8_t>* CreateTrampoline(EntryPointCallingConvention abi, |
| 153 | ThreadOffset<8> offset) { |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 154 | Mips64Assembler assembler; |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 155 | |
| 156 | switch (abi) { |
| 157 | case kInterpreterAbi: // Thread* is first argument (A0) in interpreter ABI. |
| 158 | __ LoadFromOffset(kLoadDoubleword, T9, A0, offset.Int32Value()); |
| 159 | break; |
| 160 | case kJniAbi: // Load via Thread* held in JNIEnv* in first argument (A0). |
Andreas Gampe | 4d98c84 | 2015-12-09 15:14:04 -0800 | [diff] [blame] | 161 | __ LoadFromOffset(kLoadDoubleword, T9, A0, JNIEnvExt::SelfOffset(8).Int32Value()); |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 162 | __ LoadFromOffset(kLoadDoubleword, T9, T9, offset.Int32Value()); |
| 163 | break; |
| 164 | case kQuickAbi: // Fall-through. |
| 165 | __ LoadFromOffset(kLoadDoubleword, T9, S1, offset.Int32Value()); |
| 166 | } |
| 167 | __ Jr(T9); |
| 168 | __ Nop(); |
| 169 | __ Break(); |
| 170 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 171 | __ FinalizeCode(); |
| 172 | size_t cs = __ CodeSize(); |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 173 | std::unique_ptr<std::vector<uint8_t>> entry_stub(new std::vector<uint8_t>(cs)); |
| 174 | MemoryRegion code(&(*entry_stub)[0], entry_stub->size()); |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 175 | __ FinalizeInstructions(code); |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 176 | |
| 177 | return entry_stub.release(); |
| 178 | } |
| 179 | } // namespace mips64 |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 180 | #endif // ART_ENABLE_CODEGEN_mips |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 181 | |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 182 | #ifdef ART_ENABLE_CODEGEN_x86 |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 183 | namespace x86 { |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 184 | static const std::vector<uint8_t>* CreateTrampoline(ThreadOffset<4> offset) { |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 185 | X86Assembler assembler; |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 186 | |
| 187 | // All x86 trampolines call via the Thread* held in fs. |
| 188 | __ fs()->jmp(Address::Absolute(offset)); |
| 189 | __ int3(); |
| 190 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 191 | __ FinalizeCode(); |
| 192 | size_t cs = __ CodeSize(); |
Ian Rogers | 700a402 | 2014-05-19 16:49:03 -0700 | [diff] [blame] | 193 | std::unique_ptr<std::vector<uint8_t>> entry_stub(new std::vector<uint8_t>(cs)); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 194 | MemoryRegion code(&(*entry_stub)[0], entry_stub->size()); |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 195 | __ FinalizeInstructions(code); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 196 | |
| 197 | return entry_stub.release(); |
| 198 | } |
| 199 | } // namespace x86 |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 200 | #endif // ART_ENABLE_CODEGEN_x86 |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 201 | |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 202 | #ifdef ART_ENABLE_CODEGEN_x86_64 |
Ian Rogers | befbd57 | 2014-03-06 01:13:39 -0800 | [diff] [blame] | 203 | namespace x86_64 { |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 204 | static const std::vector<uint8_t>* CreateTrampoline(ThreadOffset<8> offset) { |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 205 | x86_64::X86_64Assembler assembler; |
Ian Rogers | befbd57 | 2014-03-06 01:13:39 -0800 | [diff] [blame] | 206 | |
| 207 | // All x86 trampolines call via the Thread* held in gs. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 208 | __ gs()->jmp(x86_64::Address::Absolute(offset, true)); |
Ian Rogers | befbd57 | 2014-03-06 01:13:39 -0800 | [diff] [blame] | 209 | __ int3(); |
| 210 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 211 | __ FinalizeCode(); |
| 212 | size_t cs = __ CodeSize(); |
Ian Rogers | 700a402 | 2014-05-19 16:49:03 -0700 | [diff] [blame] | 213 | std::unique_ptr<std::vector<uint8_t>> entry_stub(new std::vector<uint8_t>(cs)); |
Ian Rogers | befbd57 | 2014-03-06 01:13:39 -0800 | [diff] [blame] | 214 | MemoryRegion code(&(*entry_stub)[0], entry_stub->size()); |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 215 | __ FinalizeInstructions(code); |
Ian Rogers | befbd57 | 2014-03-06 01:13:39 -0800 | [diff] [blame] | 216 | |
| 217 | return entry_stub.release(); |
| 218 | } |
| 219 | } // namespace x86_64 |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 220 | #endif // ART_ENABLE_CODEGEN_x86_64 |
Ian Rogers | befbd57 | 2014-03-06 01:13:39 -0800 | [diff] [blame] | 221 | |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 222 | const std::vector<uint8_t>* CreateTrampoline64(InstructionSet isa, EntryPointCallingConvention abi, |
| 223 | ThreadOffset<8> offset) { |
| 224 | switch (isa) { |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 225 | #ifdef ART_ENABLE_CODEGEN_arm64 |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 226 | case kArm64: |
| 227 | return arm64::CreateTrampoline(abi, offset); |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 228 | #endif |
| 229 | #ifdef ART_ENABLE_CODEGEN_mips64 |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 230 | case kMips64: |
| 231 | return mips64::CreateTrampoline(abi, offset); |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 232 | #endif |
| 233 | #ifdef ART_ENABLE_CODEGEN_x86_64 |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 234 | case kX86_64: |
| 235 | return x86_64::CreateTrampoline(offset); |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 236 | #endif |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 237 | default: |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 238 | UNUSED(abi); |
| 239 | UNUSED(offset); |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 240 | LOG(FATAL) << "Unexpected InstructionSet: " << isa; |
Ian Rogers | d4c4d95 | 2014-10-16 20:31:53 -0700 | [diff] [blame] | 241 | UNREACHABLE(); |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 242 | } |
| 243 | } |
| 244 | |
| 245 | const std::vector<uint8_t>* CreateTrampoline32(InstructionSet isa, EntryPointCallingConvention abi, |
| 246 | ThreadOffset<4> offset) { |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 247 | switch (isa) { |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 248 | #ifdef ART_ENABLE_CODEGEN_arm |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 249 | case kArm: |
| 250 | case kThumb2: |
| 251 | return arm::CreateTrampoline(abi, offset); |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 252 | #endif |
| 253 | #ifdef ART_ENABLE_CODEGEN_mips |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 254 | case kMips: |
| 255 | return mips::CreateTrampoline(abi, offset); |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 256 | #endif |
| 257 | #ifdef ART_ENABLE_CODEGEN_x86 |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 258 | case kX86: |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 259 | UNUSED(abi); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 260 | return x86::CreateTrampoline(offset); |
Alex Light | 50fa993 | 2015-08-10 15:30:07 -0700 | [diff] [blame] | 261 | #endif |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 262 | default: |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 263 | LOG(FATAL) << "Unexpected InstructionSet: " << isa; |
Ian Rogers | d4c4d95 | 2014-10-16 20:31:53 -0700 | [diff] [blame] | 264 | UNREACHABLE(); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 265 | } |
| 266 | } |
| 267 | |
| 268 | } // namespace art |