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David Srbeckydd973932015-04-07 20:29:48 +01001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include <memory>
18#include <vector>
19
20#include "arch/instruction_set.h"
Vladimir Marko93205e32016-04-13 11:59:46 +010021#include "base/arena_allocator.h"
Andreas Gampe3b165bc2016-08-01 22:07:04 -070022#include "base/enums.h"
David Srbeckydd973932015-04-07 20:29:48 +010023#include "cfi_test.h"
24#include "gtest/gtest.h"
25#include "jni/quick/calling_convention.h"
Andreas Gampe217488a2017-09-18 08:34:42 -070026#include "read_barrier_config.h"
David Srbeckydd973932015-04-07 20:29:48 +010027#include "utils/assembler.h"
Andreas Gampe3b165bc2016-08-01 22:07:04 -070028#include "utils/jni_macro_assembler.h"
David Srbeckydd973932015-04-07 20:29:48 +010029
30#include "jni/jni_cfi_test_expected.inc"
31
32namespace art {
33
34// Run the tests only on host.
Bilyan Borisovbb661c02016-04-04 16:27:32 +010035#ifndef ART_TARGET_ANDROID
David Srbeckydd973932015-04-07 20:29:48 +010036
37class JNICFITest : public CFITest {
38 public:
39 // Enable this flag to generate the expected outputs.
40 static constexpr bool kGenerateExpected = false;
41
Andreas Gampe3b165bc2016-08-01 22:07:04 -070042 void TestImpl(InstructionSet isa,
43 const char* isa_str,
David Srbeckydd973932015-04-07 20:29:48 +010044 const std::vector<uint8_t>& expected_asm,
45 const std::vector<uint8_t>& expected_cfi) {
Andreas Gampe3b165bc2016-08-01 22:07:04 -070046 if (Is64BitInstructionSet(isa)) {
47 TestImplSized<PointerSize::k64>(isa, isa_str, expected_asm, expected_cfi);
48 } else {
49 TestImplSized<PointerSize::k32>(isa, isa_str, expected_asm, expected_cfi);
50 }
51 }
52
53 private:
54 template <PointerSize kPointerSize>
55 void TestImplSized(InstructionSet isa,
56 const char* isa_str,
57 const std::vector<uint8_t>& expected_asm,
58 const std::vector<uint8_t>& expected_cfi) {
David Srbeckydd973932015-04-07 20:29:48 +010059 // Description of simple method.
60 const bool is_static = true;
61 const bool is_synchronized = false;
62 const char* shorty = "IIFII";
Vladimir Marko93205e32016-04-13 11:59:46 +010063
64 ArenaPool pool;
Vladimir Marko69d310e2017-10-09 14:12:23 +010065 ArenaAllocator allocator(&pool);
Vladimir Marko93205e32016-04-13 11:59:46 +010066
David Srbeckydd973932015-04-07 20:29:48 +010067 std::unique_ptr<JniCallingConvention> jni_conv(
Vladimir Marko69d310e2017-10-09 14:12:23 +010068 JniCallingConvention::Create(&allocator,
Igor Murashkin367f3dd2016-09-01 17:00:24 -070069 is_static,
70 is_synchronized,
71 /*is_critical_native*/false,
72 shorty,
73 isa));
David Srbeckydd973932015-04-07 20:29:48 +010074 std::unique_ptr<ManagedRuntimeCallingConvention> mr_conv(
Vladimir Marko69d310e2017-10-09 14:12:23 +010075 ManagedRuntimeCallingConvention::Create(
76 &allocator, is_static, is_synchronized, shorty, isa));
David Srbeckydd973932015-04-07 20:29:48 +010077 const int frame_size(jni_conv->FrameSize());
Vladimir Marko32248382016-05-19 10:37:24 +010078 ArrayRef<const ManagedRegister> callee_save_regs = jni_conv->CalleeSaveRegisters();
David Srbeckydd973932015-04-07 20:29:48 +010079
80 // Assemble the method.
Andreas Gampe3b165bc2016-08-01 22:07:04 -070081 std::unique_ptr<JNIMacroAssembler<kPointerSize>> jni_asm(
Vladimir Marko69d310e2017-10-09 14:12:23 +010082 JNIMacroAssembler<kPointerSize>::Create(&allocator, isa));
Vladimir Marko10ef6942015-10-22 15:25:54 +010083 jni_asm->cfi().SetEnabled(true);
David Srbeckydd973932015-04-07 20:29:48 +010084 jni_asm->BuildFrame(frame_size, mr_conv->MethodRegister(),
85 callee_save_regs, mr_conv->EntrySpills());
86 jni_asm->IncreaseFrameSize(32);
87 jni_asm->DecreaseFrameSize(32);
Roland Levillain0d127e12017-07-05 17:01:11 +010088 jni_asm->RemoveFrame(frame_size, callee_save_regs, /* may_suspend */ true);
Vladimir Markocf93a5c2015-06-16 11:33:24 +000089 jni_asm->FinalizeCode();
David Srbeckydd973932015-04-07 20:29:48 +010090 std::vector<uint8_t> actual_asm(jni_asm->CodeSize());
91 MemoryRegion code(&actual_asm[0], actual_asm.size());
92 jni_asm->FinalizeInstructions(code);
93 ASSERT_EQ(jni_asm->cfi().GetCurrentCFAOffset(), frame_size);
94 const std::vector<uint8_t>& actual_cfi = *(jni_asm->cfi().data());
95
96 if (kGenerateExpected) {
97 GenerateExpected(stdout, isa, isa_str, actual_asm, actual_cfi);
98 } else {
99 EXPECT_EQ(expected_asm, actual_asm);
100 EXPECT_EQ(expected_cfi, actual_cfi);
101 }
102 }
103};
104
105#define TEST_ISA(isa) \
106 TEST_F(JNICFITest, isa) { \
107 std::vector<uint8_t> expected_asm(expected_asm_##isa, \
108 expected_asm_##isa + arraysize(expected_asm_##isa)); \
109 std::vector<uint8_t> expected_cfi(expected_cfi_##isa, \
110 expected_cfi_##isa + arraysize(expected_cfi_##isa)); \
111 TestImpl(isa, #isa, expected_asm, expected_cfi); \
112 }
113
Colin Crossa75b01a2016-08-18 13:45:24 -0700114#ifdef ART_ENABLE_CODEGEN_arm
Roland Levillain6d729a72017-06-30 18:34:01 +0100115// Run the tests for ARM only with Baker read barriers, as the
116// expected generated code contains a Marking Register refresh
117// instruction.
118#if defined(USE_READ_BARRIER) && defined(USE_BAKER_READ_BARRIER)
David Srbeckydd973932015-04-07 20:29:48 +0100119TEST_ISA(kThumb2)
Colin Crossa75b01a2016-08-18 13:45:24 -0700120#endif
Roland Levillain6d729a72017-06-30 18:34:01 +0100121#endif
Roland Levillainaf24def2017-07-12 13:18:01 +0100122
Colin Crossa75b01a2016-08-18 13:45:24 -0700123#ifdef ART_ENABLE_CODEGEN_arm64
Roland Levillainaf24def2017-07-12 13:18:01 +0100124// Run the tests for ARM64 only with Baker read barriers, as the
125// expected generated code contains a Marking Register refresh
126// instruction.
127#if defined(USE_READ_BARRIER) && defined(USE_BAKER_READ_BARRIER)
David Srbeckydd973932015-04-07 20:29:48 +0100128TEST_ISA(kArm64)
Colin Crossa75b01a2016-08-18 13:45:24 -0700129#endif
Roland Levillainaf24def2017-07-12 13:18:01 +0100130#endif
131
Colin Crossa75b01a2016-08-18 13:45:24 -0700132#ifdef ART_ENABLE_CODEGEN_x86
David Srbeckydd973932015-04-07 20:29:48 +0100133TEST_ISA(kX86)
Colin Crossa75b01a2016-08-18 13:45:24 -0700134#endif
Roland Levillainaf24def2017-07-12 13:18:01 +0100135
Colin Crossa75b01a2016-08-18 13:45:24 -0700136#ifdef ART_ENABLE_CODEGEN_x86_64
David Srbeckydd973932015-04-07 20:29:48 +0100137TEST_ISA(kX86_64)
Colin Crossa75b01a2016-08-18 13:45:24 -0700138#endif
Roland Levillainaf24def2017-07-12 13:18:01 +0100139
Colin Crossa75b01a2016-08-18 13:45:24 -0700140#ifdef ART_ENABLE_CODEGEN_mips
David Srbeckydd973932015-04-07 20:29:48 +0100141TEST_ISA(kMips)
Colin Crossa75b01a2016-08-18 13:45:24 -0700142#endif
Roland Levillainaf24def2017-07-12 13:18:01 +0100143
Colin Crossa75b01a2016-08-18 13:45:24 -0700144#ifdef ART_ENABLE_CODEGEN_mips64
David Srbeckydd973932015-04-07 20:29:48 +0100145TEST_ISA(kMips64)
Colin Crossa75b01a2016-08-18 13:45:24 -0700146#endif
David Srbeckydd973932015-04-07 20:29:48 +0100147
Bilyan Borisovbb661c02016-04-04 16:27:32 +0100148#endif // ART_TARGET_ANDROID
David Srbeckydd973932015-04-07 20:29:48 +0100149
150} // namespace art