Gitiles
Code Review Sign In
gerrit-public.fairphone.software / platform / art / 6ed960d260d0ec3cbbef455c646ccd47f4e78119 / . / src / compiler / Dataflow.cc
blob: c59b63708db0db04571c6764cc19918487b36cf6 [file] [log] [blame]
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "Dalvik.h"
18#include "Dataflow.h"
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]19
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]20namespace art {
21
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]22/*
23 * Main table containing data flow attributes for each bytecode. The
24 * first kNumPackedOpcodes entries are for Dalvik bytecode
25 * instructions, where extended opcode at the MIR level are appended
26 * afterwards.
27 *
28 * TODO - many optimization flags are incomplete - they will only limit the
29 * scope of optimizations but will not cause mis-optimizations.
30 */
buzbeeba938cb2012-02-03 14:47:55 -0800[diff] [blame]31const int oatDataFlowAttributes[kMirOpLast] = {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]32 // 00 NOP
33 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]34
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]35 // 01 MOVE vA, vB
36 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]37
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]38 // 02 MOVE_FROM16 vAA, vBBBB
39 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]40
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]41 // 03 MOVE_16 vAAAA, vBBBB
42 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]43
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]44 // 04 MOVE_WIDE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]45 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]46
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]47 // 05 MOVE_WIDE_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]48 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]49
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]50 // 06 MOVE_WIDE_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]51 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]52
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]53 // 07 MOVE_OBJECT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]54 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]55
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]56 // 08 MOVE_OBJECT_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]57 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]58
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]59 // 09 MOVE_OBJECT_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]60 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]61
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]62 // 0A MOVE_RESULT vAA
63 DF_DA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]64
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]65 // 0B MOVE_RESULT_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]66 DF_DA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]67
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]68 // 0C MOVE_RESULT_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]69 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]70
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]71 // 0D MOVE_EXCEPTION vAA
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]72 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]73
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]74 // 0E RETURN_VOID
75 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]76
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]77 // 0F RETURN vAA
78 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]79
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]80 // 10 RETURN_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]81 DF_UA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]82
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]83 // 11 RETURN_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]84 DF_UA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]85
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]86 // 12 CONST_4 vA, #+B
87 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]88
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]89 // 13 CONST_16 vAA, #+BBBB
90 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]91
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]92 // 14 CONST vAA, #+BBBBBBBB
93 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]94
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]95 // 15 CONST_HIGH16 VAA, #+BBBB0000
96 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]97
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]98 // 16 CONST_WIDE_16 vAA, #+BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]99 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]100
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]101 // 17 CONST_WIDE_32 vAA, #+BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]102 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]103
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]104 // 18 CONST_WIDE vAA, #+BBBBBBBBBBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]105 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]106
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]107 // 19 CONST_WIDE_HIGH16 vAA, #+BBBB000000000000
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]108 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]109
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]110 // 1A CONST_STRING vAA, string@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]111 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]112
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]113 // 1B CONST_STRING_JUMBO vAA, string@BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]114 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]115
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]116 // 1C CONST_CLASS vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]117 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]118
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]119 // 1D MONITOR_ENTER vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]120 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]121
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]122 // 1E MONITOR_EXIT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]123 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]124
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]125 // 1F CHK_CAST vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]126 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]127
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]128 // 20 INSTANCE_OF vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]129 DF_DA | DF_UB | DF_CORE_A | DF_REF_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]130
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]131 // 21 ARRAY_LENGTH vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]132 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_CORE_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]133
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]134 // 22 NEW_INSTANCE vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]135 DF_DA | DF_NON_NULL_DST | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]136
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]137 // 23 NEW_ARRAY vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]138 DF_DA | DF_UB | DF_NON_NULL_DST | DF_REF_A | DF_CORE_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]139
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]140 // 24 FILLED_NEW_ARRAY {vD, vE, vF, vG, vA}
141 DF_FORMAT_35C | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]142
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]143 // 25 FILLED_NEW_ARRAY_RANGE {vCCCC .. vNNNN}, type@BBBB
144 DF_FORMAT_3RC | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]145
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]146 // 26 FILL_ARRAY_DATA vAA, +BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]147 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]148
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]149 // 27 THROW vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]150 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]151
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]152 // 28 GOTO
153 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]154
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]155 // 29 GOTO_16
156 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]157
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]158 // 2A GOTO_32
159 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]160
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]161 // 2B PACKED_SWITCH vAA, +BBBBBBBB
162 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]163
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]164 // 2C SPARSE_SWITCH vAA, +BBBBBBBB
165 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]166
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]167 // 2D CMPL_FLOAT vAA, vBB, vCC
168 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]169
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]170 // 2E CMPG_FLOAT vAA, vBB, vCC
171 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]172
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]173 // 2F CMPL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]174 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]175
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]176 // 30 CMPG_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]177 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]178
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]179 // 31 CMP_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]180 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]181
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]182 // 32 IF_EQ vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]183 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]184
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]185 // 33 IF_NE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]186 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]187
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]188 // 34 IF_LT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]189 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]190
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]191 // 35 IF_GE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]192 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]193
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]194 // 36 IF_GT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]195 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]196
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]197 // 37 IF_LE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]198 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]199
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]200 // 38 IF_EQZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]201 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]202
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]203 // 39 IF_NEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]204 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]205
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]206 // 3A IF_LTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]207 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]208
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]209 // 3B IF_GEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]210 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]211
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]212 // 3C IF_GTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]213 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]214
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]215 // 3D IF_LEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]216 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]217
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]218 // 3E UNUSED_3E
219 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]220
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]221 // 3F UNUSED_3F
222 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]223
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]224 // 40 UNUSED_40
225 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]226
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]227 // 41 UNUSED_41
228 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]229
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]230 // 42 UNUSED_42
231 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]232
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]233 // 43 UNUSED_43
234 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]235
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]236 // 44 AGET vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]237 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]238
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]239 // 45 AGET_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]240 DF_DA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]241
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]242 // 46 AGET_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]243 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]244
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]245 // 47 AGET_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]246 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]247
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]248 // 48 AGET_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]249 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]250
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]251 // 49 AGET_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]252 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]253
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]254 // 4A AGET_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]255 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]256
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]257 // 4B APUT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]258 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]259
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]260 // 4C APUT_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]261 DF_UA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_2 | DF_RANGE_CHK_3 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]262
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]263 // 4D APUT_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]264 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]265
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]266 // 4E APUT_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]267 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]268
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]269 // 4F APUT_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]270 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]271
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]272 // 50 APUT_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]273 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]274
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]275 // 51 APUT_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]276 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]277
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]278 // 52 IGET vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]279 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]280
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]281 // 53 IGET_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]282 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]283
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]284 // 54 IGET_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]285 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]286
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]287 // 55 IGET_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]288 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]289
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]290 // 56 IGET_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]291 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]292
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]293 // 57 IGET_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]294 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]295
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]296 // 58 IGET_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]297 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]298
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]299 // 59 IPUT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]300 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]301
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]302 // 5A IPUT_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]303 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]304
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]305 // 5B IPUT_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]306 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]307
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]308 // 5C IPUT_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]309 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]310
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]311 // 5D IPUT_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]312 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]313
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]314 // 5E IPUT_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]315 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]316
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]317 // 5F IPUT_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]318 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]319
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]320 // 60 SGET vAA, field@BBBB
321 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]322
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]323 // 61 SGET_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]324 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]325
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]326 // 62 SGET_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]327 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]328
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]329 // 63 SGET_BOOLEAN vAA, field@BBBB
330 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]331
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]332 // 64 SGET_BYTE vAA, field@BBBB
333 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]334
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]335 // 65 SGET_CHAR vAA, field@BBBB
336 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]337
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]338 // 66 SGET_SHORT vAA, field@BBBB
339 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]340
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]341 // 67 SPUT vAA, field@BBBB
342 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]343
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]344 // 68 SPUT_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]345 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]346
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]347 // 69 SPUT_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]348 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]349
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]350 // 6A SPUT_BOOLEAN vAA, field@BBBB
351 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]352
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]353 // 6B SPUT_BYTE vAA, field@BBBB
354 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]355
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]356 // 6C SPUT_CHAR vAA, field@BBBB
357 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]358
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]359 // 6D SPUT_SHORT vAA, field@BBBB
360 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]361
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]362 // 6E INVOKE_VIRTUAL {vD, vE, vF, vG, vA}
363 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]364
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]365 // 6F INVOKE_SUPER {vD, vE, vF, vG, vA}
366 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]367
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]368 // 70 INVOKE_DIRECT {vD, vE, vF, vG, vA}
369 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]370
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]371 // 71 INVOKE_STATIC {vD, vE, vF, vG, vA}
372 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]373
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]374 // 72 INVOKE_INTERFACE {vD, vE, vF, vG, vA}
375 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]376
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]377 // 73 UNUSED_73
378 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]379
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]380 // 74 INVOKE_VIRTUAL_RANGE {vCCCC .. vNNNN}
381 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]382
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]383 // 75 INVOKE_SUPER_RANGE {vCCCC .. vNNNN}
384 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]385
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]386 // 76 INVOKE_DIRECT_RANGE {vCCCC .. vNNNN}
387 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]388
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]389 // 77 INVOKE_STATIC_RANGE {vCCCC .. vNNNN}
390 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]391
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]392 // 78 INVOKE_INTERFACE_RANGE {vCCCC .. vNNNN}
393 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]394
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]395 // 79 UNUSED_79
396 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]397
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]398 // 7A UNUSED_7A
399 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]400
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]401 // 7B NEG_INT vA, vB
402 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]403
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]404 // 7C NOT_INT vA, vB
405 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]406
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]407 // 7D NEG_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]408 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]409
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]410 // 7E NOT_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]411 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]412
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]413 // 7F NEG_FLOAT vA, vB
414 DF_DA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]415
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]416 // 80 NEG_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]417 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]418
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]419 // 81 INT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]420 DF_DA | DF_A_WIDE | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]421
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]422 // 82 INT_TO_FLOAT vA, vB
423 DF_DA | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]424
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]425 // 83 INT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]426 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]427
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]428 // 84 LONG_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]429 DF_DA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]430
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]431 // 85 LONG_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]432 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]433
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]434 // 86 LONG_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]435 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]436
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]437 // 87 FLOAT_TO_INT vA, vB
438 DF_DA | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]439
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]440 // 88 FLOAT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]441 DF_DA | DF_A_WIDE | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]442
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]443 // 89 FLOAT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]444 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]445
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]446 // 8A DOUBLE_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]447 DF_DA | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]448
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]449 // 8B DOUBLE_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]450 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]451
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]452 // 8C DOUBLE_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]453 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]454
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]455 // 8D INT_TO_BYTE vA, vB
456 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]457
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]458 // 8E INT_TO_CHAR vA, vB
459 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]460
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]461 // 8F INT_TO_SHORT vA, vB
462 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]463
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]464 // 90 ADD_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]465 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]466
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]467 // 91 SUB_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]468 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]469
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]470 // 92 MUL_INT vAA, vBB, vCC
471 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]472
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]473 // 93 DIV_INT vAA, vBB, vCC
474 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]475
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]476 // 94 REM_INT vAA, vBB, vCC
477 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]478
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]479 // 95 AND_INT vAA, vBB, vCC
480 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]481
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]482 // 96 OR_INT vAA, vBB, vCC
483 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]484
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]485 // 97 XOR_INT vAA, vBB, vCC
486 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]487
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]488 // 98 SHL_INT vAA, vBB, vCC
489 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]490
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]491 // 99 SHR_INT vAA, vBB, vCC
492 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]493
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]494 // 9A USHR_INT vAA, vBB, vCC
495 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]496
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]497 // 9B ADD_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]498 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]499
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]500 // 9C SUB_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]501 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]502
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]503 // 9D MUL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]504 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]505
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]506 // 9E DIV_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]507 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]508
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]509 // 9F REM_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]510 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]511
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]512 // A0 AND_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]513 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]514
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]515 // A1 OR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]516 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]517
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]518 // A2 XOR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]519 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]520
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]521 // A3 SHL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]522 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]523
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]524 // A4 SHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]525 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]526
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]527 // A5 USHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]528 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]529
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]530 // A6 ADD_FLOAT vAA, vBB, vCC
531 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]532
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]533 // A7 SUB_FLOAT vAA, vBB, vCC
534 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]535
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]536 // A8 MUL_FLOAT vAA, vBB, vCC
537 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]538
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]539 // A9 DIV_FLOAT vAA, vBB, vCC
540 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]541
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]542 // AA REM_FLOAT vAA, vBB, vCC
543 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]544
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]545 // AB ADD_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]546 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]547
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]548 // AC SUB_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]549 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]550
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]551 // AD MUL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]552 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]553
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]554 // AE DIV_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]555 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]556
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]557 // AF REM_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]558 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]559
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]560 // B0 ADD_INT_2ADDR vA, vB
561 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]562
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]563 // B1 SUB_INT_2ADDR vA, vB
564 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]565
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]566 // B2 MUL_INT_2ADDR vA, vB
567 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]568
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]569 // B3 DIV_INT_2ADDR vA, vB
570 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]571
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]572 // B4 REM_INT_2ADDR vA, vB
573 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]574
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]575 // B5 AND_INT_2ADDR vA, vB
576 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]577
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]578 // B6 OR_INT_2ADDR vA, vB
579 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]580
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]581 // B7 XOR_INT_2ADDR vA, vB
582 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]583
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]584 // B8 SHL_INT_2ADDR vA, vB
585 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]586
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]587 // B9 SHR_INT_2ADDR vA, vB
588 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]589
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]590 // BA USHR_INT_2ADDR vA, vB
591 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]592
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]593 // BB ADD_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]594 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]595
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]596 // BC SUB_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]597 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]598
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]599 // BD MUL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]600 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]601
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]602 // BE DIV_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]603 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]604
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]605 // BF REM_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]606 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]607
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]608 // C0 AND_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]609 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]610
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]611 // C1 OR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]612 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]613
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]614 // C2 XOR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]615 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]616
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]617 // C3 SHL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]618 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]619
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]620 // C4 SHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]621 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]622
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]623 // C5 USHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]624 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]625
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]626 // C6 ADD_FLOAT_2ADDR vA, vB
627 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]628
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]629 // C7 SUB_FLOAT_2ADDR vA, vB
630 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]631
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]632 // C8 MUL_FLOAT_2ADDR vA, vB
633 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]634
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]635 // C9 DIV_FLOAT_2ADDR vA, vB
636 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]637
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]638 // CA REM_FLOAT_2ADDR vA, vB
639 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]640
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]641 // CB ADD_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]642 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]643
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]644 // CC SUB_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]645 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]646
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]647 // CD MUL_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]648 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]649
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]650 // CE DIV_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]651 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]652
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]653 // CF REM_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]654 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]655
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]656 // D0 ADD_INT_LIT16 vA, vB, #+CCCC
657 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]658
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]659 // D1 RSUB_INT vA, vB, #+CCCC
660 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]661
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]662 // D2 MUL_INT_LIT16 vA, vB, #+CCCC
663 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]664
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]665 // D3 DIV_INT_LIT16 vA, vB, #+CCCC
666 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]667
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]668 // D4 REM_INT_LIT16 vA, vB, #+CCCC
669 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]670
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]671 // D5 AND_INT_LIT16 vA, vB, #+CCCC
672 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]673
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]674 // D6 OR_INT_LIT16 vA, vB, #+CCCC
675 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]676
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]677 // D7 XOR_INT_LIT16 vA, vB, #+CCCC
678 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]679
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]680 // D8 ADD_INT_LIT8 vAA, vBB, #+CC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]681 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]682
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]683 // D9 RSUB_INT_LIT8 vAA, vBB, #+CC
684 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]685
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]686 // DA MUL_INT_LIT8 vAA, vBB, #+CC
687 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]688
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]689 // DB DIV_INT_LIT8 vAA, vBB, #+CC
690 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]691
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]692 // DC REM_INT_LIT8 vAA, vBB, #+CC
693 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]694
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]695 // DD AND_INT_LIT8 vAA, vBB, #+CC
696 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]697
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]698 // DE OR_INT_LIT8 vAA, vBB, #+CC
699 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]700
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]701 // DF XOR_INT_LIT8 vAA, vBB, #+CC
702 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]703
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]704 // E0 SHL_INT_LIT8 vAA, vBB, #+CC
705 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]706
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]707 // E1 SHR_INT_LIT8 vAA, vBB, #+CC
708 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]709
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]710 // E2 USHR_INT_LIT8 vAA, vBB, #+CC
711 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]712
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]713 // E3 IGET_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]714 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]715
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]716 // E4 IPUT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]717 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]718
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]719 // E5 SGET_VOLATILE
720 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]721
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]722 // E6 SPUT_VOLATILE
723 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]724
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]725 // E7 IGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]726 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]727
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]728 // E8 IGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]729 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]730
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]731 // E9 IPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]732 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]733
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]734 // EA SGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]735 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]736
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]737 // EB SPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]738 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]739
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]740 // EC BREAKPOINT
741 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]742
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]743 // ED THROW_VERIFICATION_ERROR
744 DF_NOP | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]745
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]746 // EE EXECUTE_INLINE
747 DF_FORMAT_35C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]748
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]749 // EF EXECUTE_INLINE_RANGE
750 DF_FORMAT_3RC,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]751
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]752 // F0 INVOKE_OBJECT_INIT_RANGE
753 DF_NOP | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]754
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]755 // F1 RETURN_VOID_BARRIER
756 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]757
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]758 // F2 IGET_QUICK
759 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]760
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]761 // F3 IGET_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]762 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]763
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]764 // F4 IGET_OBJECT_QUICK
765 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]766
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]767 // F5 IPUT_QUICK
768 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]769
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]770 // F6 IPUT_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]771 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]772
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]773 // F7 IPUT_OBJECT_QUICK
774 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]775
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]776 // F8 INVOKE_VIRTUAL_QUICK
777 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]778
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]779 // F9 INVOKE_VIRTUAL_QUICK_RANGE
780 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]781
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]782 // FA INVOKE_SUPER_QUICK
783 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]784
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]785 // FB INVOKE_SUPER_QUICK_RANGE
786 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]787
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]788 // FC IPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]789 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]790
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]791 // FD SGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]792 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]793
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]794 // FE SPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]795 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]796
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]797 // FF UNUSED_FF
798 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]799
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]800 // Beginning of extended MIR opcodes
801 // 100 MIR_PHI
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]802 DF_DA | DF_NULL_TRANSFER_N,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]803
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]804 // 101 MIR_COPY
805 DF_DA | DF_UB | DF_IS_MOVE,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]806
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]807 // 102 MIR_FUSED_CMPL_FLOAT
808 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]809
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]810 // 103 MIR_FUSED_CMPG_FLOAT
811 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]812
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]813 // 104 MIR_FUSED_CMPL_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]814 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]815
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]816 // 105 MIR_FUSED_CMPG_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]817 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]818
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]819 // 106 MIR_FUSED_CMP_LONG
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]820 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]821
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]822 // 107 MIR_NOP
823 DF_NOP,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]824
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]825 // 108 MIR_NULL_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]826 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]827
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]828 // 109 MIR_RANGE_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]829 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]830
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]831 // 110 MIR_DIV_ZERO_CHECK
832 0,
833
834 // 111 MIR_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]835 0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]836};
837
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]838/* Return the base virtual register for a SSA name */
839int SRegToVReg(const CompilationUnit* cUnit, int ssaReg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]840{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]841 DCHECK_LT(ssaReg, (int)cUnit->ssaBaseVRegs->numUsed);
842 return GET_ELEM_N(cUnit->ssaBaseVRegs, int, ssaReg);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]843}
844
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]845int SRegToSubscript(const CompilationUnit* cUnit, int ssaReg)
846{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]847 DCHECK(ssaReg < (int)cUnit->ssaSubscripts->numUsed);
848 return GET_ELEM_N(cUnit->ssaSubscripts, int, ssaReg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]849}
850
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]851int getSSAUseCount(CompilationUnit* cUnit, int sReg)
852{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]853 DCHECK(sReg < (int)cUnit->rawUseCounts.numUsed);
854 return cUnit->rawUseCounts.elemList[sReg];
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]855}
856
857
buzbeeba938cb2012-02-03 14:47:55 -0800[diff] [blame]858char* oatGetDalvikDisassembly(CompilationUnit* cUnit,
Elliott Hughesadb8c672012-03-06 16:49:32 -0800[diff] [blame]859 const DecodedInstruction& insn, const char* note)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]860{
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]861 std::string str;
862 int opcode = insn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]863 int dfAttributes = oatDataFlowAttributes[opcode];
864 int flags;
865 char* ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]866
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]867 if (opcode >= kMirOpFirst) {
868 if (opcode == kMirOpPhi) {
869 str.append("PHI");
870 } else if (opcode == kMirOpCheck) {
871 str.append("Check");
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]872 } else {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]873 str.append(StringPrintf("Opcode %#x", opcode));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]874 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]875 flags = 0;
876 } else {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]877 str.append(Instruction::Name(insn.opcode));
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]878 flags = Instruction::FlagsOf(insn.opcode);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]879 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]880
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]881 if (note) {
882 str.append(note);
883 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]884
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]885 /* For branches, decode the instructions to print out the branch targets */
886 if (flags & Instruction::kBranch) {
887 Instruction::Format dalvikFormat = Instruction::FormatOf(insn.opcode);
888 int offset = 0;
889 switch (dalvikFormat) {
890 case Instruction::k21t:
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]891 str.append(StringPrintf(" v%d,", insn.vA));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]892 offset = (int) insn.vB;
893 break;
894 case Instruction::k22t:
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]895 str.append(StringPrintf(" v%d, v%d,", insn.vA, insn.vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]896 offset = (int) insn.vC;
897 break;
898 case Instruction::k10t:
899 case Instruction::k20t:
900 case Instruction::k30t:
901 offset = (int) insn.vA;
902 break;
903 default:
904 LOG(FATAL) << "Unexpected branch format " << (int)dalvikFormat
905 << " / opcode " << (int)opcode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]906 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]907 str.append(StringPrintf(" (%c%x)",
908 offset > 0 ? '+' : '-',
909 offset > 0 ? offset : -offset));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]910 } else if (dfAttributes & DF_FORMAT_35C) {
911 unsigned int i;
912 for (i = 0; i < insn.vA; i++) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]913 if (i != 0) str.append(",");
914 str.append(StringPrintf(" v%d", insn.arg[i]));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]915 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]916 }
917 else if (dfAttributes & DF_FORMAT_3RC) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]918 str.append(StringPrintf(" v%d..v%d", insn.vC, insn.vC + insn.vA - 1));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]919 } else {
920 if (dfAttributes & DF_A_IS_REG) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]921 str.append(StringPrintf(" v%d", insn.vA));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]922 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]923 if (dfAttributes & DF_B_IS_REG) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]924 str.append(StringPrintf(", v%d", insn.vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]925 } else if ((int)opcode < (int)kMirOpFirst) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]926 str.append(StringPrintf(", (#%d)", insn.vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]927 }
928 if (dfAttributes & DF_C_IS_REG) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]929 str.append(StringPrintf(", v%d", insn.vC));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]930 } else if ((int)opcode < (int)kMirOpFirst) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]931 str.append(StringPrintf(", (#%d)", insn.vC));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]932 }
933 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]934 int length = str.length() + 1;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]935 ret = (char*)oatNew(cUnit, length, false, kAllocDFInfo);
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]936 strncpy(ret, str.c_str(), length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]937 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]938}
939
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]940std::string getSSAName(const CompilationUnit* cUnit, int ssaReg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]941{
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]942 return StringPrintf("v%d_%d", SRegToVReg(cUnit, ssaReg),
943 SRegToSubscript(cUnit, ssaReg));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]944}
945
946/*
947 * Dalvik instruction disassembler with optional SSA printing.
948 */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]949char* oatFullDisassembler(CompilationUnit* cUnit, const MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]950{
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]951 std::string str;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]952 const DecodedInstruction* insn = &mir->dalvikInsn;
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]953 int opcode = insn->opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]954 int dfAttributes = oatDataFlowAttributes[opcode];
955 char* ret;
956 int length;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]957
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]958 if (opcode >= kMirOpFirst) {
959 if (opcode == kMirOpPhi) {
960 int* incoming = (int*)mir->dalvikInsn.vB;
961 str.append(StringPrintf("PHI %s = (%s",
962 getSSAName(cUnit, mir->ssaRep->defs[0]).c_str(),
963 getSSAName(cUnit, mir->ssaRep->uses[0]).c_str()));
964 str.append(StringPrintf(":%d",incoming[0]));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]965 int i;
966 for (i = 1; i < mir->ssaRep->numUses; i++) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]967 str.append(StringPrintf(", %s:%d",
968 getSSAName(cUnit, mir->ssaRep->uses[i]).c_str(),
969 incoming[i]));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]970 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]971 str.append(")");
972 } else if (opcode == kMirOpCheck) {
973 str.append("Check ");
974 str.append(Instruction::Name(mir->meta.throwInsn->dalvikInsn.opcode));
975 } else if (opcode == kMirOpNop) {
976 str.append("MirNop");
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]977 } else {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]978 str.append(StringPrintf("Opcode %#x", opcode));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]979 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]980 goto done;
981 } else {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]982 str.append(Instruction::Name(insn->opcode));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]983 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]984
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]985 /* For branches, decode the instructions to print out the branch targets */
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]986 if (Instruction::FlagsOf(insn->opcode) & Instruction::kBranch) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]987 Instruction::Format dalvikFormat = Instruction::FormatOf(insn->opcode);
988 int delta = 0;
989 switch (dalvikFormat) {
990 case Instruction::k21t:
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]991 str.append(StringPrintf(" %s, ",
992 getSSAName(cUnit, mir->ssaRep->uses[0]).c_str()));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]993 delta = (int) insn->vB;
994 break;
995 case Instruction::k22t:
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]996 str.append(StringPrintf(" %s, %s, ",
997 getSSAName(cUnit, mir->ssaRep->uses[0]).c_str(),
998 getSSAName(cUnit, mir->ssaRep->uses[1]).c_str()));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]999 delta = (int) insn->vC;
1000 break;
1001 case Instruction::k10t:
1002 case Instruction::k20t:
1003 case Instruction::k30t:
1004 delta = (int) insn->vA;
1005 break;
1006 default:
1007 LOG(FATAL) << "Unexpected branch format: " << (int)dalvikFormat;
1008 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1009 str.append(StringPrintf(" %04x", mir->offset + delta));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1010 } else if (dfAttributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) {
1011 unsigned int i;
1012 for (i = 0; i < insn->vA; i++) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1013 if (i != 0) str.append(",");
1014 str.append(" ");
1015 str.append(getSSAName(cUnit, mir->ssaRep->uses[i]));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1016 }
1017 } else {
1018 int udIdx;
1019 if (mir->ssaRep->numDefs) {
1020
1021 for (udIdx = 0; udIdx < mir->ssaRep->numDefs; udIdx++) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1022 str.append(" ");
1023 str.append(getSSAName(cUnit, mir->ssaRep->defs[udIdx]));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1024 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1025 str.append(",");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1026 }
1027 if (mir->ssaRep->numUses) {
1028 /* No leading ',' for the first use */
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1029 str.append(" ");
1030 str.append(getSSAName(cUnit, mir->ssaRep->uses[0]));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1031 for (udIdx = 1; udIdx < mir->ssaRep->numUses; udIdx++) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1032 str.append(", ");
1033 str.append(getSSAName(cUnit, mir->ssaRep->uses[udIdx]));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1034 }
1035 }
1036 if (static_cast<int>(opcode) < static_cast<int>(kMirOpFirst)) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1037 Instruction::Format dalvikFormat = Instruction::FormatOf(insn->opcode);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1038 switch (dalvikFormat) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1039 case Instruction::k11n: // op vA, #+B
1040 case Instruction::k21s: // op vAA, #+BBBB
1041 case Instruction::k21h: // op vAA, #+BBBB00000[00000000]
1042 case Instruction::k31i: // op vAA, #+BBBBBBBB
1043 case Instruction::k51l: // op vAA, #+BBBBBBBBBBBBBBBB
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1044 str.append(StringPrintf(" #%#x", insn->vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1045 break;
1046 case Instruction::k21c: // op vAA, thing@BBBB
1047 case Instruction::k31c: // op vAA, thing@BBBBBBBB
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1048 str.append(StringPrintf(" @%#x", insn->vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1049 break;
1050 case Instruction::k22b: // op vAA, vBB, #+CC
1051 case Instruction::k22s: // op vA, vB, #+CCCC
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1052 str.append(StringPrintf(" #%#x", insn->vC));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1053 break;
1054 case Instruction::k22c: // op vA, vB, thing@CCCC
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1055 str.append(StringPrintf(" @%#x", insn->vC));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1056 break;
1057 /* No need for special printing */
1058 default:
1059 break;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1060 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1061 }
1062 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1063
1064done:
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1065 length = str.length() + 1;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1066 ret = (char*) oatNew(cUnit, length, false, kAllocDFInfo);
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1067 strncpy(ret, str.c_str(), length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1068 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1069}
1070
Elliott Hughesc1f143d2011-12-01 17:31:10 -0800[diff] [blame]1071char* oatGetSSAString(CompilationUnit* cUnit, SSARepresentation* ssaRep)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1072{
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1073 std::string str;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1074 char* ret;
1075 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1076
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1077 for (i = 0; i < ssaRep->numDefs; i++) {
1078 int ssaReg = ssaRep->defs[i];
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1079 str.append(StringPrintf("s%d(v%d_%d) ", ssaReg,
1080 SRegToVReg(cUnit, ssaReg),
1081 SRegToSubscript(cUnit, ssaReg)));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1082 }
1083
1084 if (ssaRep->numDefs) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1085 str.append("<- ");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1086 }
1087
1088 for (i = 0; i < ssaRep->numUses; i++) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1089 int ssaReg = ssaRep->uses[i];
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1090 str.append(StringPrintf("s%d(v%d_%d) ", ssaReg, SRegToVReg(cUnit, ssaReg),
1091 SRegToSubscript(cUnit, ssaReg)));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1092 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1093
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1094 int length = str.length() + 1;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1095 ret = (char*)oatNew(cUnit, length, false, kAllocDFInfo);
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1096 strncpy(ret, str.c_str(), length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1097 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1098}
1099
1100/* Any register that is used before being defined is considered live-in */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1101inline void handleLiveInUse(CompilationUnit* cUnit, ArenaBitVector* useV,
1102 ArenaBitVector* defV, ArenaBitVector* liveInV,
1103 int dalvikRegId)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1104{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1105 oatSetBit(cUnit, useV, dalvikRegId);
1106 if (!oatIsBitSet(defV, dalvikRegId)) {
1107 oatSetBit(cUnit, liveInV, dalvikRegId);
1108 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1109}
1110
1111/* Mark a reg as being defined */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1112inline void handleDef(CompilationUnit* cUnit, ArenaBitVector* defV,
1113 int dalvikRegId)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1114{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1115 oatSetBit(cUnit, defV, dalvikRegId);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1116}
1117
1118/*
1119 * Find out live-in variables for natural loops. Variables that are live-in in
1120 * the main loop body are considered to be defined in the entry block.
1121 */
1122bool oatFindLocalLiveIn(CompilationUnit* cUnit, BasicBlock* bb)
1123{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1124 MIR* mir;
1125 ArenaBitVector *useV, *defV, *liveInV;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1126
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1127 if (bb->dataFlowInfo == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1128
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1129 useV = bb->dataFlowInfo->useV =
1130 oatAllocBitVector(cUnit, cUnit->numDalvikRegisters, false, kBitMapUse);
1131 defV = bb->dataFlowInfo->defV =
1132 oatAllocBitVector(cUnit, cUnit->numDalvikRegisters, false, kBitMapDef);
1133 liveInV = bb->dataFlowInfo->liveInV =
1134 oatAllocBitVector(cUnit, cUnit->numDalvikRegisters, false,
1135 kBitMapLiveIn);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1136
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1137 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
1138 int dfAttributes = oatDataFlowAttributes[mir->dalvikInsn.opcode];
1139 DecodedInstruction *dInsn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1140
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1141 if (dfAttributes & DF_HAS_USES) {
1142 if (dfAttributes & DF_UA) {
1143 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vA);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1144 if (dfAttributes & DF_A_WIDE) {
1145 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vA+1);
1146 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1147 }
1148 if (dfAttributes & DF_UB) {
1149 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vB);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1150 if (dfAttributes & DF_B_WIDE) {
1151 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vB+1);
1152 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1153 }
1154 if (dfAttributes & DF_UC) {
1155 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vC);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1156 if (dfAttributes & DF_C_WIDE) {
1157 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vC+1);
1158 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1159 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1160 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1161 if (dfAttributes & DF_FORMAT_35C) {
1162 for (unsigned int i = 0; i < dInsn->vA; i++) {
1163 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->arg[i]);
1164 }
1165 }
1166 if (dfAttributes & DF_FORMAT_3RC) {
1167 for (unsigned int i = 0; i < dInsn->vA; i++) {
1168 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vC+i);
1169 }
1170 }
1171 if (dfAttributes & DF_HAS_DEFS) {
1172 handleDef(cUnit, defV, dInsn->vA);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1173 if (dfAttributes & DF_A_WIDE) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1174 handleDef(cUnit, defV, dInsn->vA+1);
1175 }
1176 }
1177 }
1178 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1179}
1180
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1181int addNewSReg(CompilationUnit* cUnit, int vReg)
1182{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1183 // Compiler temps always have a subscript of 0
1184 int subscript = (vReg < 0) ? 0 : ++cUnit->SSALastDefs[vReg];
1185 int ssaReg = cUnit->numSSARegs++;
1186 oatInsertGrowableList(cUnit, cUnit->ssaBaseVRegs, vReg);
1187 oatInsertGrowableList(cUnit, cUnit->ssaSubscripts, subscript);
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1188 std::string ssaName = getSSAName(cUnit, ssaReg);
1189 char* name = (char*)oatNew(cUnit, ssaName.length() + 1, false, kAllocDFInfo);
1190 strncpy(name, ssaName.c_str(), ssaName.length() + 1);
1191 oatInsertGrowableList(cUnit, cUnit->ssaStrings, (intptr_t)name);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1192 DCHECK_EQ(cUnit->ssaBaseVRegs->numUsed, cUnit->ssaSubscripts->numUsed);
1193 return ssaReg;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1194}
1195
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1196/* Find out the latest SSA register for a given Dalvik register */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1197void handleSSAUse(CompilationUnit* cUnit, int* uses, int dalvikReg,
1198 int regIndex)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1199{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1200 DCHECK((dalvikReg >= 0) && (dalvikReg < cUnit->numDalvikRegisters));
1201 uses[regIndex] = cUnit->vRegToSSAMap[dalvikReg];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1202}
1203
1204/* Setup a new SSA register for a given Dalvik register */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1205void handleSSADef(CompilationUnit* cUnit, int* defs, int dalvikReg,
1206 int regIndex)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1207{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1208 DCHECK((dalvikReg >= 0) && (dalvikReg < cUnit->numDalvikRegisters));
1209 int ssaReg = addNewSReg(cUnit, dalvikReg);
1210 cUnit->vRegToSSAMap[dalvikReg] = ssaReg;
1211 defs[regIndex] = ssaReg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1212}
1213
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1214/* Look up new SSA names for format_35c instructions */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1215void dataFlowSSAFormat35C(CompilationUnit* cUnit, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1216{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1217 DecodedInstruction *dInsn = &mir->dalvikInsn;
1218 int numUses = dInsn->vA;
1219 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1220
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1221 mir->ssaRep->numUses = numUses;
1222 mir->ssaRep->uses = (int *)oatNew(cUnit, sizeof(int) * numUses, true,
1223 kAllocDFInfo);
1224 // NOTE: will be filled in during type & size inference pass
1225 mir->ssaRep->fpUse = (bool *)oatNew(cUnit, sizeof(bool) * numUses, true,
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1226 kAllocDFInfo);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1227
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1228 for (i = 0; i < numUses; i++) {
1229 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->arg[i], i);
1230 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1231}
1232
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1233/* Look up new SSA names for format_3rc instructions */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1234void dataFlowSSAFormat3RC(CompilationUnit* cUnit, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1235{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1236 DecodedInstruction *dInsn = &mir->dalvikInsn;
1237 int numUses = dInsn->vA;
1238 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1239
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1240 mir->ssaRep->numUses = numUses;
1241 mir->ssaRep->uses = (int *)oatNew(cUnit, sizeof(int) * numUses, true,
1242 kAllocDFInfo);
1243 // NOTE: will be filled in during type & size inference pass
1244 mir->ssaRep->fpUse = (bool *)oatNew(cUnit, sizeof(bool) * numUses, true,
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1245 kAllocDFInfo);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1246
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1247 for (i = 0; i < numUses; i++) {
1248 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC+i, i);
1249 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1250}
1251
1252/* Entry function to convert a block into SSA representation */
1253bool oatDoSSAConversion(CompilationUnit* cUnit, BasicBlock* bb)
1254{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1255 MIR* mir;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1256
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1257 if (bb->dataFlowInfo == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1258
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1259 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
1260 mir->ssaRep = (struct SSARepresentation *)
1261 oatNew(cUnit, sizeof(SSARepresentation), true, kAllocDFInfo);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1262
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1263 int dfAttributes = oatDataFlowAttributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1264
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1265 // If not a pseudo-op, note non-leaf or can throw
1266 if (static_cast<int>(mir->dalvikInsn.opcode) <
1267 static_cast<int>(kNumPackedOpcodes)) {
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]1268 int flags = Instruction::FlagsOf(mir->dalvikInsn.opcode);
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1269
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1270 if (flags & Instruction::kThrow) {
1271 cUnit->attrs &= ~METHOD_IS_THROW_FREE;
1272 }
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1273
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1274 if (flags & Instruction::kInvoke) {
1275 cUnit->attrs &= ~METHOD_IS_LEAF;
1276 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1277 }
1278
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1279 int numUses = 0;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1280
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1281 if (dfAttributes & DF_FORMAT_35C) {
1282 dataFlowSSAFormat35C(cUnit, mir);
1283 continue;
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1284 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1285
1286 if (dfAttributes & DF_FORMAT_3RC) {
1287 dataFlowSSAFormat3RC(cUnit, mir);
1288 continue;
1289 }
1290
1291 if (dfAttributes & DF_HAS_USES) {
1292 if (dfAttributes & DF_UA) {
1293 numUses++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1294 if (dfAttributes & DF_A_WIDE) {
1295 numUses ++;
1296 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1297 }
1298 if (dfAttributes & DF_UB) {
1299 numUses++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1300 if (dfAttributes & DF_B_WIDE) {
1301 numUses ++;
1302 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1303 }
1304 if (dfAttributes & DF_UC) {
1305 numUses++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1306 if (dfAttributes & DF_C_WIDE) {
1307 numUses ++;
1308 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1309 }
1310 }
1311
1312 if (numUses) {
1313 mir->ssaRep->numUses = numUses;
1314 mir->ssaRep->uses = (int *)oatNew(cUnit, sizeof(int) * numUses,
1315 false, kAllocDFInfo);
1316 mir->ssaRep->fpUse = (bool *)oatNew(cUnit, sizeof(bool) * numUses,
1317 false, kAllocDFInfo);
1318 }
1319
1320 int numDefs = 0;
1321
1322 if (dfAttributes & DF_HAS_DEFS) {
1323 numDefs++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1324 if (dfAttributes & DF_A_WIDE) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1325 numDefs++;
1326 }
1327 }
1328
1329 if (numDefs) {
1330 mir->ssaRep->numDefs = numDefs;
1331 mir->ssaRep->defs = (int *)oatNew(cUnit, sizeof(int) * numDefs,
1332 false, kAllocDFInfo);
1333 mir->ssaRep->fpDef = (bool *)oatNew(cUnit, sizeof(bool) * numDefs,
1334 false, kAllocDFInfo);
1335 }
1336
1337 DecodedInstruction *dInsn = &mir->dalvikInsn;
1338
1339 if (dfAttributes & DF_HAS_USES) {
1340 numUses = 0;
1341 if (dfAttributes & DF_UA) {
1342 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_A;
1343 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vA, numUses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1344 if (dfAttributes & DF_A_WIDE) {
1345 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_A;
1346 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vA+1, numUses++);
1347 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1348 }
1349 if (dfAttributes & DF_UB) {
1350 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_B;
1351 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vB, numUses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1352 if (dfAttributes & DF_B_WIDE) {
1353 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_B;
1354 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vB+1, numUses++);
1355 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1356 }
1357 if (dfAttributes & DF_UC) {
1358 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_C;
1359 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC, numUses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1360 if (dfAttributes & DF_C_WIDE) {
1361 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_C;
1362 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC+1, numUses++);
1363 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1364 }
1365 }
1366 if (dfAttributes & DF_HAS_DEFS) {
1367 mir->ssaRep->fpDef[0] = dfAttributes & DF_FP_A;
1368 handleSSADef(cUnit, mir->ssaRep->defs, dInsn->vA, 0);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1369 if (dfAttributes & DF_A_WIDE) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1370 mir->ssaRep->fpDef[1] = dfAttributes & DF_FP_A;
1371 handleSSADef(cUnit, mir->ssaRep->defs, dInsn->vA+1, 1);
1372 }
1373 }
1374 }
1375
1376 if (!cUnit->disableDataflow) {
1377 /*
1378 * Take a snapshot of Dalvik->SSA mapping at the end of each block. The
1379 * input to PHI nodes can be derived from the snapshot of all
1380 * predecessor blocks.
1381 */
1382 bb->dataFlowInfo->vRegToSSAMap =
1383 (int *)oatNew(cUnit, sizeof(int) * cUnit->numDalvikRegisters, false,
1384 kAllocDFInfo);
1385
1386 memcpy(bb->dataFlowInfo->vRegToSSAMap, cUnit->vRegToSSAMap,
1387 sizeof(int) * cUnit->numDalvikRegisters);
1388 }
1389 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1390}
1391
1392/* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1393void setConstant(CompilationUnit* cUnit, int ssaReg, int value)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1394{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1395 oatSetBit(cUnit, cUnit->isConstantV, ssaReg);
1396 cUnit->constantValues[ssaReg] = value;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1397}
1398
1399bool oatDoConstantPropagation(CompilationUnit* cUnit, BasicBlock* bb)
1400{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1401 MIR* mir;
1402 ArenaBitVector *isConstantV = cUnit->isConstantV;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1403
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1404 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
1405 int dfAttributes = oatDataFlowAttributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1406
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1407 DecodedInstruction *dInsn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1408
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1409 if (!(dfAttributes & DF_HAS_DEFS)) continue;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1410
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1411 /* Handle instructions that set up constants directly */
1412 if (dfAttributes & DF_SETS_CONST) {
1413 if (dfAttributes & DF_DA) {
1414 switch (dInsn->opcode) {
1415 case Instruction::CONST_4:
1416 case Instruction::CONST_16:
1417 case Instruction::CONST:
1418 setConstant(cUnit, mir->ssaRep->defs[0], dInsn->vB);
1419 break;
1420 case Instruction::CONST_HIGH16:
1421 setConstant(cUnit, mir->ssaRep->defs[0], dInsn->vB << 16);
1422 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1423 case Instruction::CONST_WIDE_16:
1424 case Instruction::CONST_WIDE_32:
1425 setConstant(cUnit, mir->ssaRep->defs[0], dInsn->vB);
1426 setConstant(cUnit, mir->ssaRep->defs[1], 0);
1427 break;
1428 case Instruction::CONST_WIDE:
1429 setConstant(cUnit, mir->ssaRep->defs[0], (int) dInsn->vB_wide);
1430 setConstant(cUnit, mir->ssaRep->defs[1],
1431 (int) (dInsn->vB_wide >> 32));
1432 break;
1433 case Instruction::CONST_WIDE_HIGH16:
1434 setConstant(cUnit, mir->ssaRep->defs[0], 0);
1435 setConstant(cUnit, mir->ssaRep->defs[1], dInsn->vB << 16);
1436 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1437 default:
1438 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1439 }
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1440 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1441 /* Handle instructions that set up constants directly */
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1442 } else if (dfAttributes & DF_IS_MOVE) {
1443 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1444
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1445 for (i = 0; i < mir->ssaRep->numUses; i++) {
1446 if (!oatIsBitSet(isConstantV, mir->ssaRep->uses[i])) break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1447 }
1448 /* Move a register holding a constant to another register */
1449 if (i == mir->ssaRep->numUses) {
1450 setConstant(cUnit, mir->ssaRep->defs[0],
1451 cUnit->constantValues[mir->ssaRep->uses[0]]);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1452 if (dfAttributes & DF_A_WIDE) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1453 setConstant(cUnit, mir->ssaRep->defs[1],
1454 cUnit->constantValues[mir->ssaRep->uses[1]]);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1455 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1456 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1457 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1458 }
1459 /* TODO: implement code to handle arithmetic operations */
1460 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1461}
1462
1463/* Setup the basic data structures for SSA conversion */
1464void oatInitializeSSAConversion(CompilationUnit* cUnit)
1465{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1466 int i;
1467 int numDalvikReg = cUnit->numDalvikRegisters;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1468
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1469 cUnit->ssaBaseVRegs = (GrowableList *)oatNew(cUnit, sizeof(GrowableList),
1470 false, kAllocDFInfo);
1471 cUnit->ssaSubscripts = (GrowableList *)oatNew(cUnit, sizeof(GrowableList),
1472 false, kAllocDFInfo);
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1473 cUnit->ssaStrings = (GrowableList *)oatNew(cUnit, sizeof(GrowableList),
1474 false, kAllocDFInfo);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1475 // Create the ssa mappings, estimating the max size
1476 oatInitGrowableList(cUnit, cUnit->ssaBaseVRegs,
1477 numDalvikReg + cUnit->defCount + 128,
1478 kListSSAtoDalvikMap);
1479 oatInitGrowableList(cUnit, cUnit->ssaSubscripts,
1480 numDalvikReg + cUnit->defCount + 128,
1481 kListSSAtoDalvikMap);
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1482 oatInitGrowableList(cUnit, cUnit->ssaStrings,
1483 numDalvikReg + cUnit->defCount + 128,
1484 kListSSAtoDalvikMap);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1485 /*
1486 * Initial number of SSA registers is equal to the number of Dalvik
1487 * registers.
1488 */
1489 cUnit->numSSARegs = numDalvikReg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1490
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1491 /*
1492 * Initialize the SSA2Dalvik map list. For the first numDalvikReg elements,
1493 * the subscript is 0 so we use the ENCODE_REG_SUB macro to encode the value
1494 * into "(0 << 16) | i"
1495 */
1496 for (i = 0; i < numDalvikReg; i++) {
1497 oatInsertGrowableList(cUnit, cUnit->ssaBaseVRegs, i);
1498 oatInsertGrowableList(cUnit, cUnit->ssaSubscripts, 0);
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1499 std::string ssaName = getSSAName(cUnit, i);
1500 char* name = (char*)oatNew(cUnit, ssaName.length() + 1, true, kAllocDFInfo);
1501 strncpy(name, ssaName.c_str(), ssaName.length() + 1);
1502 oatInsertGrowableList(cUnit, cUnit->ssaStrings, (intptr_t)name);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1503 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1504
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1505 /*
1506 * Initialize the DalvikToSSAMap map. There is one entry for each
1507 * Dalvik register, and the SSA names for those are the same.
1508 */
1509 cUnit->vRegToSSAMap = (int *)oatNew(cUnit, sizeof(int) * numDalvikReg,
1510 false, kAllocDFInfo);
1511 /* Keep track of the higest def for each dalvik reg */
1512 cUnit->SSALastDefs = (int *)oatNew(cUnit, sizeof(int) * numDalvikReg,
1513 false, kAllocDFInfo);
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]1514
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1515 for (i = 0; i < numDalvikReg; i++) {
1516 cUnit->vRegToSSAMap[i] = i;
1517 cUnit->SSALastDefs[i] = 0;
1518 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1519
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1520 /* Add ssa reg for Method* */
1521 cUnit->methodSReg = addNewSReg(cUnit, SSA_METHOD_BASEREG);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1522
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1523 /*
1524 * Allocate the BasicBlockDataFlow structure for the entry and code blocks
1525 */
1526 GrowableListIterator iterator;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1527
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1528 oatGrowableListIteratorInit(&cUnit->blockList, &iterator);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1529
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1530 while (true) {
1531 BasicBlock* bb = (BasicBlock *) oatGrowableListIteratorNext(&iterator);
1532 if (bb == NULL) break;
1533 if (bb->hidden == true) continue;
1534 if (bb->blockType == kDalvikByteCode ||
1535 bb->blockType == kEntryBlock ||
1536 bb->blockType == kExitBlock) {
1537 bb->dataFlowInfo = (BasicBlockDataFlow *)
1538 oatNew(cUnit, sizeof(BasicBlockDataFlow), true, kAllocDFInfo);
1539 }
1540 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1541}
1542
1543/* Clear the visited flag for each BB */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1544bool oatClearVisitedFlag(struct CompilationUnit* cUnit, struct BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1545{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1546 bb->visited = false;
1547 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1548}
1549
1550void oatDataFlowAnalysisDispatcher(CompilationUnit* cUnit,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1551 bool (*func)(CompilationUnit*, BasicBlock*),
1552 DataFlowAnalysisMode dfaMode,
1553 bool isIterative)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1554{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1555 bool change = true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1556
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1557 while (change) {
1558 change = false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1559
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1560 switch (dfaMode) {
1561 /* Scan all blocks and perform the operations specified in func */
1562 case kAllNodes:
1563 {
1564 GrowableListIterator iterator;
1565 oatGrowableListIteratorInit(&cUnit->blockList, &iterator);
1566 while (true) {
1567 BasicBlock* bb =
1568 (BasicBlock *) oatGrowableListIteratorNext(&iterator);
1569 if (bb == NULL) break;
1570 if (bb->hidden == true) continue;
1571 change |= (*func)(cUnit, bb);
1572 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1573 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1574 break;
1575 /* Scan reachable blocks and perform the ops specified in func. */
1576 case kReachableNodes:
1577 {
1578 int numReachableBlocks = cUnit->numReachableBlocks;
1579 int idx;
1580 const GrowableList *blockList = &cUnit->blockList;
1581
1582 for (idx = 0; idx < numReachableBlocks; idx++) {
1583 int blockIdx = cUnit->dfsOrder.elemList[idx];
1584 BasicBlock* bb = (BasicBlock *)
1585 oatGrowableListGetElement(blockList, blockIdx);
1586 change |= (*func)(cUnit, bb);
1587 }
1588 }
1589 break;
1590
1591 /* Scan reachable blocks by pre-order dfs and invoke func on each. */
1592 case kPreOrderDFSTraversal:
1593 {
1594 int numReachableBlocks = cUnit->numReachableBlocks;
1595 int idx;
1596 const GrowableList *blockList = &cUnit->blockList;
1597
1598 for (idx = 0; idx < numReachableBlocks; idx++) {
1599 int dfsIdx = cUnit->dfsOrder.elemList[idx];
1600 BasicBlock* bb = (BasicBlock *)
1601 oatGrowableListGetElement(blockList, dfsIdx);
1602 change |= (*func)(cUnit, bb);
1603 }
1604 }
1605 break;
1606 /* Scan reachable blocks post-order dfs and invoke func on each. */
1607 case kPostOrderDFSTraversal:
1608 {
1609 int numReachableBlocks = cUnit->numReachableBlocks;
1610 int idx;
1611 const GrowableList *blockList = &cUnit->blockList;
1612
1613 for (idx = numReachableBlocks - 1; idx >= 0; idx--) {
1614 int dfsIdx = cUnit->dfsOrder.elemList[idx];
1615 BasicBlock* bb = (BasicBlock *)
1616 oatGrowableListGetElement(blockList, dfsIdx);
1617 change |= (*func)(cUnit, bb);
1618 }
1619 }
1620 break;
1621 /* Scan reachable post-order dom tree and invoke func on each. */
1622 case kPostOrderDOMTraversal:
1623 {
1624 int numReachableBlocks = cUnit->numReachableBlocks;
1625 int idx;
1626 const GrowableList *blockList = &cUnit->blockList;
1627
1628 for (idx = 0; idx < numReachableBlocks; idx++) {
1629 int domIdx = cUnit->domPostOrderTraversal.elemList[idx];
1630 BasicBlock* bb = (BasicBlock *)
1631 oatGrowableListGetElement(blockList, domIdx);
1632 change |= (*func)(cUnit, bb);
1633 }
1634 }
1635 break;
1636 /* Scan reachable blocks reverse post-order dfs, invoke func on each */
1637 case kReversePostOrderTraversal:
1638 {
1639 int numReachableBlocks = cUnit->numReachableBlocks;
1640 int idx;
1641 const GrowableList *blockList = &cUnit->blockList;
1642
1643 for (idx = numReachableBlocks - 1; idx >= 0; idx--) {
1644 int revIdx = cUnit->dfsPostOrder.elemList[idx];
1645 BasicBlock* bb = (BasicBlock *)
1646 oatGrowableListGetElement(blockList, revIdx);
1647 change |= (*func)(cUnit, bb);
1648 }
1649 }
1650 break;
1651 default:
1652 LOG(FATAL) << "Unknown traversal mode " << (int)dfaMode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1653 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1654 /* If isIterative is false, exit the loop after the first iteration */
1655 change &= isIterative;
1656 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1657}
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1658
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1659/* Advance to next strictly dominated MIR node in an extended basic block */
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1660MIR* advanceMIR(CompilationUnit* cUnit, BasicBlock** pBb, MIR* mir,
1661 ArenaBitVector* bv, bool clearMark) {
1662 BasicBlock* bb = *pBb;
1663 if (mir != NULL) {
1664 mir = mir->next;
1665 if (mir == NULL) {
1666 bb = bb->fallThrough;
1667 if ((bb == NULL) || bb->predecessors->numUsed != 1) {
1668 mir = NULL;
1669 } else {
1670 if (bv) {
1671 oatSetBit(cUnit, bv, bb->id);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1672 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1673 *pBb = bb;
1674 mir = bb->firstMIRInsn;
1675 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1676 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1677 }
1678 if (mir && clearMark) {
1679 mir->optimizationFlags &= ~MIR_MARK;
1680 }
1681 return mir;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1682}
1683
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1684/*
1685 * To be used at an invoke mir. If the logically next mir node represents
1686 * a move-result, return it. Else, return NULL. If a move-result exists,
1687 * it is required to immediately follow the invoke with no intervening
1688 * opcodes or incoming arcs. However, if the result of the invoke is not
1689 * used, a move-result may not be present.
1690 */
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1691MIR* oatFindMoveResult(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir)
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1692{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1693 BasicBlock* tbb = bb;
1694 mir = advanceMIR(cUnit, &tbb, mir, NULL, false);
1695 while (mir != NULL) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1696 int opcode = mir->dalvikInsn.opcode;
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1697 if ((mir->dalvikInsn.opcode == Instruction::MOVE_RESULT) ||
buzbee52ed7762012-06-13 23:43:14 -0700[diff] [blame]1698 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) ||
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1699 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_WIDE)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1700 break;
1701 }
1702 // Keep going if pseudo op, otherwise terminate
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1703 if (opcode < kNumPackedOpcodes) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1704 mir = NULL;
1705 } else {
1706 mir = advanceMIR(cUnit, &tbb, mir, NULL, false);
1707 }
1708 }
1709 return mir;
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1710}
1711
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1712void squashDupRangeChecks(CompilationUnit* cUnit, BasicBlock** pBp, MIR* mir,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1713 int arraySreg, int indexSreg)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1714{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1715 while (true) {
1716 mir = advanceMIR(cUnit, pBp, mir, NULL, false);
1717 if (!mir) {
1718 break;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1719 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1720 if ((mir->ssaRep == NULL) ||
1721 (mir->optimizationFlags & MIR_IGNORE_RANGE_CHECK)) {
1722 continue;
1723 }
1724 int checkArray = INVALID_SREG;
1725 int checkIndex = INVALID_SREG;
1726 switch (mir->dalvikInsn.opcode) {
1727 case Instruction::AGET:
1728 case Instruction::AGET_OBJECT:
1729 case Instruction::AGET_BOOLEAN:
1730 case Instruction::AGET_BYTE:
1731 case Instruction::AGET_CHAR:
1732 case Instruction::AGET_SHORT:
1733 case Instruction::AGET_WIDE:
1734 checkArray = mir->ssaRep->uses[0];
1735 checkIndex = mir->ssaRep->uses[1];
1736 break;
1737 case Instruction::APUT:
1738 case Instruction::APUT_OBJECT:
1739 case Instruction::APUT_SHORT:
1740 case Instruction::APUT_CHAR:
1741 case Instruction::APUT_BYTE:
1742 case Instruction::APUT_BOOLEAN:
1743 checkArray = mir->ssaRep->uses[1];
1744 checkIndex = mir->ssaRep->uses[2];
1745 break;
1746 case Instruction::APUT_WIDE:
1747 checkArray = mir->ssaRep->uses[2];
1748 checkIndex = mir->ssaRep->uses[3];
1749 default:
1750 break;
1751 }
1752 if (checkArray == INVALID_SREG) {
1753 continue;
1754 }
1755 if ((arraySreg == checkArray) && (indexSreg == checkIndex)) {
1756 if (cUnit->printMe) {
1757 LOG(INFO) << "Squashing range check @ 0x" << std::hex << mir->offset;
1758 }
1759 mir->optimizationFlags |= MIR_IGNORE_RANGE_CHECK;
1760 }
1761 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1762}
1763
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1764/* Allocate a compiler temp, return Sreg. Reuse existing if no conflict */
1765int allocCompilerTempSreg(CompilationUnit* cUnit, ArenaBitVector* bv)
1766{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1767 for (int i = 0; i < cUnit->numCompilerTemps; i++) {
1768 CompilerTemp* ct = (CompilerTemp*)cUnit->compilerTemps.elemList[i];
1769 ArenaBitVector* tBv = ct->bv;
1770 if (!oatTestBitVectors(bv, tBv)) {
1771 // Combine live maps and reuse existing temp
1772 oatUnifyBitVectors(tBv, tBv, bv);
1773 return ct->sReg;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1774 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1775 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1776
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1777 // Create a new compiler temp & associated live bitmap
1778 CompilerTemp* ct = (CompilerTemp*)oatNew(cUnit, sizeof(CompilerTemp),
1779 true, kAllocMisc);
1780 ArenaBitVector *nBv = oatAllocBitVector(cUnit, cUnit->numBlocks, true,
1781 kBitMapMisc);
1782 oatCopyBitVector(nBv, bv);
1783 ct->bv = nBv;
1784 ct->sReg = addNewSReg(cUnit, SSA_CTEMP_BASEREG - cUnit->numCompilerTemps);
1785 cUnit->numCompilerTemps++;
1786 oatInsertGrowableList(cUnit, &cUnit->compilerTemps, (intptr_t)ct);
1787 DCHECK_EQ(cUnit->numCompilerTemps, (int)cUnit->compilerTemps.numUsed);
1788 return ct->sReg;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1789}
1790
1791/* Creata a new MIR node for a new pseudo op. */
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1792MIR* rawMIR(CompilationUnit* cUnit, Instruction::Code opcode, int defs,
1793 int uses)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1794{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1795 MIR* res = (MIR*)oatNew( cUnit, sizeof(MIR), true, kAllocMIR);
1796 res->ssaRep =(struct SSARepresentation *)
1797 oatNew(cUnit, sizeof(SSARepresentation), true, kAllocDFInfo);
1798 if (uses) {
1799 res->ssaRep->numUses = uses;
1800 res->ssaRep->uses = (int*)oatNew(cUnit, sizeof(int) * uses, false,
1801 kAllocDFInfo);
1802 }
1803 if (defs) {
1804 res->ssaRep->numDefs = defs;
1805 res->ssaRep->defs = (int*)oatNew(cUnit, sizeof(int) * defs, false,
1806 kAllocDFInfo);
1807 res->ssaRep->fpDef = (bool*)oatNew(cUnit, sizeof(bool) * defs, true,
1808 kAllocDFInfo);
1809 }
1810 res->dalvikInsn.opcode = opcode;
1811 return res;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1812}
1813
1814/* Do some MIR-level basic block optimizations */
1815bool basicBlockOpt(CompilationUnit* cUnit, BasicBlock* bb)
1816{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1817 int numTemps = 0;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1818
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1819 for (MIR* mir = bb->firstMIRInsn; mir; mir = mir->next) {
1820 // Look for interesting opcodes, skip otherwise
1821 Instruction::Code opcode = mir->dalvikInsn.opcode;
1822 switch (opcode) {
1823 case Instruction::AGET:
1824 case Instruction::AGET_OBJECT:
1825 case Instruction::AGET_BOOLEAN:
1826 case Instruction::AGET_BYTE:
1827 case Instruction::AGET_CHAR:
1828 case Instruction::AGET_SHORT:
1829 case Instruction::AGET_WIDE:
1830 if (!(mir->optimizationFlags & MIR_IGNORE_RANGE_CHECK)) {
1831 int arrSreg = mir->ssaRep->uses[0];
1832 int idxSreg = mir->ssaRep->uses[1];
1833 BasicBlock* tbb = bb;
1834 squashDupRangeChecks(cUnit, &tbb, mir, arrSreg, idxSreg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1835 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1836 break;
1837 case Instruction::APUT:
1838 case Instruction::APUT_OBJECT:
1839 case Instruction::APUT_SHORT:
1840 case Instruction::APUT_CHAR:
1841 case Instruction::APUT_BYTE:
1842 case Instruction::APUT_BOOLEAN:
1843 case Instruction::APUT_WIDE:
1844 if (!(mir->optimizationFlags & MIR_IGNORE_RANGE_CHECK)) {
1845 int start = (opcode == Instruction::APUT_WIDE) ? 2 : 1;
1846 int arrSreg = mir->ssaRep->uses[start];
1847 int idxSreg = mir->ssaRep->uses[start + 1];
1848 BasicBlock* tbb = bb;
1849 squashDupRangeChecks(cUnit, &tbb, mir, arrSreg, idxSreg);
1850 }
1851 break;
1852 case Instruction::CMPL_FLOAT:
1853 case Instruction::CMPL_DOUBLE:
1854 case Instruction::CMPG_FLOAT:
1855 case Instruction::CMPG_DOUBLE:
1856 case Instruction::CMP_LONG:
buzbeeca7a5e42012-08-20 11:12:18 -0700[diff] [blame]1857 if (cUnit->genBitcode) {
1858 // Bitcode doesn't allow this optimization.
1859 break;
1860 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1861 if (mir->next != NULL) {
1862 MIR* mirNext = mir->next;
1863 Instruction::Code brOpcode = mirNext->dalvikInsn.opcode;
1864 ConditionCode ccode = kCondNv;
1865 switch(brOpcode) {
1866 case Instruction::IF_EQZ:
1867 ccode = kCondEq;
1868 break;
1869 case Instruction::IF_NEZ:
1870 ccode = kCondNe;
1871 break;
1872 case Instruction::IF_LTZ:
1873 ccode = kCondLt;
1874 break;
1875 case Instruction::IF_GEZ:
1876 ccode = kCondGe;
1877 break;
1878 case Instruction::IF_GTZ:
1879 ccode = kCondGt;
1880 break;
1881 case Instruction::IF_LEZ:
1882 ccode = kCondLe;
1883 break;
1884 default:
1885 break;
1886 }
1887 // Make sure result of cmp is used by next insn and nowhere else
1888 if ((ccode != kCondNv) &&
1889 (mir->ssaRep->defs[0] == mirNext->ssaRep->uses[0]) &&
1890 (getSSAUseCount(cUnit, mir->ssaRep->defs[0]) == 1)) {
1891 mirNext->dalvikInsn.arg[0] = ccode;
1892 switch(opcode) {
1893 case Instruction::CMPL_FLOAT:
1894 mirNext->dalvikInsn.opcode =
1895 static_cast<Instruction::Code>(kMirOpFusedCmplFloat);
1896 break;
1897 case Instruction::CMPL_DOUBLE:
1898 mirNext->dalvikInsn.opcode =
1899 static_cast<Instruction::Code>(kMirOpFusedCmplDouble);
1900 break;
1901 case Instruction::CMPG_FLOAT:
1902 mirNext->dalvikInsn.opcode =
1903 static_cast<Instruction::Code>(kMirOpFusedCmpgFloat);
1904 break;
1905 case Instruction::CMPG_DOUBLE:
1906 mirNext->dalvikInsn.opcode =
1907 static_cast<Instruction::Code>(kMirOpFusedCmpgDouble);
1908 break;
1909 case Instruction::CMP_LONG:
1910 mirNext->dalvikInsn.opcode =
1911 static_cast<Instruction::Code>(kMirOpFusedCmpLong);
1912 break;
1913 default: LOG(ERROR) << "Unexpected opcode: " << (int)opcode;
1914 }
1915 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
1916 mirNext->ssaRep->numUses = mir->ssaRep->numUses;
1917 mirNext->ssaRep->uses = mir->ssaRep->uses;
1918 mirNext->ssaRep->fpUse = mir->ssaRep->fpUse;
1919 mirNext->ssaRep->numDefs = 0;
1920 mir->ssaRep->numUses = 0;
1921 mir->ssaRep->numDefs = 0;
1922 }
1923 }
1924 break;
1925 default:
1926 break;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1927 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1928 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1929
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1930 if (numTemps > cUnit->numCompilerTemps) {
1931 cUnit->numCompilerTemps = numTemps;
1932 }
1933 return true;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1934}
1935
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1936bool nullCheckEliminationInit(struct CompilationUnit* cUnit,
1937 struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1938{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1939 if (bb->dataFlowInfo == NULL) return false;
1940 bb->dataFlowInfo->endingNullCheckV =
1941 oatAllocBitVector(cUnit, cUnit->numSSARegs, false, kBitMapNullCheck);
1942 oatClearAllBits(bb->dataFlowInfo->endingNullCheckV);
1943 return true;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1944}
1945
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1946/* Collect stats on number of checks removed */
1947bool countChecks( struct CompilationUnit* cUnit, struct BasicBlock* bb)
1948{
1949 if (bb->dataFlowInfo == NULL) return false;
1950 for (MIR* mir = bb->firstMIRInsn; mir; mir = mir->next) {
1951 if (mir->ssaRep == NULL) {
1952 continue;
1953 }
1954 int dfAttributes = oatDataFlowAttributes[mir->dalvikInsn.opcode];
1955 if (dfAttributes & DF_HAS_NULL_CHKS) {
1956 cUnit->checkstats->nullChecks++;
1957 if (mir->optimizationFlags & MIR_IGNORE_NULL_CHECK) {
1958 cUnit->checkstats->nullChecksEliminated++;
1959 }
1960 }
1961 if (dfAttributes & DF_HAS_RANGE_CHKS) {
1962 cUnit->checkstats->rangeChecks++;
1963 if (mir->optimizationFlags & MIR_IGNORE_RANGE_CHECK) {
1964 cUnit->checkstats->rangeChecksEliminated++;
1965 }
1966 }
1967 }
1968 return false;
1969}
1970
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1971/* Try to make common case the fallthrough path */
1972bool layoutBlocks(struct CompilationUnit* cUnit, struct BasicBlock* bb)
1973{
1974 // TODO: For now, just looking for direct throws. Consider generalizing for profile feedback
1975 if (!bb->explicitThrow) {
1976 return false;
1977 }
1978 BasicBlock* walker = bb;
1979 while (true) {
1980 // Check termination conditions
1981 if ((walker->blockType == kEntryBlock) || (walker->predecessors->numUsed != 1)) {
1982 break;
1983 }
1984 BasicBlock* prev = GET_ELEM_N(walker->predecessors, BasicBlock*, 0);
1985 if (prev->conditionalBranch) {
1986 if (prev->fallThrough == walker) {
1987 // Already done - return
1988 break;
1989 }
1990 DCHECK_EQ(walker, prev->taken);
1991 // Got one. Flip it and exit
1992 Instruction::Code opcode = prev->lastMIRInsn->dalvikInsn.opcode;
1993 switch (opcode) {
1994 case Instruction::IF_EQ: opcode = Instruction::IF_NE; break;
1995 case Instruction::IF_NE: opcode = Instruction::IF_EQ; break;
1996 case Instruction::IF_LT: opcode = Instruction::IF_GE; break;
1997 case Instruction::IF_GE: opcode = Instruction::IF_LT; break;
1998 case Instruction::IF_GT: opcode = Instruction::IF_LE; break;
1999 case Instruction::IF_LE: opcode = Instruction::IF_GT; break;
2000 case Instruction::IF_EQZ: opcode = Instruction::IF_NEZ; break;
2001 case Instruction::IF_NEZ: opcode = Instruction::IF_EQZ; break;
2002 case Instruction::IF_LTZ: opcode = Instruction::IF_GEZ; break;
2003 case Instruction::IF_GEZ: opcode = Instruction::IF_LTZ; break;
2004 case Instruction::IF_GTZ: opcode = Instruction::IF_LEZ; break;
2005 case Instruction::IF_LEZ: opcode = Instruction::IF_GTZ; break;
2006 default: LOG(FATAL) << "Unexpected opcode 0x" << std::hex << (int)opcode;
2007 }
2008 prev->lastMIRInsn->dalvikInsn.opcode = opcode;
2009 BasicBlock* tBB = prev->taken;
2010 prev->taken = prev->fallThrough;
2011 prev->fallThrough = tBB;
2012 break;
2013 }
2014 walker = prev;
2015 }
2016 return false;
2017}
2018
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2019/* Combine any basic blocks terminated by instructions that we now know can't throw */
2020bool combineBlocks(struct CompilationUnit* cUnit, struct BasicBlock* bb)
2021{
2022 // Loop here to allow combining a sequence of blocks
2023 while (true) {
2024 // Check termination conditions
2025 if ((bb->firstMIRInsn == NULL)
2026 || (bb->dataFlowInfo == NULL)
2027 || (bb->blockType == kExceptionHandling)
2028 || (bb->blockType == kExitBlock)
2029 || (bb->blockType == kDead)
2030 || ((bb->taken == NULL) || (bb->taken->blockType != kExceptionHandling))
2031 || (bb->successorBlockList.blockListType != kNotUsed)
2032 || ((int)bb->lastMIRInsn->dalvikInsn.opcode != kMirOpCheck)) {
2033 break;
2034 }
2035
2036 // Test the kMirOpCheck instruction
2037 MIR* mir = bb->lastMIRInsn;
2038 // Grab the attributes from the paired opcode
2039 MIR* throwInsn = mir->meta.throwInsn;
2040 int dfAttributes = oatDataFlowAttributes[throwInsn->dalvikInsn.opcode];
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2041 bool canCombine = true;
2042 if (dfAttributes & DF_HAS_NULL_CHKS) {
2043 canCombine &= ((throwInsn->optimizationFlags & MIR_IGNORE_NULL_CHECK) != 0);
2044 }
2045 if (dfAttributes & DF_HAS_RANGE_CHKS) {
2046 canCombine &= ((throwInsn->optimizationFlags & MIR_IGNORE_RANGE_CHECK) != 0);
2047 }
2048 if (!canCombine) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2049 break;
2050 }
2051 // OK - got one. Combine
2052 BasicBlock* bbNext = bb->fallThrough;
2053 DCHECK(!bbNext->catchEntry);
2054 DCHECK_EQ(bbNext->predecessors->numUsed, 1U);
2055 MIR* tMir = bb->lastMIRInsn->prev;
2056 // Overwrite the kOpCheck insn with the paired opcode
2057 DCHECK_EQ(bbNext->firstMIRInsn, throwInsn);
2058 *bb->lastMIRInsn = *throwInsn;
2059 bb->lastMIRInsn->prev = tMir;
2060 // Use the successor info from the next block
2061 bb->successorBlockList = bbNext->successorBlockList;
2062 // Use the ending block linkage from the next block
2063 bb->fallThrough = bbNext->fallThrough;
2064 bb->taken->blockType = kDead; // Kill the unused exception block
2065 bb->taken = bbNext->taken;
2066 // Include the rest of the instructions
2067 bb->lastMIRInsn = bbNext->lastMIRInsn;
2068
2069 /*
2070 * NOTE: we aren't updating all dataflow info here. Should either make sure this pass
2071 * happens after uses of iDominated, domFrontier or update the dataflow info here.
2072 */
2073
2074 // Kill bbNext and remap now-dead id to parent
2075 bbNext->blockType = kDead;
2076 cUnit->blockIdMap.Overwrite(bbNext->id, bb->id);
2077
2078 // Now, loop back and see if we can keep going
2079 }
2080 return false;
2081}
2082
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2083/* Eliminate unnecessary null checks for a basic block. */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]2084bool eliminateNullChecks( struct CompilationUnit* cUnit, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2085{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2086 if (bb->dataFlowInfo == NULL) return false;
2087
2088 /*
2089 * Set initial state. Be conservative with catch
2090 * blocks and start with no assumptions about null check
2091 * status (except for "this").
2092 */
2093 if ((bb->blockType == kEntryBlock) | bb->catchEntry) {
2094 oatClearAllBits(cUnit->tempSSARegisterV);
2095 if ((cUnit->access_flags & kAccStatic) == 0) {
2096 // If non-static method, mark "this" as non-null
2097 int thisReg = cUnit->numDalvikRegisters - cUnit->numIns;
2098 oatSetBit(cUnit, cUnit->tempSSARegisterV, thisReg);
2099 }
2100 } else {
2101 // Starting state is intesection of all incoming arcs
2102 GrowableListIterator iter;
2103 oatGrowableListIteratorInit(bb->predecessors, &iter);
2104 BasicBlock* predBB = (BasicBlock*)oatGrowableListIteratorNext(&iter);
2105 DCHECK(predBB != NULL);
2106 oatCopyBitVector(cUnit->tempSSARegisterV,
2107 predBB->dataFlowInfo->endingNullCheckV);
2108 while (true) {
2109 predBB = (BasicBlock*)oatGrowableListIteratorNext(&iter);
2110 if (!predBB) break;
2111 if ((predBB->dataFlowInfo == NULL) ||
2112 (predBB->dataFlowInfo->endingNullCheckV == NULL)) {
2113 continue;
2114 }
2115 oatIntersectBitVectors(cUnit->tempSSARegisterV,
2116 cUnit->tempSSARegisterV,
2117 predBB->dataFlowInfo->endingNullCheckV);
2118 }
2119 }
2120
2121 // Walk through the instruction in the block, updating as necessary
2122 for (MIR* mir = bb->firstMIRInsn; mir; mir = mir->next) {
2123 if (mir->ssaRep == NULL) {
2124 continue;
2125 }
2126 int dfAttributes = oatDataFlowAttributes[mir->dalvikInsn.opcode];
2127
2128 // Mark target of NEW* as non-null
2129 if (dfAttributes & DF_NON_NULL_DST) {
2130 oatSetBit(cUnit, cUnit->tempSSARegisterV, mir->ssaRep->defs[0]);
2131 }
2132
2133 // Mark non-null returns from invoke-style NEW*
2134 if (dfAttributes & DF_NON_NULL_RET) {
2135 MIR* nextMir = mir->next;
2136 // Next should be an MOVE_RESULT_OBJECT
2137 if (nextMir &&
2138 nextMir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
2139 // Mark as null checked
2140 oatSetBit(cUnit, cUnit->tempSSARegisterV, nextMir->ssaRep->defs[0]);
2141 } else {
2142 if (nextMir) {
2143 LOG(WARNING) << "Unexpected opcode following new: "
2144 << (int)nextMir->dalvikInsn.opcode;
2145 } else if (bb->fallThrough) {
2146 // Look in next basic block
2147 struct BasicBlock* nextBB = bb->fallThrough;
2148 for (MIR* tmir = nextBB->firstMIRInsn; tmir;
2149 tmir =tmir->next) {
2150 if ((int)tmir->dalvikInsn.opcode >= (int)kMirOpFirst) {
2151 continue;
2152 }
2153 // First non-pseudo should be MOVE_RESULT_OBJECT
2154 if (tmir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
2155 // Mark as null checked
2156 oatSetBit(cUnit, cUnit->tempSSARegisterV, tmir->ssaRep->defs[0]);
2157 } else {
2158 LOG(WARNING) << "Unexpected op after new: "
2159 << (int)tmir->dalvikInsn.opcode;
2160 }
2161 break;
2162 }
2163 }
2164 }
2165 }
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]2166
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2167 /*
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2168 * Propagate nullcheck state on register copies (including
2169 * Phi pseudo copies. For the latter, nullcheck state is
2170 * the "and" of all the Phi's operands.
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2171 */
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2172 if (dfAttributes & (DF_NULL_TRANSFER_0 | DF_NULL_TRANSFER_N)) {
2173 int tgtSreg = mir->ssaRep->defs[0];
2174 int operands = (dfAttributes & DF_NULL_TRANSFER_0) ? 1 :
2175 mir->ssaRep->numUses;
2176 bool nullChecked = true;
2177 for (int i = 0; i < operands; i++) {
2178 nullChecked &= oatIsBitSet(cUnit->tempSSARegisterV,
2179 mir->ssaRep->uses[i]);
2180 }
2181 if (nullChecked) {
2182 oatSetBit(cUnit, cUnit->tempSSARegisterV, tgtSreg);
2183 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2184 }
2185
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2186 // Already nullchecked?
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2187 if ((dfAttributes & DF_HAS_NULL_CHKS) && !(mir->optimizationFlags & MIR_IGNORE_NULL_CHECK)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2188 int srcIdx;
2189 if (dfAttributes & DF_NULL_CHK_1) {
2190 srcIdx = 1;
2191 } else if (dfAttributes & DF_NULL_CHK_2) {
2192 srcIdx = 2;
2193 } else {
2194 srcIdx = 0;
2195 }
2196 int srcSreg = mir->ssaRep->uses[srcIdx];
2197 if (oatIsBitSet(cUnit->tempSSARegisterV, srcSreg)) {
2198 // Eliminate the null check
2199 mir->optimizationFlags |= MIR_IGNORE_NULL_CHECK;
2200 } else {
2201 // Mark sReg as null-checked
2202 oatSetBit(cUnit, cUnit->tempSSARegisterV, srcSreg);
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2203 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2204 }
2205 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2206
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2207 // Did anything change?
2208 bool res = oatCompareBitVectors(bb->dataFlowInfo->endingNullCheckV,
2209 cUnit->tempSSARegisterV);
2210 if (res) {
2211 oatCopyBitVector(bb->dataFlowInfo->endingNullCheckV,
2212 cUnit->tempSSARegisterV);
2213 }
2214 return res;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2215}
2216
2217void oatMethodNullCheckElimination(CompilationUnit *cUnit)
2218{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2219 if (!(cUnit->disableOpt & (1 << kNullCheckElimination))) {
2220 DCHECK(cUnit->tempSSARegisterV != NULL);
2221 oatDataFlowAnalysisDispatcher(cUnit, nullCheckEliminationInit, kAllNodes,
2222 false /* isIterative */);
2223 oatDataFlowAnalysisDispatcher(cUnit, eliminateNullChecks,
2224 kPreOrderDFSTraversal,
2225 true /* isIterative */);
2226 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2227}
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2228
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2229void oatMethodBasicBlockCombine(CompilationUnit* cUnit)
2230{
2231 oatDataFlowAnalysisDispatcher(cUnit, combineBlocks, kPreOrderDFSTraversal, false);
2232}
2233
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2234void oatMethodCodeLayout(CompilationUnit* cUnit)
2235{
2236 oatDataFlowAnalysisDispatcher(cUnit, layoutBlocks, kAllNodes, false);
2237}
2238
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2239void oatDumpCheckStats(CompilationUnit *cUnit)
2240{
2241 Checkstats* stats = (Checkstats*)oatNew(cUnit, sizeof(Checkstats), true, kAllocDFInfo);
2242 cUnit->checkstats = stats;
2243 oatDataFlowAnalysisDispatcher(cUnit, countChecks, kAllNodes, false /* isIterative */);
2244 if (stats->nullChecks > 0) {
2245 LOG(INFO) << "Null Checks: " << PrettyMethod(cUnit->method_idx, *cUnit->dex_file) << " "
2246 << stats->nullChecksEliminated << " of " << stats->nullChecks << " -> "
2247 << ((float)stats->nullChecksEliminated/(float)stats->nullChecks) * 100.0 << "%";
2248 }
2249 if (stats->rangeChecks > 0) {
2250 LOG(INFO) << "Range Checks: " << PrettyMethod(cUnit->method_idx, *cUnit->dex_file) << " "
2251 << stats->rangeChecksEliminated << " of " << stats->rangeChecks << " -> "
2252 << ((float)stats->rangeChecksEliminated/(float)stats->rangeChecks) * 100.0 << "%";
2253 }
2254}
2255
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2256void oatMethodBasicBlockOptimization(CompilationUnit *cUnit)
2257{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2258 if (!(cUnit->disableOpt & (1 << kBBOpt))) {
2259 oatInitGrowableList(cUnit, &cUnit->compilerTemps, 6, kListMisc);
2260 DCHECK_EQ(cUnit->numCompilerTemps, 0);
buzbeeca7a5e42012-08-20 11:12:18 -0700[diff] [blame]2261 oatDataFlowAnalysisDispatcher(cUnit, basicBlockOpt,
2262 kAllNodes, false /* isIterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2263 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2264}
2265
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2266void addLoopHeader(CompilationUnit* cUnit, BasicBlock* header,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2267 BasicBlock* backEdge)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2268{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2269 GrowableListIterator iter;
2270 oatGrowableListIteratorInit(&cUnit->loopHeaders, &iter);
2271 for (LoopInfo* loop = (LoopInfo*)oatGrowableListIteratorNext(&iter);
2272 (loop != NULL); loop = (LoopInfo*)oatGrowableListIteratorNext(&iter)) {
2273 if (loop->header == header) {
2274 oatInsertGrowableList(cUnit, &loop->incomingBackEdges,
2275 (intptr_t)backEdge);
2276 return;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2277 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2278 }
2279 LoopInfo* info = (LoopInfo*)oatNew(cUnit, sizeof(LoopInfo), true,
2280 kAllocDFInfo);
2281 info->header = header;
2282 oatInitGrowableList(cUnit, &info->incomingBackEdges, 2, kListMisc);
2283 oatInsertGrowableList(cUnit, &info->incomingBackEdges, (intptr_t)backEdge);
2284 oatInsertGrowableList(cUnit, &cUnit->loopHeaders, (intptr_t)info);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2285}
2286
2287bool findBackEdges(struct CompilationUnit* cUnit, struct BasicBlock* bb)
2288{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2289 if ((bb->dataFlowInfo == NULL) || (bb->lastMIRInsn == NULL)) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2290 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2291 }
2292 Instruction::Code opcode = bb->lastMIRInsn->dalvikInsn.opcode;
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]2293 if (Instruction::FlagsOf(opcode) & Instruction::kBranch) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2294 if (bb->taken && (bb->taken->startOffset <= bb->startOffset)) {
2295 DCHECK(bb->dominators != NULL);
2296 if (oatIsBitSet(bb->dominators, bb->taken->id)) {
2297 if (cUnit->printMe) {
2298 LOG(INFO) << "Loop backedge from 0x"
2299 << std::hex << bb->lastMIRInsn->offset
2300 << " to 0x" << std::hex << bb->taken->startOffset;
2301 }
2302 addLoopHeader(cUnit, bb->taken, bb);
2303 }
2304 }
2305 }
2306 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2307}
2308
2309void addBlocksToLoop(CompilationUnit* cUnit, ArenaBitVector* blocks,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2310 BasicBlock* bb, int headId)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2311{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2312 if (!oatIsBitSet(bb->dominators, headId) ||
2313 oatIsBitSet(blocks, bb->id)) {
2314 return;
2315 }
2316 oatSetBit(cUnit, blocks, bb->id);
2317 GrowableListIterator iter;
2318 oatGrowableListIteratorInit(bb->predecessors, &iter);
2319 BasicBlock* predBB;
2320 for (predBB = (BasicBlock*)oatGrowableListIteratorNext(&iter); predBB;
2321 predBB = (BasicBlock*)oatGrowableListIteratorNext(&iter)) {
2322 addBlocksToLoop(cUnit, blocks, predBB, headId);
2323 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2324}
2325
2326void oatDumpLoops(CompilationUnit *cUnit)
2327{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2328 GrowableListIterator iter;
2329 oatGrowableListIteratorInit(&cUnit->loopHeaders, &iter);
2330 for (LoopInfo* loop = (LoopInfo*)oatGrowableListIteratorNext(&iter);
2331 (loop != NULL); loop = (LoopInfo*)oatGrowableListIteratorNext(&iter)) {
2332 LOG(INFO) << "Loop head block id " << loop->header->id
2333 << ", offset 0x" << std::hex << loop->header->startOffset
2334 << ", Depth: " << loop->header->nestingDepth;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2335 GrowableListIterator iter;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2336 oatGrowableListIteratorInit(&loop->incomingBackEdges, &iter);
2337 BasicBlock* edgeBB;
2338 for (edgeBB = (BasicBlock*)oatGrowableListIteratorNext(&iter); edgeBB;
2339 edgeBB = (BasicBlock*)oatGrowableListIteratorNext(&iter)) {
2340 LOG(INFO) << " Backedge block id " << edgeBB->id
2341 << ", offset 0x" << std::hex << edgeBB->startOffset;
2342 ArenaBitVectorIterator bIter;
2343 oatBitVectorIteratorInit(loop->blocks, &bIter);
2344 for (int bbId = oatBitVectorIteratorNext(&bIter); bbId != -1;
2345 bbId = oatBitVectorIteratorNext(&bIter)) {
2346 BasicBlock *bb;
2347 bb = (BasicBlock*)
2348 oatGrowableListGetElement(&cUnit->blockList, bbId);
2349 LOG(INFO) << " (" << bb->id << ", 0x" << std::hex
2350 << bb->startOffset << ")";
2351 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2352 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2353 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2354}
2355
2356void oatMethodLoopDetection(CompilationUnit *cUnit)
2357{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2358 if (cUnit->disableOpt & (1 << kPromoteRegs)) {
2359 return;
2360 }
2361 oatInitGrowableList(cUnit, &cUnit->loopHeaders, 6, kListMisc);
2362 // Find the loop headers
2363 oatDataFlowAnalysisDispatcher(cUnit, findBackEdges,
2364 kAllNodes, false /* isIterative */);
2365 GrowableListIterator iter;
2366 oatGrowableListIteratorInit(&cUnit->loopHeaders, &iter);
2367 // Add blocks to each header
2368 for (LoopInfo* loop = (LoopInfo*)oatGrowableListIteratorNext(&iter);
2369 loop; loop = (LoopInfo*)oatGrowableListIteratorNext(&iter)) {
2370 loop->blocks = oatAllocBitVector(cUnit, cUnit->numBlocks, true,
2371 kBitMapMisc);
2372 oatSetBit(cUnit, loop->blocks, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2373 GrowableListIterator iter;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2374 oatGrowableListIteratorInit(&loop->incomingBackEdges, &iter);
2375 BasicBlock* edgeBB;
2376 for (edgeBB = (BasicBlock*)oatGrowableListIteratorNext(&iter); edgeBB;
2377 edgeBB = (BasicBlock*)oatGrowableListIteratorNext(&iter)) {
2378 addBlocksToLoop(cUnit, loop->blocks, edgeBB, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2379 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2380 }
2381 // Compute the nesting depth of each header
2382 oatGrowableListIteratorInit(&cUnit->loopHeaders, &iter);
2383 for (LoopInfo* loop = (LoopInfo*)oatGrowableListIteratorNext(&iter);
2384 loop; loop = (LoopInfo*)oatGrowableListIteratorNext(&iter)) {
2385 GrowableListIterator iter2;
2386 oatGrowableListIteratorInit(&cUnit->loopHeaders, &iter2);
2387 LoopInfo* loop2;
2388 for (loop2 = (LoopInfo*)oatGrowableListIteratorNext(&iter2);
2389 loop2; loop2 = (LoopInfo*)oatGrowableListIteratorNext(&iter2)) {
2390 if (oatIsBitSet(loop2->blocks, loop->header->id)) {
2391 loop->header->nestingDepth++;
2392 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2393 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2394 }
2395 // Assign nesting depth to each block in all loops
2396 oatGrowableListIteratorInit(&cUnit->loopHeaders, &iter);
2397 for (LoopInfo* loop = (LoopInfo*)oatGrowableListIteratorNext(&iter);
2398 (loop != NULL); loop = (LoopInfo*)oatGrowableListIteratorNext(&iter)) {
2399 ArenaBitVectorIterator bIter;
2400 oatBitVectorIteratorInit(loop->blocks, &bIter);
2401 for (int bbId = oatBitVectorIteratorNext(&bIter); bbId != -1;
2402 bbId = oatBitVectorIteratorNext(&bIter)) {
2403 BasicBlock *bb;
2404 bb = (BasicBlock*) oatGrowableListGetElement(&cUnit->blockList, bbId);
2405 bb->nestingDepth = std::max(bb->nestingDepth,
2406 loop->header->nestingDepth);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2407 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2408 }
2409 if (cUnit->printMe) {
2410 oatDumpLoops(cUnit);
2411 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2412}
2413
2414/*
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2415 * This function will make a best guess at whether the invoke will
2416 * end up using Method*. It isn't critical to get it exactly right,
2417 * and attempting to do would involve more complexity than it's
2418 * worth.
2419 */
2420bool invokeUsesMethodStar(CompilationUnit* cUnit, MIR* mir)
2421{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2422 InvokeType type;
2423 Instruction::Code opcode = mir->dalvikInsn.opcode;
2424 switch (opcode) {
2425 case Instruction::INVOKE_STATIC:
2426 case Instruction::INVOKE_STATIC_RANGE:
2427 type = kStatic;
2428 break;
2429 case Instruction::INVOKE_DIRECT:
2430 case Instruction::INVOKE_DIRECT_RANGE:
2431 type = kDirect;
2432 break;
2433 case Instruction::INVOKE_VIRTUAL:
2434 case Instruction::INVOKE_VIRTUAL_RANGE:
2435 type = kVirtual;
2436 break;
2437 case Instruction::INVOKE_INTERFACE:
2438 case Instruction::INVOKE_INTERFACE_RANGE:
2439 return false;
2440 case Instruction::INVOKE_SUPER_RANGE:
2441 case Instruction::INVOKE_SUPER:
2442 type = kSuper;
2443 break;
2444 default:
2445 LOG(WARNING) << "Unexpected invoke op: " << (int)opcode;
2446 return false;
2447 }
2448 OatCompilationUnit mUnit(cUnit->class_loader, cUnit->class_linker,
Ian Rogers00f7d0e2012-07-19 15:28:27 -0700[diff] [blame]2449 *cUnit->dex_file,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2450 cUnit->code_item, cUnit->method_idx,
2451 cUnit->access_flags);
2452 // TODO: add a flag so we don't counts the stats for this twice
2453 uint32_t dexMethodIdx = mir->dalvikInsn.vB;
2454 int vtableIdx;
2455 uintptr_t directCode;
2456 uintptr_t directMethod;
2457 bool fastPath =
2458 cUnit->compiler->ComputeInvokeInfo(dexMethodIdx, &mUnit, type,
2459 vtableIdx, directCode,
2460 directMethod) &&
2461 !SLOW_INVOKE_PATH;
2462 return (((type == kDirect) || (type == kStatic)) &&
2463 fastPath && ((directCode == 0) || (directMethod == 0)));
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2464}
2465
2466/*
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2467 * Count uses, weighting by loop nesting depth. This code only
2468 * counts explicitly used sRegs. A later phase will add implicit
2469 * counts for things such as Method*, null-checked references, etc.
2470 */
2471bool countUses(struct CompilationUnit* cUnit, struct BasicBlock* bb)
2472{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2473 if (bb->blockType != kDalvikByteCode) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2474 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2475 }
2476 for (MIR* mir = bb->firstMIRInsn; (mir != NULL); mir = mir->next) {
2477 if (mir->ssaRep == NULL) {
2478 continue;
2479 }
2480 uint32_t weight = std::min(16U, (uint32_t)bb->nestingDepth);
2481 for (int i = 0; i < mir->ssaRep->numUses; i++) {
2482 int sReg = mir->ssaRep->uses[i];
2483 DCHECK_LT(sReg, (int)cUnit->useCounts.numUsed);
2484 cUnit->rawUseCounts.elemList[sReg]++;
2485 cUnit->useCounts.elemList[sReg] += (1 << weight);
2486 }
2487 if (!(cUnit->disableOpt & (1 << kPromoteCompilerTemps))) {
2488 int dfAttributes = oatDataFlowAttributes[mir->dalvikInsn.opcode];
2489 // Implicit use of Method* ? */
2490 if (dfAttributes & DF_UMS) {
2491 /*
2492 * Some invokes will not use Method* - need to perform test similar
2493 * to that found in genInvoke() to decide whether to count refs
2494 * for Method* on invoke-class opcodes.
2495 * TODO: refactor for common test here, save results for genInvoke
2496 */
2497 int usesMethodStar = true;
2498 if ((dfAttributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) &&
2499 !(dfAttributes & DF_NON_NULL_RET)) {
2500 usesMethodStar &= invokeUsesMethodStar(cUnit, mir);
2501 }
2502 if (usesMethodStar) {
2503 cUnit->rawUseCounts.elemList[cUnit->methodSReg]++;
2504 cUnit->useCounts.elemList[cUnit->methodSReg] += (1 << weight);
2505 }
2506 }
2507 }
2508 }
2509 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2510}
2511
2512void oatMethodUseCount(CompilationUnit *cUnit)
2513{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2514 oatInitGrowableList(cUnit, &cUnit->useCounts, cUnit->numSSARegs + 32,
2515 kListMisc);
2516 oatInitGrowableList(cUnit, &cUnit->rawUseCounts, cUnit->numSSARegs + 32,
2517 kListMisc);
2518 // Initialize list
2519 for (int i = 0; i < cUnit->numSSARegs; i++) {
2520 oatInsertGrowableList(cUnit, &cUnit->useCounts, 0);
2521 oatInsertGrowableList(cUnit, &cUnit->rawUseCounts, 0);
2522 }
2523 if (cUnit->disableOpt & (1 << kPromoteRegs)) {
2524 return;
2525 }
2526 oatDataFlowAnalysisDispatcher(cUnit, countUses,
2527 kAllNodes, false /* isIterative */);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2528}
2529
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2530} // namespace art