Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ART_COMPILER_OPTIMIZING_CODE_GENERATOR_ARM64_H_ |
| 18 | #define ART_COMPILER_OPTIMIZING_CODE_GENERATOR_ARM64_H_ |
| 19 | |
| 20 | #include "code_generator.h" |
Calin Juravle | e460d1d | 2015-09-29 04:52:17 +0100 | [diff] [blame] | 21 | #include "common_arm64.h" |
Serban Constantinescu | 02d81cc | 2015-01-05 16:08:49 +0000 | [diff] [blame] | 22 | #include "dex/compiler_enums.h" |
Calin Juravle | cd6dffe | 2015-01-08 17:35:35 +0000 | [diff] [blame] | 23 | #include "driver/compiler_options.h" |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 24 | #include "nodes.h" |
| 25 | #include "parallel_move_resolver.h" |
| 26 | #include "utils/arm64/assembler_arm64.h" |
Serban Constantinescu | 82e52ce | 2015-03-26 16:50:57 +0000 | [diff] [blame] | 27 | #include "vixl/a64/disasm-a64.h" |
| 28 | #include "vixl/a64/macro-assembler-a64.h" |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 29 | #include "arch/arm64/quick_method_frame_info_arm64.h" |
| 30 | |
| 31 | namespace art { |
| 32 | namespace arm64 { |
| 33 | |
| 34 | class CodeGeneratorARM64; |
Andreas Gampe | 878d58c | 2015-01-15 23:24:00 -0800 | [diff] [blame] | 35 | |
Nicolas Geoffray | 86a8d7a | 2014-11-19 08:47:18 +0000 | [diff] [blame] | 36 | // Use a local definition to prevent copying mistakes. |
| 37 | static constexpr size_t kArm64WordSize = kArm64PointerSize; |
| 38 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 39 | static const vixl::Register kParameterCoreRegisters[] = { |
| 40 | vixl::x1, vixl::x2, vixl::x3, vixl::x4, vixl::x5, vixl::x6, vixl::x7 |
| 41 | }; |
| 42 | static constexpr size_t kParameterCoreRegistersLength = arraysize(kParameterCoreRegisters); |
| 43 | static const vixl::FPRegister kParameterFPRegisters[] = { |
| 44 | vixl::d0, vixl::d1, vixl::d2, vixl::d3, vixl::d4, vixl::d5, vixl::d6, vixl::d7 |
| 45 | }; |
| 46 | static constexpr size_t kParameterFPRegistersLength = arraysize(kParameterFPRegisters); |
| 47 | |
Serban Constantinescu | 9bd88b0 | 2015-04-22 16:24:46 +0100 | [diff] [blame] | 48 | const vixl::Register tr = vixl::x19; // Thread Register |
Mathieu Chartier | e401d14 | 2015-04-22 13:56:20 -0700 | [diff] [blame] | 49 | static const vixl::Register kArtMethodRegister = vixl::x0; // Method register on invoke. |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 50 | |
| 51 | const vixl::CPURegList vixl_reserved_core_registers(vixl::ip0, vixl::ip1); |
Alexandre Rames | a89086e | 2014-11-07 17:13:25 +0000 | [diff] [blame] | 52 | const vixl::CPURegList vixl_reserved_fp_registers(vixl::d31); |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 53 | |
Zheng Xu | 69a5030 | 2015-04-14 20:04:41 +0800 | [diff] [blame] | 54 | const vixl::CPURegList runtime_reserved_core_registers(tr, vixl::lr); |
Serban Constantinescu | 3d087de | 2015-01-28 11:57:05 +0000 | [diff] [blame] | 55 | |
Serban Constantinescu | 9bd88b0 | 2015-04-22 16:24:46 +0100 | [diff] [blame] | 56 | // Callee-saved registers AAPCS64 (without x19 - Thread Register) |
Serban Constantinescu | 3d087de | 2015-01-28 11:57:05 +0000 | [diff] [blame] | 57 | const vixl::CPURegList callee_saved_core_registers(vixl::CPURegister::kRegister, |
| 58 | vixl::kXRegSize, |
Serban Constantinescu | 9bd88b0 | 2015-04-22 16:24:46 +0100 | [diff] [blame] | 59 | vixl::x20.code(), |
Serban Constantinescu | 3d087de | 2015-01-28 11:57:05 +0000 | [diff] [blame] | 60 | vixl::x30.code()); |
| 61 | const vixl::CPURegList callee_saved_fp_registers(vixl::CPURegister::kFPRegister, |
| 62 | vixl::kDRegSize, |
| 63 | vixl::d8.code(), |
| 64 | vixl::d15.code()); |
Alexandre Rames | a89086e | 2014-11-07 17:13:25 +0000 | [diff] [blame] | 65 | Location ARM64ReturnLocation(Primitive::Type return_type); |
| 66 | |
Andreas Gampe | 878d58c | 2015-01-15 23:24:00 -0800 | [diff] [blame] | 67 | class SlowPathCodeARM64 : public SlowPathCode { |
| 68 | public: |
David Srbecky | 9cd6d37 | 2016-02-09 15:24:47 +0000 | [diff] [blame] | 69 | explicit SlowPathCodeARM64(HInstruction* instruction) |
| 70 | : SlowPathCode(instruction), entry_label_(), exit_label_() {} |
Andreas Gampe | 878d58c | 2015-01-15 23:24:00 -0800 | [diff] [blame] | 71 | |
| 72 | vixl::Label* GetEntryLabel() { return &entry_label_; } |
| 73 | vixl::Label* GetExitLabel() { return &exit_label_; } |
| 74 | |
Zheng Xu | da40309 | 2015-04-24 17:35:39 +0800 | [diff] [blame] | 75 | void SaveLiveRegisters(CodeGenerator* codegen, LocationSummary* locations) OVERRIDE; |
| 76 | void RestoreLiveRegisters(CodeGenerator* codegen, LocationSummary* locations) OVERRIDE; |
| 77 | |
Andreas Gampe | 878d58c | 2015-01-15 23:24:00 -0800 | [diff] [blame] | 78 | private: |
| 79 | vixl::Label entry_label_; |
| 80 | vixl::Label exit_label_; |
| 81 | |
| 82 | DISALLOW_COPY_AND_ASSIGN(SlowPathCodeARM64); |
| 83 | }; |
| 84 | |
Zheng Xu | 3927c8b | 2015-11-18 17:46:25 +0800 | [diff] [blame] | 85 | class JumpTableARM64 : public ArenaObject<kArenaAllocSwitchTable> { |
| 86 | public: |
| 87 | explicit JumpTableARM64(HPackedSwitch* switch_instr) |
| 88 | : switch_instr_(switch_instr), table_start_() {} |
| 89 | |
| 90 | vixl::Label* GetTableStartLabel() { return &table_start_; } |
| 91 | |
| 92 | void EmitTable(CodeGeneratorARM64* codegen); |
| 93 | |
| 94 | private: |
| 95 | HPackedSwitch* const switch_instr_; |
| 96 | vixl::Label table_start_; |
| 97 | |
| 98 | DISALLOW_COPY_AND_ASSIGN(JumpTableARM64); |
| 99 | }; |
| 100 | |
Nicolas Geoffray | d75948a | 2015-03-27 09:53:16 +0000 | [diff] [blame] | 101 | static const vixl::Register kRuntimeParameterCoreRegisters[] = |
| 102 | { vixl::x0, vixl::x1, vixl::x2, vixl::x3, vixl::x4, vixl::x5, vixl::x6, vixl::x7 }; |
| 103 | static constexpr size_t kRuntimeParameterCoreRegistersLength = |
| 104 | arraysize(kRuntimeParameterCoreRegisters); |
| 105 | static const vixl::FPRegister kRuntimeParameterFpuRegisters[] = |
| 106 | { vixl::d0, vixl::d1, vixl::d2, vixl::d3, vixl::d4, vixl::d5, vixl::d6, vixl::d7 }; |
| 107 | static constexpr size_t kRuntimeParameterFpuRegistersLength = |
| 108 | arraysize(kRuntimeParameterCoreRegisters); |
| 109 | |
| 110 | class InvokeRuntimeCallingConvention : public CallingConvention<vixl::Register, vixl::FPRegister> { |
| 111 | public: |
| 112 | static constexpr size_t kParameterCoreRegistersLength = arraysize(kParameterCoreRegisters); |
| 113 | |
| 114 | InvokeRuntimeCallingConvention() |
| 115 | : CallingConvention(kRuntimeParameterCoreRegisters, |
| 116 | kRuntimeParameterCoreRegistersLength, |
| 117 | kRuntimeParameterFpuRegisters, |
Mathieu Chartier | e401d14 | 2015-04-22 13:56:20 -0700 | [diff] [blame] | 118 | kRuntimeParameterFpuRegistersLength, |
| 119 | kArm64PointerSize) {} |
Nicolas Geoffray | d75948a | 2015-03-27 09:53:16 +0000 | [diff] [blame] | 120 | |
| 121 | Location GetReturnLocation(Primitive::Type return_type); |
| 122 | |
| 123 | private: |
| 124 | DISALLOW_COPY_AND_ASSIGN(InvokeRuntimeCallingConvention); |
| 125 | }; |
| 126 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 127 | class InvokeDexCallingConvention : public CallingConvention<vixl::Register, vixl::FPRegister> { |
| 128 | public: |
| 129 | InvokeDexCallingConvention() |
| 130 | : CallingConvention(kParameterCoreRegisters, |
| 131 | kParameterCoreRegistersLength, |
| 132 | kParameterFPRegisters, |
Mathieu Chartier | e401d14 | 2015-04-22 13:56:20 -0700 | [diff] [blame] | 133 | kParameterFPRegistersLength, |
| 134 | kArm64PointerSize) {} |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 135 | |
Nicolas Geoffray | fd88f16 | 2015-06-03 11:23:52 +0100 | [diff] [blame] | 136 | Location GetReturnLocation(Primitive::Type return_type) const { |
Alexandre Rames | a89086e | 2014-11-07 17:13:25 +0000 | [diff] [blame] | 137 | return ARM64ReturnLocation(return_type); |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 138 | } |
| 139 | |
| 140 | |
| 141 | private: |
| 142 | DISALLOW_COPY_AND_ASSIGN(InvokeDexCallingConvention); |
| 143 | }; |
| 144 | |
Roland Levillain | 2d27c8e | 2015-04-28 15:48:45 +0100 | [diff] [blame] | 145 | class InvokeDexCallingConventionVisitorARM64 : public InvokeDexCallingConventionVisitor { |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 146 | public: |
Roland Levillain | 2d27c8e | 2015-04-28 15:48:45 +0100 | [diff] [blame] | 147 | InvokeDexCallingConventionVisitorARM64() {} |
| 148 | virtual ~InvokeDexCallingConventionVisitorARM64() {} |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 149 | |
Roland Levillain | 2d27c8e | 2015-04-28 15:48:45 +0100 | [diff] [blame] | 150 | Location GetNextLocation(Primitive::Type type) OVERRIDE; |
Nicolas Geoffray | fd88f16 | 2015-06-03 11:23:52 +0100 | [diff] [blame] | 151 | Location GetReturnLocation(Primitive::Type return_type) const OVERRIDE { |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 152 | return calling_convention.GetReturnLocation(return_type); |
| 153 | } |
Nicolas Geoffray | fd88f16 | 2015-06-03 11:23:52 +0100 | [diff] [blame] | 154 | Location GetMethodLocation() const OVERRIDE; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 155 | |
| 156 | private: |
| 157 | InvokeDexCallingConvention calling_convention; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 158 | |
Roland Levillain | 2d27c8e | 2015-04-28 15:48:45 +0100 | [diff] [blame] | 159 | DISALLOW_COPY_AND_ASSIGN(InvokeDexCallingConventionVisitorARM64); |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 160 | }; |
| 161 | |
Calin Juravle | e460d1d | 2015-09-29 04:52:17 +0100 | [diff] [blame] | 162 | class FieldAccessCallingConventionARM64 : public FieldAccessCallingConvention { |
| 163 | public: |
| 164 | FieldAccessCallingConventionARM64() {} |
| 165 | |
| 166 | Location GetObjectLocation() const OVERRIDE { |
| 167 | return helpers::LocationFrom(vixl::x1); |
| 168 | } |
| 169 | Location GetFieldIndexLocation() const OVERRIDE { |
| 170 | return helpers::LocationFrom(vixl::x0); |
| 171 | } |
| 172 | Location GetReturnLocation(Primitive::Type type ATTRIBUTE_UNUSED) const OVERRIDE { |
| 173 | return helpers::LocationFrom(vixl::x0); |
| 174 | } |
| 175 | Location GetSetValueLocation(Primitive::Type type, bool is_instance) const OVERRIDE { |
| 176 | return Primitive::Is64BitType(type) |
| 177 | ? helpers::LocationFrom(vixl::x2) |
| 178 | : (is_instance |
| 179 | ? helpers::LocationFrom(vixl::x2) |
| 180 | : helpers::LocationFrom(vixl::x1)); |
| 181 | } |
| 182 | Location GetFpuLocation(Primitive::Type type ATTRIBUTE_UNUSED) const OVERRIDE { |
| 183 | return helpers::LocationFrom(vixl::d0); |
| 184 | } |
| 185 | |
| 186 | private: |
| 187 | DISALLOW_COPY_AND_ASSIGN(FieldAccessCallingConventionARM64); |
| 188 | }; |
| 189 | |
Aart Bik | 42249c3 | 2016-01-07 15:33:50 -0800 | [diff] [blame] | 190 | class InstructionCodeGeneratorARM64 : public InstructionCodeGenerator { |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 191 | public: |
| 192 | InstructionCodeGeneratorARM64(HGraph* graph, CodeGeneratorARM64* codegen); |
| 193 | |
| 194 | #define DECLARE_VISIT_INSTRUCTION(name, super) \ |
Nicolas Geoffray | de58ab2 | 2014-11-05 12:46:03 +0000 | [diff] [blame] | 195 | void Visit##name(H##name* instr) OVERRIDE; |
Alexandre Rames | ef20f71 | 2015-06-09 10:29:30 +0100 | [diff] [blame] | 196 | |
| 197 | FOR_EACH_CONCRETE_INSTRUCTION_COMMON(DECLARE_VISIT_INSTRUCTION) |
| 198 | FOR_EACH_CONCRETE_INSTRUCTION_ARM64(DECLARE_VISIT_INSTRUCTION) |
Artem Udovichenko | 4a0dad6 | 2016-01-26 12:28:31 +0300 | [diff] [blame] | 199 | FOR_EACH_CONCRETE_INSTRUCTION_SHARED(DECLARE_VISIT_INSTRUCTION) |
Alexandre Rames | ef20f71 | 2015-06-09 10:29:30 +0100 | [diff] [blame] | 200 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 201 | #undef DECLARE_VISIT_INSTRUCTION |
| 202 | |
Alexandre Rames | ef20f71 | 2015-06-09 10:29:30 +0100 | [diff] [blame] | 203 | void VisitInstruction(HInstruction* instruction) OVERRIDE { |
| 204 | LOG(FATAL) << "Unreachable instruction " << instruction->DebugName() |
| 205 | << " (id " << instruction->GetId() << ")"; |
| 206 | } |
| 207 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 208 | Arm64Assembler* GetAssembler() const { return assembler_; } |
Alexandre Rames | 67555f7 | 2014-11-18 10:55:16 +0000 | [diff] [blame] | 209 | vixl::MacroAssembler* GetVIXLAssembler() { return GetAssembler()->vixl_masm_; } |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 210 | |
| 211 | private: |
Alexandre Rames | 67555f7 | 2014-11-18 10:55:16 +0000 | [diff] [blame] | 212 | void GenerateClassInitializationCheck(SlowPathCodeARM64* slow_path, vixl::Register class_reg); |
Serban Constantinescu | 02164b3 | 2014-11-13 14:05:07 +0000 | [diff] [blame] | 213 | void GenerateSuspendCheck(HSuspendCheck* instruction, HBasicBlock* successor); |
Alexandre Rames | 67555f7 | 2014-11-18 10:55:16 +0000 | [diff] [blame] | 214 | void HandleBinaryOp(HBinaryOperation* instr); |
Roland Levillain | 4401586 | 2016-01-22 11:47:17 +0000 | [diff] [blame] | 215 | |
Nicolas Geoffray | 07276db | 2015-05-18 14:22:09 +0100 | [diff] [blame] | 216 | void HandleFieldSet(HInstruction* instruction, |
| 217 | const FieldInfo& field_info, |
| 218 | bool value_can_be_null); |
Alexandre Rames | 09a9996 | 2015-04-15 11:47:56 +0100 | [diff] [blame] | 219 | void HandleFieldGet(HInstruction* instruction, const FieldInfo& field_info); |
Vladimir Marko | 5f7b58e | 2015-11-23 19:49:34 +0000 | [diff] [blame] | 220 | void HandleCondition(HCondition* instruction); |
Roland Levillain | 4401586 | 2016-01-22 11:47:17 +0000 | [diff] [blame] | 221 | |
| 222 | // Generate a heap reference load using one register `out`: |
| 223 | // |
| 224 | // out <- *(out + offset) |
| 225 | // |
| 226 | // while honoring heap poisoning and/or read barriers (if any). |
| 227 | // |
| 228 | // Location `maybe_temp` is used when generating a read barrier and |
| 229 | // shall be a register in that case; it may be an invalid location |
| 230 | // otherwise. |
| 231 | void GenerateReferenceLoadOneRegister(HInstruction* instruction, |
| 232 | Location out, |
| 233 | uint32_t offset, |
| 234 | Location maybe_temp); |
| 235 | // Generate a heap reference load using two different registers |
| 236 | // `out` and `obj`: |
| 237 | // |
| 238 | // out <- *(obj + offset) |
| 239 | // |
| 240 | // while honoring heap poisoning and/or read barriers (if any). |
| 241 | // |
| 242 | // Location `maybe_temp` is used when generating a Baker's (fast |
| 243 | // path) read barrier and shall be a register in that case; it may |
| 244 | // be an invalid location otherwise. |
| 245 | void GenerateReferenceLoadTwoRegisters(HInstruction* instruction, |
| 246 | Location out, |
| 247 | Location obj, |
| 248 | uint32_t offset, |
| 249 | Location maybe_temp); |
| 250 | // Generate a GC root reference load: |
| 251 | // |
| 252 | // root <- *(obj + offset) |
| 253 | // |
| 254 | // while honoring read barriers (if any). |
| 255 | void GenerateGcRootFieldLoad(HInstruction* instruction, |
| 256 | Location root, |
| 257 | vixl::Register obj, |
| 258 | uint32_t offset); |
| 259 | |
Roland Levillain | 1a65388 | 2016-03-18 18:05:57 +0000 | [diff] [blame] | 260 | // Generate a floating-point comparison. |
| 261 | void GenerateFcmp(HInstruction* instruction); |
| 262 | |
Serban Constantinescu | 02164b3 | 2014-11-13 14:05:07 +0000 | [diff] [blame] | 263 | void HandleShift(HBinaryOperation* instr); |
Mingyao Yang | d43b3ac | 2015-04-01 14:03:04 -0700 | [diff] [blame] | 264 | void GenerateTestAndBranch(HInstruction* instruction, |
David Brazdil | 0debae7 | 2015-11-12 18:37:00 +0000 | [diff] [blame] | 265 | size_t condition_input_index, |
Mingyao Yang | d43b3ac | 2015-04-01 14:03:04 -0700 | [diff] [blame] | 266 | vixl::Label* true_target, |
David Brazdil | 0debae7 | 2015-11-12 18:37:00 +0000 | [diff] [blame] | 267 | vixl::Label* false_target); |
Zheng Xu | c666710 | 2015-05-15 16:08:45 +0800 | [diff] [blame] | 268 | void DivRemOneOrMinusOne(HBinaryOperation* instruction); |
| 269 | void DivRemByPowerOfTwo(HBinaryOperation* instruction); |
| 270 | void GenerateDivRemWithAnyConstant(HBinaryOperation* instruction); |
| 271 | void GenerateDivRemIntegral(HBinaryOperation* instruction); |
David Brazdil | fc6a86a | 2015-06-26 10:33:45 +0000 | [diff] [blame] | 272 | void HandleGoto(HInstruction* got, HBasicBlock* successor); |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 273 | |
| 274 | Arm64Assembler* const assembler_; |
| 275 | CodeGeneratorARM64* const codegen_; |
| 276 | |
| 277 | DISALLOW_COPY_AND_ASSIGN(InstructionCodeGeneratorARM64); |
| 278 | }; |
| 279 | |
| 280 | class LocationsBuilderARM64 : public HGraphVisitor { |
| 281 | public: |
Roland Levillain | 3887c46 | 2015-08-12 18:15:42 +0100 | [diff] [blame] | 282 | LocationsBuilderARM64(HGraph* graph, CodeGeneratorARM64* codegen) |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 283 | : HGraphVisitor(graph), codegen_(codegen) {} |
| 284 | |
| 285 | #define DECLARE_VISIT_INSTRUCTION(name, super) \ |
Nicolas Geoffray | de58ab2 | 2014-11-05 12:46:03 +0000 | [diff] [blame] | 286 | void Visit##name(H##name* instr) OVERRIDE; |
Alexandre Rames | ef20f71 | 2015-06-09 10:29:30 +0100 | [diff] [blame] | 287 | |
| 288 | FOR_EACH_CONCRETE_INSTRUCTION_COMMON(DECLARE_VISIT_INSTRUCTION) |
| 289 | FOR_EACH_CONCRETE_INSTRUCTION_ARM64(DECLARE_VISIT_INSTRUCTION) |
Artem Udovichenko | 4a0dad6 | 2016-01-26 12:28:31 +0300 | [diff] [blame] | 290 | FOR_EACH_CONCRETE_INSTRUCTION_SHARED(DECLARE_VISIT_INSTRUCTION) |
Alexandre Rames | ef20f71 | 2015-06-09 10:29:30 +0100 | [diff] [blame] | 291 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 292 | #undef DECLARE_VISIT_INSTRUCTION |
| 293 | |
Alexandre Rames | ef20f71 | 2015-06-09 10:29:30 +0100 | [diff] [blame] | 294 | void VisitInstruction(HInstruction* instruction) OVERRIDE { |
| 295 | LOG(FATAL) << "Unreachable instruction " << instruction->DebugName() |
| 296 | << " (id " << instruction->GetId() << ")"; |
| 297 | } |
| 298 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 299 | private: |
Alexandre Rames | 67555f7 | 2014-11-18 10:55:16 +0000 | [diff] [blame] | 300 | void HandleBinaryOp(HBinaryOperation* instr); |
Alexandre Rames | 09a9996 | 2015-04-15 11:47:56 +0100 | [diff] [blame] | 301 | void HandleFieldSet(HInstruction* instruction); |
| 302 | void HandleFieldGet(HInstruction* instruction); |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 303 | void HandleInvoke(HInvoke* instr); |
Vladimir Marko | 5f7b58e | 2015-11-23 19:49:34 +0000 | [diff] [blame] | 304 | void HandleCondition(HCondition* instruction); |
Alexandre Rames | 09a9996 | 2015-04-15 11:47:56 +0100 | [diff] [blame] | 305 | void HandleShift(HBinaryOperation* instr); |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 306 | |
| 307 | CodeGeneratorARM64* const codegen_; |
Roland Levillain | 2d27c8e | 2015-04-28 15:48:45 +0100 | [diff] [blame] | 308 | InvokeDexCallingConventionVisitorARM64 parameter_visitor_; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 309 | |
| 310 | DISALLOW_COPY_AND_ASSIGN(LocationsBuilderARM64); |
| 311 | }; |
| 312 | |
Zheng Xu | ad4450e | 2015-04-17 18:48:56 +0800 | [diff] [blame] | 313 | class ParallelMoveResolverARM64 : public ParallelMoveResolverNoSwap { |
Alexandre Rames | 3e69f16 | 2014-12-10 10:36:50 +0000 | [diff] [blame] | 314 | public: |
| 315 | ParallelMoveResolverARM64(ArenaAllocator* allocator, CodeGeneratorARM64* codegen) |
Zheng Xu | ad4450e | 2015-04-17 18:48:56 +0800 | [diff] [blame] | 316 | : ParallelMoveResolverNoSwap(allocator), codegen_(codegen), vixl_temps_() {} |
Alexandre Rames | 3e69f16 | 2014-12-10 10:36:50 +0000 | [diff] [blame] | 317 | |
Zheng Xu | ad4450e | 2015-04-17 18:48:56 +0800 | [diff] [blame] | 318 | protected: |
| 319 | void PrepareForEmitNativeCode() OVERRIDE; |
| 320 | void FinishEmitNativeCode() OVERRIDE; |
| 321 | Location AllocateScratchLocationFor(Location::Kind kind) OVERRIDE; |
| 322 | void FreeScratchLocation(Location loc) OVERRIDE; |
Alexandre Rames | 3e69f16 | 2014-12-10 10:36:50 +0000 | [diff] [blame] | 323 | void EmitMove(size_t index) OVERRIDE; |
Alexandre Rames | 3e69f16 | 2014-12-10 10:36:50 +0000 | [diff] [blame] | 324 | |
| 325 | private: |
| 326 | Arm64Assembler* GetAssembler() const; |
| 327 | vixl::MacroAssembler* GetVIXLAssembler() const { |
| 328 | return GetAssembler()->vixl_masm_; |
| 329 | } |
| 330 | |
| 331 | CodeGeneratorARM64* const codegen_; |
Zheng Xu | ad4450e | 2015-04-17 18:48:56 +0800 | [diff] [blame] | 332 | vixl::UseScratchRegisterScope vixl_temps_; |
Alexandre Rames | 3e69f16 | 2014-12-10 10:36:50 +0000 | [diff] [blame] | 333 | |
| 334 | DISALLOW_COPY_AND_ASSIGN(ParallelMoveResolverARM64); |
| 335 | }; |
| 336 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 337 | class CodeGeneratorARM64 : public CodeGenerator { |
| 338 | public: |
Serban Constantinescu | 579885a | 2015-02-22 20:51:33 +0000 | [diff] [blame] | 339 | CodeGeneratorARM64(HGraph* graph, |
| 340 | const Arm64InstructionSetFeatures& isa_features, |
Serban Constantinescu | ecc4366 | 2015-08-13 13:33:12 +0100 | [diff] [blame] | 341 | const CompilerOptions& compiler_options, |
| 342 | OptimizingCompilerStats* stats = nullptr); |
Nicolas Geoffray | de58ab2 | 2014-11-05 12:46:03 +0000 | [diff] [blame] | 343 | virtual ~CodeGeneratorARM64() {} |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 344 | |
Nicolas Geoffray | de58ab2 | 2014-11-05 12:46:03 +0000 | [diff] [blame] | 345 | void GenerateFrameEntry() OVERRIDE; |
| 346 | void GenerateFrameExit() OVERRIDE; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 347 | |
Zheng Xu | da40309 | 2015-04-24 17:35:39 +0800 | [diff] [blame] | 348 | vixl::CPURegList GetFramePreservedCoreRegisters() const; |
| 349 | vixl::CPURegList GetFramePreservedFPRegisters() const; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 350 | |
Nicolas Geoffray | de58ab2 | 2014-11-05 12:46:03 +0000 | [diff] [blame] | 351 | void Bind(HBasicBlock* block) OVERRIDE; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 352 | |
| 353 | vixl::Label* GetLabelOf(HBasicBlock* block) const { |
Nicolas Geoffray | dc23d83 | 2015-02-16 11:15:43 +0000 | [diff] [blame] | 354 | return CommonGetLabelOf<vixl::Label>(block_labels_, block); |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 355 | } |
| 356 | |
Nicolas Geoffray | de58ab2 | 2014-11-05 12:46:03 +0000 | [diff] [blame] | 357 | size_t GetWordSize() const OVERRIDE { |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 358 | return kArm64WordSize; |
| 359 | } |
| 360 | |
Mark Mendell | f85a9ca | 2015-01-13 09:20:58 -0500 | [diff] [blame] | 361 | size_t GetFloatingPointSpillSlotSize() const OVERRIDE { |
| 362 | // Allocated in D registers, which are word sized. |
| 363 | return kArm64WordSize; |
| 364 | } |
| 365 | |
Alexandre Rames | 67555f7 | 2014-11-18 10:55:16 +0000 | [diff] [blame] | 366 | uintptr_t GetAddressOf(HBasicBlock* block) const OVERRIDE { |
| 367 | vixl::Label* block_entry_label = GetLabelOf(block); |
| 368 | DCHECK(block_entry_label->IsBound()); |
| 369 | return block_entry_label->location(); |
Nicolas Geoffray | de58ab2 | 2014-11-05 12:46:03 +0000 | [diff] [blame] | 370 | } |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 371 | |
Nicolas Geoffray | de58ab2 | 2014-11-05 12:46:03 +0000 | [diff] [blame] | 372 | HGraphVisitor* GetLocationBuilder() OVERRIDE { return &location_builder_; } |
| 373 | HGraphVisitor* GetInstructionVisitor() OVERRIDE { return &instruction_visitor_; } |
| 374 | Arm64Assembler* GetAssembler() OVERRIDE { return &assembler_; } |
Alexandre Rames | eb7b739 | 2015-06-19 14:47:01 +0100 | [diff] [blame] | 375 | const Arm64Assembler& GetAssembler() const OVERRIDE { return assembler_; } |
Alexandre Rames | 67555f7 | 2014-11-18 10:55:16 +0000 | [diff] [blame] | 376 | vixl::MacroAssembler* GetVIXLAssembler() { return GetAssembler()->vixl_masm_; } |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 377 | |
| 378 | // Emit a write barrier. |
Nicolas Geoffray | 07276db | 2015-05-18 14:22:09 +0100 | [diff] [blame] | 379 | void MarkGCCard(vixl::Register object, vixl::Register value, bool value_can_be_null); |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 380 | |
Roland Levillain | 4401586 | 2016-01-22 11:47:17 +0000 | [diff] [blame] | 381 | void GenerateMemoryBarrier(MemBarrierKind kind); |
| 382 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 383 | // Register allocation. |
| 384 | |
David Brazdil | 58282f4 | 2016-01-14 12:45:10 +0000 | [diff] [blame] | 385 | void SetupBlockedRegisters() const OVERRIDE; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 386 | |
Nicolas Geoffray | de58ab2 | 2014-11-05 12:46:03 +0000 | [diff] [blame] | 387 | Location GetStackLocation(HLoadLocal* load) const OVERRIDE; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 388 | |
Zheng Xu | da40309 | 2015-04-24 17:35:39 +0800 | [diff] [blame] | 389 | size_t SaveCoreRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; |
| 390 | size_t RestoreCoreRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; |
| 391 | size_t SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; |
| 392 | size_t RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 393 | |
| 394 | // The number of registers that can be allocated. The register allocator may |
| 395 | // decide to reserve and not use a few of them. |
| 396 | // We do not consider registers sp, xzr, wzr. They are either not allocatable |
| 397 | // (xzr, wzr), or make for poor allocatable registers (sp alignment |
| 398 | // requirements, etc.). This also facilitates our task as all other registers |
| 399 | // can easily be mapped via to or from their type and index or code. |
Alexandre Rames | a89086e | 2014-11-07 17:13:25 +0000 | [diff] [blame] | 400 | static const int kNumberOfAllocatableRegisters = vixl::kNumberOfRegisters - 1; |
| 401 | static const int kNumberOfAllocatableFPRegisters = vixl::kNumberOfFPRegisters; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 402 | static constexpr int kNumberOfAllocatableRegisterPairs = 0; |
| 403 | |
Nicolas Geoffray | de58ab2 | 2014-11-05 12:46:03 +0000 | [diff] [blame] | 404 | void DumpCoreRegister(std::ostream& stream, int reg) const OVERRIDE; |
| 405 | void DumpFloatingPointRegister(std::ostream& stream, int reg) const OVERRIDE; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 406 | |
Nicolas Geoffray | de58ab2 | 2014-11-05 12:46:03 +0000 | [diff] [blame] | 407 | InstructionSet GetInstructionSet() const OVERRIDE { |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 408 | return InstructionSet::kArm64; |
| 409 | } |
| 410 | |
Serban Constantinescu | 579885a | 2015-02-22 20:51:33 +0000 | [diff] [blame] | 411 | const Arm64InstructionSetFeatures& GetInstructionSetFeatures() const { |
| 412 | return isa_features_; |
| 413 | } |
| 414 | |
Nicolas Geoffray | de58ab2 | 2014-11-05 12:46:03 +0000 | [diff] [blame] | 415 | void Initialize() OVERRIDE { |
Vladimir Marko | 225b646 | 2015-09-28 12:17:40 +0100 | [diff] [blame] | 416 | block_labels_ = CommonInitializeLabels<vixl::Label>(); |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 417 | } |
| 418 | |
Zheng Xu | 3927c8b | 2015-11-18 17:46:25 +0800 | [diff] [blame] | 419 | void AddJumpTable(JumpTableARM64* jump_table) { |
| 420 | jump_tables_.push_back(jump_table); |
| 421 | } |
| 422 | |
Serban Constantinescu | 32f5b4d | 2014-11-25 20:05:46 +0000 | [diff] [blame] | 423 | void Finalize(CodeAllocator* allocator) OVERRIDE; |
| 424 | |
Alexandre Rames | fc19de8 | 2014-11-07 17:13:31 +0000 | [diff] [blame] | 425 | // Code generation helpers. |
Alexandre Rames | 67555f7 | 2014-11-18 10:55:16 +0000 | [diff] [blame] | 426 | void MoveConstant(vixl::CPURegister destination, HConstant* constant); |
Calin Juravle | 175dc73 | 2015-08-25 15:42:32 +0100 | [diff] [blame] | 427 | void MoveConstant(Location destination, int32_t value) OVERRIDE; |
Calin Juravle | e460d1d | 2015-09-29 04:52:17 +0100 | [diff] [blame] | 428 | void MoveLocation(Location dst, Location src, Primitive::Type dst_type) OVERRIDE; |
| 429 | void AddLocationAsTemp(Location location, LocationSummary* locations) OVERRIDE; |
| 430 | |
Alexandre Rames | 67555f7 | 2014-11-18 10:55:16 +0000 | [diff] [blame] | 431 | void Load(Primitive::Type type, vixl::CPURegister dst, const vixl::MemOperand& src); |
Roland Levillain | 4401586 | 2016-01-22 11:47:17 +0000 | [diff] [blame] | 432 | void Store(Primitive::Type type, vixl::CPURegister src, const vixl::MemOperand& dst); |
| 433 | void LoadAcquire(HInstruction* instruction, |
| 434 | vixl::CPURegister dst, |
| 435 | const vixl::MemOperand& src, |
| 436 | bool needs_null_check); |
| 437 | void StoreRelease(Primitive::Type type, vixl::CPURegister src, const vixl::MemOperand& dst); |
Alexandre Rames | 67555f7 | 2014-11-18 10:55:16 +0000 | [diff] [blame] | 438 | |
| 439 | // Generate code to invoke a runtime entry point. |
Calin Juravle | 175dc73 | 2015-08-25 15:42:32 +0100 | [diff] [blame] | 440 | void InvokeRuntime(QuickEntrypointEnum entrypoint, |
| 441 | HInstruction* instruction, |
| 442 | uint32_t dex_pc, |
| 443 | SlowPathCode* slow_path) OVERRIDE; |
| 444 | |
Nicolas Geoffray | eeefa12 | 2015-03-13 18:52:59 +0000 | [diff] [blame] | 445 | void InvokeRuntime(int32_t offset, |
| 446 | HInstruction* instruction, |
| 447 | uint32_t dex_pc, |
| 448 | SlowPathCode* slow_path); |
Alexandre Rames | fc19de8 | 2014-11-07 17:13:31 +0000 | [diff] [blame] | 449 | |
Alexandre Rames | e6dbf48 | 2015-10-19 10:10:41 +0100 | [diff] [blame] | 450 | ParallelMoveResolverARM64* GetMoveResolver() OVERRIDE { return &move_resolver_; } |
Nicolas Geoffray | f0e3937 | 2014-11-12 17:50:07 +0000 | [diff] [blame] | 451 | |
Nicolas Geoffray | 840e546 | 2015-01-07 16:01:24 +0000 | [diff] [blame] | 452 | bool NeedsTwoRegisters(Primitive::Type type ATTRIBUTE_UNUSED) const OVERRIDE { |
| 453 | return false; |
| 454 | } |
| 455 | |
Vladimir Marko | dc151b2 | 2015-10-15 18:02:30 +0100 | [diff] [blame] | 456 | // Check if the desired_dispatch_info is supported. If it is, return it, |
| 457 | // otherwise return a fall-back info that should be used instead. |
| 458 | HInvokeStaticOrDirect::DispatchInfo GetSupportedInvokeStaticOrDirectDispatch( |
| 459 | const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, |
| 460 | MethodReference target_method) OVERRIDE; |
| 461 | |
Andreas Gampe | 85b62f2 | 2015-09-09 13:15:38 -0700 | [diff] [blame] | 462 | void GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) OVERRIDE; |
| 463 | void GenerateVirtualCall(HInvokeVirtual* invoke, Location temp) OVERRIDE; |
| 464 | |
| 465 | void MoveFromReturnRegister(Location trg ATTRIBUTE_UNUSED, |
| 466 | Primitive::Type type ATTRIBUTE_UNUSED) OVERRIDE { |
| 467 | UNIMPLEMENTED(FATAL); |
| 468 | } |
Andreas Gampe | 878d58c | 2015-01-15 23:24:00 -0800 | [diff] [blame] | 469 | |
Vladimir Marko | 5815501 | 2015-08-19 12:49:41 +0000 | [diff] [blame] | 470 | void EmitLinkerPatches(ArenaVector<LinkerPatch>* linker_patches) OVERRIDE; |
| 471 | |
Roland Levillain | 4401586 | 2016-01-22 11:47:17 +0000 | [diff] [blame] | 472 | // Fast path implementation of ReadBarrier::Barrier for a heap |
| 473 | // reference field load when Baker's read barriers are used. |
| 474 | void GenerateFieldLoadWithBakerReadBarrier(HInstruction* instruction, |
| 475 | Location ref, |
| 476 | vixl::Register obj, |
| 477 | uint32_t offset, |
| 478 | vixl::Register temp, |
| 479 | bool needs_null_check, |
| 480 | bool use_load_acquire); |
| 481 | // Fast path implementation of ReadBarrier::Barrier for a heap |
| 482 | // reference array load when Baker's read barriers are used. |
| 483 | void GenerateArrayLoadWithBakerReadBarrier(HInstruction* instruction, |
| 484 | Location ref, |
| 485 | vixl::Register obj, |
| 486 | uint32_t data_offset, |
| 487 | Location index, |
| 488 | vixl::Register temp, |
| 489 | bool needs_null_check); |
| 490 | |
| 491 | // Generate a read barrier for a heap reference within `instruction` |
| 492 | // using a slow path. |
Roland Levillain | 22ccc3a | 2015-11-24 13:10:05 +0000 | [diff] [blame] | 493 | // |
| 494 | // A read barrier for an object reference read from the heap is |
| 495 | // implemented as a call to the artReadBarrierSlow runtime entry |
| 496 | // point, which is passed the values in locations `ref`, `obj`, and |
| 497 | // `offset`: |
| 498 | // |
| 499 | // mirror::Object* artReadBarrierSlow(mirror::Object* ref, |
| 500 | // mirror::Object* obj, |
| 501 | // uint32_t offset); |
| 502 | // |
| 503 | // The `out` location contains the value returned by |
| 504 | // artReadBarrierSlow. |
| 505 | // |
| 506 | // When `index` is provided (i.e. for array accesses), the offset |
| 507 | // value passed to artReadBarrierSlow is adjusted to take `index` |
| 508 | // into account. |
Roland Levillain | 4401586 | 2016-01-22 11:47:17 +0000 | [diff] [blame] | 509 | void GenerateReadBarrierSlow(HInstruction* instruction, |
| 510 | Location out, |
| 511 | Location ref, |
| 512 | Location obj, |
| 513 | uint32_t offset, |
| 514 | Location index = Location::NoLocation()); |
Roland Levillain | 22ccc3a | 2015-11-24 13:10:05 +0000 | [diff] [blame] | 515 | |
Roland Levillain | 4401586 | 2016-01-22 11:47:17 +0000 | [diff] [blame] | 516 | // If read barriers are enabled, generate a read barrier for a heap |
| 517 | // reference using a slow path. If heap poisoning is enabled, also |
| 518 | // unpoison the reference in `out`. |
| 519 | void MaybeGenerateReadBarrierSlow(HInstruction* instruction, |
| 520 | Location out, |
| 521 | Location ref, |
| 522 | Location obj, |
| 523 | uint32_t offset, |
| 524 | Location index = Location::NoLocation()); |
Roland Levillain | 22ccc3a | 2015-11-24 13:10:05 +0000 | [diff] [blame] | 525 | |
Roland Levillain | 4401586 | 2016-01-22 11:47:17 +0000 | [diff] [blame] | 526 | // Generate a read barrier for a GC root within `instruction` using |
| 527 | // a slow path. |
Roland Levillain | 22ccc3a | 2015-11-24 13:10:05 +0000 | [diff] [blame] | 528 | // |
| 529 | // A read barrier for an object reference GC root is implemented as |
| 530 | // a call to the artReadBarrierForRootSlow runtime entry point, |
| 531 | // which is passed the value in location `root`: |
| 532 | // |
| 533 | // mirror::Object* artReadBarrierForRootSlow(GcRoot<mirror::Object>* root); |
| 534 | // |
| 535 | // The `out` location contains the value returned by |
| 536 | // artReadBarrierForRootSlow. |
Roland Levillain | 4401586 | 2016-01-22 11:47:17 +0000 | [diff] [blame] | 537 | void GenerateReadBarrierForRootSlow(HInstruction* instruction, Location out, Location root); |
Roland Levillain | 22ccc3a | 2015-11-24 13:10:05 +0000 | [diff] [blame] | 538 | |
David Srbecky | c7098ff | 2016-02-09 14:30:11 +0000 | [diff] [blame] | 539 | void GenerateNop(); |
| 540 | |
Calin Juravle | 2ae4818 | 2016-03-16 14:05:09 +0000 | [diff] [blame] | 541 | void GenerateImplicitNullCheck(HNullCheck* instruction); |
| 542 | void GenerateExplicitNullCheck(HNullCheck* instruction); |
| 543 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 544 | private: |
Roland Levillain | 4401586 | 2016-01-22 11:47:17 +0000 | [diff] [blame] | 545 | // Factored implementation of GenerateFieldLoadWithBakerReadBarrier |
| 546 | // and GenerateArrayLoadWithBakerReadBarrier. |
| 547 | void GenerateReferenceLoadWithBakerReadBarrier(HInstruction* instruction, |
| 548 | Location ref, |
| 549 | vixl::Register obj, |
| 550 | uint32_t offset, |
| 551 | Location index, |
| 552 | vixl::Register temp, |
| 553 | bool needs_null_check, |
| 554 | bool use_load_acquire); |
| 555 | |
Vladimir Marko | 5815501 | 2015-08-19 12:49:41 +0000 | [diff] [blame] | 556 | using Uint64ToLiteralMap = ArenaSafeMap<uint64_t, vixl::Literal<uint64_t>*>; |
| 557 | using MethodToLiteralMap = ArenaSafeMap<MethodReference, |
| 558 | vixl::Literal<uint64_t>*, |
| 559 | MethodReferenceComparator>; |
| 560 | |
| 561 | vixl::Literal<uint64_t>* DeduplicateUint64Literal(uint64_t value); |
| 562 | vixl::Literal<uint64_t>* DeduplicateMethodLiteral(MethodReference target_method, |
| 563 | MethodToLiteralMap* map); |
| 564 | vixl::Literal<uint64_t>* DeduplicateMethodAddressLiteral(MethodReference target_method); |
| 565 | vixl::Literal<uint64_t>* DeduplicateMethodCodeLiteral(MethodReference target_method); |
| 566 | |
| 567 | struct PcRelativeDexCacheAccessInfo { |
| 568 | PcRelativeDexCacheAccessInfo(const DexFile& dex_file, uint32_t element_off) |
| 569 | : target_dex_file(dex_file), element_offset(element_off), label(), pc_insn_label() { } |
| 570 | |
| 571 | const DexFile& target_dex_file; |
| 572 | uint32_t element_offset; |
Vladimir Marko | 5815501 | 2015-08-19 12:49:41 +0000 | [diff] [blame] | 573 | vixl::Label label; |
| 574 | vixl::Label* pc_insn_label; |
| 575 | }; |
| 576 | |
Zheng Xu | 3927c8b | 2015-11-18 17:46:25 +0800 | [diff] [blame] | 577 | void EmitJumpTables(); |
| 578 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 579 | // Labels for each block that will be compiled. |
Vladimir Marko | 225b646 | 2015-09-28 12:17:40 +0100 | [diff] [blame] | 580 | vixl::Label* block_labels_; // Indexed by block id. |
Nicolas Geoffray | 1cf9528 | 2014-12-12 19:22:03 +0000 | [diff] [blame] | 581 | vixl::Label frame_entry_label_; |
Zheng Xu | 3927c8b | 2015-11-18 17:46:25 +0800 | [diff] [blame] | 582 | ArenaVector<JumpTableARM64*> jump_tables_; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 583 | |
| 584 | LocationsBuilderARM64 location_builder_; |
| 585 | InstructionCodeGeneratorARM64 instruction_visitor_; |
Alexandre Rames | 3e69f16 | 2014-12-10 10:36:50 +0000 | [diff] [blame] | 586 | ParallelMoveResolverARM64 move_resolver_; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 587 | Arm64Assembler assembler_; |
Serban Constantinescu | 579885a | 2015-02-22 20:51:33 +0000 | [diff] [blame] | 588 | const Arm64InstructionSetFeatures& isa_features_; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 589 | |
Vladimir Marko | 5815501 | 2015-08-19 12:49:41 +0000 | [diff] [blame] | 590 | // Deduplication map for 64-bit literals, used for non-patchable method address and method code. |
| 591 | Uint64ToLiteralMap uint64_literals_; |
| 592 | // Method patch info, map MethodReference to a literal for method address and method code. |
| 593 | MethodToLiteralMap method_patches_; |
| 594 | MethodToLiteralMap call_patches_; |
| 595 | // Relative call patch info. |
| 596 | // Using ArenaDeque<> which retains element addresses on push/emplace_back(). |
| 597 | ArenaDeque<MethodPatchInfo<vixl::Label>> relative_call_patches_; |
| 598 | // PC-relative DexCache access info. |
Vladimir Marko | 0f7dca4 | 2015-11-02 14:36:43 +0000 | [diff] [blame] | 599 | ArenaDeque<PcRelativeDexCacheAccessInfo> pc_relative_dex_cache_patches_; |
Vladimir Marko | 5815501 | 2015-08-19 12:49:41 +0000 | [diff] [blame] | 600 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 601 | DISALLOW_COPY_AND_ASSIGN(CodeGeneratorARM64); |
| 602 | }; |
| 603 | |
Alexandre Rames | 3e69f16 | 2014-12-10 10:36:50 +0000 | [diff] [blame] | 604 | inline Arm64Assembler* ParallelMoveResolverARM64::GetAssembler() const { |
| 605 | return codegen_->GetAssembler(); |
| 606 | } |
| 607 | |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 608 | } // namespace arm64 |
| 609 | } // namespace art |
| 610 | |
| 611 | #endif // ART_COMPILER_OPTIMIZING_CODE_GENERATOR_ARM64_H_ |