Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include "dex/compiler_ir.h" |
| 18 | #include "dex/compiler_internals.h" |
| 19 | #include "dex/quick/mir_to_lir-inl.h" |
Ian Rogers | 166db04 | 2013-07-26 12:05:57 -0700 | [diff] [blame] | 20 | #include "entrypoints/quick/quick_entrypoints.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 21 | #include "mirror/array.h" |
Hiroshi Yamauchi | be1ca55 | 2014-01-15 11:46:48 -0800 | [diff] [blame] | 22 | #include "mirror/object-inl.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 23 | #include "verifier/method_verifier.h" |
| 24 | |
| 25 | namespace art { |
| 26 | |
| 27 | /* |
| 28 | * This source files contains "gen" codegen routines that should |
| 29 | * be applicable to most targets. Only mid-level support utilities |
| 30 | * and "op" calls may be used here. |
| 31 | */ |
| 32 | |
| 33 | /* |
buzbee | b48819d | 2013-09-14 16:15:25 -0700 | [diff] [blame] | 34 | * Generate a kPseudoBarrier marker to indicate the boundary of special |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 35 | * blocks. |
| 36 | */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 37 | void Mir2Lir::GenBarrier() { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 38 | LIR* barrier = NewLIR0(kPseudoBarrier); |
| 39 | /* Mark all resources as being clobbered */ |
buzbee | b48819d | 2013-09-14 16:15:25 -0700 | [diff] [blame] | 40 | DCHECK(!barrier->flags.use_def_invalid); |
| 41 | barrier->u.m.def_mask = ENCODE_ALL; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 42 | } |
| 43 | |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 44 | // TODO: need to do some work to split out targets with |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 45 | // condition codes and those without |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 46 | LIR* Mir2Lir::GenCheck(ConditionCode c_code, ThrowKind kind) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 47 | DCHECK_NE(cu_->instruction_set, kMips); |
| 48 | LIR* tgt = RawLIR(0, kPseudoThrowTarget, kind, current_dalvik_offset_); |
| 49 | LIR* branch = OpCondBranch(c_code, tgt); |
| 50 | // Remember branch target - will process later |
| 51 | throw_launchpads_.Insert(tgt); |
| 52 | return branch; |
| 53 | } |
| 54 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 55 | LIR* Mir2Lir::GenImmedCheck(ConditionCode c_code, int reg, int imm_val, ThrowKind kind) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 56 | LIR* tgt = RawLIR(0, kPseudoThrowTarget, kind, current_dalvik_offset_, reg, imm_val); |
| 57 | LIR* branch; |
| 58 | if (c_code == kCondAl) { |
| 59 | branch = OpUnconditionalBranch(tgt); |
| 60 | } else { |
| 61 | branch = OpCmpImmBranch(c_code, reg, imm_val, tgt); |
| 62 | } |
| 63 | // Remember branch target - will process later |
| 64 | throw_launchpads_.Insert(tgt); |
| 65 | return branch; |
| 66 | } |
| 67 | |
| 68 | /* Perform null-check on a register. */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 69 | LIR* Mir2Lir::GenNullCheck(int s_reg, int m_reg, int opt_flags) { |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 70 | if (!(cu_->disable_opt & (1 << kNullCheckElimination)) && (opt_flags & MIR_IGNORE_NULL_CHECK)) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 71 | return NULL; |
| 72 | } |
| 73 | return GenImmedCheck(kCondEq, m_reg, 0, kThrowNullPointer); |
| 74 | } |
| 75 | |
| 76 | /* Perform check on two registers */ |
| 77 | LIR* Mir2Lir::GenRegRegCheck(ConditionCode c_code, int reg1, int reg2, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 78 | ThrowKind kind) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 79 | LIR* tgt = RawLIR(0, kPseudoThrowTarget, kind, current_dalvik_offset_, reg1, reg2); |
| 80 | LIR* branch = OpCmpBranch(c_code, reg1, reg2, tgt); |
| 81 | // Remember branch target - will process later |
| 82 | throw_launchpads_.Insert(tgt); |
| 83 | return branch; |
| 84 | } |
| 85 | |
| 86 | void Mir2Lir::GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1, |
| 87 | RegLocation rl_src2, LIR* taken, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 88 | LIR* fall_through) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 89 | ConditionCode cond; |
| 90 | switch (opcode) { |
| 91 | case Instruction::IF_EQ: |
| 92 | cond = kCondEq; |
| 93 | break; |
| 94 | case Instruction::IF_NE: |
| 95 | cond = kCondNe; |
| 96 | break; |
| 97 | case Instruction::IF_LT: |
| 98 | cond = kCondLt; |
| 99 | break; |
| 100 | case Instruction::IF_GE: |
| 101 | cond = kCondGe; |
| 102 | break; |
| 103 | case Instruction::IF_GT: |
| 104 | cond = kCondGt; |
| 105 | break; |
| 106 | case Instruction::IF_LE: |
| 107 | cond = kCondLe; |
| 108 | break; |
| 109 | default: |
| 110 | cond = static_cast<ConditionCode>(0); |
| 111 | LOG(FATAL) << "Unexpected opcode " << opcode; |
| 112 | } |
| 113 | |
| 114 | // Normalize such that if either operand is constant, src2 will be constant |
| 115 | if (rl_src1.is_const) { |
| 116 | RegLocation rl_temp = rl_src1; |
| 117 | rl_src1 = rl_src2; |
| 118 | rl_src2 = rl_temp; |
| 119 | cond = FlipComparisonOrder(cond); |
| 120 | } |
| 121 | |
| 122 | rl_src1 = LoadValue(rl_src1, kCoreReg); |
| 123 | // Is this really an immediate comparison? |
| 124 | if (rl_src2.is_const) { |
| 125 | // If it's already live in a register or not easily materialized, just keep going |
| 126 | RegLocation rl_temp = UpdateLoc(rl_src2); |
| 127 | if ((rl_temp.location == kLocDalvikFrame) && |
| 128 | InexpensiveConstantInt(mir_graph_->ConstantValue(rl_src2))) { |
| 129 | // OK - convert this to a compare immediate and branch |
| 130 | OpCmpImmBranch(cond, rl_src1.low_reg, mir_graph_->ConstantValue(rl_src2), taken); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 131 | return; |
| 132 | } |
| 133 | } |
| 134 | rl_src2 = LoadValue(rl_src2, kCoreReg); |
| 135 | OpCmpBranch(cond, rl_src1.low_reg, rl_src2.low_reg, taken); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 136 | } |
| 137 | |
| 138 | void Mir2Lir::GenCompareZeroAndBranch(Instruction::Code opcode, RegLocation rl_src, LIR* taken, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 139 | LIR* fall_through) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 140 | ConditionCode cond; |
| 141 | rl_src = LoadValue(rl_src, kCoreReg); |
| 142 | switch (opcode) { |
| 143 | case Instruction::IF_EQZ: |
| 144 | cond = kCondEq; |
| 145 | break; |
| 146 | case Instruction::IF_NEZ: |
| 147 | cond = kCondNe; |
| 148 | break; |
| 149 | case Instruction::IF_LTZ: |
| 150 | cond = kCondLt; |
| 151 | break; |
| 152 | case Instruction::IF_GEZ: |
| 153 | cond = kCondGe; |
| 154 | break; |
| 155 | case Instruction::IF_GTZ: |
| 156 | cond = kCondGt; |
| 157 | break; |
| 158 | case Instruction::IF_LEZ: |
| 159 | cond = kCondLe; |
| 160 | break; |
| 161 | default: |
| 162 | cond = static_cast<ConditionCode>(0); |
| 163 | LOG(FATAL) << "Unexpected opcode " << opcode; |
| 164 | } |
| 165 | OpCmpImmBranch(cond, rl_src.low_reg, 0, taken); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 166 | } |
| 167 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 168 | void Mir2Lir::GenIntToLong(RegLocation rl_dest, RegLocation rl_src) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 169 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 170 | if (rl_src.location == kLocPhysReg) { |
| 171 | OpRegCopy(rl_result.low_reg, rl_src.low_reg); |
| 172 | } else { |
| 173 | LoadValueDirect(rl_src, rl_result.low_reg); |
| 174 | } |
| 175 | OpRegRegImm(kOpAsr, rl_result.high_reg, rl_result.low_reg, 31); |
| 176 | StoreValueWide(rl_dest, rl_result); |
| 177 | } |
| 178 | |
| 179 | void Mir2Lir::GenIntNarrowing(Instruction::Code opcode, RegLocation rl_dest, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 180 | RegLocation rl_src) { |
Brian Carlstrom | 6f485c6 | 2013-07-18 15:35:35 -0700 | [diff] [blame] | 181 | rl_src = LoadValue(rl_src, kCoreReg); |
| 182 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 183 | OpKind op = kOpInvalid; |
| 184 | switch (opcode) { |
| 185 | case Instruction::INT_TO_BYTE: |
| 186 | op = kOp2Byte; |
| 187 | break; |
| 188 | case Instruction::INT_TO_SHORT: |
| 189 | op = kOp2Short; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 190 | break; |
Brian Carlstrom | 6f485c6 | 2013-07-18 15:35:35 -0700 | [diff] [blame] | 191 | case Instruction::INT_TO_CHAR: |
| 192 | op = kOp2Char; |
| 193 | break; |
| 194 | default: |
| 195 | LOG(ERROR) << "Bad int conversion type"; |
| 196 | } |
| 197 | OpRegReg(op, rl_result.low_reg, rl_src.low_reg); |
| 198 | StoreValue(rl_dest, rl_result); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 199 | } |
| 200 | |
| 201 | /* |
| 202 | * Let helper function take care of everything. Will call |
| 203 | * Array::AllocFromCode(type_idx, method, count); |
| 204 | * Note: AllocFromCode will handle checks for errNegativeArraySize. |
| 205 | */ |
| 206 | void Mir2Lir::GenNewArray(uint32_t type_idx, RegLocation rl_dest, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 207 | RegLocation rl_src) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 208 | FlushAllRegs(); /* Everything to home location */ |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 209 | ThreadOffset func_offset(-1); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 210 | if (cu_->compiler_driver->CanAccessTypeWithoutChecks(cu_->method_idx, *cu_->dex_file, |
| 211 | type_idx)) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 212 | func_offset = QUICK_ENTRYPOINT_OFFSET(pAllocArray); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 213 | } else { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 214 | func_offset= QUICK_ENTRYPOINT_OFFSET(pAllocArrayWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 215 | } |
| 216 | CallRuntimeHelperImmMethodRegLocation(func_offset, type_idx, rl_src, true); |
| 217 | RegLocation rl_result = GetReturn(false); |
| 218 | StoreValue(rl_dest, rl_result); |
| 219 | } |
| 220 | |
| 221 | /* |
| 222 | * Similar to GenNewArray, but with post-allocation initialization. |
| 223 | * Verifier guarantees we're dealing with an array class. Current |
| 224 | * code throws runtime exception "bad Filled array req" for 'D' and 'J'. |
| 225 | * Current code also throws internal unimp if not 'L', '[' or 'I'. |
| 226 | */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 227 | void Mir2Lir::GenFilledNewArray(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 228 | int elems = info->num_arg_words; |
| 229 | int type_idx = info->index; |
| 230 | FlushAllRegs(); /* Everything to home location */ |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 231 | ThreadOffset func_offset(-1); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 232 | if (cu_->compiler_driver->CanAccessTypeWithoutChecks(cu_->method_idx, *cu_->dex_file, |
| 233 | type_idx)) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 234 | func_offset = QUICK_ENTRYPOINT_OFFSET(pCheckAndAllocArray); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 235 | } else { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 236 | func_offset = QUICK_ENTRYPOINT_OFFSET(pCheckAndAllocArrayWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 237 | } |
| 238 | CallRuntimeHelperImmMethodImm(func_offset, type_idx, elems, true); |
| 239 | FreeTemp(TargetReg(kArg2)); |
| 240 | FreeTemp(TargetReg(kArg1)); |
| 241 | /* |
| 242 | * NOTE: the implicit target for Instruction::FILLED_NEW_ARRAY is the |
| 243 | * return region. Because AllocFromCode placed the new array |
| 244 | * in kRet0, we'll just lock it into place. When debugger support is |
| 245 | * added, it may be necessary to additionally copy all return |
| 246 | * values to a home location in thread-local storage |
| 247 | */ |
| 248 | LockTemp(TargetReg(kRet0)); |
| 249 | |
| 250 | // TODO: use the correct component size, currently all supported types |
| 251 | // share array alignment with ints (see comment at head of function) |
| 252 | size_t component_size = sizeof(int32_t); |
| 253 | |
| 254 | // Having a range of 0 is legal |
| 255 | if (info->is_range && (elems > 0)) { |
| 256 | /* |
| 257 | * Bit of ugliness here. We're going generate a mem copy loop |
| 258 | * on the register range, but it is possible that some regs |
| 259 | * in the range have been promoted. This is unlikely, but |
| 260 | * before generating the copy, we'll just force a flush |
| 261 | * of any regs in the source range that have been promoted to |
| 262 | * home location. |
| 263 | */ |
| 264 | for (int i = 0; i < elems; i++) { |
| 265 | RegLocation loc = UpdateLoc(info->args[i]); |
| 266 | if (loc.location == kLocPhysReg) { |
| 267 | StoreBaseDisp(TargetReg(kSp), SRegOffset(loc.s_reg_low), |
| 268 | loc.low_reg, kWord); |
| 269 | } |
| 270 | } |
| 271 | /* |
| 272 | * TUNING note: generated code here could be much improved, but |
| 273 | * this is an uncommon operation and isn't especially performance |
| 274 | * critical. |
| 275 | */ |
| 276 | int r_src = AllocTemp(); |
| 277 | int r_dst = AllocTemp(); |
| 278 | int r_idx = AllocTemp(); |
| 279 | int r_val = INVALID_REG; |
Brian Carlstrom | df62950 | 2013-07-17 22:39:56 -0700 | [diff] [blame] | 280 | switch (cu_->instruction_set) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 281 | case kThumb2: |
| 282 | r_val = TargetReg(kLr); |
| 283 | break; |
| 284 | case kX86: |
| 285 | FreeTemp(TargetReg(kRet0)); |
| 286 | r_val = AllocTemp(); |
| 287 | break; |
| 288 | case kMips: |
| 289 | r_val = AllocTemp(); |
| 290 | break; |
| 291 | default: LOG(FATAL) << "Unexpected instruction set: " << cu_->instruction_set; |
| 292 | } |
| 293 | // Set up source pointer |
| 294 | RegLocation rl_first = info->args[0]; |
| 295 | OpRegRegImm(kOpAdd, r_src, TargetReg(kSp), SRegOffset(rl_first.s_reg_low)); |
| 296 | // Set up the target pointer |
| 297 | OpRegRegImm(kOpAdd, r_dst, TargetReg(kRet0), |
| 298 | mirror::Array::DataOffset(component_size).Int32Value()); |
| 299 | // Set up the loop counter (known to be > 0) |
| 300 | LoadConstant(r_idx, elems - 1); |
| 301 | // Generate the copy loop. Going backwards for convenience |
| 302 | LIR* target = NewLIR0(kPseudoTargetLabel); |
| 303 | // Copy next element |
| 304 | LoadBaseIndexed(r_src, r_idx, r_val, 2, kWord); |
| 305 | StoreBaseIndexed(r_dst, r_idx, r_val, 2, kWord); |
| 306 | FreeTemp(r_val); |
| 307 | OpDecAndBranch(kCondGe, r_idx, target); |
| 308 | if (cu_->instruction_set == kX86) { |
| 309 | // Restore the target pointer |
| 310 | OpRegRegImm(kOpAdd, TargetReg(kRet0), r_dst, |
| 311 | -mirror::Array::DataOffset(component_size).Int32Value()); |
| 312 | } |
| 313 | } else if (!info->is_range) { |
| 314 | // TUNING: interleave |
| 315 | for (int i = 0; i < elems; i++) { |
| 316 | RegLocation rl_arg = LoadValue(info->args[i], kCoreReg); |
| 317 | StoreBaseDisp(TargetReg(kRet0), |
| 318 | mirror::Array::DataOffset(component_size).Int32Value() + |
| 319 | i * 4, rl_arg.low_reg, kWord); |
| 320 | // If the LoadValue caused a temp to be allocated, free it |
| 321 | if (IsTemp(rl_arg.low_reg)) { |
| 322 | FreeTemp(rl_arg.low_reg); |
| 323 | } |
| 324 | } |
| 325 | } |
| 326 | if (info->result.location != kLocInvalid) { |
| 327 | StoreValue(info->result, GetReturn(false /* not fp */)); |
| 328 | } |
| 329 | } |
| 330 | |
| 331 | void Mir2Lir::GenSput(uint32_t field_idx, RegLocation rl_src, bool is_long_or_double, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 332 | bool is_object) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 333 | int field_offset; |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 334 | int storage_index; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 335 | bool is_volatile; |
| 336 | bool is_referrers_class; |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 337 | bool is_initialized; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 338 | bool fast_path = cu_->compiler_driver->ComputeStaticFieldInfo( |
Ian Rogers | 9b297bf | 2013-09-06 11:11:25 -0700 | [diff] [blame] | 339 | field_idx, mir_graph_->GetCurrentDexCompilationUnit(), true, |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 340 | &field_offset, &storage_index, &is_referrers_class, &is_volatile, &is_initialized); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 341 | if (fast_path && !SLOW_FIELD_PATH) { |
| 342 | DCHECK_GE(field_offset, 0); |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 343 | int r_base; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 344 | if (is_referrers_class) { |
| 345 | // Fast path, static storage base is this method's class |
| 346 | RegLocation rl_method = LoadCurrMethod(); |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 347 | r_base = AllocTemp(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 348 | LoadWordDisp(rl_method.low_reg, |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 349 | mirror::ArtMethod::DeclaringClassOffset().Int32Value(), r_base); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 350 | if (IsTemp(rl_method.low_reg)) { |
| 351 | FreeTemp(rl_method.low_reg); |
| 352 | } |
| 353 | } else { |
| 354 | // Medium path, static storage base in a different class which requires checks that the other |
| 355 | // class is initialized. |
| 356 | // TODO: remove initialized check now that we are initializing classes in the compiler driver. |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 357 | DCHECK_GE(storage_index, 0); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 358 | // May do runtime call so everything to home locations. |
| 359 | FlushAllRegs(); |
| 360 | // Using fixed register to sync with possible call to runtime support. |
| 361 | int r_method = TargetReg(kArg1); |
| 362 | LockTemp(r_method); |
| 363 | LoadCurrMethodDirect(r_method); |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 364 | r_base = TargetReg(kArg0); |
| 365 | LockTemp(r_base); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 366 | LoadWordDisp(r_method, |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 367 | mirror::ArtMethod::DexCacheResolvedTypesOffset().Int32Value(), |
| 368 | r_base); |
| 369 | LoadWordDisp(r_base, mirror::Array::DataOffset(sizeof(mirror::Object*)).Int32Value() + |
| 370 | sizeof(int32_t*) * storage_index, r_base); |
| 371 | // r_base now points at static storage (Class*) or NULL if the type is not yet resolved. |
| 372 | if (!is_initialized) { |
| 373 | // Check if r_base is NULL or a not yet initialized class. |
| 374 | // TUNING: fast path should fall through |
| 375 | LIR* unresolved_branch = OpCmpImmBranch(kCondEq, r_base, 0, NULL); |
| 376 | int r_tmp = TargetReg(kArg2); |
| 377 | LockTemp(r_tmp); |
Mark Mendell | 766e929 | 2014-01-27 07:55:47 -0800 | [diff] [blame^] | 378 | LIR* initialized_branch = OpCmpMemImmBranch(kCondGe, r_tmp, r_base, |
| 379 | mirror::Class::StatusOffset().Int32Value(), |
| 380 | mirror::Class::kStatusInitialized, NULL); |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 381 | |
| 382 | LIR* unresolved_target = NewLIR0(kPseudoTargetLabel); |
| 383 | unresolved_branch->target = unresolved_target; |
| 384 | CallRuntimeHelperImm(QUICK_ENTRYPOINT_OFFSET(pInitializeStaticStorage), storage_index, |
| 385 | true); |
| 386 | // Copy helper's result into r_base, a no-op on all but MIPS. |
| 387 | OpRegCopy(r_base, TargetReg(kRet0)); |
| 388 | |
| 389 | LIR* initialized_target = NewLIR0(kPseudoTargetLabel); |
| 390 | initialized_branch->target = initialized_target; |
| 391 | |
| 392 | FreeTemp(r_tmp); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 393 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 394 | FreeTemp(r_method); |
| 395 | } |
| 396 | // rBase now holds static storage base |
| 397 | if (is_long_or_double) { |
| 398 | rl_src = LoadValueWide(rl_src, kAnyReg); |
| 399 | } else { |
| 400 | rl_src = LoadValue(rl_src, kAnyReg); |
| 401 | } |
| 402 | if (is_volatile) { |
| 403 | GenMemBarrier(kStoreStore); |
| 404 | } |
| 405 | if (is_long_or_double) { |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 406 | StoreBaseDispWide(r_base, field_offset, rl_src.low_reg, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 407 | rl_src.high_reg); |
| 408 | } else { |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 409 | StoreWordDisp(r_base, field_offset, rl_src.low_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 410 | } |
| 411 | if (is_volatile) { |
| 412 | GenMemBarrier(kStoreLoad); |
| 413 | } |
| 414 | if (is_object && !mir_graph_->IsConstantNullRef(rl_src)) { |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 415 | MarkGCCard(rl_src.low_reg, r_base); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 416 | } |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 417 | FreeTemp(r_base); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 418 | } else { |
| 419 | FlushAllRegs(); // Everything to home locations |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 420 | ThreadOffset setter_offset = |
| 421 | is_long_or_double ? QUICK_ENTRYPOINT_OFFSET(pSet64Static) |
| 422 | : (is_object ? QUICK_ENTRYPOINT_OFFSET(pSetObjStatic) |
| 423 | : QUICK_ENTRYPOINT_OFFSET(pSet32Static)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 424 | CallRuntimeHelperImmRegLocation(setter_offset, field_idx, rl_src, true); |
| 425 | } |
| 426 | } |
| 427 | |
| 428 | void Mir2Lir::GenSget(uint32_t field_idx, RegLocation rl_dest, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 429 | bool is_long_or_double, bool is_object) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 430 | int field_offset; |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 431 | int storage_index; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 432 | bool is_volatile; |
| 433 | bool is_referrers_class; |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 434 | bool is_initialized; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 435 | bool fast_path = cu_->compiler_driver->ComputeStaticFieldInfo( |
Ian Rogers | 9b297bf | 2013-09-06 11:11:25 -0700 | [diff] [blame] | 436 | field_idx, mir_graph_->GetCurrentDexCompilationUnit(), false, |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 437 | &field_offset, &storage_index, &is_referrers_class, &is_volatile, &is_initialized); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 438 | if (fast_path && !SLOW_FIELD_PATH) { |
| 439 | DCHECK_GE(field_offset, 0); |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 440 | int r_base; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 441 | if (is_referrers_class) { |
| 442 | // Fast path, static storage base is this method's class |
| 443 | RegLocation rl_method = LoadCurrMethod(); |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 444 | r_base = AllocTemp(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 445 | LoadWordDisp(rl_method.low_reg, |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 446 | mirror::ArtMethod::DeclaringClassOffset().Int32Value(), r_base); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 447 | } else { |
| 448 | // Medium path, static storage base in a different class which requires checks that the other |
| 449 | // class is initialized |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 450 | DCHECK_GE(storage_index, 0); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 451 | // May do runtime call so everything to home locations. |
| 452 | FlushAllRegs(); |
| 453 | // Using fixed register to sync with possible call to runtime support. |
| 454 | int r_method = TargetReg(kArg1); |
| 455 | LockTemp(r_method); |
| 456 | LoadCurrMethodDirect(r_method); |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 457 | r_base = TargetReg(kArg0); |
| 458 | LockTemp(r_base); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 459 | LoadWordDisp(r_method, |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 460 | mirror::ArtMethod::DexCacheResolvedTypesOffset().Int32Value(), |
| 461 | r_base); |
| 462 | LoadWordDisp(r_base, mirror::Array::DataOffset(sizeof(mirror::Object*)).Int32Value() + |
| 463 | sizeof(int32_t*) * storage_index, r_base); |
| 464 | // r_base now points at static storage (Class*) or NULL if the type is not yet resolved. |
| 465 | if (!is_initialized) { |
| 466 | // Check if r_base is NULL or a not yet initialized class. |
| 467 | // TUNING: fast path should fall through |
| 468 | LIR* unresolved_branch = OpCmpImmBranch(kCondEq, r_base, 0, NULL); |
| 469 | int r_tmp = TargetReg(kArg2); |
| 470 | LockTemp(r_tmp); |
Mark Mendell | 766e929 | 2014-01-27 07:55:47 -0800 | [diff] [blame^] | 471 | LIR* initialized_branch = OpCmpMemImmBranch(kCondGe, r_tmp, r_base, |
| 472 | mirror::Class::StatusOffset().Int32Value(), |
| 473 | mirror::Class::kStatusInitialized, NULL); |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 474 | |
| 475 | LIR* unresolved_target = NewLIR0(kPseudoTargetLabel); |
| 476 | unresolved_branch->target = unresolved_target; |
| 477 | CallRuntimeHelperImm(QUICK_ENTRYPOINT_OFFSET(pInitializeStaticStorage), storage_index, |
| 478 | true); |
| 479 | // Copy helper's result into r_base, a no-op on all but MIPS. |
| 480 | OpRegCopy(r_base, TargetReg(kRet0)); |
| 481 | |
| 482 | LIR* initialized_target = NewLIR0(kPseudoTargetLabel); |
| 483 | initialized_branch->target = initialized_target; |
| 484 | |
| 485 | FreeTemp(r_tmp); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 486 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 487 | FreeTemp(r_method); |
| 488 | } |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 489 | // r_base now holds static storage base |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 490 | RegLocation rl_result = EvalLoc(rl_dest, kAnyReg, true); |
| 491 | if (is_volatile) { |
| 492 | GenMemBarrier(kLoadLoad); |
| 493 | } |
| 494 | if (is_long_or_double) { |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 495 | LoadBaseDispWide(r_base, field_offset, rl_result.low_reg, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 496 | rl_result.high_reg, INVALID_SREG); |
| 497 | } else { |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 498 | LoadWordDisp(r_base, field_offset, rl_result.low_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 499 | } |
Ian Rogers | 5ddb410 | 2014-01-07 08:58:46 -0800 | [diff] [blame] | 500 | FreeTemp(r_base); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 501 | if (is_long_or_double) { |
| 502 | StoreValueWide(rl_dest, rl_result); |
| 503 | } else { |
| 504 | StoreValue(rl_dest, rl_result); |
| 505 | } |
| 506 | } else { |
| 507 | FlushAllRegs(); // Everything to home locations |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 508 | ThreadOffset getterOffset = |
| 509 | is_long_or_double ? QUICK_ENTRYPOINT_OFFSET(pGet64Static) |
| 510 | :(is_object ? QUICK_ENTRYPOINT_OFFSET(pGetObjStatic) |
| 511 | : QUICK_ENTRYPOINT_OFFSET(pGet32Static)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 512 | CallRuntimeHelperImm(getterOffset, field_idx, true); |
| 513 | if (is_long_or_double) { |
| 514 | RegLocation rl_result = GetReturnWide(rl_dest.fp); |
| 515 | StoreValueWide(rl_dest, rl_result); |
| 516 | } else { |
| 517 | RegLocation rl_result = GetReturn(rl_dest.fp); |
| 518 | StoreValue(rl_dest, rl_result); |
| 519 | } |
| 520 | } |
| 521 | } |
| 522 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 523 | void Mir2Lir::HandleSuspendLaunchPads() { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 524 | int num_elems = suspend_launchpads_.Size(); |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 525 | ThreadOffset helper_offset = QUICK_ENTRYPOINT_OFFSET(pTestSuspend); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 526 | for (int i = 0; i < num_elems; i++) { |
| 527 | ResetRegPool(); |
| 528 | ResetDefTracking(); |
| 529 | LIR* lab = suspend_launchpads_.Get(i); |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 530 | LIR* resume_lab = reinterpret_cast<LIR*>(UnwrapPointer(lab->operands[0])); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 531 | current_dalvik_offset_ = lab->operands[1]; |
| 532 | AppendLIR(lab); |
| 533 | int r_tgt = CallHelperSetup(helper_offset); |
| 534 | CallHelper(r_tgt, helper_offset, true /* MarkSafepointPC */); |
| 535 | OpUnconditionalBranch(resume_lab); |
| 536 | } |
| 537 | } |
| 538 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 539 | void Mir2Lir::HandleIntrinsicLaunchPads() { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 540 | int num_elems = intrinsic_launchpads_.Size(); |
| 541 | for (int i = 0; i < num_elems; i++) { |
| 542 | ResetRegPool(); |
| 543 | ResetDefTracking(); |
| 544 | LIR* lab = intrinsic_launchpads_.Get(i); |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 545 | CallInfo* info = reinterpret_cast<CallInfo*>(UnwrapPointer(lab->operands[0])); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 546 | current_dalvik_offset_ = info->offset; |
| 547 | AppendLIR(lab); |
| 548 | // NOTE: GenInvoke handles MarkSafepointPC |
| 549 | GenInvoke(info); |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 550 | LIR* resume_lab = reinterpret_cast<LIR*>(UnwrapPointer(lab->operands[2])); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 551 | if (resume_lab != NULL) { |
| 552 | OpUnconditionalBranch(resume_lab); |
| 553 | } |
| 554 | } |
| 555 | } |
| 556 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 557 | void Mir2Lir::HandleThrowLaunchPads() { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 558 | int num_elems = throw_launchpads_.Size(); |
| 559 | for (int i = 0; i < num_elems; i++) { |
| 560 | ResetRegPool(); |
| 561 | ResetDefTracking(); |
| 562 | LIR* lab = throw_launchpads_.Get(i); |
| 563 | current_dalvik_offset_ = lab->operands[1]; |
| 564 | AppendLIR(lab); |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 565 | ThreadOffset func_offset(-1); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 566 | int v1 = lab->operands[2]; |
| 567 | int v2 = lab->operands[3]; |
| 568 | bool target_x86 = (cu_->instruction_set == kX86); |
| 569 | switch (lab->operands[0]) { |
| 570 | case kThrowNullPointer: |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 571 | func_offset = QUICK_ENTRYPOINT_OFFSET(pThrowNullPointer); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 572 | break; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 573 | case kThrowConstantArrayBounds: // v1 is length reg (for Arm/Mips), v2 constant index |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 574 | // v1 holds the constant array index. Mips/Arm uses v2 for length, x86 reloads. |
| 575 | if (target_x86) { |
| 576 | OpRegMem(kOpMov, TargetReg(kArg1), v1, mirror::Array::LengthOffset().Int32Value()); |
| 577 | } else { |
| 578 | OpRegCopy(TargetReg(kArg1), v1); |
| 579 | } |
| 580 | // Make sure the following LoadConstant doesn't mess with kArg1. |
| 581 | LockTemp(TargetReg(kArg1)); |
| 582 | LoadConstant(TargetReg(kArg0), v2); |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 583 | func_offset = QUICK_ENTRYPOINT_OFFSET(pThrowArrayBounds); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 584 | break; |
| 585 | case kThrowArrayBounds: |
| 586 | // Move v1 (array index) to kArg0 and v2 (array length) to kArg1 |
| 587 | if (v2 != TargetReg(kArg0)) { |
| 588 | OpRegCopy(TargetReg(kArg0), v1); |
| 589 | if (target_x86) { |
| 590 | // x86 leaves the array pointer in v2, so load the array length that the handler expects |
| 591 | OpRegMem(kOpMov, TargetReg(kArg1), v2, mirror::Array::LengthOffset().Int32Value()); |
| 592 | } else { |
| 593 | OpRegCopy(TargetReg(kArg1), v2); |
| 594 | } |
| 595 | } else { |
| 596 | if (v1 == TargetReg(kArg1)) { |
| 597 | // Swap v1 and v2, using kArg2 as a temp |
| 598 | OpRegCopy(TargetReg(kArg2), v1); |
| 599 | if (target_x86) { |
| 600 | // x86 leaves the array pointer in v2; load the array length that the handler expects |
| 601 | OpRegMem(kOpMov, TargetReg(kArg1), v2, mirror::Array::LengthOffset().Int32Value()); |
| 602 | } else { |
| 603 | OpRegCopy(TargetReg(kArg1), v2); |
| 604 | } |
| 605 | OpRegCopy(TargetReg(kArg0), TargetReg(kArg2)); |
| 606 | } else { |
| 607 | if (target_x86) { |
| 608 | // x86 leaves the array pointer in v2; load the array length that the handler expects |
| 609 | OpRegMem(kOpMov, TargetReg(kArg1), v2, mirror::Array::LengthOffset().Int32Value()); |
| 610 | } else { |
| 611 | OpRegCopy(TargetReg(kArg1), v2); |
| 612 | } |
| 613 | OpRegCopy(TargetReg(kArg0), v1); |
| 614 | } |
| 615 | } |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 616 | func_offset = QUICK_ENTRYPOINT_OFFSET(pThrowArrayBounds); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 617 | break; |
| 618 | case kThrowDivZero: |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 619 | func_offset = QUICK_ENTRYPOINT_OFFSET(pThrowDivZero); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 620 | break; |
| 621 | case kThrowNoSuchMethod: |
| 622 | OpRegCopy(TargetReg(kArg0), v1); |
| 623 | func_offset = |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 624 | QUICK_ENTRYPOINT_OFFSET(pThrowNoSuchMethod); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 625 | break; |
| 626 | case kThrowStackOverflow: |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 627 | func_offset = QUICK_ENTRYPOINT_OFFSET(pThrowStackOverflow); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 628 | // Restore stack alignment |
| 629 | if (target_x86) { |
| 630 | OpRegImm(kOpAdd, TargetReg(kSp), frame_size_); |
| 631 | } else { |
| 632 | OpRegImm(kOpAdd, TargetReg(kSp), (num_core_spills_ + num_fp_spills_) * 4); |
| 633 | } |
| 634 | break; |
| 635 | default: |
| 636 | LOG(FATAL) << "Unexpected throw kind: " << lab->operands[0]; |
| 637 | } |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 638 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 639 | int r_tgt = CallHelperSetup(func_offset); |
| 640 | CallHelper(r_tgt, func_offset, true /* MarkSafepointPC */); |
| 641 | } |
| 642 | } |
| 643 | |
| 644 | void Mir2Lir::GenIGet(uint32_t field_idx, int opt_flags, OpSize size, |
| 645 | RegLocation rl_dest, RegLocation rl_obj, bool is_long_or_double, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 646 | bool is_object) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 647 | int field_offset; |
| 648 | bool is_volatile; |
| 649 | |
Ian Rogers | 9b297bf | 2013-09-06 11:11:25 -0700 | [diff] [blame] | 650 | bool fast_path = FastInstance(field_idx, false, &field_offset, &is_volatile); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 651 | |
| 652 | if (fast_path && !SLOW_FIELD_PATH) { |
| 653 | RegLocation rl_result; |
| 654 | RegisterClass reg_class = oat_reg_class_by_size(size); |
| 655 | DCHECK_GE(field_offset, 0); |
| 656 | rl_obj = LoadValue(rl_obj, kCoreReg); |
| 657 | if (is_long_or_double) { |
| 658 | DCHECK(rl_dest.wide); |
| 659 | GenNullCheck(rl_obj.s_reg_low, rl_obj.low_reg, opt_flags); |
| 660 | if (cu_->instruction_set == kX86) { |
| 661 | rl_result = EvalLoc(rl_dest, reg_class, true); |
| 662 | GenNullCheck(rl_obj.s_reg_low, rl_obj.low_reg, opt_flags); |
| 663 | LoadBaseDispWide(rl_obj.low_reg, field_offset, rl_result.low_reg, |
| 664 | rl_result.high_reg, rl_obj.s_reg_low); |
| 665 | if (is_volatile) { |
| 666 | GenMemBarrier(kLoadLoad); |
| 667 | } |
| 668 | } else { |
| 669 | int reg_ptr = AllocTemp(); |
| 670 | OpRegRegImm(kOpAdd, reg_ptr, rl_obj.low_reg, field_offset); |
| 671 | rl_result = EvalLoc(rl_dest, reg_class, true); |
| 672 | LoadBaseDispWide(reg_ptr, 0, rl_result.low_reg, rl_result.high_reg, INVALID_SREG); |
| 673 | if (is_volatile) { |
| 674 | GenMemBarrier(kLoadLoad); |
| 675 | } |
| 676 | FreeTemp(reg_ptr); |
| 677 | } |
| 678 | StoreValueWide(rl_dest, rl_result); |
| 679 | } else { |
| 680 | rl_result = EvalLoc(rl_dest, reg_class, true); |
| 681 | GenNullCheck(rl_obj.s_reg_low, rl_obj.low_reg, opt_flags); |
| 682 | LoadBaseDisp(rl_obj.low_reg, field_offset, rl_result.low_reg, |
| 683 | kWord, rl_obj.s_reg_low); |
| 684 | if (is_volatile) { |
| 685 | GenMemBarrier(kLoadLoad); |
| 686 | } |
| 687 | StoreValue(rl_dest, rl_result); |
| 688 | } |
| 689 | } else { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 690 | ThreadOffset getterOffset = |
| 691 | is_long_or_double ? QUICK_ENTRYPOINT_OFFSET(pGet64Instance) |
| 692 | : (is_object ? QUICK_ENTRYPOINT_OFFSET(pGetObjInstance) |
| 693 | : QUICK_ENTRYPOINT_OFFSET(pGet32Instance)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 694 | CallRuntimeHelperImmRegLocation(getterOffset, field_idx, rl_obj, true); |
| 695 | if (is_long_or_double) { |
| 696 | RegLocation rl_result = GetReturnWide(rl_dest.fp); |
| 697 | StoreValueWide(rl_dest, rl_result); |
| 698 | } else { |
| 699 | RegLocation rl_result = GetReturn(rl_dest.fp); |
| 700 | StoreValue(rl_dest, rl_result); |
| 701 | } |
| 702 | } |
| 703 | } |
| 704 | |
| 705 | void Mir2Lir::GenIPut(uint32_t field_idx, int opt_flags, OpSize size, |
| 706 | RegLocation rl_src, RegLocation rl_obj, bool is_long_or_double, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 707 | bool is_object) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 708 | int field_offset; |
| 709 | bool is_volatile; |
| 710 | |
Ian Rogers | 9b297bf | 2013-09-06 11:11:25 -0700 | [diff] [blame] | 711 | bool fast_path = FastInstance(field_idx, true, &field_offset, &is_volatile); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 712 | if (fast_path && !SLOW_FIELD_PATH) { |
| 713 | RegisterClass reg_class = oat_reg_class_by_size(size); |
| 714 | DCHECK_GE(field_offset, 0); |
| 715 | rl_obj = LoadValue(rl_obj, kCoreReg); |
| 716 | if (is_long_or_double) { |
| 717 | int reg_ptr; |
| 718 | rl_src = LoadValueWide(rl_src, kAnyReg); |
| 719 | GenNullCheck(rl_obj.s_reg_low, rl_obj.low_reg, opt_flags); |
| 720 | reg_ptr = AllocTemp(); |
| 721 | OpRegRegImm(kOpAdd, reg_ptr, rl_obj.low_reg, field_offset); |
| 722 | if (is_volatile) { |
| 723 | GenMemBarrier(kStoreStore); |
| 724 | } |
| 725 | StoreBaseDispWide(reg_ptr, 0, rl_src.low_reg, rl_src.high_reg); |
| 726 | if (is_volatile) { |
| 727 | GenMemBarrier(kLoadLoad); |
| 728 | } |
| 729 | FreeTemp(reg_ptr); |
| 730 | } else { |
| 731 | rl_src = LoadValue(rl_src, reg_class); |
| 732 | GenNullCheck(rl_obj.s_reg_low, rl_obj.low_reg, opt_flags); |
| 733 | if (is_volatile) { |
| 734 | GenMemBarrier(kStoreStore); |
| 735 | } |
| 736 | StoreBaseDisp(rl_obj.low_reg, field_offset, rl_src.low_reg, kWord); |
| 737 | if (is_volatile) { |
| 738 | GenMemBarrier(kLoadLoad); |
| 739 | } |
| 740 | if (is_object && !mir_graph_->IsConstantNullRef(rl_src)) { |
| 741 | MarkGCCard(rl_src.low_reg, rl_obj.low_reg); |
| 742 | } |
| 743 | } |
| 744 | } else { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 745 | ThreadOffset setter_offset = |
| 746 | is_long_or_double ? QUICK_ENTRYPOINT_OFFSET(pSet64Instance) |
| 747 | : (is_object ? QUICK_ENTRYPOINT_OFFSET(pSetObjInstance) |
| 748 | : QUICK_ENTRYPOINT_OFFSET(pSet32Instance)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 749 | CallRuntimeHelperImmRegLocationRegLocation(setter_offset, field_idx, rl_obj, rl_src, true); |
| 750 | } |
| 751 | } |
| 752 | |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 753 | void Mir2Lir::GenArrayObjPut(int opt_flags, RegLocation rl_array, RegLocation rl_index, |
| 754 | RegLocation rl_src) { |
| 755 | bool needs_range_check = !(opt_flags & MIR_IGNORE_RANGE_CHECK); |
| 756 | bool needs_null_check = !((cu_->disable_opt & (1 << kNullCheckElimination)) && |
| 757 | (opt_flags & MIR_IGNORE_NULL_CHECK)); |
| 758 | ThreadOffset helper = needs_range_check |
| 759 | ? (needs_null_check ? QUICK_ENTRYPOINT_OFFSET(pAputObjectWithNullAndBoundCheck) |
| 760 | : QUICK_ENTRYPOINT_OFFSET(pAputObjectWithBoundCheck)) |
| 761 | : QUICK_ENTRYPOINT_OFFSET(pAputObject); |
| 762 | CallRuntimeHelperRegLocationRegLocationRegLocation(helper, rl_array, rl_index, rl_src, true); |
| 763 | } |
| 764 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 765 | void Mir2Lir::GenConstClass(uint32_t type_idx, RegLocation rl_dest) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 766 | RegLocation rl_method = LoadCurrMethod(); |
| 767 | int res_reg = AllocTemp(); |
| 768 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 769 | if (!cu_->compiler_driver->CanAccessTypeWithoutChecks(cu_->method_idx, |
| 770 | *cu_->dex_file, |
| 771 | type_idx)) { |
| 772 | // Call out to helper which resolves type and verifies access. |
| 773 | // Resolved type returned in kRet0. |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 774 | CallRuntimeHelperImmReg(QUICK_ENTRYPOINT_OFFSET(pInitializeTypeAndVerifyAccess), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 775 | type_idx, rl_method.low_reg, true); |
| 776 | RegLocation rl_result = GetReturn(false); |
| 777 | StoreValue(rl_dest, rl_result); |
| 778 | } else { |
| 779 | // We're don't need access checks, load type from dex cache |
| 780 | int32_t dex_cache_offset = |
Brian Carlstrom | ea46f95 | 2013-07-30 01:26:50 -0700 | [diff] [blame] | 781 | mirror::ArtMethod::DexCacheResolvedTypesOffset().Int32Value(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 782 | LoadWordDisp(rl_method.low_reg, dex_cache_offset, res_reg); |
| 783 | int32_t offset_of_type = |
| 784 | mirror::Array::DataOffset(sizeof(mirror::Class*)).Int32Value() + (sizeof(mirror::Class*) |
| 785 | * type_idx); |
| 786 | LoadWordDisp(res_reg, offset_of_type, rl_result.low_reg); |
| 787 | if (!cu_->compiler_driver->CanAssumeTypeIsPresentInDexCache(*cu_->dex_file, |
| 788 | type_idx) || SLOW_TYPE_PATH) { |
| 789 | // Slow path, at runtime test if type is null and if so initialize |
| 790 | FlushAllRegs(); |
| 791 | LIR* branch1 = OpCmpImmBranch(kCondEq, rl_result.low_reg, 0, NULL); |
| 792 | // Resolved, store and hop over following code |
| 793 | StoreValue(rl_dest, rl_result); |
| 794 | /* |
| 795 | * Because we have stores of the target value on two paths, |
| 796 | * clobber temp tracking for the destination using the ssa name |
| 797 | */ |
| 798 | ClobberSReg(rl_dest.s_reg_low); |
| 799 | LIR* branch2 = OpUnconditionalBranch(0); |
| 800 | // TUNING: move slow path to end & remove unconditional branch |
| 801 | LIR* target1 = NewLIR0(kPseudoTargetLabel); |
| 802 | // Call out to helper, which will return resolved type in kArg0 |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 803 | CallRuntimeHelperImmReg(QUICK_ENTRYPOINT_OFFSET(pInitializeType), type_idx, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 804 | rl_method.low_reg, true); |
| 805 | RegLocation rl_result = GetReturn(false); |
| 806 | StoreValue(rl_dest, rl_result); |
| 807 | /* |
| 808 | * Because we have stores of the target value on two paths, |
| 809 | * clobber temp tracking for the destination using the ssa name |
| 810 | */ |
| 811 | ClobberSReg(rl_dest.s_reg_low); |
| 812 | // Rejoin code paths |
| 813 | LIR* target2 = NewLIR0(kPseudoTargetLabel); |
| 814 | branch1->target = target1; |
| 815 | branch2->target = target2; |
| 816 | } else { |
| 817 | // Fast path, we're done - just store result |
| 818 | StoreValue(rl_dest, rl_result); |
| 819 | } |
| 820 | } |
| 821 | } |
| 822 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 823 | void Mir2Lir::GenConstString(uint32_t string_idx, RegLocation rl_dest) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 824 | /* NOTE: Most strings should be available at compile time */ |
| 825 | int32_t offset_of_string = mirror::Array::DataOffset(sizeof(mirror::String*)).Int32Value() + |
| 826 | (sizeof(mirror::String*) * string_idx); |
| 827 | if (!cu_->compiler_driver->CanAssumeStringIsPresentInDexCache( |
| 828 | *cu_->dex_file, string_idx) || SLOW_STRING_PATH) { |
| 829 | // slow path, resolve string if not in dex cache |
| 830 | FlushAllRegs(); |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 831 | LockCallTemps(); // Using explicit registers |
Mark Mendell | 766e929 | 2014-01-27 07:55:47 -0800 | [diff] [blame^] | 832 | |
| 833 | // If the Method* is already in a register, we can save a copy. |
| 834 | RegLocation rl_method = mir_graph_->GetMethodLoc(); |
| 835 | int r_method; |
| 836 | if (rl_method.location == kLocPhysReg) { |
| 837 | // A temp would conflict with register use below. |
| 838 | DCHECK(!IsTemp(rl_method.low_reg)); |
| 839 | r_method = rl_method.low_reg; |
| 840 | } else { |
| 841 | r_method = TargetReg(kArg2); |
| 842 | LoadCurrMethodDirect(r_method); |
| 843 | } |
| 844 | LoadWordDisp(r_method, mirror::ArtMethod::DexCacheStringsOffset().Int32Value(), |
| 845 | TargetReg(kArg0)); |
| 846 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 847 | // Might call out to helper, which will return resolved string in kRet0 |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 848 | int r_tgt = CallHelperSetup(QUICK_ENTRYPOINT_OFFSET(pResolveString)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 849 | LoadWordDisp(TargetReg(kArg0), offset_of_string, TargetReg(kRet0)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 850 | if (cu_->instruction_set == kThumb2) { |
Mark Mendell | 766e929 | 2014-01-27 07:55:47 -0800 | [diff] [blame^] | 851 | LoadConstant(TargetReg(kArg1), string_idx); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 852 | OpRegImm(kOpCmp, TargetReg(kRet0), 0); // Is resolved? |
| 853 | GenBarrier(); |
| 854 | // For testing, always force through helper |
| 855 | if (!EXERCISE_SLOWEST_STRING_PATH) { |
| 856 | OpIT(kCondEq, "T"); |
| 857 | } |
Mark Mendell | 766e929 | 2014-01-27 07:55:47 -0800 | [diff] [blame^] | 858 | // The copy MUST generate exactly one instruction (for OpIT). |
| 859 | DCHECK_NE(TargetReg(kArg0), r_method); |
| 860 | OpRegCopy(TargetReg(kArg0), r_method); // .eq |
| 861 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 862 | LIR* call_inst = OpReg(kOpBlx, r_tgt); // .eq, helper(Method*, string_idx) |
| 863 | MarkSafepointPC(call_inst); |
| 864 | FreeTemp(r_tgt); |
| 865 | } else if (cu_->instruction_set == kMips) { |
| 866 | LIR* branch = OpCmpImmBranch(kCondNe, TargetReg(kRet0), 0, NULL); |
Mark Mendell | 766e929 | 2014-01-27 07:55:47 -0800 | [diff] [blame^] | 867 | LoadConstant(TargetReg(kArg1), string_idx); |
| 868 | OpRegCopy(TargetReg(kArg0), r_method); // .eq |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 869 | LIR* call_inst = OpReg(kOpBlx, r_tgt); |
| 870 | MarkSafepointPC(call_inst); |
| 871 | FreeTemp(r_tgt); |
| 872 | LIR* target = NewLIR0(kPseudoTargetLabel); |
| 873 | branch->target = target; |
| 874 | } else { |
| 875 | DCHECK_EQ(cu_->instruction_set, kX86); |
Mark Mendell | 766e929 | 2014-01-27 07:55:47 -0800 | [diff] [blame^] | 876 | LIR* branch = OpCmpImmBranch(kCondNe, TargetReg(kRet0), 0, NULL); |
| 877 | LoadConstant(TargetReg(kArg1), string_idx); |
| 878 | CallRuntimeHelperRegReg(QUICK_ENTRYPOINT_OFFSET(pResolveString), r_method, |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 879 | TargetReg(kArg1), true); |
Mark Mendell | 766e929 | 2014-01-27 07:55:47 -0800 | [diff] [blame^] | 880 | LIR* target = NewLIR0(kPseudoTargetLabel); |
| 881 | branch->target = target; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 882 | } |
| 883 | GenBarrier(); |
| 884 | StoreValue(rl_dest, GetReturn(false)); |
| 885 | } else { |
| 886 | RegLocation rl_method = LoadCurrMethod(); |
| 887 | int res_reg = AllocTemp(); |
| 888 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 889 | LoadWordDisp(rl_method.low_reg, |
Brian Carlstrom | ea46f95 | 2013-07-30 01:26:50 -0700 | [diff] [blame] | 890 | mirror::ArtMethod::DexCacheStringsOffset().Int32Value(), res_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 891 | LoadWordDisp(res_reg, offset_of_string, rl_result.low_reg); |
| 892 | StoreValue(rl_dest, rl_result); |
| 893 | } |
| 894 | } |
| 895 | |
| 896 | /* |
| 897 | * Let helper function take care of everything. Will |
| 898 | * call Class::NewInstanceFromCode(type_idx, method); |
| 899 | */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 900 | void Mir2Lir::GenNewInstance(uint32_t type_idx, RegLocation rl_dest) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 901 | FlushAllRegs(); /* Everything to home location */ |
| 902 | // alloc will always check for resolution, do we also need to verify |
| 903 | // access because the verifier was unable to? |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 904 | ThreadOffset func_offset(-1); |
Hiroshi Yamauchi | be1ca55 | 2014-01-15 11:46:48 -0800 | [diff] [blame] | 905 | const DexFile* dex_file = cu_->dex_file; |
| 906 | CompilerDriver* driver = cu_->compiler_driver; |
| 907 | if (driver->CanAccessInstantiableTypeWithoutChecks( |
| 908 | cu_->method_idx, *dex_file, type_idx)) { |
| 909 | bool is_type_initialized; |
| 910 | bool use_direct_type_ptr; |
| 911 | uintptr_t direct_type_ptr; |
| 912 | if (kEmbedClassInCode && |
| 913 | driver->CanEmbedTypeInCode(*dex_file, type_idx, |
| 914 | &is_type_initialized, &use_direct_type_ptr, &direct_type_ptr)) { |
| 915 | // The fast path. |
| 916 | if (!use_direct_type_ptr) { |
| 917 | // Use the literal pool and a PC-relative load from a data word. |
| 918 | LIR* data_target = ScanLiteralPool(class_literal_list_, type_idx, 0); |
| 919 | if (data_target == nullptr) { |
| 920 | data_target = AddWordData(&class_literal_list_, type_idx); |
| 921 | } |
| 922 | LIR* load_pc_rel = OpPcRelLoad(TargetReg(kArg0), data_target); |
| 923 | AppendLIR(load_pc_rel); |
| 924 | if (!is_type_initialized) { |
| 925 | func_offset = QUICK_ENTRYPOINT_OFFSET(pAllocObjectResolved); |
| 926 | CallRuntimeHelperRegMethod(func_offset, TargetReg(kArg0), true); |
| 927 | } else { |
| 928 | func_offset = QUICK_ENTRYPOINT_OFFSET(pAllocObjectInitialized); |
| 929 | CallRuntimeHelperRegMethod(func_offset, TargetReg(kArg0), true); |
| 930 | } |
| 931 | } else { |
| 932 | // Use the direct pointer. |
| 933 | if (!is_type_initialized) { |
| 934 | func_offset = QUICK_ENTRYPOINT_OFFSET(pAllocObjectResolved); |
| 935 | CallRuntimeHelperImmMethod(func_offset, direct_type_ptr, true); |
| 936 | } else { |
| 937 | func_offset = QUICK_ENTRYPOINT_OFFSET(pAllocObjectInitialized); |
| 938 | CallRuntimeHelperImmMethod(func_offset, direct_type_ptr, true); |
| 939 | } |
| 940 | } |
| 941 | } else { |
| 942 | // The slow path. |
| 943 | DCHECK_EQ(func_offset.Int32Value(), -1); |
| 944 | func_offset = QUICK_ENTRYPOINT_OFFSET(pAllocObject); |
| 945 | CallRuntimeHelperImmMethod(func_offset, type_idx, true); |
| 946 | } |
| 947 | DCHECK_NE(func_offset.Int32Value(), -1); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 948 | } else { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 949 | func_offset = QUICK_ENTRYPOINT_OFFSET(pAllocObjectWithAccessCheck); |
Hiroshi Yamauchi | be1ca55 | 2014-01-15 11:46:48 -0800 | [diff] [blame] | 950 | CallRuntimeHelperImmMethod(func_offset, type_idx, true); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 951 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 952 | RegLocation rl_result = GetReturn(false); |
| 953 | StoreValue(rl_dest, rl_result); |
| 954 | } |
| 955 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 956 | void Mir2Lir::GenThrow(RegLocation rl_src) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 957 | FlushAllRegs(); |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 958 | CallRuntimeHelperRegLocation(QUICK_ENTRYPOINT_OFFSET(pDeliverException), rl_src, true); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 959 | } |
| 960 | |
| 961 | // For final classes there are no sub-classes to check and so we can answer the instance-of |
| 962 | // question with simple comparisons. |
| 963 | void Mir2Lir::GenInstanceofFinal(bool use_declaring_class, uint32_t type_idx, RegLocation rl_dest, |
| 964 | RegLocation rl_src) { |
| 965 | RegLocation object = LoadValue(rl_src, kCoreReg); |
| 966 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 967 | int result_reg = rl_result.low_reg; |
| 968 | if (result_reg == object.low_reg) { |
| 969 | result_reg = AllocTypedTemp(false, kCoreReg); |
| 970 | } |
| 971 | LoadConstant(result_reg, 0); // assume false |
| 972 | LIR* null_branchover = OpCmpImmBranch(kCondEq, object.low_reg, 0, NULL); |
| 973 | |
| 974 | int check_class = AllocTypedTemp(false, kCoreReg); |
| 975 | int object_class = AllocTypedTemp(false, kCoreReg); |
| 976 | |
| 977 | LoadCurrMethodDirect(check_class); |
| 978 | if (use_declaring_class) { |
Brian Carlstrom | ea46f95 | 2013-07-30 01:26:50 -0700 | [diff] [blame] | 979 | LoadWordDisp(check_class, mirror::ArtMethod::DeclaringClassOffset().Int32Value(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 980 | check_class); |
| 981 | LoadWordDisp(object.low_reg, mirror::Object::ClassOffset().Int32Value(), object_class); |
| 982 | } else { |
Brian Carlstrom | ea46f95 | 2013-07-30 01:26:50 -0700 | [diff] [blame] | 983 | LoadWordDisp(check_class, mirror::ArtMethod::DexCacheResolvedTypesOffset().Int32Value(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 984 | check_class); |
| 985 | LoadWordDisp(object.low_reg, mirror::Object::ClassOffset().Int32Value(), object_class); |
| 986 | int32_t offset_of_type = |
| 987 | mirror::Array::DataOffset(sizeof(mirror::Class*)).Int32Value() + |
| 988 | (sizeof(mirror::Class*) * type_idx); |
| 989 | LoadWordDisp(check_class, offset_of_type, check_class); |
| 990 | } |
| 991 | |
| 992 | LIR* ne_branchover = NULL; |
| 993 | if (cu_->instruction_set == kThumb2) { |
| 994 | OpRegReg(kOpCmp, check_class, object_class); // Same? |
| 995 | OpIT(kCondEq, ""); // if-convert the test |
| 996 | LoadConstant(result_reg, 1); // .eq case - load true |
| 997 | } else { |
| 998 | ne_branchover = OpCmpBranch(kCondNe, check_class, object_class, NULL); |
| 999 | LoadConstant(result_reg, 1); // eq case - load true |
| 1000 | } |
| 1001 | LIR* target = NewLIR0(kPseudoTargetLabel); |
| 1002 | null_branchover->target = target; |
| 1003 | if (ne_branchover != NULL) { |
| 1004 | ne_branchover->target = target; |
| 1005 | } |
| 1006 | FreeTemp(object_class); |
| 1007 | FreeTemp(check_class); |
| 1008 | if (IsTemp(result_reg)) { |
| 1009 | OpRegCopy(rl_result.low_reg, result_reg); |
| 1010 | FreeTemp(result_reg); |
| 1011 | } |
| 1012 | StoreValue(rl_dest, rl_result); |
| 1013 | } |
| 1014 | |
| 1015 | void Mir2Lir::GenInstanceofCallingHelper(bool needs_access_check, bool type_known_final, |
| 1016 | bool type_known_abstract, bool use_declaring_class, |
| 1017 | bool can_assume_type_is_in_dex_cache, |
| 1018 | uint32_t type_idx, RegLocation rl_dest, |
| 1019 | RegLocation rl_src) { |
| 1020 | FlushAllRegs(); |
| 1021 | // May generate a call - use explicit registers |
| 1022 | LockCallTemps(); |
| 1023 | LoadCurrMethodDirect(TargetReg(kArg1)); // kArg1 <= current Method* |
| 1024 | int class_reg = TargetReg(kArg2); // kArg2 will hold the Class* |
| 1025 | if (needs_access_check) { |
| 1026 | // Check we have access to type_idx and if not throw IllegalAccessError, |
| 1027 | // returns Class* in kArg0 |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1028 | CallRuntimeHelperImm(QUICK_ENTRYPOINT_OFFSET(pInitializeTypeAndVerifyAccess), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1029 | type_idx, true); |
| 1030 | OpRegCopy(class_reg, TargetReg(kRet0)); // Align usage with fast path |
| 1031 | LoadValueDirectFixed(rl_src, TargetReg(kArg0)); // kArg0 <= ref |
| 1032 | } else if (use_declaring_class) { |
| 1033 | LoadValueDirectFixed(rl_src, TargetReg(kArg0)); // kArg0 <= ref |
| 1034 | LoadWordDisp(TargetReg(kArg1), |
Brian Carlstrom | ea46f95 | 2013-07-30 01:26:50 -0700 | [diff] [blame] | 1035 | mirror::ArtMethod::DeclaringClassOffset().Int32Value(), class_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1036 | } else { |
| 1037 | // Load dex cache entry into class_reg (kArg2) |
| 1038 | LoadValueDirectFixed(rl_src, TargetReg(kArg0)); // kArg0 <= ref |
| 1039 | LoadWordDisp(TargetReg(kArg1), |
Brian Carlstrom | ea46f95 | 2013-07-30 01:26:50 -0700 | [diff] [blame] | 1040 | mirror::ArtMethod::DexCacheResolvedTypesOffset().Int32Value(), class_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1041 | int32_t offset_of_type = |
| 1042 | mirror::Array::DataOffset(sizeof(mirror::Class*)).Int32Value() + (sizeof(mirror::Class*) |
| 1043 | * type_idx); |
| 1044 | LoadWordDisp(class_reg, offset_of_type, class_reg); |
| 1045 | if (!can_assume_type_is_in_dex_cache) { |
| 1046 | // Need to test presence of type in dex cache at runtime |
| 1047 | LIR* hop_branch = OpCmpImmBranch(kCondNe, class_reg, 0, NULL); |
| 1048 | // Not resolved |
| 1049 | // Call out to helper, which will return resolved type in kRet0 |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1050 | CallRuntimeHelperImm(QUICK_ENTRYPOINT_OFFSET(pInitializeType), type_idx, true); |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 1051 | OpRegCopy(TargetReg(kArg2), TargetReg(kRet0)); // Align usage with fast path |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1052 | LoadValueDirectFixed(rl_src, TargetReg(kArg0)); /* reload Ref */ |
| 1053 | // Rejoin code paths |
| 1054 | LIR* hop_target = NewLIR0(kPseudoTargetLabel); |
| 1055 | hop_branch->target = hop_target; |
| 1056 | } |
| 1057 | } |
| 1058 | /* kArg0 is ref, kArg2 is class. If ref==null, use directly as bool result */ |
| 1059 | RegLocation rl_result = GetReturn(false); |
| 1060 | if (cu_->instruction_set == kMips) { |
| 1061 | // On MIPS rArg0 != rl_result, place false in result if branch is taken. |
| 1062 | LoadConstant(rl_result.low_reg, 0); |
| 1063 | } |
| 1064 | LIR* branch1 = OpCmpImmBranch(kCondEq, TargetReg(kArg0), 0, NULL); |
| 1065 | |
| 1066 | /* load object->klass_ */ |
| 1067 | DCHECK_EQ(mirror::Object::ClassOffset().Int32Value(), 0); |
| 1068 | LoadWordDisp(TargetReg(kArg0), mirror::Object::ClassOffset().Int32Value(), TargetReg(kArg1)); |
| 1069 | /* kArg0 is ref, kArg1 is ref->klass_, kArg2 is class */ |
| 1070 | LIR* branchover = NULL; |
| 1071 | if (type_known_final) { |
| 1072 | // rl_result == ref == null == 0. |
| 1073 | if (cu_->instruction_set == kThumb2) { |
| 1074 | OpRegReg(kOpCmp, TargetReg(kArg1), TargetReg(kArg2)); // Same? |
| 1075 | OpIT(kCondEq, "E"); // if-convert the test |
| 1076 | LoadConstant(rl_result.low_reg, 1); // .eq case - load true |
| 1077 | LoadConstant(rl_result.low_reg, 0); // .ne case - load false |
| 1078 | } else { |
| 1079 | LoadConstant(rl_result.low_reg, 0); // ne case - load false |
| 1080 | branchover = OpCmpBranch(kCondNe, TargetReg(kArg1), TargetReg(kArg2), NULL); |
| 1081 | LoadConstant(rl_result.low_reg, 1); // eq case - load true |
| 1082 | } |
| 1083 | } else { |
| 1084 | if (cu_->instruction_set == kThumb2) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1085 | int r_tgt = LoadHelper(QUICK_ENTRYPOINT_OFFSET(pInstanceofNonTrivial)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1086 | if (!type_known_abstract) { |
| 1087 | /* Uses conditional nullification */ |
| 1088 | OpRegReg(kOpCmp, TargetReg(kArg1), TargetReg(kArg2)); // Same? |
| 1089 | OpIT(kCondEq, "EE"); // if-convert the test |
| 1090 | LoadConstant(TargetReg(kArg0), 1); // .eq case - load true |
| 1091 | } |
| 1092 | OpRegCopy(TargetReg(kArg0), TargetReg(kArg2)); // .ne case - arg0 <= class |
| 1093 | OpReg(kOpBlx, r_tgt); // .ne case: helper(class, ref->class) |
| 1094 | FreeTemp(r_tgt); |
| 1095 | } else { |
| 1096 | if (!type_known_abstract) { |
| 1097 | /* Uses branchovers */ |
| 1098 | LoadConstant(rl_result.low_reg, 1); // assume true |
| 1099 | branchover = OpCmpBranch(kCondEq, TargetReg(kArg1), TargetReg(kArg2), NULL); |
| 1100 | } |
| 1101 | if (cu_->instruction_set != kX86) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1102 | int r_tgt = LoadHelper(QUICK_ENTRYPOINT_OFFSET(pInstanceofNonTrivial)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1103 | OpRegCopy(TargetReg(kArg0), TargetReg(kArg2)); // .ne case - arg0 <= class |
| 1104 | OpReg(kOpBlx, r_tgt); // .ne case: helper(class, ref->class) |
| 1105 | FreeTemp(r_tgt); |
| 1106 | } else { |
| 1107 | OpRegCopy(TargetReg(kArg0), TargetReg(kArg2)); |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1108 | OpThreadMem(kOpBlx, QUICK_ENTRYPOINT_OFFSET(pInstanceofNonTrivial)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1109 | } |
| 1110 | } |
| 1111 | } |
| 1112 | // TODO: only clobber when type isn't final? |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 1113 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1114 | /* branch targets here */ |
| 1115 | LIR* target = NewLIR0(kPseudoTargetLabel); |
| 1116 | StoreValue(rl_dest, rl_result); |
| 1117 | branch1->target = target; |
| 1118 | if (branchover != NULL) { |
| 1119 | branchover->target = target; |
| 1120 | } |
| 1121 | } |
| 1122 | |
| 1123 | void Mir2Lir::GenInstanceof(uint32_t type_idx, RegLocation rl_dest, RegLocation rl_src) { |
| 1124 | bool type_known_final, type_known_abstract, use_declaring_class; |
| 1125 | bool needs_access_check = !cu_->compiler_driver->CanAccessTypeWithoutChecks(cu_->method_idx, |
| 1126 | *cu_->dex_file, |
| 1127 | type_idx, |
| 1128 | &type_known_final, |
| 1129 | &type_known_abstract, |
| 1130 | &use_declaring_class); |
| 1131 | bool can_assume_type_is_in_dex_cache = !needs_access_check && |
| 1132 | cu_->compiler_driver->CanAssumeTypeIsPresentInDexCache(*cu_->dex_file, type_idx); |
| 1133 | |
| 1134 | if ((use_declaring_class || can_assume_type_is_in_dex_cache) && type_known_final) { |
| 1135 | GenInstanceofFinal(use_declaring_class, type_idx, rl_dest, rl_src); |
| 1136 | } else { |
| 1137 | GenInstanceofCallingHelper(needs_access_check, type_known_final, type_known_abstract, |
| 1138 | use_declaring_class, can_assume_type_is_in_dex_cache, |
| 1139 | type_idx, rl_dest, rl_src); |
| 1140 | } |
| 1141 | } |
| 1142 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1143 | void Mir2Lir::GenCheckCast(uint32_t insn_idx, uint32_t type_idx, RegLocation rl_src) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1144 | bool type_known_final, type_known_abstract, use_declaring_class; |
| 1145 | bool needs_access_check = !cu_->compiler_driver->CanAccessTypeWithoutChecks(cu_->method_idx, |
| 1146 | *cu_->dex_file, |
| 1147 | type_idx, |
| 1148 | &type_known_final, |
| 1149 | &type_known_abstract, |
| 1150 | &use_declaring_class); |
| 1151 | // Note: currently type_known_final is unused, as optimizing will only improve the performance |
| 1152 | // of the exception throw path. |
| 1153 | DexCompilationUnit* cu = mir_graph_->GetCurrentDexCompilationUnit(); |
| 1154 | const MethodReference mr(cu->GetDexFile(), cu->GetDexMethodIndex()); |
| 1155 | if (!needs_access_check && cu_->compiler_driver->IsSafeCast(mr, insn_idx)) { |
| 1156 | // Verifier type analysis proved this check cast would never cause an exception. |
| 1157 | return; |
| 1158 | } |
| 1159 | FlushAllRegs(); |
| 1160 | // May generate a call - use explicit registers |
| 1161 | LockCallTemps(); |
| 1162 | LoadCurrMethodDirect(TargetReg(kArg1)); // kArg1 <= current Method* |
| 1163 | int class_reg = TargetReg(kArg2); // kArg2 will hold the Class* |
| 1164 | if (needs_access_check) { |
| 1165 | // Check we have access to type_idx and if not throw IllegalAccessError, |
| 1166 | // returns Class* in kRet0 |
| 1167 | // InitializeTypeAndVerifyAccess(idx, method) |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1168 | CallRuntimeHelperImmReg(QUICK_ENTRYPOINT_OFFSET(pInitializeTypeAndVerifyAccess), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1169 | type_idx, TargetReg(kArg1), true); |
| 1170 | OpRegCopy(class_reg, TargetReg(kRet0)); // Align usage with fast path |
| 1171 | } else if (use_declaring_class) { |
| 1172 | LoadWordDisp(TargetReg(kArg1), |
Brian Carlstrom | ea46f95 | 2013-07-30 01:26:50 -0700 | [diff] [blame] | 1173 | mirror::ArtMethod::DeclaringClassOffset().Int32Value(), class_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1174 | } else { |
| 1175 | // Load dex cache entry into class_reg (kArg2) |
| 1176 | LoadWordDisp(TargetReg(kArg1), |
Brian Carlstrom | ea46f95 | 2013-07-30 01:26:50 -0700 | [diff] [blame] | 1177 | mirror::ArtMethod::DexCacheResolvedTypesOffset().Int32Value(), class_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1178 | int32_t offset_of_type = |
| 1179 | mirror::Array::DataOffset(sizeof(mirror::Class*)).Int32Value() + |
| 1180 | (sizeof(mirror::Class*) * type_idx); |
| 1181 | LoadWordDisp(class_reg, offset_of_type, class_reg); |
| 1182 | if (!cu_->compiler_driver->CanAssumeTypeIsPresentInDexCache(*cu_->dex_file, type_idx)) { |
| 1183 | // Need to test presence of type in dex cache at runtime |
| 1184 | LIR* hop_branch = OpCmpImmBranch(kCondNe, class_reg, 0, NULL); |
| 1185 | // Not resolved |
| 1186 | // Call out to helper, which will return resolved type in kArg0 |
| 1187 | // InitializeTypeFromCode(idx, method) |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1188 | CallRuntimeHelperImmReg(QUICK_ENTRYPOINT_OFFSET(pInitializeType), type_idx, |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1189 | TargetReg(kArg1), true); |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 1190 | OpRegCopy(class_reg, TargetReg(kRet0)); // Align usage with fast path |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1191 | // Rejoin code paths |
| 1192 | LIR* hop_target = NewLIR0(kPseudoTargetLabel); |
| 1193 | hop_branch->target = hop_target; |
| 1194 | } |
| 1195 | } |
| 1196 | // At this point, class_reg (kArg2) has class |
| 1197 | LoadValueDirectFixed(rl_src, TargetReg(kArg0)); // kArg0 <= ref |
| 1198 | /* Null is OK - continue */ |
| 1199 | LIR* branch1 = OpCmpImmBranch(kCondEq, TargetReg(kArg0), 0, NULL); |
| 1200 | /* load object->klass_ */ |
| 1201 | DCHECK_EQ(mirror::Object::ClassOffset().Int32Value(), 0); |
| 1202 | LoadWordDisp(TargetReg(kArg0), mirror::Object::ClassOffset().Int32Value(), TargetReg(kArg1)); |
| 1203 | /* kArg1 now contains object->klass_ */ |
| 1204 | LIR* branch2 = NULL; |
| 1205 | if (!type_known_abstract) { |
| 1206 | branch2 = OpCmpBranch(kCondEq, TargetReg(kArg1), class_reg, NULL); |
| 1207 | } |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 1208 | CallRuntimeHelperRegReg(QUICK_ENTRYPOINT_OFFSET(pCheckCast), TargetReg(kArg2), |
| 1209 | TargetReg(kArg1), true); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1210 | /* branch target here */ |
| 1211 | LIR* target = NewLIR0(kPseudoTargetLabel); |
| 1212 | branch1->target = target; |
| 1213 | if (branch2 != NULL) { |
| 1214 | branch2->target = target; |
| 1215 | } |
| 1216 | } |
| 1217 | |
| 1218 | void Mir2Lir::GenLong3Addr(OpKind first_op, OpKind second_op, RegLocation rl_dest, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1219 | RegLocation rl_src1, RegLocation rl_src2) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1220 | RegLocation rl_result; |
| 1221 | if (cu_->instruction_set == kThumb2) { |
| 1222 | /* |
| 1223 | * NOTE: This is the one place in the code in which we might have |
| 1224 | * as many as six live temporary registers. There are 5 in the normal |
| 1225 | * set for Arm. Until we have spill capabilities, temporarily add |
| 1226 | * lr to the temp set. It is safe to do this locally, but note that |
| 1227 | * lr is used explicitly elsewhere in the code generator and cannot |
| 1228 | * normally be used as a general temp register. |
| 1229 | */ |
| 1230 | MarkTemp(TargetReg(kLr)); // Add lr to the temp pool |
| 1231 | FreeTemp(TargetReg(kLr)); // and make it available |
| 1232 | } |
| 1233 | rl_src1 = LoadValueWide(rl_src1, kCoreReg); |
| 1234 | rl_src2 = LoadValueWide(rl_src2, kCoreReg); |
| 1235 | rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1236 | // The longs may overlap - use intermediate temp if so |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1237 | if ((rl_result.low_reg == rl_src1.high_reg) || (rl_result.low_reg == rl_src2.high_reg)) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1238 | int t_reg = AllocTemp(); |
| 1239 | OpRegRegReg(first_op, t_reg, rl_src1.low_reg, rl_src2.low_reg); |
| 1240 | OpRegRegReg(second_op, rl_result.high_reg, rl_src1.high_reg, rl_src2.high_reg); |
| 1241 | OpRegCopy(rl_result.low_reg, t_reg); |
| 1242 | FreeTemp(t_reg); |
| 1243 | } else { |
| 1244 | OpRegRegReg(first_op, rl_result.low_reg, rl_src1.low_reg, rl_src2.low_reg); |
| 1245 | OpRegRegReg(second_op, rl_result.high_reg, rl_src1.high_reg, |
| 1246 | rl_src2.high_reg); |
| 1247 | } |
| 1248 | /* |
| 1249 | * NOTE: If rl_dest refers to a frame variable in a large frame, the |
| 1250 | * following StoreValueWide might need to allocate a temp register. |
| 1251 | * To further work around the lack of a spill capability, explicitly |
| 1252 | * free any temps from rl_src1 & rl_src2 that aren't still live in rl_result. |
| 1253 | * Remove when spill is functional. |
| 1254 | */ |
| 1255 | FreeRegLocTemps(rl_result, rl_src1); |
| 1256 | FreeRegLocTemps(rl_result, rl_src2); |
| 1257 | StoreValueWide(rl_dest, rl_result); |
| 1258 | if (cu_->instruction_set == kThumb2) { |
| 1259 | Clobber(TargetReg(kLr)); |
| 1260 | UnmarkTemp(TargetReg(kLr)); // Remove lr from the temp pool |
| 1261 | } |
| 1262 | } |
| 1263 | |
| 1264 | |
| 1265 | void Mir2Lir::GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1266 | RegLocation rl_src1, RegLocation rl_shift) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1267 | ThreadOffset func_offset(-1); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1268 | |
| 1269 | switch (opcode) { |
| 1270 | case Instruction::SHL_LONG: |
| 1271 | case Instruction::SHL_LONG_2ADDR: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1272 | func_offset = QUICK_ENTRYPOINT_OFFSET(pShlLong); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1273 | break; |
| 1274 | case Instruction::SHR_LONG: |
| 1275 | case Instruction::SHR_LONG_2ADDR: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1276 | func_offset = QUICK_ENTRYPOINT_OFFSET(pShrLong); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1277 | break; |
| 1278 | case Instruction::USHR_LONG: |
| 1279 | case Instruction::USHR_LONG_2ADDR: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1280 | func_offset = QUICK_ENTRYPOINT_OFFSET(pUshrLong); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1281 | break; |
| 1282 | default: |
| 1283 | LOG(FATAL) << "Unexpected case"; |
| 1284 | } |
| 1285 | FlushAllRegs(); /* Send everything to home location */ |
| 1286 | CallRuntimeHelperRegLocationRegLocation(func_offset, rl_src1, rl_shift, false); |
| 1287 | RegLocation rl_result = GetReturnWide(false); |
| 1288 | StoreValueWide(rl_dest, rl_result); |
| 1289 | } |
| 1290 | |
| 1291 | |
| 1292 | void Mir2Lir::GenArithOpInt(Instruction::Code opcode, RegLocation rl_dest, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1293 | RegLocation rl_src1, RegLocation rl_src2) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1294 | OpKind op = kOpBkpt; |
| 1295 | bool is_div_rem = false; |
| 1296 | bool check_zero = false; |
| 1297 | bool unary = false; |
| 1298 | RegLocation rl_result; |
| 1299 | bool shift_op = false; |
| 1300 | switch (opcode) { |
| 1301 | case Instruction::NEG_INT: |
| 1302 | op = kOpNeg; |
| 1303 | unary = true; |
| 1304 | break; |
| 1305 | case Instruction::NOT_INT: |
| 1306 | op = kOpMvn; |
| 1307 | unary = true; |
| 1308 | break; |
| 1309 | case Instruction::ADD_INT: |
| 1310 | case Instruction::ADD_INT_2ADDR: |
| 1311 | op = kOpAdd; |
| 1312 | break; |
| 1313 | case Instruction::SUB_INT: |
| 1314 | case Instruction::SUB_INT_2ADDR: |
| 1315 | op = kOpSub; |
| 1316 | break; |
| 1317 | case Instruction::MUL_INT: |
| 1318 | case Instruction::MUL_INT_2ADDR: |
| 1319 | op = kOpMul; |
| 1320 | break; |
| 1321 | case Instruction::DIV_INT: |
| 1322 | case Instruction::DIV_INT_2ADDR: |
| 1323 | check_zero = true; |
| 1324 | op = kOpDiv; |
| 1325 | is_div_rem = true; |
| 1326 | break; |
| 1327 | /* NOTE: returns in kArg1 */ |
| 1328 | case Instruction::REM_INT: |
| 1329 | case Instruction::REM_INT_2ADDR: |
| 1330 | check_zero = true; |
| 1331 | op = kOpRem; |
| 1332 | is_div_rem = true; |
| 1333 | break; |
| 1334 | case Instruction::AND_INT: |
| 1335 | case Instruction::AND_INT_2ADDR: |
| 1336 | op = kOpAnd; |
| 1337 | break; |
| 1338 | case Instruction::OR_INT: |
| 1339 | case Instruction::OR_INT_2ADDR: |
| 1340 | op = kOpOr; |
| 1341 | break; |
| 1342 | case Instruction::XOR_INT: |
| 1343 | case Instruction::XOR_INT_2ADDR: |
| 1344 | op = kOpXor; |
| 1345 | break; |
| 1346 | case Instruction::SHL_INT: |
| 1347 | case Instruction::SHL_INT_2ADDR: |
| 1348 | shift_op = true; |
| 1349 | op = kOpLsl; |
| 1350 | break; |
| 1351 | case Instruction::SHR_INT: |
| 1352 | case Instruction::SHR_INT_2ADDR: |
| 1353 | shift_op = true; |
| 1354 | op = kOpAsr; |
| 1355 | break; |
| 1356 | case Instruction::USHR_INT: |
| 1357 | case Instruction::USHR_INT_2ADDR: |
| 1358 | shift_op = true; |
| 1359 | op = kOpLsr; |
| 1360 | break; |
| 1361 | default: |
| 1362 | LOG(FATAL) << "Invalid word arith op: " << opcode; |
| 1363 | } |
| 1364 | if (!is_div_rem) { |
| 1365 | if (unary) { |
| 1366 | rl_src1 = LoadValue(rl_src1, kCoreReg); |
| 1367 | rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1368 | OpRegReg(op, rl_result.low_reg, rl_src1.low_reg); |
| 1369 | } else { |
| 1370 | if (shift_op) { |
| 1371 | int t_reg = INVALID_REG; |
| 1372 | if (cu_->instruction_set == kX86) { |
| 1373 | // X86 doesn't require masking and must use ECX |
| 1374 | t_reg = TargetReg(kCount); // rCX |
| 1375 | LoadValueDirectFixed(rl_src2, t_reg); |
| 1376 | } else { |
| 1377 | rl_src2 = LoadValue(rl_src2, kCoreReg); |
| 1378 | t_reg = AllocTemp(); |
| 1379 | OpRegRegImm(kOpAnd, t_reg, rl_src2.low_reg, 31); |
| 1380 | } |
| 1381 | rl_src1 = LoadValue(rl_src1, kCoreReg); |
| 1382 | rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1383 | OpRegRegReg(op, rl_result.low_reg, rl_src1.low_reg, t_reg); |
| 1384 | FreeTemp(t_reg); |
| 1385 | } else { |
| 1386 | rl_src1 = LoadValue(rl_src1, kCoreReg); |
| 1387 | rl_src2 = LoadValue(rl_src2, kCoreReg); |
| 1388 | rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1389 | OpRegRegReg(op, rl_result.low_reg, rl_src1.low_reg, rl_src2.low_reg); |
| 1390 | } |
| 1391 | } |
| 1392 | StoreValue(rl_dest, rl_result); |
| 1393 | } else { |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 1394 | bool done = false; // Set to true if we happen to find a way to use a real instruction. |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1395 | if (cu_->instruction_set == kMips) { |
| 1396 | rl_src1 = LoadValue(rl_src1, kCoreReg); |
| 1397 | rl_src2 = LoadValue(rl_src2, kCoreReg); |
| 1398 | if (check_zero) { |
| 1399 | GenImmedCheck(kCondEq, rl_src2.low_reg, 0, kThrowDivZero); |
| 1400 | } |
| 1401 | rl_result = GenDivRem(rl_dest, rl_src1.low_reg, rl_src2.low_reg, op == kOpDiv); |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 1402 | done = true; |
Mark Mendell | 2bf31e6 | 2014-01-23 12:13:40 -0800 | [diff] [blame] | 1403 | } else if (cu_->instruction_set == kX86) { |
| 1404 | rl_result = GenDivRem(rl_dest, rl_src1, rl_src2, op == kOpDiv, check_zero); |
| 1405 | done = true; |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 1406 | } else if (cu_->instruction_set == kThumb2) { |
| 1407 | if (cu_->GetInstructionSetFeatures().HasDivideInstruction()) { |
| 1408 | // Use ARM SDIV instruction for division. For remainder we also need to |
| 1409 | // calculate using a MUL and subtract. |
| 1410 | rl_src1 = LoadValue(rl_src1, kCoreReg); |
| 1411 | rl_src2 = LoadValue(rl_src2, kCoreReg); |
| 1412 | if (check_zero) { |
| 1413 | GenImmedCheck(kCondEq, rl_src2.low_reg, 0, kThrowDivZero); |
| 1414 | } |
| 1415 | rl_result = GenDivRem(rl_dest, rl_src1.low_reg, rl_src2.low_reg, op == kOpDiv); |
| 1416 | done = true; |
| 1417 | } |
| 1418 | } |
| 1419 | |
| 1420 | // If we haven't already generated the code use the callout function. |
| 1421 | if (!done) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1422 | ThreadOffset func_offset = QUICK_ENTRYPOINT_OFFSET(pIdivmod); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1423 | FlushAllRegs(); /* Send everything to home location */ |
| 1424 | LoadValueDirectFixed(rl_src2, TargetReg(kArg1)); |
| 1425 | int r_tgt = CallHelperSetup(func_offset); |
| 1426 | LoadValueDirectFixed(rl_src1, TargetReg(kArg0)); |
| 1427 | if (check_zero) { |
| 1428 | GenImmedCheck(kCondEq, TargetReg(kArg1), 0, kThrowDivZero); |
| 1429 | } |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 1430 | // NOTE: callout here is not a safepoint. |
Brian Carlstrom | df62950 | 2013-07-17 22:39:56 -0700 | [diff] [blame] | 1431 | CallHelper(r_tgt, func_offset, false /* not a safepoint */); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1432 | if (op == kOpDiv) |
| 1433 | rl_result = GetReturn(false); |
| 1434 | else |
| 1435 | rl_result = GetReturnAlt(); |
| 1436 | } |
| 1437 | StoreValue(rl_dest, rl_result); |
| 1438 | } |
| 1439 | } |
| 1440 | |
| 1441 | /* |
| 1442 | * The following are the first-level codegen routines that analyze the format |
| 1443 | * of each bytecode then either dispatch special purpose codegen routines |
| 1444 | * or produce corresponding Thumb instructions directly. |
| 1445 | */ |
| 1446 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1447 | // Returns true if no more than two bits are set in 'x'. |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1448 | static bool IsPopCountLE2(unsigned int x) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1449 | x &= x - 1; |
| 1450 | return (x & (x - 1)) == 0; |
| 1451 | } |
| 1452 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1453 | // Returns true if it added instructions to 'cu' to divide 'rl_src' by 'lit' |
| 1454 | // and store the result in 'rl_dest'. |
buzbee | 11b63d1 | 2013-08-27 07:34:17 -0700 | [diff] [blame] | 1455 | bool Mir2Lir::HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1456 | RegLocation rl_src, RegLocation rl_dest, int lit) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1457 | if ((lit < 2) || ((cu_->instruction_set != kThumb2) && !IsPowerOfTwo(lit))) { |
| 1458 | return false; |
| 1459 | } |
| 1460 | // No divide instruction for Arm, so check for more special cases |
| 1461 | if ((cu_->instruction_set == kThumb2) && !IsPowerOfTwo(lit)) { |
buzbee | 11b63d1 | 2013-08-27 07:34:17 -0700 | [diff] [blame] | 1462 | return SmallLiteralDivRem(dalvik_opcode, is_div, rl_src, rl_dest, lit); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1463 | } |
| 1464 | int k = LowestSetBit(lit); |
| 1465 | if (k >= 30) { |
| 1466 | // Avoid special cases. |
| 1467 | return false; |
| 1468 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1469 | rl_src = LoadValue(rl_src, kCoreReg); |
| 1470 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
buzbee | 11b63d1 | 2013-08-27 07:34:17 -0700 | [diff] [blame] | 1471 | if (is_div) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1472 | int t_reg = AllocTemp(); |
| 1473 | if (lit == 2) { |
| 1474 | // Division by 2 is by far the most common division by constant. |
| 1475 | OpRegRegImm(kOpLsr, t_reg, rl_src.low_reg, 32 - k); |
| 1476 | OpRegRegReg(kOpAdd, t_reg, t_reg, rl_src.low_reg); |
| 1477 | OpRegRegImm(kOpAsr, rl_result.low_reg, t_reg, k); |
| 1478 | } else { |
| 1479 | OpRegRegImm(kOpAsr, t_reg, rl_src.low_reg, 31); |
| 1480 | OpRegRegImm(kOpLsr, t_reg, t_reg, 32 - k); |
| 1481 | OpRegRegReg(kOpAdd, t_reg, t_reg, rl_src.low_reg); |
| 1482 | OpRegRegImm(kOpAsr, rl_result.low_reg, t_reg, k); |
| 1483 | } |
| 1484 | } else { |
| 1485 | int t_reg1 = AllocTemp(); |
| 1486 | int t_reg2 = AllocTemp(); |
| 1487 | if (lit == 2) { |
| 1488 | OpRegRegImm(kOpLsr, t_reg1, rl_src.low_reg, 32 - k); |
| 1489 | OpRegRegReg(kOpAdd, t_reg2, t_reg1, rl_src.low_reg); |
| 1490 | OpRegRegImm(kOpAnd, t_reg2, t_reg2, lit -1); |
| 1491 | OpRegRegReg(kOpSub, rl_result.low_reg, t_reg2, t_reg1); |
| 1492 | } else { |
| 1493 | OpRegRegImm(kOpAsr, t_reg1, rl_src.low_reg, 31); |
| 1494 | OpRegRegImm(kOpLsr, t_reg1, t_reg1, 32 - k); |
| 1495 | OpRegRegReg(kOpAdd, t_reg2, t_reg1, rl_src.low_reg); |
| 1496 | OpRegRegImm(kOpAnd, t_reg2, t_reg2, lit - 1); |
| 1497 | OpRegRegReg(kOpSub, rl_result.low_reg, t_reg2, t_reg1); |
| 1498 | } |
| 1499 | } |
| 1500 | StoreValue(rl_dest, rl_result); |
| 1501 | return true; |
| 1502 | } |
| 1503 | |
| 1504 | // Returns true if it added instructions to 'cu' to multiply 'rl_src' by 'lit' |
| 1505 | // and store the result in 'rl_dest'. |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1506 | bool Mir2Lir::HandleEasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1507 | // Can we simplify this multiplication? |
| 1508 | bool power_of_two = false; |
| 1509 | bool pop_count_le2 = false; |
| 1510 | bool power_of_two_minus_one = false; |
| 1511 | if (lit < 2) { |
| 1512 | // Avoid special cases. |
| 1513 | return false; |
| 1514 | } else if (IsPowerOfTwo(lit)) { |
| 1515 | power_of_two = true; |
| 1516 | } else if (IsPopCountLE2(lit)) { |
| 1517 | pop_count_le2 = true; |
| 1518 | } else if (IsPowerOfTwo(lit + 1)) { |
| 1519 | power_of_two_minus_one = true; |
| 1520 | } else { |
| 1521 | return false; |
| 1522 | } |
| 1523 | rl_src = LoadValue(rl_src, kCoreReg); |
| 1524 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1525 | if (power_of_two) { |
| 1526 | // Shift. |
| 1527 | OpRegRegImm(kOpLsl, rl_result.low_reg, rl_src.low_reg, LowestSetBit(lit)); |
| 1528 | } else if (pop_count_le2) { |
| 1529 | // Shift and add and shift. |
| 1530 | int first_bit = LowestSetBit(lit); |
| 1531 | int second_bit = LowestSetBit(lit ^ (1 << first_bit)); |
| 1532 | GenMultiplyByTwoBitMultiplier(rl_src, rl_result, lit, first_bit, second_bit); |
| 1533 | } else { |
| 1534 | // Reverse subtract: (src << (shift + 1)) - src. |
| 1535 | DCHECK(power_of_two_minus_one); |
| 1536 | // TUNING: rsb dst, src, src lsl#LowestSetBit(lit + 1) |
| 1537 | int t_reg = AllocTemp(); |
| 1538 | OpRegRegImm(kOpLsl, t_reg, rl_src.low_reg, LowestSetBit(lit + 1)); |
| 1539 | OpRegRegReg(kOpSub, rl_result.low_reg, t_reg, rl_src.low_reg); |
| 1540 | } |
| 1541 | StoreValue(rl_dest, rl_result); |
| 1542 | return true; |
| 1543 | } |
| 1544 | |
| 1545 | void Mir2Lir::GenArithOpIntLit(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1546 | int lit) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1547 | RegLocation rl_result; |
| 1548 | OpKind op = static_cast<OpKind>(0); /* Make gcc happy */ |
| 1549 | int shift_op = false; |
| 1550 | bool is_div = false; |
| 1551 | |
| 1552 | switch (opcode) { |
| 1553 | case Instruction::RSUB_INT_LIT8: |
| 1554 | case Instruction::RSUB_INT: { |
| 1555 | rl_src = LoadValue(rl_src, kCoreReg); |
| 1556 | rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1557 | if (cu_->instruction_set == kThumb2) { |
| 1558 | OpRegRegImm(kOpRsub, rl_result.low_reg, rl_src.low_reg, lit); |
| 1559 | } else { |
| 1560 | OpRegReg(kOpNeg, rl_result.low_reg, rl_src.low_reg); |
| 1561 | OpRegImm(kOpAdd, rl_result.low_reg, lit); |
| 1562 | } |
| 1563 | StoreValue(rl_dest, rl_result); |
| 1564 | return; |
| 1565 | } |
| 1566 | |
| 1567 | case Instruction::SUB_INT: |
| 1568 | case Instruction::SUB_INT_2ADDR: |
| 1569 | lit = -lit; |
| 1570 | // Intended fallthrough |
| 1571 | case Instruction::ADD_INT: |
| 1572 | case Instruction::ADD_INT_2ADDR: |
| 1573 | case Instruction::ADD_INT_LIT8: |
| 1574 | case Instruction::ADD_INT_LIT16: |
| 1575 | op = kOpAdd; |
| 1576 | break; |
| 1577 | case Instruction::MUL_INT: |
| 1578 | case Instruction::MUL_INT_2ADDR: |
| 1579 | case Instruction::MUL_INT_LIT8: |
| 1580 | case Instruction::MUL_INT_LIT16: { |
| 1581 | if (HandleEasyMultiply(rl_src, rl_dest, lit)) { |
| 1582 | return; |
| 1583 | } |
| 1584 | op = kOpMul; |
| 1585 | break; |
| 1586 | } |
| 1587 | case Instruction::AND_INT: |
| 1588 | case Instruction::AND_INT_2ADDR: |
| 1589 | case Instruction::AND_INT_LIT8: |
| 1590 | case Instruction::AND_INT_LIT16: |
| 1591 | op = kOpAnd; |
| 1592 | break; |
| 1593 | case Instruction::OR_INT: |
| 1594 | case Instruction::OR_INT_2ADDR: |
| 1595 | case Instruction::OR_INT_LIT8: |
| 1596 | case Instruction::OR_INT_LIT16: |
| 1597 | op = kOpOr; |
| 1598 | break; |
| 1599 | case Instruction::XOR_INT: |
| 1600 | case Instruction::XOR_INT_2ADDR: |
| 1601 | case Instruction::XOR_INT_LIT8: |
| 1602 | case Instruction::XOR_INT_LIT16: |
| 1603 | op = kOpXor; |
| 1604 | break; |
| 1605 | case Instruction::SHL_INT_LIT8: |
| 1606 | case Instruction::SHL_INT: |
| 1607 | case Instruction::SHL_INT_2ADDR: |
| 1608 | lit &= 31; |
| 1609 | shift_op = true; |
| 1610 | op = kOpLsl; |
| 1611 | break; |
| 1612 | case Instruction::SHR_INT_LIT8: |
| 1613 | case Instruction::SHR_INT: |
| 1614 | case Instruction::SHR_INT_2ADDR: |
| 1615 | lit &= 31; |
| 1616 | shift_op = true; |
| 1617 | op = kOpAsr; |
| 1618 | break; |
| 1619 | case Instruction::USHR_INT_LIT8: |
| 1620 | case Instruction::USHR_INT: |
| 1621 | case Instruction::USHR_INT_2ADDR: |
| 1622 | lit &= 31; |
| 1623 | shift_op = true; |
| 1624 | op = kOpLsr; |
| 1625 | break; |
| 1626 | |
| 1627 | case Instruction::DIV_INT: |
| 1628 | case Instruction::DIV_INT_2ADDR: |
| 1629 | case Instruction::DIV_INT_LIT8: |
| 1630 | case Instruction::DIV_INT_LIT16: |
| 1631 | case Instruction::REM_INT: |
| 1632 | case Instruction::REM_INT_2ADDR: |
| 1633 | case Instruction::REM_INT_LIT8: |
| 1634 | case Instruction::REM_INT_LIT16: { |
| 1635 | if (lit == 0) { |
| 1636 | GenImmedCheck(kCondAl, 0, 0, kThrowDivZero); |
| 1637 | return; |
| 1638 | } |
buzbee | 11b63d1 | 2013-08-27 07:34:17 -0700 | [diff] [blame] | 1639 | if ((opcode == Instruction::DIV_INT) || |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1640 | (opcode == Instruction::DIV_INT_2ADDR) || |
buzbee | 11b63d1 | 2013-08-27 07:34:17 -0700 | [diff] [blame] | 1641 | (opcode == Instruction::DIV_INT_LIT8) || |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1642 | (opcode == Instruction::DIV_INT_LIT16)) { |
| 1643 | is_div = true; |
| 1644 | } else { |
| 1645 | is_div = false; |
| 1646 | } |
buzbee | 11b63d1 | 2013-08-27 07:34:17 -0700 | [diff] [blame] | 1647 | if (HandleEasyDivRem(opcode, is_div, rl_src, rl_dest, lit)) { |
| 1648 | return; |
| 1649 | } |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 1650 | |
| 1651 | bool done = false; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1652 | if (cu_->instruction_set == kMips) { |
| 1653 | rl_src = LoadValue(rl_src, kCoreReg); |
| 1654 | rl_result = GenDivRemLit(rl_dest, rl_src.low_reg, lit, is_div); |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 1655 | done = true; |
Mark Mendell | 2bf31e6 | 2014-01-23 12:13:40 -0800 | [diff] [blame] | 1656 | } else if (cu_->instruction_set == kX86) { |
| 1657 | rl_result = GenDivRemLit(rl_dest, rl_src, lit, is_div); |
| 1658 | done = true; |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 1659 | } else if (cu_->instruction_set == kThumb2) { |
| 1660 | if (cu_->GetInstructionSetFeatures().HasDivideInstruction()) { |
| 1661 | // Use ARM SDIV instruction for division. For remainder we also need to |
| 1662 | // calculate using a MUL and subtract. |
| 1663 | rl_src = LoadValue(rl_src, kCoreReg); |
| 1664 | rl_result = GenDivRemLit(rl_dest, rl_src.low_reg, lit, is_div); |
| 1665 | done = true; |
| 1666 | } |
| 1667 | } |
| 1668 | |
| 1669 | if (!done) { |
| 1670 | FlushAllRegs(); /* Everything to home location. */ |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1671 | LoadValueDirectFixed(rl_src, TargetReg(kArg0)); |
| 1672 | Clobber(TargetReg(kArg0)); |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1673 | ThreadOffset func_offset = QUICK_ENTRYPOINT_OFFSET(pIdivmod); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1674 | CallRuntimeHelperRegImm(func_offset, TargetReg(kArg0), lit, false); |
| 1675 | if (is_div) |
| 1676 | rl_result = GetReturn(false); |
| 1677 | else |
| 1678 | rl_result = GetReturnAlt(); |
| 1679 | } |
| 1680 | StoreValue(rl_dest, rl_result); |
| 1681 | return; |
| 1682 | } |
| 1683 | default: |
| 1684 | LOG(FATAL) << "Unexpected opcode " << opcode; |
| 1685 | } |
| 1686 | rl_src = LoadValue(rl_src, kCoreReg); |
| 1687 | rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Dave Allison | 7020278 | 2013-10-22 17:52:19 -0700 | [diff] [blame] | 1688 | // Avoid shifts by literal 0 - no support in Thumb. Change to copy. |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1689 | if (shift_op && (lit == 0)) { |
| 1690 | OpRegCopy(rl_result.low_reg, rl_src.low_reg); |
| 1691 | } else { |
| 1692 | OpRegRegImm(op, rl_result.low_reg, rl_src.low_reg, lit); |
| 1693 | } |
| 1694 | StoreValue(rl_dest, rl_result); |
| 1695 | } |
| 1696 | |
| 1697 | void Mir2Lir::GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1698 | RegLocation rl_src1, RegLocation rl_src2) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1699 | RegLocation rl_result; |
| 1700 | OpKind first_op = kOpBkpt; |
| 1701 | OpKind second_op = kOpBkpt; |
| 1702 | bool call_out = false; |
| 1703 | bool check_zero = false; |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1704 | ThreadOffset func_offset(-1); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1705 | int ret_reg = TargetReg(kRet0); |
| 1706 | |
| 1707 | switch (opcode) { |
| 1708 | case Instruction::NOT_LONG: |
| 1709 | rl_src2 = LoadValueWide(rl_src2, kCoreReg); |
| 1710 | rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1711 | // Check for destructive overlap |
| 1712 | if (rl_result.low_reg == rl_src2.high_reg) { |
| 1713 | int t_reg = AllocTemp(); |
| 1714 | OpRegCopy(t_reg, rl_src2.high_reg); |
| 1715 | OpRegReg(kOpMvn, rl_result.low_reg, rl_src2.low_reg); |
| 1716 | OpRegReg(kOpMvn, rl_result.high_reg, t_reg); |
| 1717 | FreeTemp(t_reg); |
| 1718 | } else { |
| 1719 | OpRegReg(kOpMvn, rl_result.low_reg, rl_src2.low_reg); |
| 1720 | OpRegReg(kOpMvn, rl_result.high_reg, rl_src2.high_reg); |
| 1721 | } |
| 1722 | StoreValueWide(rl_dest, rl_result); |
| 1723 | return; |
| 1724 | case Instruction::ADD_LONG: |
| 1725 | case Instruction::ADD_LONG_2ADDR: |
| 1726 | if (cu_->instruction_set != kThumb2) { |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 1727 | GenAddLong(opcode, rl_dest, rl_src1, rl_src2); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1728 | return; |
| 1729 | } |
| 1730 | first_op = kOpAdd; |
| 1731 | second_op = kOpAdc; |
| 1732 | break; |
| 1733 | case Instruction::SUB_LONG: |
| 1734 | case Instruction::SUB_LONG_2ADDR: |
| 1735 | if (cu_->instruction_set != kThumb2) { |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 1736 | GenSubLong(opcode, rl_dest, rl_src1, rl_src2); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1737 | return; |
| 1738 | } |
| 1739 | first_op = kOpSub; |
| 1740 | second_op = kOpSbc; |
| 1741 | break; |
| 1742 | case Instruction::MUL_LONG: |
| 1743 | case Instruction::MUL_LONG_2ADDR: |
Mark Mendell | 4708dcd | 2014-01-22 09:05:18 -0800 | [diff] [blame] | 1744 | if (cu_->instruction_set != kMips) { |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 1745 | GenMulLong(opcode, rl_dest, rl_src1, rl_src2); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1746 | return; |
| 1747 | } else { |
| 1748 | call_out = true; |
| 1749 | ret_reg = TargetReg(kRet0); |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1750 | func_offset = QUICK_ENTRYPOINT_OFFSET(pLmul); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1751 | } |
| 1752 | break; |
| 1753 | case Instruction::DIV_LONG: |
| 1754 | case Instruction::DIV_LONG_2ADDR: |
| 1755 | call_out = true; |
| 1756 | check_zero = true; |
| 1757 | ret_reg = TargetReg(kRet0); |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1758 | func_offset = QUICK_ENTRYPOINT_OFFSET(pLdiv); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1759 | break; |
| 1760 | case Instruction::REM_LONG: |
| 1761 | case Instruction::REM_LONG_2ADDR: |
| 1762 | call_out = true; |
| 1763 | check_zero = true; |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 1764 | func_offset = QUICK_ENTRYPOINT_OFFSET(pLmod); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1765 | /* NOTE - for Arm, result is in kArg2/kArg3 instead of kRet0/kRet1 */ |
| 1766 | ret_reg = (cu_->instruction_set == kThumb2) ? TargetReg(kArg2) : TargetReg(kRet0); |
| 1767 | break; |
| 1768 | case Instruction::AND_LONG_2ADDR: |
| 1769 | case Instruction::AND_LONG: |
| 1770 | if (cu_->instruction_set == kX86) { |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 1771 | return GenAndLong(opcode, rl_dest, rl_src1, rl_src2); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1772 | } |
| 1773 | first_op = kOpAnd; |
| 1774 | second_op = kOpAnd; |
| 1775 | break; |
| 1776 | case Instruction::OR_LONG: |
| 1777 | case Instruction::OR_LONG_2ADDR: |
| 1778 | if (cu_->instruction_set == kX86) { |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 1779 | GenOrLong(opcode, rl_dest, rl_src1, rl_src2); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1780 | return; |
| 1781 | } |
| 1782 | first_op = kOpOr; |
| 1783 | second_op = kOpOr; |
| 1784 | break; |
| 1785 | case Instruction::XOR_LONG: |
| 1786 | case Instruction::XOR_LONG_2ADDR: |
| 1787 | if (cu_->instruction_set == kX86) { |
Mark Mendell | e02d48f | 2014-01-15 11:19:23 -0800 | [diff] [blame] | 1788 | GenXorLong(opcode, rl_dest, rl_src1, rl_src2); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1789 | return; |
| 1790 | } |
| 1791 | first_op = kOpXor; |
| 1792 | second_op = kOpXor; |
| 1793 | break; |
| 1794 | case Instruction::NEG_LONG: { |
| 1795 | GenNegLong(rl_dest, rl_src2); |
| 1796 | return; |
| 1797 | } |
| 1798 | default: |
| 1799 | LOG(FATAL) << "Invalid long arith op"; |
| 1800 | } |
| 1801 | if (!call_out) { |
| 1802 | GenLong3Addr(first_op, second_op, rl_dest, rl_src1, rl_src2); |
| 1803 | } else { |
| 1804 | FlushAllRegs(); /* Send everything to home location */ |
| 1805 | if (check_zero) { |
| 1806 | LoadValueDirectWideFixed(rl_src2, TargetReg(kArg2), TargetReg(kArg3)); |
| 1807 | int r_tgt = CallHelperSetup(func_offset); |
| 1808 | GenDivZeroCheck(TargetReg(kArg2), TargetReg(kArg3)); |
| 1809 | LoadValueDirectWideFixed(rl_src1, TargetReg(kArg0), TargetReg(kArg1)); |
| 1810 | // NOTE: callout here is not a safepoint |
| 1811 | CallHelper(r_tgt, func_offset, false /* not safepoint */); |
| 1812 | } else { |
| 1813 | CallRuntimeHelperRegLocationRegLocation(func_offset, rl_src1, rl_src2, false); |
| 1814 | } |
| 1815 | // Adjust return regs in to handle case of rem returning kArg2/kArg3 |
| 1816 | if (ret_reg == TargetReg(kRet0)) |
| 1817 | rl_result = GetReturnWide(false); |
| 1818 | else |
| 1819 | rl_result = GetReturnWideAlt(); |
| 1820 | StoreValueWide(rl_dest, rl_result); |
| 1821 | } |
| 1822 | } |
| 1823 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1824 | void Mir2Lir::GenConversionCall(ThreadOffset func_offset, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1825 | RegLocation rl_dest, RegLocation rl_src) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1826 | /* |
| 1827 | * Don't optimize the register usage since it calls out to support |
| 1828 | * functions |
| 1829 | */ |
| 1830 | FlushAllRegs(); /* Send everything to home location */ |
| 1831 | if (rl_src.wide) { |
| 1832 | LoadValueDirectWideFixed(rl_src, rl_src.fp ? TargetReg(kFArg0) : TargetReg(kArg0), |
| 1833 | rl_src.fp ? TargetReg(kFArg1) : TargetReg(kArg1)); |
| 1834 | } else { |
| 1835 | LoadValueDirectFixed(rl_src, rl_src.fp ? TargetReg(kFArg0) : TargetReg(kArg0)); |
| 1836 | } |
| 1837 | CallRuntimeHelperRegLocation(func_offset, rl_src, false); |
| 1838 | if (rl_dest.wide) { |
| 1839 | RegLocation rl_result; |
| 1840 | rl_result = GetReturnWide(rl_dest.fp); |
| 1841 | StoreValueWide(rl_dest, rl_result); |
| 1842 | } else { |
| 1843 | RegLocation rl_result; |
| 1844 | rl_result = GetReturn(rl_dest.fp); |
| 1845 | StoreValue(rl_dest, rl_result); |
| 1846 | } |
| 1847 | } |
| 1848 | |
| 1849 | /* Check if we need to check for pending suspend request */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1850 | void Mir2Lir::GenSuspendTest(int opt_flags) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1851 | if (NO_SUSPEND || (opt_flags & MIR_IGNORE_SUSPEND_CHECK)) { |
| 1852 | return; |
| 1853 | } |
| 1854 | FlushAllRegs(); |
| 1855 | LIR* branch = OpTestSuspend(NULL); |
| 1856 | LIR* ret_lab = NewLIR0(kPseudoTargetLabel); |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 1857 | LIR* target = RawLIR(current_dalvik_offset_, kPseudoSuspendTarget, WrapPointer(ret_lab), |
| 1858 | current_dalvik_offset_); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1859 | branch->target = target; |
| 1860 | suspend_launchpads_.Insert(target); |
| 1861 | } |
| 1862 | |
| 1863 | /* Check if we need to check for pending suspend request */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1864 | void Mir2Lir::GenSuspendTestAndBranch(int opt_flags, LIR* target) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1865 | if (NO_SUSPEND || (opt_flags & MIR_IGNORE_SUSPEND_CHECK)) { |
| 1866 | OpUnconditionalBranch(target); |
| 1867 | return; |
| 1868 | } |
| 1869 | OpTestSuspend(target); |
| 1870 | LIR* launch_pad = |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 1871 | RawLIR(current_dalvik_offset_, kPseudoSuspendTarget, WrapPointer(target), |
| 1872 | current_dalvik_offset_); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1873 | FlushAllRegs(); |
| 1874 | OpUnconditionalBranch(launch_pad); |
| 1875 | suspend_launchpads_.Insert(launch_pad); |
| 1876 | } |
| 1877 | |
Ian Rogers | d9c4fc9 | 2013-10-01 19:45:43 -0700 | [diff] [blame] | 1878 | /* Call out to helper assembly routine that will null check obj and then lock it. */ |
| 1879 | void Mir2Lir::GenMonitorEnter(int opt_flags, RegLocation rl_src) { |
| 1880 | FlushAllRegs(); |
| 1881 | CallRuntimeHelperRegLocation(QUICK_ENTRYPOINT_OFFSET(pLockObject), rl_src, true); |
| 1882 | } |
| 1883 | |
| 1884 | /* Call out to helper assembly routine that will null check obj and then unlock it. */ |
| 1885 | void Mir2Lir::GenMonitorExit(int opt_flags, RegLocation rl_src) { |
| 1886 | FlushAllRegs(); |
| 1887 | CallRuntimeHelperRegLocation(QUICK_ENTRYPOINT_OFFSET(pUnlockObject), rl_src, true); |
| 1888 | } |
| 1889 | |
Bill Buzbee | d61ba4b | 2014-01-13 21:44:01 +0000 | [diff] [blame] | 1890 | /* Generic code for generating a wide constant into a VR. */ |
| 1891 | void Mir2Lir::GenConstWide(RegLocation rl_dest, int64_t value) { |
| 1892 | RegLocation rl_result = EvalLoc(rl_dest, kAnyReg, true); |
| 1893 | LoadConstantWide(rl_result.low_reg, rl_result.high_reg, value); |
| 1894 | StoreValueWide(rl_dest, rl_result); |
| 1895 | } |
| 1896 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1897 | } // namespace art |