Elliott Hughes | 2faa5f1 | 2012-01-30 14:42:07 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
Ian Rogers | bdb0391 | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 16 | |
Ian Rogers | 166db04 | 2013-07-26 12:05:57 -0700 | [diff] [blame] | 17 | #ifndef ART_RUNTIME_ARCH_ARM_CONTEXT_ARM_H_ |
| 18 | #define ART_RUNTIME_ARCH_ARM_CONTEXT_ARM_H_ |
Ian Rogers | bdb0391 | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 19 | |
Andreas Gampe | 5794381 | 2017-12-06 21:39:13 -0800 | [diff] [blame] | 20 | #include <android-base/logging.h> |
| 21 | |
Ian Rogers | 166db04 | 2013-07-26 12:05:57 -0700 | [diff] [blame] | 22 | #include "arch/context.h" |
Andreas Gampe | 794ad76 | 2015-02-23 08:12:24 -0800 | [diff] [blame] | 23 | #include "base/macros.h" |
Ian Rogers | 166db04 | 2013-07-26 12:05:57 -0700 | [diff] [blame] | 24 | #include "registers_arm.h" |
Ian Rogers | bdb0391 | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 25 | |
| 26 | namespace art { |
| 27 | namespace arm { |
| 28 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 29 | class ArmContext final : public Context { |
Ian Rogers | bdb0391 | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 30 | public: |
Mathieu Chartier | 6702243 | 2012-11-29 18:04:50 -0800 | [diff] [blame] | 31 | ArmContext() { |
| 32 | Reset(); |
| 33 | } |
| 34 | |
Ian Rogers | bdb0391 | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 35 | virtual ~ArmContext() {} |
| 36 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 37 | void Reset() override; |
Mathieu Chartier | 6702243 | 2012-11-29 18:04:50 -0800 | [diff] [blame] | 38 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 39 | void FillCalleeSaves(uint8_t* frame, const QuickMethodFrameInfo& fr) override; |
Ian Rogers | bdb0391 | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 40 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 41 | void SetSP(uintptr_t new_sp) override { |
Sebastien Hertz | 96ba8dc | 2015-01-22 18:57:14 +0100 | [diff] [blame] | 42 | SetGPR(SP, new_sp); |
Ian Rogers | bdb0391 | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 43 | } |
| 44 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 45 | void SetPC(uintptr_t new_pc) override { |
Sebastien Hertz | 96ba8dc | 2015-01-22 18:57:14 +0100 | [diff] [blame] | 46 | SetGPR(PC, new_pc); |
| 47 | } |
| 48 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 49 | void SetArg0(uintptr_t new_arg0_value) override { |
Andreas Gampe | 639bdd1 | 2015-06-03 11:22:45 -0700 | [diff] [blame] | 50 | SetGPR(R0, new_arg0_value); |
| 51 | } |
| 52 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 53 | bool IsAccessibleGPR(uint32_t reg) override { |
Sebastien Hertz | 96ba8dc | 2015-01-22 18:57:14 +0100 | [diff] [blame] | 54 | DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCoreRegisters)); |
| 55 | return gprs_[reg] != nullptr; |
Ian Rogers | bdb0391 | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 56 | } |
| 57 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 58 | uintptr_t* GetGPRAddress(uint32_t reg) override { |
Mathieu Chartier | 815873e | 2014-02-13 18:02:13 -0800 | [diff] [blame] | 59 | DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCoreRegisters)); |
| 60 | return gprs_[reg]; |
| 61 | } |
| 62 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 63 | uintptr_t GetGPR(uint32_t reg) override { |
Ian Rogers | 166db04 | 2013-07-26 12:05:57 -0700 | [diff] [blame] | 64 | DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCoreRegisters)); |
Sebastien Hertz | 96ba8dc | 2015-01-22 18:57:14 +0100 | [diff] [blame] | 65 | DCHECK(IsAccessibleGPR(reg)); |
| 66 | return *gprs_[reg]; |
Ian Rogers | d6b1f61 | 2011-09-27 13:38:14 -0700 | [diff] [blame] | 67 | } |
| 68 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 69 | void SetGPR(uint32_t reg, uintptr_t value) override; |
Sebastien Hertz | 0bcb290 | 2014-06-17 15:52:45 +0200 | [diff] [blame] | 70 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 71 | bool IsAccessibleFPR(uint32_t reg) override { |
Sebastien Hertz | 0bcb290 | 2014-06-17 15:52:45 +0200 | [diff] [blame] | 72 | DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfSRegisters)); |
Sebastien Hertz | 96ba8dc | 2015-01-22 18:57:14 +0100 | [diff] [blame] | 73 | return fprs_[reg] != nullptr; |
Sebastien Hertz | 0bcb290 | 2014-06-17 15:52:45 +0200 | [diff] [blame] | 74 | } |
| 75 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 76 | uintptr_t GetFPR(uint32_t reg) override { |
Sebastien Hertz | 96ba8dc | 2015-01-22 18:57:14 +0100 | [diff] [blame] | 77 | DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfSRegisters)); |
| 78 | DCHECK(IsAccessibleFPR(reg)); |
| 79 | return *fprs_[reg]; |
| 80 | } |
| 81 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 82 | void SetFPR(uint32_t reg, uintptr_t value) override; |
Sebastien Hertz | 0bcb290 | 2014-06-17 15:52:45 +0200 | [diff] [blame] | 83 | |
Roland Levillain | bbc6e7e | 2018-08-24 16:58:47 +0100 | [diff] [blame] | 84 | void SmashCallerSaves() override; |
| 85 | NO_RETURN void DoLongJump() override; |
Ian Rogers | bdb0391 | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 86 | |
| 87 | private: |
Mathieu Chartier | 2cebb24 | 2015-04-21 16:50:40 -0700 | [diff] [blame] | 88 | // Pointers to register locations, initialized to null or the specific registers below. |
Mathieu Chartier | 6702243 | 2012-11-29 18:04:50 -0800 | [diff] [blame] | 89 | uintptr_t* gprs_[kNumberOfCoreRegisters]; |
| 90 | uint32_t* fprs_[kNumberOfSRegisters]; |
| 91 | // Hold values for sp and pc if they are not located within a stack frame. |
Andreas Gampe | 639bdd1 | 2015-06-03 11:22:45 -0700 | [diff] [blame] | 92 | uintptr_t sp_, pc_, arg0_; |
Ian Rogers | bdb0391 | 2011-09-14 00:55:44 -0700 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | } // namespace arm |
| 96 | } // namespace art |
| 97 | |
Ian Rogers | 166db04 | 2013-07-26 12:05:57 -0700 | [diff] [blame] | 98 | #endif // ART_RUNTIME_ARCH_ARM_CONTEXT_ARM_H_ |