Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include "codegen_x86.h" |
| 18 | #include "dex/quick/mir_to_lir-inl.h" |
| 19 | #include "x86_lir.h" |
| 20 | |
| 21 | namespace art { |
| 22 | |
| 23 | void X86Mir2Lir::GenArithOpFloat(Instruction::Code opcode, |
| 24 | RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { |
| 25 | X86OpCode op = kX86Nop; |
| 26 | RegLocation rl_result; |
| 27 | |
| 28 | /* |
| 29 | * Don't attempt to optimize register usage since these opcodes call out to |
| 30 | * the handlers. |
| 31 | */ |
| 32 | switch (opcode) { |
| 33 | case Instruction::ADD_FLOAT_2ADDR: |
| 34 | case Instruction::ADD_FLOAT: |
| 35 | op = kX86AddssRR; |
| 36 | break; |
| 37 | case Instruction::SUB_FLOAT_2ADDR: |
| 38 | case Instruction::SUB_FLOAT: |
| 39 | op = kX86SubssRR; |
| 40 | break; |
| 41 | case Instruction::DIV_FLOAT_2ADDR: |
| 42 | case Instruction::DIV_FLOAT: |
| 43 | op = kX86DivssRR; |
| 44 | break; |
| 45 | case Instruction::MUL_FLOAT_2ADDR: |
| 46 | case Instruction::MUL_FLOAT: |
| 47 | op = kX86MulssRR; |
| 48 | break; |
| 49 | case Instruction::REM_FLOAT_2ADDR: |
| 50 | case Instruction::REM_FLOAT: |
| 51 | FlushAllRegs(); // Send everything to home location |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 52 | CallRuntimeHelperRegLocationRegLocation(QUICK_ENTRYPOINT_OFFSET(4, pFmodf), rl_src1, rl_src2, |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 53 | false); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 54 | rl_result = GetReturn(true); |
| 55 | StoreValue(rl_dest, rl_result); |
| 56 | return; |
| 57 | case Instruction::NEG_FLOAT: |
| 58 | GenNegFloat(rl_dest, rl_src1); |
| 59 | return; |
| 60 | default: |
| 61 | LOG(FATAL) << "Unexpected opcode: " << opcode; |
| 62 | } |
| 63 | rl_src1 = LoadValue(rl_src1, kFPReg); |
| 64 | rl_src2 = LoadValue(rl_src2, kFPReg); |
| 65 | rl_result = EvalLoc(rl_dest, kFPReg, true); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 66 | RegStorage r_dest = rl_result.reg; |
| 67 | RegStorage r_src1 = rl_src1.reg; |
| 68 | RegStorage r_src2 = rl_src2.reg; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 69 | if (r_dest == r_src2) { |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 70 | r_src2 = AllocTempSingle(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 71 | OpRegCopy(r_src2, r_dest); |
| 72 | } |
| 73 | OpRegCopy(r_dest, r_src1); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 74 | NewLIR2(op, r_dest.GetReg(), r_src2.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 75 | StoreValue(rl_dest, rl_result); |
| 76 | } |
| 77 | |
| 78 | void X86Mir2Lir::GenArithOpDouble(Instruction::Code opcode, |
| 79 | RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 80 | DCHECK(rl_dest.wide); |
| 81 | DCHECK(rl_dest.fp); |
| 82 | DCHECK(rl_src1.wide); |
| 83 | DCHECK(rl_src1.fp); |
| 84 | DCHECK(rl_src2.wide); |
| 85 | DCHECK(rl_src2.fp); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 86 | X86OpCode op = kX86Nop; |
| 87 | RegLocation rl_result; |
| 88 | |
| 89 | switch (opcode) { |
| 90 | case Instruction::ADD_DOUBLE_2ADDR: |
| 91 | case Instruction::ADD_DOUBLE: |
| 92 | op = kX86AddsdRR; |
| 93 | break; |
| 94 | case Instruction::SUB_DOUBLE_2ADDR: |
| 95 | case Instruction::SUB_DOUBLE: |
| 96 | op = kX86SubsdRR; |
| 97 | break; |
| 98 | case Instruction::DIV_DOUBLE_2ADDR: |
| 99 | case Instruction::DIV_DOUBLE: |
| 100 | op = kX86DivsdRR; |
| 101 | break; |
| 102 | case Instruction::MUL_DOUBLE_2ADDR: |
| 103 | case Instruction::MUL_DOUBLE: |
| 104 | op = kX86MulsdRR; |
| 105 | break; |
| 106 | case Instruction::REM_DOUBLE_2ADDR: |
| 107 | case Instruction::REM_DOUBLE: |
| 108 | FlushAllRegs(); // Send everything to home location |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 109 | CallRuntimeHelperRegLocationRegLocation(QUICK_ENTRYPOINT_OFFSET(4, pFmod), rl_src1, rl_src2, |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 110 | false); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 111 | rl_result = GetReturnWide(true); |
| 112 | StoreValueWide(rl_dest, rl_result); |
| 113 | return; |
| 114 | case Instruction::NEG_DOUBLE: |
| 115 | GenNegDouble(rl_dest, rl_src1); |
| 116 | return; |
| 117 | default: |
| 118 | LOG(FATAL) << "Unexpected opcode: " << opcode; |
| 119 | } |
| 120 | rl_src1 = LoadValueWide(rl_src1, kFPReg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 121 | rl_src2 = LoadValueWide(rl_src2, kFPReg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 122 | rl_result = EvalLoc(rl_dest, kFPReg, true); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 123 | if (rl_result.reg == rl_src2.reg) { |
| 124 | rl_src2.reg = AllocTempDouble(); |
| 125 | OpRegCopy(rl_src2.reg, rl_result.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 126 | } |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 127 | OpRegCopy(rl_result.reg, rl_src1.reg); |
| 128 | NewLIR2(op, rl_result.reg.GetReg(), rl_src2.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 129 | StoreValueWide(rl_dest, rl_result); |
| 130 | } |
| 131 | |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 132 | void X86Mir2Lir::GenLongToFP(RegLocation rl_dest, RegLocation rl_src, bool is_double) { |
| 133 | // Compute offsets to the source and destination VRs on stack |
| 134 | int src_v_reg_offset = SRegOffset(rl_src.s_reg_low); |
| 135 | int dest_v_reg_offset = SRegOffset(rl_dest.s_reg_low); |
| 136 | |
| 137 | // Update the in-register state of source. |
| 138 | rl_src = UpdateLocWide(rl_src); |
| 139 | |
| 140 | // If the source is in physical register, then put it in its location on stack. |
| 141 | if (rl_src.location == kLocPhysReg) { |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 142 | RegisterInfo* reg_info = GetRegInfo(rl_src.reg); |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 143 | |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 144 | if (reg_info != nullptr && reg_info->IsTemp()) { |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 145 | // Calling FlushSpecificReg because it will only write back VR if it is dirty. |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 146 | FlushSpecificReg(reg_info); |
| 147 | // ResetDef to prevent NullifyRange from removing stores. |
| 148 | ResetDef(rl_src.reg); |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 149 | } else { |
| 150 | // It must have been register promoted if it is not a temp but is still in physical |
| 151 | // register. Since we need it to be in memory to convert, we place it there now. |
Vladimir Marko | 455759b | 2014-05-06 20:49:36 +0100 | [diff] [blame] | 152 | StoreBaseDisp(TargetReg(kSp), src_v_reg_offset, rl_src.reg, k64); |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 153 | } |
| 154 | } |
| 155 | |
| 156 | // Push the source virtual register onto the x87 stack. |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 157 | LIR *fild64 = NewLIR2NoDest(kX86Fild64M, TargetReg(kSp).GetReg(), |
| 158 | src_v_reg_offset + LOWORD_OFFSET); |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 159 | AnnotateDalvikRegAccess(fild64, (src_v_reg_offset + LOWORD_OFFSET) >> 2, |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 160 | true /* is_load */, true /* is64bit */); |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 161 | |
| 162 | // Now pop off x87 stack and store it in the destination VR's stack location. |
| 163 | int opcode = is_double ? kX86Fstp64M : kX86Fstp32M; |
| 164 | int displacement = is_double ? dest_v_reg_offset + LOWORD_OFFSET : dest_v_reg_offset; |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 165 | LIR *fstp = NewLIR2NoDest(opcode, TargetReg(kSp).GetReg(), displacement); |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 166 | AnnotateDalvikRegAccess(fstp, displacement >> 2, false /* is_load */, is_double); |
| 167 | |
| 168 | /* |
| 169 | * The result is in a physical register if it was in a temp or was register |
| 170 | * promoted. For that reason it is enough to check if it is in physical |
| 171 | * register. If it is, then we must do all of the bookkeeping necessary to |
| 172 | * invalidate temp (if needed) and load in promoted register (if needed). |
| 173 | * If the result's location is in memory, then we do not need to do anything |
| 174 | * more since the fstp has already placed the correct value in memory. |
| 175 | */ |
| 176 | RegLocation rl_result = is_double ? UpdateLocWide(rl_dest) : UpdateLoc(rl_dest); |
| 177 | if (rl_result.location == kLocPhysReg) { |
| 178 | /* |
| 179 | * We already know that the result is in a physical register but do not know if it is the |
| 180 | * right class. So we call EvalLoc(Wide) first which will ensure that it will get moved to the |
| 181 | * correct register class. |
| 182 | */ |
| 183 | if (is_double) { |
| 184 | rl_result = EvalLocWide(rl_dest, kFPReg, true); |
| 185 | |
Vladimir Marko | 3bf7c60 | 2014-05-07 14:55:43 +0100 | [diff] [blame] | 186 | LoadBaseDisp(TargetReg(kSp), dest_v_reg_offset, rl_result.reg, k64); |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 187 | |
Maxim Kazantsev | 51a80d7 | 2014-03-06 11:33:26 +0700 | [diff] [blame] | 188 | StoreFinalValueWide(rl_dest, rl_result); |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 189 | } else { |
| 190 | rl_result = EvalLoc(rl_dest, kFPReg, true); |
| 191 | |
buzbee | 695d13a | 2014-04-19 13:32:20 -0700 | [diff] [blame] | 192 | Load32Disp(TargetReg(kSp), dest_v_reg_offset, rl_result.reg); |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 193 | |
Maxim Kazantsev | 51a80d7 | 2014-03-06 11:33:26 +0700 | [diff] [blame] | 194 | StoreFinalValue(rl_dest, rl_result); |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 195 | } |
| 196 | } |
| 197 | } |
| 198 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 199 | void X86Mir2Lir::GenConversion(Instruction::Code opcode, RegLocation rl_dest, |
| 200 | RegLocation rl_src) { |
| 201 | RegisterClass rcSrc = kFPReg; |
| 202 | X86OpCode op = kX86Nop; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 203 | RegLocation rl_result; |
| 204 | switch (opcode) { |
| 205 | case Instruction::INT_TO_FLOAT: |
| 206 | rcSrc = kCoreReg; |
| 207 | op = kX86Cvtsi2ssRR; |
| 208 | break; |
| 209 | case Instruction::DOUBLE_TO_FLOAT: |
| 210 | rcSrc = kFPReg; |
| 211 | op = kX86Cvtsd2ssRR; |
| 212 | break; |
| 213 | case Instruction::FLOAT_TO_DOUBLE: |
| 214 | rcSrc = kFPReg; |
| 215 | op = kX86Cvtss2sdRR; |
| 216 | break; |
| 217 | case Instruction::INT_TO_DOUBLE: |
| 218 | rcSrc = kCoreReg; |
| 219 | op = kX86Cvtsi2sdRR; |
| 220 | break; |
| 221 | case Instruction::FLOAT_TO_INT: { |
| 222 | rl_src = LoadValue(rl_src, kFPReg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 223 | // In case result vreg is also src vreg, break association to avoid useless copy by EvalLoc() |
| 224 | ClobberSReg(rl_dest.s_reg_low); |
| 225 | rl_result = EvalLoc(rl_dest, kCoreReg, true); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 226 | RegStorage temp_reg = AllocTempSingle(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 227 | |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 228 | LoadConstant(rl_result.reg, 0x7fffffff); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 229 | NewLIR2(kX86Cvtsi2ssRR, temp_reg.GetReg(), rl_result.reg.GetReg()); |
| 230 | NewLIR2(kX86ComissRR, rl_src.reg.GetReg(), temp_reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 231 | LIR* branch_pos_overflow = NewLIR2(kX86Jcc8, 0, kX86CondA); |
| 232 | LIR* branch_na_n = NewLIR2(kX86Jcc8, 0, kX86CondP); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 233 | NewLIR2(kX86Cvttss2siRR, rl_result.reg.GetReg(), rl_src.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 234 | LIR* branch_normal = NewLIR1(kX86Jmp8, 0); |
| 235 | branch_na_n->target = NewLIR0(kPseudoTargetLabel); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 236 | NewLIR2(kX86Xor32RR, rl_result.reg.GetReg(), rl_result.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 237 | branch_pos_overflow->target = NewLIR0(kPseudoTargetLabel); |
| 238 | branch_normal->target = NewLIR0(kPseudoTargetLabel); |
| 239 | StoreValue(rl_dest, rl_result); |
| 240 | return; |
| 241 | } |
| 242 | case Instruction::DOUBLE_TO_INT: { |
| 243 | rl_src = LoadValueWide(rl_src, kFPReg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 244 | // In case result vreg is also src vreg, break association to avoid useless copy by EvalLoc() |
| 245 | ClobberSReg(rl_dest.s_reg_low); |
| 246 | rl_result = EvalLoc(rl_dest, kCoreReg, true); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 247 | RegStorage temp_reg = AllocTempDouble(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 248 | |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 249 | LoadConstant(rl_result.reg, 0x7fffffff); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 250 | NewLIR2(kX86Cvtsi2sdRR, temp_reg.GetReg(), rl_result.reg.GetReg()); |
| 251 | NewLIR2(kX86ComisdRR, rl_src.reg.GetReg(), temp_reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 252 | LIR* branch_pos_overflow = NewLIR2(kX86Jcc8, 0, kX86CondA); |
| 253 | LIR* branch_na_n = NewLIR2(kX86Jcc8, 0, kX86CondP); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 254 | NewLIR2(kX86Cvttsd2siRR, rl_result.reg.GetReg(), rl_src.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 255 | LIR* branch_normal = NewLIR1(kX86Jmp8, 0); |
| 256 | branch_na_n->target = NewLIR0(kPseudoTargetLabel); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 257 | NewLIR2(kX86Xor32RR, rl_result.reg.GetReg(), rl_result.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 258 | branch_pos_overflow->target = NewLIR0(kPseudoTargetLabel); |
| 259 | branch_normal->target = NewLIR0(kPseudoTargetLabel); |
| 260 | StoreValue(rl_dest, rl_result); |
| 261 | return; |
| 262 | } |
| 263 | case Instruction::LONG_TO_DOUBLE: |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 264 | GenLongToFP(rl_dest, rl_src, true /* is_double */); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 265 | return; |
| 266 | case Instruction::LONG_TO_FLOAT: |
Razvan A Lupusoru | 614c2b4 | 2014-01-28 17:05:21 -0800 | [diff] [blame] | 267 | GenLongToFP(rl_dest, rl_src, false /* is_double */); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 268 | return; |
| 269 | case Instruction::FLOAT_TO_LONG: |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 270 | GenConversionCall(QUICK_ENTRYPOINT_OFFSET(4, pF2l), rl_dest, rl_src); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 271 | return; |
| 272 | case Instruction::DOUBLE_TO_LONG: |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 273 | GenConversionCall(QUICK_ENTRYPOINT_OFFSET(4, pD2l), rl_dest, rl_src); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 274 | return; |
| 275 | default: |
| 276 | LOG(INFO) << "Unexpected opcode: " << opcode; |
| 277 | } |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 278 | // At this point, target will be either float or double. |
| 279 | DCHECK(rl_dest.fp); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 280 | if (rl_src.wide) { |
| 281 | rl_src = LoadValueWide(rl_src, rcSrc); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 282 | } else { |
| 283 | rl_src = LoadValue(rl_src, rcSrc); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 284 | } |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 285 | rl_result = EvalLoc(rl_dest, kFPReg, true); |
| 286 | NewLIR2(op, rl_result.reg.GetReg(), rl_src.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 287 | if (rl_dest.wide) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 288 | StoreValueWide(rl_dest, rl_result); |
| 289 | } else { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 290 | StoreValue(rl_dest, rl_result); |
| 291 | } |
| 292 | } |
| 293 | |
| 294 | void X86Mir2Lir::GenCmpFP(Instruction::Code code, RegLocation rl_dest, |
| 295 | RegLocation rl_src1, RegLocation rl_src2) { |
| 296 | bool single = (code == Instruction::CMPL_FLOAT) || (code == Instruction::CMPG_FLOAT); |
| 297 | bool unordered_gt = (code == Instruction::CMPG_DOUBLE) || (code == Instruction::CMPG_FLOAT); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 298 | if (single) { |
| 299 | rl_src1 = LoadValue(rl_src1, kFPReg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 300 | rl_src2 = LoadValue(rl_src2, kFPReg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 301 | } else { |
| 302 | rl_src1 = LoadValueWide(rl_src1, kFPReg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 303 | rl_src2 = LoadValueWide(rl_src2, kFPReg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 304 | } |
| 305 | // In case result vreg is also src vreg, break association to avoid useless copy by EvalLoc() |
| 306 | ClobberSReg(rl_dest.s_reg_low); |
| 307 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 308 | LoadConstantNoClobber(rl_result.reg, unordered_gt ? 1 : 0); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 309 | if (single) { |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 310 | NewLIR2(kX86UcomissRR, rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 311 | } else { |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 312 | NewLIR2(kX86UcomisdRR, rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 313 | } |
| 314 | LIR* branch = NULL; |
| 315 | if (unordered_gt) { |
| 316 | branch = NewLIR2(kX86Jcc8, 0, kX86CondPE); |
| 317 | } |
| 318 | // If the result reg can't be byte accessed, use a jump and move instead of a set. |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 319 | if (rl_result.reg.GetReg() >= rs_rX86_SP.GetReg()) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 320 | LIR* branch2 = NULL; |
| 321 | if (unordered_gt) { |
| 322 | branch2 = NewLIR2(kX86Jcc8, 0, kX86CondA); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 323 | NewLIR2(kX86Mov32RI, rl_result.reg.GetReg(), 0x0); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 324 | } else { |
| 325 | branch2 = NewLIR2(kX86Jcc8, 0, kX86CondBe); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 326 | NewLIR2(kX86Mov32RI, rl_result.reg.GetReg(), 0x1); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 327 | } |
| 328 | branch2->target = NewLIR0(kPseudoTargetLabel); |
| 329 | } else { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 330 | NewLIR2(kX86Set8R, rl_result.reg.GetReg(), kX86CondA /* above - unsigned > */); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 331 | } |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 332 | NewLIR2(kX86Sbb32RI, rl_result.reg.GetReg(), 0); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 333 | if (unordered_gt) { |
| 334 | branch->target = NewLIR0(kPseudoTargetLabel); |
| 335 | } |
| 336 | StoreValue(rl_dest, rl_result); |
| 337 | } |
| 338 | |
| 339 | void X86Mir2Lir::GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, |
| 340 | bool is_double) { |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 341 | LIR* taken = &block_label_list_[bb->taken]; |
| 342 | LIR* not_taken = &block_label_list_[bb->fall_through]; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 343 | LIR* branch = NULL; |
| 344 | RegLocation rl_src1; |
| 345 | RegLocation rl_src2; |
| 346 | if (is_double) { |
| 347 | rl_src1 = mir_graph_->GetSrcWide(mir, 0); |
| 348 | rl_src2 = mir_graph_->GetSrcWide(mir, 2); |
| 349 | rl_src1 = LoadValueWide(rl_src1, kFPReg); |
| 350 | rl_src2 = LoadValueWide(rl_src2, kFPReg); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 351 | NewLIR2(kX86UcomisdRR, rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 352 | } else { |
| 353 | rl_src1 = mir_graph_->GetSrc(mir, 0); |
| 354 | rl_src2 = mir_graph_->GetSrc(mir, 1); |
| 355 | rl_src1 = LoadValue(rl_src1, kFPReg); |
| 356 | rl_src2 = LoadValue(rl_src2, kFPReg); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 357 | NewLIR2(kX86UcomissRR, rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 358 | } |
Vladimir Marko | a894607 | 2014-01-22 10:30:44 +0000 | [diff] [blame] | 359 | ConditionCode ccode = mir->meta.ccode; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 360 | switch (ccode) { |
| 361 | case kCondEq: |
| 362 | if (!gt_bias) { |
| 363 | branch = NewLIR2(kX86Jcc8, 0, kX86CondPE); |
| 364 | branch->target = not_taken; |
| 365 | } |
| 366 | break; |
| 367 | case kCondNe: |
| 368 | if (!gt_bias) { |
| 369 | branch = NewLIR2(kX86Jcc8, 0, kX86CondPE); |
| 370 | branch->target = taken; |
| 371 | } |
| 372 | break; |
| 373 | case kCondLt: |
| 374 | if (gt_bias) { |
| 375 | branch = NewLIR2(kX86Jcc8, 0, kX86CondPE); |
| 376 | branch->target = not_taken; |
| 377 | } |
Vladimir Marko | 58af1f9 | 2013-12-19 13:31:15 +0000 | [diff] [blame] | 378 | ccode = kCondUlt; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 379 | break; |
| 380 | case kCondLe: |
| 381 | if (gt_bias) { |
| 382 | branch = NewLIR2(kX86Jcc8, 0, kX86CondPE); |
| 383 | branch->target = not_taken; |
| 384 | } |
| 385 | ccode = kCondLs; |
| 386 | break; |
| 387 | case kCondGt: |
| 388 | if (gt_bias) { |
| 389 | branch = NewLIR2(kX86Jcc8, 0, kX86CondPE); |
| 390 | branch->target = taken; |
| 391 | } |
| 392 | ccode = kCondHi; |
| 393 | break; |
| 394 | case kCondGe: |
| 395 | if (gt_bias) { |
| 396 | branch = NewLIR2(kX86Jcc8, 0, kX86CondPE); |
| 397 | branch->target = taken; |
| 398 | } |
Vladimir Marko | 58af1f9 | 2013-12-19 13:31:15 +0000 | [diff] [blame] | 399 | ccode = kCondUge; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 400 | break; |
| 401 | default: |
| 402 | LOG(FATAL) << "Unexpected ccode: " << ccode; |
| 403 | } |
| 404 | OpCondBranch(ccode, taken); |
| 405 | } |
| 406 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 407 | void X86Mir2Lir::GenNegFloat(RegLocation rl_dest, RegLocation rl_src) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 408 | RegLocation rl_result; |
| 409 | rl_src = LoadValue(rl_src, kCoreReg); |
| 410 | rl_result = EvalLoc(rl_dest, kCoreReg, true); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 411 | OpRegRegImm(kOpAdd, rl_result.reg, rl_src.reg, 0x80000000); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 412 | StoreValue(rl_dest, rl_result); |
| 413 | } |
| 414 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 415 | void X86Mir2Lir::GenNegDouble(RegLocation rl_dest, RegLocation rl_src) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 416 | RegLocation rl_result; |
| 417 | rl_src = LoadValueWide(rl_src, kCoreReg); |
| 418 | rl_result = EvalLoc(rl_dest, kCoreReg, true); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 419 | OpRegRegImm(kOpAdd, rl_result.reg.GetHigh(), rl_src.reg.GetHigh(), 0x80000000); |
| 420 | OpRegCopy(rl_result.reg, rl_src.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 421 | StoreValueWide(rl_dest, rl_result); |
| 422 | } |
| 423 | |
| 424 | bool X86Mir2Lir::GenInlinedSqrt(CallInfo* info) { |
Mark Mendell | bff1ef0 | 2013-12-13 13:47:34 -0800 | [diff] [blame] | 425 | RegLocation rl_src = info->args[0]; |
| 426 | RegLocation rl_dest = InlineTargetWide(info); // double place for result |
| 427 | rl_src = LoadValueWide(rl_src, kFPReg); |
| 428 | RegLocation rl_result = EvalLoc(rl_dest, kFPReg, true); |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 429 | NewLIR2(kX86SqrtsdRR, rl_result.reg.GetReg(), rl_src.reg.GetReg()); |
Mark Mendell | bff1ef0 | 2013-12-13 13:47:34 -0800 | [diff] [blame] | 430 | StoreValueWide(rl_dest, rl_result); |
| 431 | return true; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 432 | } |
| 433 | |
| 434 | |
| 435 | |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 436 | } // namespace art |