| Douglas Leung | 200f040 | 2016-02-25 20:05:47 -0800 | [diff] [blame] | 1 | %default {"preinstr":"", "ld_arg":"LOAD64_F(fa0, fa0f, a3)", "st_result":"SET_VREG64_F(fv0, fv0f, rOBJ)"} |
| 2 | /* |
| 3 | * Generic 64-bit unary operation. Provide an "instr" line that |
| 4 | * specifies an instruction that performs "result = op a0/a1". |
| 5 | * This could be a MIPS instruction or a function call. |
| 6 | * |
| 7 | * long-to-double, double-to-long |
| 8 | */ |
| 9 | /* unop vA, vB */ |
| 10 | GET_OPA4(rOBJ) # t1 <- A+ |
| 11 | GET_OPB(a3) # a3 <- B |
| 12 | EAS2(a3, rFP, a3) # a3 <- &fp[B] |
| 13 | $ld_arg |
| 14 | FETCH_ADVANCE_INST(1) # advance rPC, load rINST |
| 15 | $preinstr # optional op |
| 16 | $instr # a0/a1 <- op, a2-a3 changed |
| 17 | |
| 18 | .L${opcode}_set_vreg: |
| 19 | $st_result # vAA <- a0/a1 |
| 20 | GET_INST_OPCODE(t0) # extract opcode from rINST |
| 21 | GOTO_OPCODE(t0) # jump to next instruction |
| 22 | /* 12-13 instructions */ |