Douglas Leung | 200f040 | 2016-02-25 20:05:47 -0800 | [diff] [blame] | 1 | %default {"st_result":"SET_VREG64_F(fv0, fv0f, rOBJ)"} |
| 2 | /* |
| 3 | * Generic 32bit-to-64bit unary operation. Provide an "instr" line |
| 4 | * that specifies an instruction that performs "result = op a0", where |
| 5 | * "result" is a 64-bit quantity in a0/a1. |
| 6 | * |
| 7 | * For: int-to-double, float-to-long, float-to-double |
| 8 | */ |
| 9 | /* unop vA, vB */ |
| 10 | GET_OPA4(rOBJ) # rOBJ <- A+ |
| 11 | GET_OPB(a3) # a3 <- B |
| 12 | GET_VREG_F(fa0, a3) |
| 13 | FETCH_ADVANCE_INST(1) # advance rPC, load rINST |
| 14 | $instr |
| 15 | |
| 16 | .L${opcode}_set_vreg: |
| 17 | $st_result # vA/vA+1 <- a0/a1 |
| 18 | GET_INST_OPCODE(t0) # extract opcode from rINST |
| 19 | GOTO_OPCODE(t0) # jump to next instruction |