| Douglas Leung | 200f040 | 2016-02-25 20:05:47 -0800 | [diff] [blame] | 1 | /* move-wide/16 vAAAA, vBBBB */ |
| 2 | /* NOTE: regs can overlap, e.g. "move v6, v7" or "move v7, v6" */ | ||||
| 3 | FETCH(a3, 2) # a3 <- BBBB | ||||
| 4 | FETCH(a2, 1) # a2 <- AAAA | ||||
| 5 | EAS2(a3, rFP, a3) # a3 <- &fp[BBBB] | ||||
| 6 | LOAD64(a0, a1, a3) # a0/a1 <- fp[BBBB] | ||||
| 7 | FETCH_ADVANCE_INST(3) # advance rPC, load rINST | ||||
| 8 | SET_VREG64(a0, a1, a2) # fp[AAAA] <- a0/a1 | ||||
| 9 | GET_INST_OPCODE(t0) # extract opcode from rINST | ||||
| 10 | GOTO_OPCODE(t0) # jump to next instruction | ||||