Douglas Leung | 200f040 | 2016-02-25 20:05:47 -0800 | [diff] [blame] | 1 | /* |
| 2 | * See op_mul_long.S for more details |
| 3 | */ |
| 4 | /* mul-long/2addr vA, vB */ |
| 5 | GET_OPA4(rOBJ) # rOBJ <- A+ |
| 6 | |
| 7 | EAS2(t0, rFP, rOBJ) # t0 <- &fp[A] |
| 8 | LOAD64(a0, a1, t0) # vAA.low / high |
| 9 | |
| 10 | GET_OPB(t1) # t1 <- B |
| 11 | EAS2(t1, rFP, t1) # t1 <- &fp[B] |
| 12 | LOAD64(a2, a3, t1) # vBB.low / high |
| 13 | |
| 14 | mul v1, a3, a0 # v1= a3a0 |
| 15 | #ifdef MIPS32REVGE6 |
| 16 | mulu v0, a2, a0 # v0= a2a0 |
| 17 | muhu t1, a2, a0 |
| 18 | #else |
| 19 | multu a2, a0 |
| 20 | mfhi t1 |
| 21 | mflo v0 # v0= a2a0 |
| 22 | #endif |
| 23 | mul t2, a2, a1 # t2= a2a1 |
| 24 | addu v1, v1, t1 # v1= a3a0 + hi(a2a0) |
| 25 | addu v1, v1, t2 # v1= v1 + a2a1; |
| 26 | |
| 27 | FETCH_ADVANCE_INST(1) # advance rPC, load rINST |
| 28 | GET_INST_OPCODE(t1) # extract opcode from rINST |
| 29 | # vAA <- v0 (low) |
| 30 | SET_VREG64(v0, v1, rOBJ) # vAA+1 <- v1 (high) |
| 31 | GOTO_OPCODE(t1) # jump to next instruction |