Douglas Leung | 200f040 | 2016-02-25 20:05:47 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Long integer shift, 2addr version. vA is 64-bit value/result, vB is |
| 3 | * 32-bit shift distance. |
| 4 | */ |
| 5 | /* ushr-long/2addr vA, vB */ |
| 6 | GET_OPA4(t3) # t3 <- A+ |
| 7 | GET_OPB(a3) # a3 <- B |
| 8 | GET_VREG(a2, a3) # a2 <- vB |
| 9 | EAS2(t0, rFP, t3) # t0 <- &fp[A] |
| 10 | LOAD64(a0, a1, t0) # a0/a1 <- vAA/vAA+1 |
| 11 | |
| 12 | FETCH_ADVANCE_INST(1) # advance rPC, load rINST |
| 13 | GET_INST_OPCODE(t0) # extract opcode from rINST |
| 14 | |
| 15 | andi v0, a2, 0x20 # shift & 0x20 |
| 16 | srl v1, a1, a2 # rhi<- ahi >> (shift&31) |
| 17 | bnez v0, .L${opcode}_finish |
| 18 | srl v0, a0, a2 # rlo<- alo >> (shift&31) |
| 19 | not a0, a2 # alo<- 31-n (shift is 5b) |
| 20 | sll a1, 1 |
| 21 | sll a1, a0 # ahi<- ahi << (32-(shift&31)) |
| 22 | or v0, a1 # rlo<- rlo | ahi |
| 23 | SET_VREG64_GOTO(v0, v1, t3, t0) # vAA/vAA+1 <- a0/a1 |
| 24 | %break |
| 25 | |
| 26 | .L${opcode}_finish: |
| 27 | SET_VREG64_GOTO(v1, zero, t3, t0) # vAA/vAA+1 <- rlo/rhi |