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Elliott Hughes5ea047b2011-09-13 14:38:18 -07001/*
2 * Copyright (C) 2010 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "atomic.h"
18
19#include <sched.h>
20
21namespace art {
22
23/*
24 * Quasi-atomic 64-bit operations, for platforms that lack the real thing.
25 *
26 * TODO: unify ARMv6/x86/sh implementations using the to-be-written
27 * spin lock implementation. We don't want to rely on mutex innards,
28 * and it would be great if all platforms were running the same code.
29 */
30
31#if defined(HAVE_MACOSX_IPC)
32
33#include <libkern/OSAtomic.h>
34
35#if defined(__ppc__) \
36 || defined(__PPC__) \
37 || defined(__powerpc__) \
38 || defined(__powerpc) \
39 || defined(__POWERPC__) \
40 || defined(_M_PPC) \
41 || defined(__PPC)
42#define NEED_QUASIATOMICS 1
43#else
44
45int QuasiAtomicCas64(int64_t old_value, int64_t new_value, volatile int64_t* addr) {
46 return OSAtomicCompareAndSwap64Barrier(old_value, new_value, (int64_t*)addr) == 0;
47}
48
49int64_t QuasiAtomicSwap64(int64_t value, volatile int64_t* addr) {
50 int64_t oldValue;
51 do {
52 oldValue = *addr;
53 } while (QuasiAtomicCas64(oldValue, value, addr));
54 return oldValue;
55}
56
57int64_t QuasiAtomicRead64(volatile const int64_t* addr) {
58 return OSAtomicAdd64Barrier(0, addr);
59}
60#endif
61
62#elif defined(__i386__) || defined(__x86_64__)
63#define NEED_QUASIATOMICS 1
64
65#elif __arm__
66#include <machine/cpu-features.h>
67
68#ifdef __ARM_HAVE_LDREXD
69int64_t QuasiAtomicSwap64(int64_t new_value, volatile int64_t* addr) {
70 int64_t prev;
71 int status;
72 do {
73 __asm__ __volatile__ ("@ QuasiAtomicSwap64\n"
74 "ldrexd %0, %H0, [%3]\n"
75 "strexd %1, %4, %H4, [%3]"
76 : "=&r" (prev), "=&r" (status), "+m"(*addr)
77 : "r" (addr), "r" (new_value)
78 : "cc");
79 } while (__builtin_expect(status != 0, 0));
80 return prev;
81}
82
83int QuasiAtomicCas64(int64_t old_value, int64_t new_value, volatile int64_t* addr) {
84 int64_t prev;
85 int status;
86 do {
87 __asm__ __volatile__ ("@ QuasiAtomicCas64\n"
88 "ldrexd %0, %H0, [%3]\n"
89 "mov %1, #0\n"
90 "teq %0, %4\n"
91 "teqeq %H0, %H4\n"
92 "strexdeq %1, %5, %H5, [%3]"
93 : "=&r" (prev), "=&r" (status), "+m"(*addr)
94 : "r" (addr), "Ir" (old_value), "r" (new_value)
95 : "cc");
96 } while (__builtin_expect(status != 0, 0));
97 return prev != old_value;
98}
99
100int64_t QuasiAtomicRead64(volatile const int64_t* addr) {
101 int64_t value;
102 __asm__ __volatile__ ("@ QuasiAtomicRead64\n"
103 "ldrexd %0, %H0, [%1]"
104 : "=&r" (value)
105 : "r" (addr));
106 return value;
107}
108
109#else
110
111// on the device, we implement the 64-bit atomic operations through
112// mutex locking. normally, this is bad because we must initialize
113// a pthread_mutex_t before being able to use it, and this means
114// having to do an initialization check on each function call, and
115// that's where really ugly things begin...
116//
117// BUT, as a special twist, we take advantage of the fact that in our
118// pthread library, a mutex is simply a volatile word whose value is always
119// initialized to 0. In other words, simply declaring a static mutex
120// object initializes it !
121//
122// another twist is that we use a small array of mutexes to dispatch
123// the contention locks from different memory addresses
124//
125
126#include <pthread.h>
127
128#define SWAP_LOCK_COUNT 32U
129static pthread_mutex_t _swap_locks[SWAP_LOCK_COUNT];
130
131#define SWAP_LOCK(addr) &_swap_locks[((unsigned)(void*)(addr) >> 3U) % SWAP_LOCK_COUNT]
132
133int64_t QuasiAtomicSwap64(int64_t value, volatile int64_t* addr) {
134 pthread_mutex_t* lock = SWAP_LOCK(addr);
135
136 pthread_mutex_lock(lock);
137
138 int64_t oldValue = *addr;
139 *addr = value;
140
141 pthread_mutex_unlock(lock);
142 return oldValue;
143}
144
145int QuasiAtomicCas64(int64_t old_value, int64_t new_value, volatile int64_t* addr) {
146 int result;
147 pthread_mutex_t* lock = SWAP_LOCK(addr);
148
149 pthread_mutex_lock(lock);
150
151 if (*addr == old_value) {
152 *addr = new_value;
153 result = 0;
154 } else {
155 result = 1;
156 }
157 pthread_mutex_unlock(lock);
158 return result;
159}
160
161int64_t QuasiAtomicRead64(volatile const int64_t* addr) {
162 int64_t result;
163 pthread_mutex_t* lock = SWAP_LOCK(addr);
164
165 pthread_mutex_lock(lock);
166 result = *addr;
167 pthread_mutex_unlock(lock);
168 return result;
169}
170
171#endif /*__ARM_HAVE_LDREXD*/
172
173/*****************************************************************************/
174#elif __sh__
175#define NEED_QUASIATOMICS 1
176
177#else
178#error "Unsupported atomic operations for this platform"
179#endif
180
181
182#if NEED_QUASIATOMICS
183
184/* Note that a spinlock is *not* a good idea in general
185 * since they can introduce subtle issues. For example,
186 * a real-time thread trying to acquire a spinlock already
187 * acquired by another thread will never yeld, making the
188 * CPU loop endlessly!
189 *
190 * However, this code is only used on the Linux simulator
191 * so it's probably ok for us.
192 *
193 * The alternative is to use a pthread mutex, but
194 * these must be initialized before being used, and
195 * then you have the problem of lazily initializing
196 * a mutex without any other synchronization primitive.
197 *
198 * TODO: these currently use sched_yield(), which is not guaranteed to
199 * do anything at all. We need to use dvmIterativeSleep or a wait /
200 * notify mechanism if the initial attempt fails.
201 */
202
203/* global spinlock for all 64-bit quasiatomic operations */
204static int32_t quasiatomic_spinlock = 0;
205
206int QuasiAtomicCas64(int64_t old_value, int64_t new_value, volatile int64_t* addr) {
207 int result;
208
209 while (android_atomic_acquire_cas(0, 1, &quasiatomic_spinlock)) {
210#ifdef HAVE_WIN32_THREADS
211 Sleep(0);
212#else
213 sched_yield();
214#endif
215 }
216
217 if (*addr == old_value) {
218 *addr = new_value;
219 result = 0;
220 } else {
221 result = 1;
222 }
223
224 android_atomic_release_store(0, &quasiatomic_spinlock);
225
226 return result;
227}
228
229int64_t QuasiAtomicRead64(volatile const int64_t* addr) {
230 int64_t result;
231
232 while (android_atomic_acquire_cas(0, 1, &quasiatomic_spinlock)) {
233#ifdef HAVE_WIN32_THREADS
234 Sleep(0);
235#else
236 sched_yield();
237#endif
238 }
239
240 result = *addr;
241 android_atomic_release_store(0, &quasiatomic_spinlock);
242
243 return result;
244}
245
246int64_t QuasiAtomicSwap64(int64_t value, volatile int64_t* addr) {
247 int64_t result;
248
249 while (android_atomic_acquire_cas(0, 1, &quasiatomic_spinlock)) {
250#ifdef HAVE_WIN32_THREADS
251 Sleep(0);
252#else
253 sched_yield();
254#endif
255 }
256
257 result = *addr;
258 *addr = value;
259 android_atomic_release_store(0, &quasiatomic_spinlock);
260
261 return result;
262}
263
264#endif /*NEED_QUASIATOMICS*/
265
266} // namespace art