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buzbee67bf8852011-08-17 17:51:35 -07001/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "Dalvik.h"
18#include "Dataflow.h"
19//#include "libdex/DexOpcodes.h"
20
21/*
22 * Main table containing data flow attributes for each bytecode. The
23 * first kNumPackedOpcodes entries are for Dalvik bytecode
24 * instructions, where extended opcode at the MIR level are appended
25 * afterwards.
26 *
27 * TODO - many optimization flags are incomplete - they will only limit the
28 * scope of optimizations but will not cause mis-optimizations.
29 */
30int oatDataFlowAttributes[kMirOpLast] = {
31 // 00 OP_NOP
32 DF_NOP,
33
34 // 01 OP_MOVE vA, vB
35 DF_DA | DF_UB | DF_IS_MOVE,
36
37 // 02 OP_MOVE_FROM16 vAA, vBBBB
38 DF_DA | DF_UB | DF_IS_MOVE,
39
40 // 03 OP_MOVE_16 vAAAA, vBBBB
41 DF_DA | DF_UB | DF_IS_MOVE,
42
43 // 04 OP_MOVE_WIDE vA, vB
44 DF_DA_WIDE | DF_UB_WIDE | DF_IS_MOVE,
45
46 // 05 OP_MOVE_WIDE_FROM16 vAA, vBBBB
47 DF_DA_WIDE | DF_UB_WIDE | DF_IS_MOVE,
48
49 // 06 OP_MOVE_WIDE_16 vAAAA, vBBBB
50 DF_DA_WIDE | DF_UB_WIDE | DF_IS_MOVE,
51
52 // 07 OP_MOVE_OBJECT vA, vB
buzbee43a36422011-09-14 14:00:13 -070053 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -070054
55 // 08 OP_MOVE_OBJECT_FROM16 vAA, vBBBB
buzbee43a36422011-09-14 14:00:13 -070056 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -070057
58 // 09 OP_MOVE_OBJECT_16 vAAAA, vBBBB
buzbee43a36422011-09-14 14:00:13 -070059 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -070060
61 // 0A OP_MOVE_RESULT vAA
62 DF_DA,
63
64 // 0B OP_MOVE_RESULT_WIDE vAA
65 DF_DA_WIDE,
66
67 // 0C OP_MOVE_RESULT_OBJECT vAA
68 DF_DA,
69
70 // 0D OP_MOVE_EXCEPTION vAA
71 DF_DA,
72
73 // 0E OP_RETURN_VOID
74 DF_NOP,
75
76 // 0F OP_RETURN vAA
77 DF_UA,
78
79 // 10 OP_RETURN_WIDE vAA
80 DF_UA_WIDE,
81
82 // 11 OP_RETURN_OBJECT vAA
83 DF_UA,
84
85 // 12 OP_CONST_4 vA, #+B
86 DF_DA | DF_SETS_CONST,
87
88 // 13 OP_CONST_16 vAA, #+BBBB
89 DF_DA | DF_SETS_CONST,
90
91 // 14 OP_CONST vAA, #+BBBBBBBB
92 DF_DA | DF_SETS_CONST,
93
94 // 15 OP_CONST_HIGH16 VAA, #+BBBB0000
95 DF_DA | DF_SETS_CONST,
96
97 // 16 OP_CONST_WIDE_16 vAA, #+BBBB
98 DF_DA_WIDE | DF_SETS_CONST,
99
100 // 17 OP_CONST_WIDE_32 vAA, #+BBBBBBBB
101 DF_DA_WIDE | DF_SETS_CONST,
102
103 // 18 OP_CONST_WIDE vAA, #+BBBBBBBBBBBBBBBB
104 DF_DA_WIDE | DF_SETS_CONST,
105
106 // 19 OP_CONST_WIDE_HIGH16 vAA, #+BBBB000000000000
107 DF_DA_WIDE | DF_SETS_CONST,
108
109 // 1A OP_CONST_STRING vAA, string@BBBB
110 DF_DA,
111
112 // 1B OP_CONST_STRING_JUMBO vAA, string@BBBBBBBB
113 DF_DA,
114
115 // 1C OP_CONST_CLASS vAA, type@BBBB
116 DF_DA,
117
118 // 1D OP_MONITOR_ENTER vAA
buzbee43a36422011-09-14 14:00:13 -0700119 DF_UA | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700120
121 // 1E OP_MONITOR_EXIT vAA
buzbee43a36422011-09-14 14:00:13 -0700122 DF_UA | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700123
buzbee43a36422011-09-14 14:00:13 -0700124 // 1F OP_CHK_CAST vAA, type@BBBB
buzbee67bf8852011-08-17 17:51:35 -0700125 DF_UA,
126
127 // 20 OP_INSTANCE_OF vA, vB, type@CCCC
128 DF_DA | DF_UB,
129
130 // 21 OP_ARRAY_LENGTH vA, vB
buzbee43a36422011-09-14 14:00:13 -0700131 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700132
133 // 22 OP_NEW_INSTANCE vAA, type@BBBB
buzbee43a36422011-09-14 14:00:13 -0700134 DF_DA | DF_NON_NULL_DST,
buzbee67bf8852011-08-17 17:51:35 -0700135
136 // 23 OP_NEW_ARRAY vA, vB, type@CCCC
buzbee43a36422011-09-14 14:00:13 -0700137 DF_DA | DF_UB | DF_NON_NULL_DST,
buzbee67bf8852011-08-17 17:51:35 -0700138
139 // 24 OP_FILLED_NEW_ARRAY {vD, vE, vF, vG, vA}
buzbee43a36422011-09-14 14:00:13 -0700140 DF_FORMAT_35C | DF_NON_NULL_RET,
buzbee67bf8852011-08-17 17:51:35 -0700141
142 // 25 OP_FILLED_NEW_ARRAY_RANGE {vCCCC .. vNNNN}, type@BBBB
buzbee43a36422011-09-14 14:00:13 -0700143 DF_FORMAT_3RC | DF_NON_NULL_RET,
buzbee67bf8852011-08-17 17:51:35 -0700144
145 // 26 OP_FILL_ARRAY_DATA vAA, +BBBBBBBB
146 DF_UA,
147
148 // 27 OP_THROW vAA
149 DF_UA,
150
151 // 28 OP_GOTO
152 DF_NOP,
153
154 // 29 OP_GOTO_16
155 DF_NOP,
156
157 // 2A OP_GOTO_32
158 DF_NOP,
159
160 // 2B OP_PACKED_SWITCH vAA, +BBBBBBBB
161 DF_UA,
162
163 // 2C OP_SPARSE_SWITCH vAA, +BBBBBBBB
164 DF_UA,
165
166 // 2D OP_CMPL_FLOAT vAA, vBB, vCC
167 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C,
168
169 // 2E OP_CMPG_FLOAT vAA, vBB, vCC
170 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C,
171
172 // 2F OP_CMPL_DOUBLE vAA, vBB, vCC
173 DF_DA | DF_UB_WIDE | DF_UC_WIDE | DF_FP_B | DF_FP_C,
174
175 // 30 OP_CMPG_DOUBLE vAA, vBB, vCC
176 DF_DA | DF_UB_WIDE | DF_UC_WIDE | DF_FP_B | DF_FP_C,
177
178 // 31 OP_CMP_LONG vAA, vBB, vCC
179 DF_DA | DF_UB_WIDE | DF_UC_WIDE,
180
181 // 32 OP_IF_EQ vA, vB, +CCCC
182 DF_UA | DF_UB,
183
184 // 33 OP_IF_NE vA, vB, +CCCC
185 DF_UA | DF_UB,
186
187 // 34 OP_IF_LT vA, vB, +CCCC
188 DF_UA | DF_UB,
189
190 // 35 OP_IF_GE vA, vB, +CCCC
191 DF_UA | DF_UB,
192
193 // 36 OP_IF_GT vA, vB, +CCCC
194 DF_UA | DF_UB,
195
196 // 37 OP_IF_LE vA, vB, +CCCC
197 DF_UA | DF_UB,
198
199
200 // 38 OP_IF_EQZ vAA, +BBBB
201 DF_UA,
202
203 // 39 OP_IF_NEZ vAA, +BBBB
204 DF_UA,
205
206 // 3A OP_IF_LTZ vAA, +BBBB
207 DF_UA,
208
209 // 3B OP_IF_GEZ vAA, +BBBB
210 DF_UA,
211
212 // 3C OP_IF_GTZ vAA, +BBBB
213 DF_UA,
214
215 // 3D OP_IF_LEZ vAA, +BBBB
216 DF_UA,
217
218 // 3E OP_UNUSED_3E
219 DF_NOP,
220
221 // 3F OP_UNUSED_3F
222 DF_NOP,
223
224 // 40 OP_UNUSED_40
225 DF_NOP,
226
227 // 41 OP_UNUSED_41
228 DF_NOP,
229
230 // 42 OP_UNUSED_42
231 DF_NOP,
232
233 // 43 OP_UNUSED_43
234 DF_NOP,
235
236 // 44 OP_AGET vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700237 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700238
239 // 45 OP_AGET_WIDE vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700240 DF_DA_WIDE | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700241
242 // 46 OP_AGET_OBJECT vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700243 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700244
245 // 47 OP_AGET_BOOLEAN vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700246 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700247
248 // 48 OP_AGET_BYTE vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700249 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700250
251 // 49 OP_AGET_CHAR vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700252 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700253
254 // 4A OP_AGET_SHORT vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700255 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700256
257 // 4B OP_APUT vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700258 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700259
260 // 4C OP_APUT_WIDE vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700261 DF_UA_WIDE | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700262
263 // 4D OP_APUT_OBJECT vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700264 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700265
266 // 4E OP_APUT_BOOLEAN vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700267 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700268
269 // 4F OP_APUT_BYTE vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700270 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700271
272 // 50 OP_APUT_CHAR vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700273 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700274
275 // 51 OP_APUT_SHORT vAA, vBB, vCC
buzbee43a36422011-09-14 14:00:13 -0700276 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700277
278 // 52 OP_IGET vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700279 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700280
281 // 53 OP_IGET_WIDE vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700282 DF_DA_WIDE | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700283
284 // 54 OP_IGET_OBJECT vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700285 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700286
287 // 55 OP_IGET_BOOLEAN vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700288 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700289
290 // 56 OP_IGET_BYTE vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700291 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700292
293 // 57 OP_IGET_CHAR vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700294 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700295
296 // 58 OP_IGET_SHORT vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700297 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700298
299 // 59 OP_IPUT vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700300 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700301
302 // 5A OP_IPUT_WIDE vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700303 DF_UA_WIDE | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700304
305 // 5B OP_IPUT_OBJECT vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700306 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700307
308 // 5C OP_IPUT_BOOLEAN vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700309 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700310
311 // 5D OP_IPUT_BYTE vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700312 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700313
314 // 5E OP_IPUT_CHAR vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700315 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700316
317 // 5F OP_IPUT_SHORT vA, vB, field@CCCC
buzbee43a36422011-09-14 14:00:13 -0700318 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700319
320 // 60 OP_SGET vAA, field@BBBB
321 DF_DA | DF_IS_GETTER,
322
323 // 61 OP_SGET_WIDE vAA, field@BBBB
324 DF_DA_WIDE | DF_IS_GETTER,
325
326 // 62 OP_SGET_OBJECT vAA, field@BBBB
327 DF_DA | DF_IS_GETTER,
328
329 // 63 OP_SGET_BOOLEAN vAA, field@BBBB
330 DF_DA | DF_IS_GETTER,
331
332 // 64 OP_SGET_BYTE vAA, field@BBBB
333 DF_DA | DF_IS_GETTER,
334
335 // 65 OP_SGET_CHAR vAA, field@BBBB
336 DF_DA | DF_IS_GETTER,
337
338 // 66 OP_SGET_SHORT vAA, field@BBBB
339 DF_DA | DF_IS_GETTER,
340
341 // 67 OP_SPUT vAA, field@BBBB
342 DF_UA | DF_IS_SETTER,
343
344 // 68 OP_SPUT_WIDE vAA, field@BBBB
345 DF_UA_WIDE | DF_IS_SETTER,
346
347 // 69 OP_SPUT_OBJECT vAA, field@BBBB
348 DF_UA | DF_IS_SETTER,
349
350 // 6A OP_SPUT_BOOLEAN vAA, field@BBBB
351 DF_UA | DF_IS_SETTER,
352
353 // 6B OP_SPUT_BYTE vAA, field@BBBB
354 DF_UA | DF_IS_SETTER,
355
356 // 6C OP_SPUT_CHAR vAA, field@BBBB
357 DF_UA | DF_IS_SETTER,
358
359 // 6D OP_SPUT_SHORT vAA, field@BBBB
360 DF_UA | DF_IS_SETTER,
361
362 // 6E OP_INVOKE_VIRTUAL {vD, vE, vF, vG, vA}
buzbee43a36422011-09-14 14:00:13 -0700363 DF_FORMAT_35C | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700364
365 // 6F OP_INVOKE_SUPER {vD, vE, vF, vG, vA}
buzbee43a36422011-09-14 14:00:13 -0700366 DF_FORMAT_35C | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700367
368 // 70 OP_INVOKE_DIRECT {vD, vE, vF, vG, vA}
buzbee43a36422011-09-14 14:00:13 -0700369 DF_FORMAT_35C | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700370
371 // 71 OP_INVOKE_STATIC {vD, vE, vF, vG, vA}
372 DF_FORMAT_35C,
373
374 // 72 OP_INVOKE_INTERFACE {vD, vE, vF, vG, vA}
375 DF_FORMAT_35C,
376
377 // 73 OP_UNUSED_73
378 DF_NOP,
379
380 // 74 OP_INVOKE_VIRTUAL_RANGE {vCCCC .. vNNNN}
buzbee43a36422011-09-14 14:00:13 -0700381 DF_FORMAT_3RC | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700382
383 // 75 OP_INVOKE_SUPER_RANGE {vCCCC .. vNNNN}
buzbee43a36422011-09-14 14:00:13 -0700384 DF_FORMAT_3RC | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700385
386 // 76 OP_INVOKE_DIRECT_RANGE {vCCCC .. vNNNN}
buzbee43a36422011-09-14 14:00:13 -0700387 DF_FORMAT_3RC | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700388
389 // 77 OP_INVOKE_STATIC_RANGE {vCCCC .. vNNNN}
390 DF_FORMAT_3RC,
391
392 // 78 OP_INVOKE_INTERFACE_RANGE {vCCCC .. vNNNN}
393 DF_FORMAT_3RC,
394
395 // 79 OP_UNUSED_79
396 DF_NOP,
397
398 // 7A OP_UNUSED_7A
399 DF_NOP,
400
401 // 7B OP_NEG_INT vA, vB
402 DF_DA | DF_UB,
403
404 // 7C OP_NOT_INT vA, vB
405 DF_DA | DF_UB,
406
407 // 7D OP_NEG_LONG vA, vB
408 DF_DA_WIDE | DF_UB_WIDE,
409
410 // 7E OP_NOT_LONG vA, vB
411 DF_DA_WIDE | DF_UB_WIDE,
412
413 // 7F OP_NEG_FLOAT vA, vB
414 DF_DA | DF_UB | DF_FP_A | DF_FP_B,
415
416 // 80 OP_NEG_DOUBLE vA, vB
417 DF_DA_WIDE | DF_UB_WIDE | DF_FP_A | DF_FP_B,
418
419 // 81 OP_INT_TO_LONG vA, vB
420 DF_DA_WIDE | DF_UB,
421
422 // 82 OP_INT_TO_FLOAT vA, vB
423 DF_DA | DF_UB | DF_FP_A,
424
425 // 83 OP_INT_TO_DOUBLE vA, vB
426 DF_DA_WIDE | DF_UB | DF_FP_A,
427
428 // 84 OP_LONG_TO_INT vA, vB
429 DF_DA | DF_UB_WIDE,
430
431 // 85 OP_LONG_TO_FLOAT vA, vB
432 DF_DA | DF_UB_WIDE | DF_FP_A,
433
434 // 86 OP_LONG_TO_DOUBLE vA, vB
435 DF_DA_WIDE | DF_UB_WIDE | DF_FP_A,
436
437 // 87 OP_FLOAT_TO_INT vA, vB
438 DF_DA | DF_UB | DF_FP_B,
439
440 // 88 OP_FLOAT_TO_LONG vA, vB
441 DF_DA_WIDE | DF_UB | DF_FP_B,
442
443 // 89 OP_FLOAT_TO_DOUBLE vA, vB
444 DF_DA_WIDE | DF_UB | DF_FP_A | DF_FP_B,
445
446 // 8A OP_DOUBLE_TO_INT vA, vB
447 DF_DA | DF_UB_WIDE | DF_FP_B,
448
449 // 8B OP_DOUBLE_TO_LONG vA, vB
450 DF_DA_WIDE | DF_UB_WIDE | DF_FP_B,
451
452 // 8C OP_DOUBLE_TO_FLOAT vA, vB
453 DF_DA | DF_UB_WIDE | DF_FP_A | DF_FP_B,
454
455 // 8D OP_INT_TO_BYTE vA, vB
456 DF_DA | DF_UB,
457
458 // 8E OP_INT_TO_CHAR vA, vB
459 DF_DA | DF_UB,
460
461 // 8F OP_INT_TO_SHORT vA, vB
462 DF_DA | DF_UB,
463
464 // 90 OP_ADD_INT vAA, vBB, vCC
465 DF_DA | DF_UB | DF_UC | DF_IS_LINEAR,
466
467 // 91 OP_SUB_INT vAA, vBB, vCC
468 DF_DA | DF_UB | DF_UC | DF_IS_LINEAR,
469
470 // 92 OP_MUL_INT vAA, vBB, vCC
471 DF_DA | DF_UB | DF_UC,
472
473 // 93 OP_DIV_INT vAA, vBB, vCC
474 DF_DA | DF_UB | DF_UC,
475
476 // 94 OP_REM_INT vAA, vBB, vCC
477 DF_DA | DF_UB | DF_UC,
478
479 // 95 OP_AND_INT vAA, vBB, vCC
480 DF_DA | DF_UB | DF_UC,
481
482 // 96 OP_OR_INT vAA, vBB, vCC
483 DF_DA | DF_UB | DF_UC,
484
485 // 97 OP_XOR_INT vAA, vBB, vCC
486 DF_DA | DF_UB | DF_UC,
487
488 // 98 OP_SHL_INT vAA, vBB, vCC
489 DF_DA | DF_UB | DF_UC,
490
491 // 99 OP_SHR_INT vAA, vBB, vCC
492 DF_DA | DF_UB | DF_UC,
493
494 // 9A OP_USHR_INT vAA, vBB, vCC
495 DF_DA | DF_UB | DF_UC,
496
497 // 9B OP_ADD_LONG vAA, vBB, vCC
498 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
499
500 // 9C OP_SUB_LONG vAA, vBB, vCC
501 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
502
503 // 9D OP_MUL_LONG vAA, vBB, vCC
504 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
505
506 // 9E OP_DIV_LONG vAA, vBB, vCC
507 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
508
509 // 9F OP_REM_LONG vAA, vBB, vCC
510 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
511
512 // A0 OP_AND_LONG vAA, vBB, vCC
513 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
514
515 // A1 OP_OR_LONG vAA, vBB, vCC
516 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
517
518 // A2 OP_XOR_LONG vAA, vBB, vCC
519 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE,
520
521 // A3 OP_SHL_LONG vAA, vBB, vCC
522 DF_DA_WIDE | DF_UB_WIDE | DF_UC,
523
524 // A4 OP_SHR_LONG vAA, vBB, vCC
525 DF_DA_WIDE | DF_UB_WIDE | DF_UC,
526
527 // A5 OP_USHR_LONG vAA, vBB, vCC
528 DF_DA_WIDE | DF_UB_WIDE | DF_UC,
529
530 // A6 OP_ADD_FLOAT vAA, vBB, vCC
531 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
532
533 // A7 OP_SUB_FLOAT vAA, vBB, vCC
534 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
535
536 // A8 OP_MUL_FLOAT vAA, vBB, vCC
537 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
538
539 // A9 OP_DIV_FLOAT vAA, vBB, vCC
540 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
541
542 // AA OP_REM_FLOAT vAA, vBB, vCC
543 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
544
545 // AB OP_ADD_DOUBLE vAA, vBB, vCC
546 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
547
548 // AC OP_SUB_DOUBLE vAA, vBB, vCC
549 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
550
551 // AD OP_MUL_DOUBLE vAA, vBB, vCC
552 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
553
554 // AE OP_DIV_DOUBLE vAA, vBB, vCC
555 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
556
557 // AF OP_REM_DOUBLE vAA, vBB, vCC
558 DF_DA_WIDE | DF_UB_WIDE | DF_UC_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
559
560 // B0 OP_ADD_INT_2ADDR vA, vB
561 DF_DA | DF_UA | DF_UB,
562
563 // B1 OP_SUB_INT_2ADDR vA, vB
564 DF_DA | DF_UA | DF_UB,
565
566 // B2 OP_MUL_INT_2ADDR vA, vB
567 DF_DA | DF_UA | DF_UB,
568
569 // B3 OP_DIV_INT_2ADDR vA, vB
570 DF_DA | DF_UA | DF_UB,
571
572 // B4 OP_REM_INT_2ADDR vA, vB
573 DF_DA | DF_UA | DF_UB,
574
575 // B5 OP_AND_INT_2ADDR vA, vB
576 DF_DA | DF_UA | DF_UB,
577
578 // B6 OP_OR_INT_2ADDR vA, vB
579 DF_DA | DF_UA | DF_UB,
580
581 // B7 OP_XOR_INT_2ADDR vA, vB
582 DF_DA | DF_UA | DF_UB,
583
584 // B8 OP_SHL_INT_2ADDR vA, vB
585 DF_DA | DF_UA | DF_UB,
586
587 // B9 OP_SHR_INT_2ADDR vA, vB
588 DF_DA | DF_UA | DF_UB,
589
590 // BA OP_USHR_INT_2ADDR vA, vB
591 DF_DA | DF_UA | DF_UB,
592
593 // BB OP_ADD_LONG_2ADDR vA, vB
594 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
595
596 // BC OP_SUB_LONG_2ADDR vA, vB
597 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
598
599 // BD OP_MUL_LONG_2ADDR vA, vB
600 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
601
602 // BE OP_DIV_LONG_2ADDR vA, vB
603 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
604
605 // BF OP_REM_LONG_2ADDR vA, vB
606 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
607
608 // C0 OP_AND_LONG_2ADDR vA, vB
609 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
610
611 // C1 OP_OR_LONG_2ADDR vA, vB
612 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
613
614 // C2 OP_XOR_LONG_2ADDR vA, vB
615 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE,
616
617 // C3 OP_SHL_LONG_2ADDR vA, vB
618 DF_DA_WIDE | DF_UA_WIDE | DF_UB,
619
620 // C4 OP_SHR_LONG_2ADDR vA, vB
621 DF_DA_WIDE | DF_UA_WIDE | DF_UB,
622
623 // C5 OP_USHR_LONG_2ADDR vA, vB
624 DF_DA_WIDE | DF_UA_WIDE | DF_UB,
625
626 // C6 OP_ADD_FLOAT_2ADDR vA, vB
627 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
628
629 // C7 OP_SUB_FLOAT_2ADDR vA, vB
630 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
631
632 // C8 OP_MUL_FLOAT_2ADDR vA, vB
633 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
634
635 // C9 OP_DIV_FLOAT_2ADDR vA, vB
636 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
637
638 // CA OP_REM_FLOAT_2ADDR vA, vB
639 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
640
641 // CB OP_ADD_DOUBLE_2ADDR vA, vB
642 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE | DF_FP_A | DF_FP_B,
643
644 // CC OP_SUB_DOUBLE_2ADDR vA, vB
645 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE | DF_FP_A | DF_FP_B,
646
647 // CD OP_MUL_DOUBLE_2ADDR vA, vB
648 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE | DF_FP_A | DF_FP_B,
649
650 // CE OP_DIV_DOUBLE_2ADDR vA, vB
651 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE | DF_FP_A | DF_FP_B,
652
653 // CF OP_REM_DOUBLE_2ADDR vA, vB
654 DF_DA_WIDE | DF_UA_WIDE | DF_UB_WIDE | DF_FP_A | DF_FP_B,
655
656 // D0 OP_ADD_INT_LIT16 vA, vB, #+CCCC
657 DF_DA | DF_UB,
658
659 // D1 OP_RSUB_INT vA, vB, #+CCCC
660 DF_DA | DF_UB,
661
662 // D2 OP_MUL_INT_LIT16 vA, vB, #+CCCC
663 DF_DA | DF_UB,
664
665 // D3 OP_DIV_INT_LIT16 vA, vB, #+CCCC
666 DF_DA | DF_UB,
667
668 // D4 OP_REM_INT_LIT16 vA, vB, #+CCCC
669 DF_DA | DF_UB,
670
671 // D5 OP_AND_INT_LIT16 vA, vB, #+CCCC
672 DF_DA | DF_UB,
673
674 // D6 OP_OR_INT_LIT16 vA, vB, #+CCCC
675 DF_DA | DF_UB,
676
677 // D7 OP_XOR_INT_LIT16 vA, vB, #+CCCC
678 DF_DA | DF_UB,
679
680 // D8 OP_ADD_INT_LIT8 vAA, vBB, #+CC
681 DF_DA | DF_UB | DF_IS_LINEAR,
682
683 // D9 OP_RSUB_INT_LIT8 vAA, vBB, #+CC
684 DF_DA | DF_UB,
685
686 // DA OP_MUL_INT_LIT8 vAA, vBB, #+CC
687 DF_DA | DF_UB,
688
689 // DB OP_DIV_INT_LIT8 vAA, vBB, #+CC
690 DF_DA | DF_UB,
691
692 // DC OP_REM_INT_LIT8 vAA, vBB, #+CC
693 DF_DA | DF_UB,
694
695 // DD OP_AND_INT_LIT8 vAA, vBB, #+CC
696 DF_DA | DF_UB,
697
698 // DE OP_OR_INT_LIT8 vAA, vBB, #+CC
699 DF_DA | DF_UB,
700
701 // DF OP_XOR_INT_LIT8 vAA, vBB, #+CC
702 DF_DA | DF_UB,
703
704 // E0 OP_SHL_INT_LIT8 vAA, vBB, #+CC
705 DF_DA | DF_UB,
706
707 // E1 OP_SHR_INT_LIT8 vAA, vBB, #+CC
708 DF_DA | DF_UB,
709
710 // E2 OP_USHR_INT_LIT8 vAA, vBB, #+CC
711 DF_DA | DF_UB,
712
713 // E3 OP_IGET_VOLATILE
buzbee43a36422011-09-14 14:00:13 -0700714 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700715
716 // E4 OP_IPUT_VOLATILE
buzbee43a36422011-09-14 14:00:13 -0700717 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700718
719 // E5 OP_SGET_VOLATILE
720 DF_DA,
721
722 // E6 OP_SPUT_VOLATILE
723 DF_UA,
724
725 // E7 OP_IGET_OBJECT_VOLATILE
buzbee43a36422011-09-14 14:00:13 -0700726 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700727
728 // E8 OP_IGET_WIDE_VOLATILE
buzbee43a36422011-09-14 14:00:13 -0700729 DF_DA_WIDE | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700730
731 // E9 OP_IPUT_WIDE_VOLATILE
buzbee43a36422011-09-14 14:00:13 -0700732 DF_UA_WIDE | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700733
734 // EA OP_SGET_WIDE_VOLATILE
735 DF_DA_WIDE,
736
737 // EB OP_SPUT_WIDE_VOLATILE
738 DF_UA_WIDE,
739
740 // EC OP_BREAKPOINT
741 DF_NOP,
742
743 // ED OP_THROW_VERIFICATION_ERROR
744 DF_NOP,
745
746 // EE OP_EXECUTE_INLINE
747 DF_FORMAT_35C,
748
749 // EF OP_EXECUTE_INLINE_RANGE
750 DF_FORMAT_3RC,
751
752 // F0 OP_INVOKE_OBJECT_INIT_RANGE
buzbee43a36422011-09-14 14:00:13 -0700753 DF_NOP | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700754
755 // F1 OP_RETURN_VOID_BARRIER
756 DF_NOP,
757
758 // F2 OP_IGET_QUICK
buzbee43a36422011-09-14 14:00:13 -0700759 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700760
761 // F3 OP_IGET_WIDE_QUICK
buzbee43a36422011-09-14 14:00:13 -0700762 DF_DA_WIDE | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700763
764 // F4 OP_IGET_OBJECT_QUICK
buzbee43a36422011-09-14 14:00:13 -0700765 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700766
767 // F5 OP_IPUT_QUICK
buzbee43a36422011-09-14 14:00:13 -0700768 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700769
770 // F6 OP_IPUT_WIDE_QUICK
buzbee43a36422011-09-14 14:00:13 -0700771 DF_UA_WIDE | DF_UB | DF_NULL_CHK_1 |DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700772
773 // F7 OP_IPUT_OBJECT_QUICK
buzbee43a36422011-09-14 14:00:13 -0700774 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700775
776 // F8 OP_INVOKE_VIRTUAL_QUICK
buzbee43a36422011-09-14 14:00:13 -0700777 DF_FORMAT_35C | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700778
779 // F9 OP_INVOKE_VIRTUAL_QUICK_RANGE
buzbee43a36422011-09-14 14:00:13 -0700780 DF_FORMAT_3RC | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700781
782 // FA OP_INVOKE_SUPER_QUICK
buzbee43a36422011-09-14 14:00:13 -0700783 DF_FORMAT_35C | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700784
785 // FB OP_INVOKE_SUPER_QUICK_RANGE
buzbee43a36422011-09-14 14:00:13 -0700786 DF_FORMAT_3RC | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700787
788 // FC OP_IPUT_OBJECT_VOLATILE
buzbee43a36422011-09-14 14:00:13 -0700789 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700790
791 // FD OP_SGET_OBJECT_VOLATILE
792 DF_DA,
793
794 // FE OP_SPUT_OBJECT_VOLATILE
795 DF_UA,
796
797 // FF OP_DISPATCH_FF
798 DF_NOP,
799
buzbee43a36422011-09-14 14:00:13 -0700800 //TODO: remove jumbo opcodes
801
buzbee67bf8852011-08-17 17:51:35 -0700802 // 100 OP_CONST_CLASS_JUMBO vAAAA, type@BBBBBBBB
803 DF_DA,
804
buzbee43a36422011-09-14 14:00:13 -0700805 // 101 OP_CHK_CAST_JUMBO vAAAA, type@BBBBBBBB
buzbee67bf8852011-08-17 17:51:35 -0700806 DF_UA,
807
808 // 102 OP_INSTANCE_OF_JUMBO vAAAA, vBBBB, type@CCCCCCCC
809 DF_DA | DF_UB,
810
811 // 103 OP_NEW_INSTANCE_JUMBO vAAAA, type@BBBBBBBB
buzbee43a36422011-09-14 14:00:13 -0700812 DF_DA | DF_NON_NULL_DST,
buzbee67bf8852011-08-17 17:51:35 -0700813
814 // 104 OP_NEW_ARRAY_JUMBO vAAAA, vBBBB, type@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700815 DF_DA | DF_UB | DF_NON_NULL_DST,
buzbee67bf8852011-08-17 17:51:35 -0700816
817 // 105 OP_FILLED_NEW_ARRAY_JUMBO {vCCCC .. vNNNN}, type@BBBBBBBB
buzbee43a36422011-09-14 14:00:13 -0700818 DF_FORMAT_3RC | DF_NON_NULL_RET,
buzbee67bf8852011-08-17 17:51:35 -0700819
820 // 106 OP_IGET_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700821 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700822
823 // 107 OP_IGET_WIDE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700824 DF_DA_WIDE | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700825
826 // 108 OP_IGET_OBJECT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700827 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700828
829 // 109 OP_IGET_BOOLEAN_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700830 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700831
832 // 10A OP_IGET_BYTE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700833 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700834
835 // 10B OP_IGET_CHAR_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700836 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700837
838 // 10C OP_IGET_SHORT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700839 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IS_GETTER,
buzbee67bf8852011-08-17 17:51:35 -0700840
841 // 10D OP_IPUT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700842 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700843
844 // 10E OP_IPUT_WIDE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700845 DF_UA_WIDE | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700846
847 // 10F OP_IPUT_OBJECT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700848 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700849
850 // 110 OP_IPUT_BOOLEAN_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700851 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700852
853 // 111 OP_IPUT_BYTE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700854 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700855
856 // 112 OP_IPUT_CHAR_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700857 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700858
859 // 113 OP_IPUT_SHORT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
buzbee43a36422011-09-14 14:00:13 -0700860 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IS_SETTER,
buzbee67bf8852011-08-17 17:51:35 -0700861
862 // 114 OP_SGET_JUMBO vAAAA, vBBBB, field@CCCCCCCC
863 DF_DA | DF_IS_GETTER,
864
865 // 115 OP_SGET_WIDE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
866 DF_DA_WIDE | DF_IS_GETTER,
867
868 // 116 OP_SGET_OBJECT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
869 DF_DA | DF_IS_GETTER,
870
871 // 117 OP_SGET_BOOLEAN_JUMBO vAAAA, vBBBB, field@CCCCCCCC
872 DF_DA | DF_IS_GETTER,
873
874 // 118 OP_SGET_BYTE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
875 DF_DA | DF_IS_GETTER,
876
877 // 119 OP_SGET_CHAR_JUMBO vAAAA, vBBBB, field@CCCCCCCC
878 DF_DA | DF_IS_GETTER,
879
880 // 11A OP_SGET_SHORT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
881 DF_DA | DF_IS_GETTER,
882
883 // 11B OP_SPUT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
884 DF_UA | DF_IS_SETTER,
885
886 // 11C OP_SPUT_WIDE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
887 DF_UA_WIDE | DF_IS_SETTER,
888
889 // 11D OP_SPUT_OBJECT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
890 DF_UA | DF_IS_SETTER,
891
892 // 11E OP_SPUT_BOOLEAN_JUMBO vAAAA, vBBBB, field@CCCCCCCC
893 DF_UA | DF_IS_SETTER,
894
895 // 11F OP_SPUT_BYTE_JUMBO vAAAA, vBBBB, field@CCCCCCCC
896 DF_UA | DF_IS_SETTER,
897
898 // 120 OP_SPUT_CHAR_JUMBO vAAAA, vBBBB, field@CCCCCCCC
899 DF_UA | DF_IS_SETTER,
900
901 // 121 OP_SPUT_SHORT_JUMBO vAAAA, vBBBB, field@CCCCCCCC
902 DF_UA | DF_IS_SETTER,
903
904 // 122 OP_INVOKE_VIRTUAL_JUMBO {vCCCC .. vNNNN}, meth@BBBBBBBB
buzbee43a36422011-09-14 14:00:13 -0700905 DF_FORMAT_3RC | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700906
907 // 123 OP_INVOKE_SUPER_JUMBO {vCCCC .. vNNNN}, meth@BBBBBBBB
buzbee43a36422011-09-14 14:00:13 -0700908 DF_FORMAT_3RC | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700909
910 // 124 OP_INVOKE_DIRECT_JUMBO {vCCCC .. vNNNN}, meth@BBBBBBBB
buzbee43a36422011-09-14 14:00:13 -0700911 DF_FORMAT_3RC | DF_NULL_CHK_OUT0,
buzbee67bf8852011-08-17 17:51:35 -0700912
913 // 125 OP_INVOKE_STATIC_JUMBO {vCCCC .. vNNNN}, meth@BBBBBBBB
914 DF_FORMAT_3RC,
915
916 // 126 OP_INVOKE_INTERFACE_JUMBO {vCCCC .. vNNNN}, meth@BBBBBBBB
917 DF_FORMAT_3RC,
918
919 // 127 OP_UNUSED_27FF
920 DF_NOP,
921
922 // 128 OP_UNUSED_28FF
923 DF_NOP,
924
925 // 129 OP_UNUSED_29FF
926 DF_NOP,
927
928 // 12A OP_UNUSED_2AFF
929 DF_NOP,
930
931 // 12B OP_UNUSED_2BFF
932 DF_NOP,
933
934 // 12C OP_UNUSED_2CFF
935 DF_NOP,
936
937 // 12D OP_UNUSED_2DFF
938 DF_NOP,
939
940 // 12E OP_UNUSED_2EFF
941 DF_NOP,
942
943 // 12F OP_UNUSED_2FFF
944 DF_NOP,
945
946 // 130 OP_UNUSED_30FF
947 DF_NOP,
948
949 // 131 OP_UNUSED_31FF
950 DF_NOP,
951
952 // 132 OP_UNUSED_32FF
953 DF_NOP,
954
955 // 133 OP_UNUSED_33FF
956 DF_NOP,
957
958 // 134 OP_UNUSED_34FF
959 DF_NOP,
960
961 // 135 OP_UNUSED_35FF
962 DF_NOP,
963
964 // 136 OP_UNUSED_36FF
965 DF_NOP,
966
967 // 137 OP_UNUSED_37FF
968 DF_NOP,
969
970 // 138 OP_UNUSED_38FF
971 DF_NOP,
972
973 // 139 OP_UNUSED_39FF
974 DF_NOP,
975
976 // 13A OP_UNUSED_3AFF
977 DF_NOP,
978
979 // 13B OP_UNUSED_3BFF
980 DF_NOP,
981
982 // 13C OP_UNUSED_3CFF
983 DF_NOP,
984
985 // 13D OP_UNUSED_3DFF
986 DF_NOP,
987
988 // 13E OP_UNUSED_3EFF
989 DF_NOP,
990
991 // 13F OP_UNUSED_3FFF
992 DF_NOP,
993
994 // 140 OP_UNUSED_40FF
995 DF_NOP,
996
997 // 141 OP_UNUSED_41FF
998 DF_NOP,
999
1000 // 142 OP_UNUSED_42FF
1001 DF_NOP,
1002
1003 // 143 OP_UNUSED_43FF
1004 DF_NOP,
1005
1006 // 144 OP_UNUSED_44FF
1007 DF_NOP,
1008
1009 // 145 OP_UNUSED_45FF
1010 DF_NOP,
1011
1012 // 146 OP_UNUSED_46FF
1013 DF_NOP,
1014
1015 // 147 OP_UNUSED_47FF
1016 DF_NOP,
1017
1018 // 148 OP_UNUSED_48FF
1019 DF_NOP,
1020
1021 // 149 OP_UNUSED_49FF
1022 DF_NOP,
1023
1024 // 14A OP_UNUSED_4AFF
1025 DF_NOP,
1026
1027 // 14B OP_UNUSED_4BFF
1028 DF_NOP,
1029
1030 // 14C OP_UNUSED_4CFF
1031 DF_NOP,
1032
1033 // 14D OP_UNUSED_4DFF
1034 DF_NOP,
1035
1036 // 14E OP_UNUSED_4EFF
1037 DF_NOP,
1038
1039 // 14F OP_UNUSED_4FFF
1040 DF_NOP,
1041
1042 // 150 OP_UNUSED_50FF
1043 DF_NOP,
1044
1045 // 151 OP_UNUSED_51FF
1046 DF_NOP,
1047
1048 // 152 OP_UNUSED_52FF
1049 DF_NOP,
1050
1051 // 153 OP_UNUSED_53FF
1052 DF_NOP,
1053
1054 // 154 OP_UNUSED_54FF
1055 DF_NOP,
1056
1057 // 155 OP_UNUSED_55FF
1058 DF_NOP,
1059
1060 // 156 OP_UNUSED_56FF
1061 DF_NOP,
1062
1063 // 157 OP_UNUSED_57FF
1064 DF_NOP,
1065
1066 // 158 OP_UNUSED_58FF
1067 DF_NOP,
1068
1069 // 159 OP_UNUSED_59FF
1070 DF_NOP,
1071
1072 // 15A OP_UNUSED_5AFF
1073 DF_NOP,
1074
1075 // 15B OP_UNUSED_5BFF
1076 DF_NOP,
1077
1078 // 15C OP_UNUSED_5CFF
1079 DF_NOP,
1080
1081 // 15D OP_UNUSED_5DFF
1082 DF_NOP,
1083
1084 // 15E OP_UNUSED_5EFF
1085 DF_NOP,
1086
1087 // 15F OP_UNUSED_5FFF
1088 DF_NOP,
1089
1090 // 160 OP_UNUSED_60FF
1091 DF_NOP,
1092
1093 // 161 OP_UNUSED_61FF
1094 DF_NOP,
1095
1096 // 162 OP_UNUSED_62FF
1097 DF_NOP,
1098
1099 // 163 OP_UNUSED_63FF
1100 DF_NOP,
1101
1102 // 164 OP_UNUSED_64FF
1103 DF_NOP,
1104
1105 // 165 OP_UNUSED_65FF
1106 DF_NOP,
1107
1108 // 166 OP_UNUSED_66FF
1109 DF_NOP,
1110
1111 // 167 OP_UNUSED_67FF
1112 DF_NOP,
1113
1114 // 168 OP_UNUSED_68FF
1115 DF_NOP,
1116
1117 // 169 OP_UNUSED_69FF
1118 DF_NOP,
1119
1120 // 16A OP_UNUSED_6AFF
1121 DF_NOP,
1122
1123 // 16B OP_UNUSED_6BFF
1124 DF_NOP,
1125
1126 // 16C OP_UNUSED_6CFF
1127 DF_NOP,
1128
1129 // 16D OP_UNUSED_6DFF
1130 DF_NOP,
1131
1132 // 16E OP_UNUSED_6EFF
1133 DF_NOP,
1134
1135 // 16F OP_UNUSED_6FFF
1136 DF_NOP,
1137
1138 // 170 OP_UNUSED_70FF
1139 DF_NOP,
1140
1141 // 171 OP_UNUSED_71FF
1142 DF_NOP,
1143
1144 // 172 OP_UNUSED_72FF
1145 DF_NOP,
1146
1147 // 173 OP_UNUSED_73FF
1148 DF_NOP,
1149
1150 // 174 OP_UNUSED_74FF
1151 DF_NOP,
1152
1153 // 175 OP_UNUSED_75FF
1154 DF_NOP,
1155
1156 // 176 OP_UNUSED_76FF
1157 DF_NOP,
1158
1159 // 177 OP_UNUSED_77FF
1160 DF_NOP,
1161
1162 // 178 OP_UNUSED_78FF
1163 DF_NOP,
1164
1165 // 179 OP_UNUSED_79FF
1166 DF_NOP,
1167
1168 // 17A OP_UNUSED_7AFF
1169 DF_NOP,
1170
1171 // 17B OP_UNUSED_7BFF
1172 DF_NOP,
1173
1174 // 17C OP_UNUSED_7CFF
1175 DF_NOP,
1176
1177 // 17D OP_UNUSED_7DFF
1178 DF_NOP,
1179
1180 // 17E OP_UNUSED_7EFF
1181 DF_NOP,
1182
1183 // 17F OP_UNUSED_7FFF
1184 DF_NOP,
1185
1186 // 180 OP_UNUSED_80FF
1187 DF_NOP,
1188
1189 // 181 OP_UNUSED_81FF
1190 DF_NOP,
1191
1192 // 182 OP_UNUSED_82FF
1193 DF_NOP,
1194
1195 // 183 OP_UNUSED_83FF
1196 DF_NOP,
1197
1198 // 184 OP_UNUSED_84FF
1199 DF_NOP,
1200
1201 // 185 OP_UNUSED_85FF
1202 DF_NOP,
1203
1204 // 186 OP_UNUSED_86FF
1205 DF_NOP,
1206
1207 // 187 OP_UNUSED_87FF
1208 DF_NOP,
1209
1210 // 188 OP_UNUSED_88FF
1211 DF_NOP,
1212
1213 // 189 OP_UNUSED_89FF
1214 DF_NOP,
1215
1216 // 18A OP_UNUSED_8AFF
1217 DF_NOP,
1218
1219 // 18B OP_UNUSED_8BFF
1220 DF_NOP,
1221
1222 // 18C OP_UNUSED_8CFF
1223 DF_NOP,
1224
1225 // 18D OP_UNUSED_8DFF
1226 DF_NOP,
1227
1228 // 18E OP_UNUSED_8EFF
1229 DF_NOP,
1230
1231 // 18F OP_UNUSED_8FFF
1232 DF_NOP,
1233
1234 // 190 OP_UNUSED_90FF
1235 DF_NOP,
1236
1237 // 191 OP_UNUSED_91FF
1238 DF_NOP,
1239
1240 // 192 OP_UNUSED_92FF
1241 DF_NOP,
1242
1243 // 193 OP_UNUSED_93FF
1244 DF_NOP,
1245
1246 // 194 OP_UNUSED_94FF
1247 DF_NOP,
1248
1249 // 195 OP_UNUSED_95FF
1250 DF_NOP,
1251
1252 // 196 OP_UNUSED_96FF
1253 DF_NOP,
1254
1255 // 197 OP_UNUSED_97FF
1256 DF_NOP,
1257
1258 // 198 OP_UNUSED_98FF
1259 DF_NOP,
1260
1261 // 199 OP_UNUSED_99FF
1262 DF_NOP,
1263
1264 // 19A OP_UNUSED_9AFF
1265 DF_NOP,
1266
1267 // 19B OP_UNUSED_9BFF
1268 DF_NOP,
1269
1270 // 19C OP_UNUSED_9CFF
1271 DF_NOP,
1272
1273 // 19D OP_UNUSED_9DFF
1274 DF_NOP,
1275
1276 // 19E OP_UNUSED_9EFF
1277 DF_NOP,
1278
1279 // 19F OP_UNUSED_9FFF
1280 DF_NOP,
1281
1282 // 1A0 OP_UNUSED_A0FF
1283 DF_NOP,
1284
1285 // 1A1 OP_UNUSED_A1FF
1286 DF_NOP,
1287
1288 // 1A2 OP_UNUSED_A2FF
1289 DF_NOP,
1290
1291 // 1A3 OP_UNUSED_A3FF
1292 DF_NOP,
1293
1294 // 1A4 OP_UNUSED_A4FF
1295 DF_NOP,
1296
1297 // 1A5 OP_UNUSED_A5FF
1298 DF_NOP,
1299
1300 // 1A6 OP_UNUSED_A6FF
1301 DF_NOP,
1302
1303 // 1A7 OP_UNUSED_A7FF
1304 DF_NOP,
1305
1306 // 1A8 OP_UNUSED_A8FF
1307 DF_NOP,
1308
1309 // 1A9 OP_UNUSED_A9FF
1310 DF_NOP,
1311
1312 // 1AA OP_UNUSED_AAFF
1313 DF_NOP,
1314
1315 // 1AB OP_UNUSED_ABFF
1316 DF_NOP,
1317
1318 // 1AC OP_UNUSED_ACFF
1319 DF_NOP,
1320
1321 // 1AD OP_UNUSED_ADFF
1322 DF_NOP,
1323
1324 // 1AE OP_UNUSED_AEFF
1325 DF_NOP,
1326
1327 // 1AF OP_UNUSED_AFFF
1328 DF_NOP,
1329
1330 // 1B0 OP_UNUSED_B0FF
1331 DF_NOP,
1332
1333 // 1B1 OP_UNUSED_B1FF
1334 DF_NOP,
1335
1336 // 1B2 OP_UNUSED_B2FF
1337 DF_NOP,
1338
1339 // 1B3 OP_UNUSED_B3FF
1340 DF_NOP,
1341
1342 // 1B4 OP_UNUSED_B4FF
1343 DF_NOP,
1344
1345 // 1B5 OP_UNUSED_B5FF
1346 DF_NOP,
1347
1348 // 1B6 OP_UNUSED_B6FF
1349 DF_NOP,
1350
1351 // 1B7 OP_UNUSED_B7FF
1352 DF_NOP,
1353
1354 // 1B8 OP_UNUSED_B8FF
1355 DF_NOP,
1356
1357 // 1B9 OP_UNUSED_B9FF
1358 DF_NOP,
1359
1360 // 1BA OP_UNUSED_BAFF
1361 DF_NOP,
1362
1363 // 1BB OP_UNUSED_BBFF
1364 DF_NOP,
1365
1366 // 1BC OP_UNUSED_BCFF
1367 DF_NOP,
1368
1369 // 1BD OP_UNUSED_BDFF
1370 DF_NOP,
1371
1372 // 1BE OP_UNUSED_BEFF
1373 DF_NOP,
1374
1375 // 1BF OP_UNUSED_BFFF
1376 DF_NOP,
1377
1378 // 1C0 OP_UNUSED_C0FF
1379 DF_NOP,
1380
1381 // 1C1 OP_UNUSED_C1FF
1382 DF_NOP,
1383
1384 // 1C2 OP_UNUSED_C2FF
1385 DF_NOP,
1386
1387 // 1C3 OP_UNUSED_C3FF
1388 DF_NOP,
1389
1390 // 1C4 OP_UNUSED_C4FF
1391 DF_NOP,
1392
1393 // 1C5 OP_UNUSED_C5FF
1394 DF_NOP,
1395
1396 // 1C6 OP_UNUSED_C6FF
1397 DF_NOP,
1398
1399 // 1C7 OP_UNUSED_C7FF
1400 DF_NOP,
1401
1402 // 1C8 OP_UNUSED_C8FF
1403 DF_NOP,
1404
1405 // 1C9 OP_UNUSED_C9FF
1406 DF_NOP,
1407
1408 // 1CA OP_UNUSED_CAFF
1409 DF_NOP,
1410
1411 // 1CB OP_UNUSED_CBFF
1412 DF_NOP,
1413
1414 // 1CC OP_UNUSED_CCFF
1415 DF_NOP,
1416
1417 // 1CD OP_UNUSED_CDFF
1418 DF_NOP,
1419
1420 // 1CE OP_UNUSED_CEFF
1421 DF_NOP,
1422
1423 // 1CF OP_UNUSED_CFFF
1424 DF_NOP,
1425
1426 // 1D0 OP_UNUSED_D0FF
1427 DF_NOP,
1428
1429 // 1D1 OP_UNUSED_D1FF
1430 DF_NOP,
1431
1432 // 1D2 OP_UNUSED_D2FF
1433 DF_NOP,
1434
1435 // 1D3 OP_UNUSED_D3FF
1436 DF_NOP,
1437
1438 // 1D4 OP_UNUSED_D4FF
1439 DF_NOP,
1440
1441 // 1D5 OP_UNUSED_D5FF
1442 DF_NOP,
1443
1444 // 1D6 OP_UNUSED_D6FF
1445 DF_NOP,
1446
1447 // 1D7 OP_UNUSED_D7FF
1448 DF_NOP,
1449
1450 // 1D8 OP_UNUSED_D8FF
1451 DF_NOP,
1452
1453 // 1D9 OP_UNUSED_D9FF
1454 DF_NOP,
1455
1456 // 1DA OP_UNUSED_DAFF
1457 DF_NOP,
1458
1459 // 1DB OP_UNUSED_DBFF
1460 DF_NOP,
1461
1462 // 1DC OP_UNUSED_DCFF
1463 DF_NOP,
1464
1465 // 1DD OP_UNUSED_DDFF
1466 DF_NOP,
1467
1468 // 1DE OP_UNUSED_DEFF
1469 DF_NOP,
1470
1471 // 1DF OP_UNUSED_DFFF
1472 DF_NOP,
1473
1474 // 1E0 OP_UNUSED_E0FF
1475 DF_NOP,
1476
1477 // 1E1 OP_UNUSED_E1FF
1478 DF_NOP,
1479
1480 // 1E2 OP_UNUSED_E2FF
1481 DF_NOP,
1482
1483 // 1E3 OP_UNUSED_E3FF
1484 DF_NOP,
1485
1486 // 1E4 OP_UNUSED_E4FF
1487 DF_NOP,
1488
1489 // 1E5 OP_UNUSED_E5FF
1490 DF_NOP,
1491
1492 // 1E6 OP_UNUSED_E6FF
1493 DF_NOP,
1494
1495 // 1E7 OP_UNUSED_E7FF
1496 DF_NOP,
1497
1498 // 1E8 OP_UNUSED_E8FF
1499 DF_NOP,
1500
1501 // 1E9 OP_UNUSED_E9FF
1502 DF_NOP,
1503
1504 // 1EA OP_UNUSED_EAFF
1505 DF_NOP,
1506
1507 // 1EB OP_UNUSED_EBFF
1508 DF_NOP,
1509
1510 // 1EC OP_UNUSED_ECFF
1511 DF_NOP,
1512
1513 // 1ED OP_UNUSED_EDFF
1514 DF_NOP,
1515
1516 // 1EE OP_UNUSED_EEFF
1517 DF_NOP,
1518
1519 // 1EF OP_UNUSED_EFFF
1520 DF_NOP,
1521
1522 // 1F0 OP_UNUSED_F0FF
1523 DF_NOP,
1524
1525 // 1F1 OP_UNUSED_F1FF
1526 DF_NOP,
1527
1528 // 1F2 OP_INVOKE_OBJECT_INIT_JUMBO
buzbee43a36422011-09-14 14:00:13 -07001529 DF_NOP | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -07001530
1531 // 1F3 OP_IGET_VOLATILE_JUMBO
buzbee43a36422011-09-14 14:00:13 -07001532 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -07001533
1534 // 1F4 OP_IGET_WIDE_VOLATILE_JUMBO
buzbee43a36422011-09-14 14:00:13 -07001535 DF_DA_WIDE | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -07001536
1537 // 1F5 OP_IGET_OBJECT_VOLATILE_JUMBO
buzbee43a36422011-09-14 14:00:13 -07001538 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -07001539
1540 // 1F6 OP_IPUT_VOLATILE_JUMBO
buzbee43a36422011-09-14 14:00:13 -07001541 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -07001542
1543 // 1F7 OP_IPUT_WIDE_VOLATILE_JUMBO
buzbee43a36422011-09-14 14:00:13 -07001544 DF_UA_WIDE | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -07001545
1546 // 1F8 OP_IPUT_OBJECT_VOLATILE_JUMBO
buzbee43a36422011-09-14 14:00:13 -07001547 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -07001548
1549 // 1F9 OP_SGET_VOLATILE_JUMBO
1550 DF_DA,
1551
1552 // 1FA OP_SGET_WIDE_VOLATILE_JUMBO
1553 DF_DA_WIDE,
1554
1555 // 1FB OP_SGET_OBJECT_VOLATILE_JUMBO
1556 DF_DA,
1557
1558 // 1FC OP_SPUT_VOLATILE_JUMBO
1559 DF_UA,
1560
1561 // 1FD OP_SPUT_WIDE_VOLATILE_JUMBO
1562 DF_UA_WIDE,
1563
1564 // 1FE OP_SPUT_OBJECT_VOLATILE_JUMBO
1565 DF_UA,
1566
1567 // 1FF OP_THROW_VERIFICATION_ERROR_JUMBO
1568 DF_NOP,
1569
1570 // Beginning of extended MIR opcodes
1571 // 200 OP_MIR_PHI
buzbee43a36422011-09-14 14:00:13 -07001572 DF_PHI | DF_DA | DF_NULL_TRANSFER_N,
buzbee67bf8852011-08-17 17:51:35 -07001573 /*
1574 * For extended MIR inserted at the MIR2LIR stage, it is okay to have
1575 * undefined values here.
1576 */
1577};
1578
1579/* Return the Dalvik register/subscript pair of a given SSA register */
1580int oatConvertSSARegToDalvik(const CompilationUnit* cUnit, int ssaReg)
1581{
1582 return GET_ELEM_N(cUnit->ssaToDalvikMap, int, ssaReg);
1583}
1584
1585/*
1586 * Utility function to convert encoded SSA register value into Dalvik register
1587 * and subscript pair. Each SSA register can be used to index the
1588 * ssaToDalvikMap list to get the subscript[31..16]/dalvik_reg[15..0] mapping.
1589 */
1590char *oatGetDalvikDisassembly(const DecodedInstruction* insn,
1591 const char* note)
1592{
1593 char buffer[256];
1594 Opcode opcode = insn->opcode;
1595 int dfAttributes = oatDataFlowAttributes[opcode];
1596 int flags;
1597 char* ret;
1598
1599 buffer[0] = 0;
1600 if ((int)opcode >= (int)kMirOpFirst) {
1601 if ((int)opcode == (int)kMirOpPhi) {
1602 strcpy(buffer, "PHI");
1603 }
1604 else {
1605 sprintf(buffer, "Opcode %#x", opcode);
1606 }
1607 flags = 0;
1608 } else {
1609 strcpy(buffer, dexGetOpcodeName(opcode));
1610 flags = dexGetFlagsFromOpcode(insn->opcode);
1611 }
1612
1613 if (note)
1614 strcat(buffer, note);
1615
1616 /* For branches, decode the instructions to print out the branch targets */
1617 if (flags & kInstrCanBranch) {
1618 InstructionFormat dalvikFormat = dexGetFormatFromOpcode(insn->opcode);
1619 int offset = 0;
1620 switch (dalvikFormat) {
1621 case kFmt21t:
1622 snprintf(buffer + strlen(buffer), 256, " v%d,", insn->vA);
1623 offset = (int) insn->vB;
1624 break;
1625 case kFmt22t:
1626 snprintf(buffer + strlen(buffer), 256, " v%d, v%d,",
1627 insn->vA, insn->vB);
1628 offset = (int) insn->vC;
1629 break;
1630 case kFmt10t:
1631 case kFmt20t:
1632 case kFmt30t:
1633 offset = (int) insn->vA;
1634 break;
1635 default:
1636 LOG(FATAL) << "Unexpected branch format " << (int)dalvikFormat
1637 << " / opcode " << (int)opcode;
1638 }
1639 snprintf(buffer + strlen(buffer), 256, " (%c%x)",
1640 offset > 0 ? '+' : '-',
1641 offset > 0 ? offset : -offset);
1642 } else if (dfAttributes & DF_FORMAT_35C) {
1643 unsigned int i;
1644 for (i = 0; i < insn->vA; i++) {
1645 if (i != 0) strcat(buffer, ",");
1646 snprintf(buffer + strlen(buffer), 256, " v%d", insn->arg[i]);
1647 }
1648 }
1649 else if (dfAttributes & DF_FORMAT_3RC) {
1650 snprintf(buffer + strlen(buffer), 256,
1651 " v%d..v%d", insn->vC, insn->vC + insn->vA - 1);
1652 }
1653 else {
1654 if (dfAttributes & DF_A_IS_REG) {
1655 snprintf(buffer + strlen(buffer), 256, " v%d", insn->vA);
1656 }
1657 if (dfAttributes & DF_B_IS_REG) {
1658 snprintf(buffer + strlen(buffer), 256, ", v%d", insn->vB);
1659 }
1660 else if ((int)opcode < (int)kMirOpFirst) {
1661 snprintf(buffer + strlen(buffer), 256, ", (#%d)", insn->vB);
1662 }
1663 if (dfAttributes & DF_C_IS_REG) {
1664 snprintf(buffer + strlen(buffer), 256, ", v%d", insn->vC);
1665 }
1666 else if ((int)opcode < (int)kMirOpFirst) {
1667 snprintf(buffer + strlen(buffer), 256, ", (#%d)", insn->vC);
1668 }
1669 }
1670 int length = strlen(buffer) + 1;
1671 ret = (char *)oatNew(length, false);
1672 memcpy(ret, buffer, length);
1673 return ret;
1674}
1675
1676char *getSSAName(const CompilationUnit* cUnit, int ssaReg, char* name)
1677{
1678 int ssa2DalvikValue = oatConvertSSARegToDalvik(cUnit, ssaReg);
1679
1680 sprintf(name, "v%d_%d",
1681 DECODE_REG(ssa2DalvikValue), DECODE_SUB(ssa2DalvikValue));
1682 return name;
1683}
1684
1685/*
1686 * Dalvik instruction disassembler with optional SSA printing.
1687 */
1688char *oatFullDisassembler(const CompilationUnit* cUnit,
1689 const MIR* mir)
1690{
1691 char buffer[256];
1692 char operand0[256], operand1[256];
1693 const DecodedInstruction *insn = &mir->dalvikInsn;
1694 int opcode = insn->opcode;
1695 int dfAttributes = oatDataFlowAttributes[opcode];
1696 char *ret;
1697 int length;
1698 OpcodeFlags flags;
1699
1700 buffer[0] = 0;
1701 if (opcode >= kMirOpFirst) {
1702 if (opcode == kMirOpPhi) {
1703 snprintf(buffer, 256, "PHI %s = (%s",
1704 getSSAName(cUnit, mir->ssaRep->defs[0], operand0),
1705 getSSAName(cUnit, mir->ssaRep->uses[0], operand1));
1706 int i;
1707 for (i = 1; i < mir->ssaRep->numUses; i++) {
1708 snprintf(buffer + strlen(buffer), 256, ", %s",
1709 getSSAName(cUnit, mir->ssaRep->uses[i], operand0));
1710 }
1711 snprintf(buffer + strlen(buffer), 256, ")");
1712 }
1713 else {
1714 sprintf(buffer, "Opcode %#x", opcode);
1715 }
1716 goto done;
1717 } else {
1718 strcpy(buffer, dexGetOpcodeName((Opcode)opcode));
1719 }
1720
1721 flags = dexGetFlagsFromOpcode((Opcode)opcode);
1722 /* For branches, decode the instructions to print out the branch targets */
1723 if (flags & kInstrCanBranch) {
1724 InstructionFormat dalvikFormat = dexGetFormatFromOpcode(insn->opcode);
1725 int delta = 0;
1726 switch (dalvikFormat) {
1727 case kFmt21t:
1728 snprintf(buffer + strlen(buffer), 256, " %s, ",
1729 getSSAName(cUnit, mir->ssaRep->uses[0], operand0));
1730 delta = (int) insn->vB;
1731 break;
1732 case kFmt22t:
1733 snprintf(buffer + strlen(buffer), 256, " %s, %s, ",
1734 getSSAName(cUnit, mir->ssaRep->uses[0], operand0),
1735 getSSAName(cUnit, mir->ssaRep->uses[1], operand1));
1736 delta = (int) insn->vC;
1737 break;
1738 case kFmt10t:
1739 case kFmt20t:
1740 case kFmt30t:
1741 delta = (int) insn->vA;
1742 break;
1743 default:
1744 LOG(FATAL) << "Unexpected branch format: " <<
1745 (int)dalvikFormat;
1746 }
1747 snprintf(buffer + strlen(buffer), 256, " %04x",
1748 mir->offset + delta);
1749 } else if (dfAttributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) {
1750 unsigned int i;
1751 for (i = 0; i < insn->vA; i++) {
1752 if (i != 0) strcat(buffer, ",");
1753 snprintf(buffer + strlen(buffer), 256, " %s",
1754 getSSAName(cUnit, mir->ssaRep->uses[i], operand0));
1755 }
1756 } else {
1757 int udIdx;
1758 if (mir->ssaRep->numDefs) {
1759
1760 for (udIdx = 0; udIdx < mir->ssaRep->numDefs; udIdx++) {
1761 snprintf(buffer + strlen(buffer), 256, " %s",
1762 getSSAName(cUnit, mir->ssaRep->defs[udIdx], operand0));
1763 }
1764 strcat(buffer, ",");
1765 }
1766 if (mir->ssaRep->numUses) {
1767 /* No leading ',' for the first use */
1768 snprintf(buffer + strlen(buffer), 256, " %s",
1769 getSSAName(cUnit, mir->ssaRep->uses[0], operand0));
1770 for (udIdx = 1; udIdx < mir->ssaRep->numUses; udIdx++) {
1771 snprintf(buffer + strlen(buffer), 256, ", %s",
1772 getSSAName(cUnit, mir->ssaRep->uses[udIdx], operand0));
1773 }
1774 }
1775 if (opcode < kMirOpFirst) {
1776 InstructionFormat dalvikFormat =
1777 dexGetFormatFromOpcode((Opcode)opcode);
1778 switch (dalvikFormat) {
1779 case kFmt11n: // op vA, #+B
1780 case kFmt21s: // op vAA, #+BBBB
1781 case kFmt21h: // op vAA, #+BBBB00000[00000000]
1782 case kFmt31i: // op vAA, #+BBBBBBBB
1783 case kFmt51l: // op vAA, #+BBBBBBBBBBBBBBBB
1784 snprintf(buffer + strlen(buffer), 256, " #%#x", insn->vB);
1785 break;
1786 case kFmt21c: // op vAA, thing@BBBB
1787 case kFmt31c: // op vAA, thing@BBBBBBBB
1788 snprintf(buffer + strlen(buffer), 256, " @%#x", insn->vB);
1789 break;
1790 case kFmt22b: // op vAA, vBB, #+CC
1791 case kFmt22s: // op vA, vB, #+CCCC
1792 snprintf(buffer + strlen(buffer), 256, " #%#x", insn->vC);
1793 break;
1794 case kFmt22c: // op vA, vB, thing@CCCC
1795 case kFmt22cs: // [opt] op vA, vB, field offset CCCC
1796 snprintf(buffer + strlen(buffer), 256, " @%#x", insn->vC);
1797 break;
1798 /* No need for special printing */
1799 default:
1800 break;
1801 }
1802 }
1803 }
1804
1805done:
1806 length = strlen(buffer) + 1;
1807 ret = (char *) oatNew(length, false);
1808 memcpy(ret, buffer, length);
1809 return ret;
1810}
1811
1812/*
1813 * Utility function to convert encoded SSA register value into Dalvik register
1814 * and subscript pair. Each SSA register can be used to index the
1815 * ssaToDalvikMap list to get the subscript[31..16]/dalvik_reg[15..0] mapping.
1816 */
1817char *oatGetSSAString(CompilationUnit* cUnit, SSARepresentation* ssaRep)
1818{
1819 char buffer[256];
1820 char* ret;
1821 int i;
1822
1823 buffer[0] = 0;
1824 for (i = 0; i < ssaRep->numDefs; i++) {
1825 int ssa2DalvikValue = oatConvertSSARegToDalvik(cUnit, ssaRep->defs[i]);
1826
1827 sprintf(buffer + strlen(buffer), "s%d(v%d_%d) ",
1828 ssaRep->defs[i], DECODE_REG(ssa2DalvikValue),
1829 DECODE_SUB(ssa2DalvikValue));
1830 }
1831
1832 if (ssaRep->numDefs) {
1833 strcat(buffer, "<- ");
1834 }
1835
1836 for (i = 0; i < ssaRep->numUses; i++) {
1837 int ssa2DalvikValue = oatConvertSSARegToDalvik(cUnit, ssaRep->uses[i]);
1838 int len = strlen(buffer);
1839
1840 if (snprintf(buffer + len, 250 - len, "s%d(v%d_%d) ",
1841 ssaRep->uses[i], DECODE_REG(ssa2DalvikValue),
1842 DECODE_SUB(ssa2DalvikValue)) >= (250 - len)) {
1843 strcat(buffer, "...");
1844 break;
1845 }
1846 }
1847
1848 int length = strlen(buffer) + 1;
1849 ret = (char *)oatNew(length, false);
1850 memcpy(ret, buffer, length);
1851 return ret;
1852}
1853
1854/* Any register that is used before being defined is considered live-in */
1855static inline void handleLiveInUse(ArenaBitVector* useV, ArenaBitVector* defV,
1856 ArenaBitVector* liveInV, int dalvikRegId)
1857{
1858 oatSetBit(useV, dalvikRegId);
1859 if (!oatIsBitSet(defV, dalvikRegId)) {
1860 oatSetBit(liveInV, dalvikRegId);
1861 }
1862}
1863
1864/* Mark a reg as being defined */
1865static inline void handleDef(ArenaBitVector* defV, int dalvikRegId)
1866{
1867 oatSetBit(defV, dalvikRegId);
1868}
1869
1870/*
1871 * Find out live-in variables for natural loops. Variables that are live-in in
1872 * the main loop body are considered to be defined in the entry block.
1873 */
1874bool oatFindLocalLiveIn(CompilationUnit* cUnit, BasicBlock* bb)
1875{
1876 MIR* mir;
1877 ArenaBitVector *useV, *defV, *liveInV;
1878
1879 if (bb->dataFlowInfo == NULL) return false;
1880
1881 useV = bb->dataFlowInfo->useV =
1882 oatAllocBitVector(cUnit->numDalvikRegisters, false);
1883 defV = bb->dataFlowInfo->defV =
1884 oatAllocBitVector(cUnit->numDalvikRegisters, false);
1885 liveInV = bb->dataFlowInfo->liveInV =
1886 oatAllocBitVector(cUnit->numDalvikRegisters, false);
1887
1888 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
1889 int dfAttributes =
1890 oatDataFlowAttributes[mir->dalvikInsn.opcode];
1891 DecodedInstruction *dInsn = &mir->dalvikInsn;
1892
1893 if (dfAttributes & DF_HAS_USES) {
1894 if (dfAttributes & DF_UA) {
1895 handleLiveInUse(useV, defV, liveInV, dInsn->vA);
1896 } else if (dfAttributes & DF_UA_WIDE) {
1897 handleLiveInUse(useV, defV, liveInV, dInsn->vA);
1898 handleLiveInUse(useV, defV, liveInV, dInsn->vA+1);
1899 }
1900 if (dfAttributes & DF_UB) {
1901 handleLiveInUse(useV, defV, liveInV, dInsn->vB);
1902 } else if (dfAttributes & DF_UB_WIDE) {
1903 handleLiveInUse(useV, defV, liveInV, dInsn->vB);
1904 handleLiveInUse(useV, defV, liveInV, dInsn->vB+1);
1905 }
1906 if (dfAttributes & DF_UC) {
1907 handleLiveInUse(useV, defV, liveInV, dInsn->vC);
1908 } else if (dfAttributes & DF_UC_WIDE) {
1909 handleLiveInUse(useV, defV, liveInV, dInsn->vC);
1910 handleLiveInUse(useV, defV, liveInV, dInsn->vC+1);
1911 }
1912 }
1913 if (dfAttributes & DF_HAS_DEFS) {
1914 handleDef(defV, dInsn->vA);
1915 if (dfAttributes & DF_DA_WIDE) {
1916 handleDef(defV, dInsn->vA+1);
1917 }
1918 }
1919 }
1920 return true;
1921}
1922
1923/* Find out the latest SSA register for a given Dalvik register */
1924static void handleSSAUse(CompilationUnit* cUnit, int* uses, int dalvikReg,
1925 int regIndex)
1926{
1927 int encodedValue = cUnit->dalvikToSSAMap[dalvikReg];
1928 int ssaReg = DECODE_REG(encodedValue);
1929 uses[regIndex] = ssaReg;
1930}
1931
1932/* Setup a new SSA register for a given Dalvik register */
1933static void handleSSADef(CompilationUnit* cUnit, int* defs, int dalvikReg,
1934 int regIndex)
1935{
buzbee67bf8852011-08-17 17:51:35 -07001936 int ssaReg = cUnit->numSSARegs++;
1937 /* Bump up the subscript */
buzbeef0cde542011-09-13 14:55:02 -07001938 int dalvikSub = ++cUnit->SSALastDefs[dalvikReg];
buzbee67bf8852011-08-17 17:51:35 -07001939 int newD2SMapping = ENCODE_REG_SUB(ssaReg, dalvikSub);
1940
1941 cUnit->dalvikToSSAMap[dalvikReg] = newD2SMapping;
1942
1943 int newS2DMapping = ENCODE_REG_SUB(dalvikReg, dalvikSub);
1944 oatInsertGrowableList(cUnit->ssaToDalvikMap, newS2DMapping);
1945
1946 defs[regIndex] = ssaReg;
1947}
1948
buzbeeec5adf32011-09-11 15:25:43 -07001949/* Look up new SSA names for format_35c instructions */
buzbee67bf8852011-08-17 17:51:35 -07001950static void dataFlowSSAFormat35C(CompilationUnit* cUnit, MIR* mir)
1951{
1952 DecodedInstruction *dInsn = &mir->dalvikInsn;
1953 int numUses = dInsn->vA;
1954 int i;
1955
1956 mir->ssaRep->numUses = numUses;
1957 mir->ssaRep->uses = (int *)oatNew(sizeof(int) * numUses, false);
1958
1959 for (i = 0; i < numUses; i++) {
1960 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->arg[i], i);
1961 }
1962}
1963
buzbeeec5adf32011-09-11 15:25:43 -07001964/* Look up new SSA names for format_3rc instructions */
buzbee67bf8852011-08-17 17:51:35 -07001965static void dataFlowSSAFormat3RC(CompilationUnit* cUnit, MIR* mir)
1966{
1967 DecodedInstruction *dInsn = &mir->dalvikInsn;
1968 int numUses = dInsn->vA;
1969 int i;
1970
1971 mir->ssaRep->numUses = numUses;
1972 mir->ssaRep->uses = (int *)oatNew(sizeof(int) * numUses, false);
1973
1974 for (i = 0; i < numUses; i++) {
1975 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC+i, i);
1976 }
1977}
1978
1979/* Entry function to convert a block into SSA representation */
1980bool oatDoSSAConversion(CompilationUnit* cUnit, BasicBlock* bb)
1981{
1982 MIR* mir;
1983
1984 if (bb->dataFlowInfo == NULL) return false;
1985
buzbeef0cde542011-09-13 14:55:02 -07001986 if (cUnit->printMeVerbose) {
1987 LOG(INFO) << "oatDoSSAConversion processing block " << bb->id;
1988 }
1989
buzbee67bf8852011-08-17 17:51:35 -07001990 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
1991 mir->ssaRep = (struct SSARepresentation *)
1992 oatNew(sizeof(SSARepresentation), true);
1993
1994 int dfAttributes =
1995 oatDataFlowAttributes[mir->dalvikInsn.opcode];
1996
buzbeef0cde542011-09-13 14:55:02 -07001997 // If not a pseudo-op, note non-leaf or can throw
1998 if (mir->dalvikInsn.opcode < kNumPackedOpcodes) {
1999 int flags = dexGetFlagsFromOpcode(mir->dalvikInsn.opcode);
buzbeecefd1872011-09-09 09:59:52 -07002000
buzbeef0cde542011-09-13 14:55:02 -07002001 if (flags & kInstrCanThrow) {
2002 cUnit->attrs &= ~METHOD_IS_THROW_FREE;
2003 }
buzbeecefd1872011-09-09 09:59:52 -07002004
buzbeef0cde542011-09-13 14:55:02 -07002005 if (flags & kInstrInvoke) {
2006 cUnit->attrs &= ~METHOD_IS_LEAF;
2007 }
buzbeecefd1872011-09-09 09:59:52 -07002008 }
2009
buzbee67bf8852011-08-17 17:51:35 -07002010 int numUses = 0;
2011
2012 if (dfAttributes & DF_FORMAT_35C) {
2013 dataFlowSSAFormat35C(cUnit, mir);
2014 continue;
2015 }
2016
2017 if (dfAttributes & DF_FORMAT_3RC) {
2018 dataFlowSSAFormat3RC(cUnit, mir);
2019 continue;
2020 }
2021
2022 if (dfAttributes & DF_HAS_USES) {
2023 if (dfAttributes & DF_UA) {
2024 numUses++;
2025 } else if (dfAttributes & DF_UA_WIDE) {
2026 numUses += 2;
2027 }
2028 if (dfAttributes & DF_UB) {
2029 numUses++;
2030 } else if (dfAttributes & DF_UB_WIDE) {
2031 numUses += 2;
2032 }
2033 if (dfAttributes & DF_UC) {
2034 numUses++;
2035 } else if (dfAttributes & DF_UC_WIDE) {
2036 numUses += 2;
2037 }
2038 }
2039
2040 if (numUses) {
2041 mir->ssaRep->numUses = numUses;
2042 mir->ssaRep->uses = (int *)oatNew(sizeof(int) * numUses,
2043 false);
2044 mir->ssaRep->fpUse = (bool *)oatNew(sizeof(bool) * numUses,
2045 false);
2046 }
2047
2048 int numDefs = 0;
2049
2050 if (dfAttributes & DF_HAS_DEFS) {
2051 numDefs++;
2052 if (dfAttributes & DF_DA_WIDE) {
2053 numDefs++;
2054 }
2055 }
2056
2057 if (numDefs) {
2058 mir->ssaRep->numDefs = numDefs;
2059 mir->ssaRep->defs = (int *)oatNew(sizeof(int) * numDefs,
2060 false);
2061 mir->ssaRep->fpDef = (bool *)oatNew(sizeof(bool) * numDefs,
2062 false);
2063 }
2064
2065 DecodedInstruction *dInsn = &mir->dalvikInsn;
2066
2067 if (dfAttributes & DF_HAS_USES) {
2068 numUses = 0;
2069 if (dfAttributes & DF_UA) {
2070 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_A;
2071 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vA, numUses++);
2072 } else if (dfAttributes & DF_UA_WIDE) {
2073 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_A;
2074 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vA, numUses++);
2075 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_A;
2076 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vA+1, numUses++);
2077 }
2078 if (dfAttributes & DF_UB) {
2079 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_B;
2080 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vB, numUses++);
2081 } else if (dfAttributes & DF_UB_WIDE) {
2082 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_B;
2083 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vB, numUses++);
2084 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_B;
2085 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vB+1, numUses++);
2086 }
2087 if (dfAttributes & DF_UC) {
2088 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_C;
2089 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC, numUses++);
2090 } else if (dfAttributes & DF_UC_WIDE) {
2091 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_C;
2092 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC, numUses++);
2093 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_C;
2094 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC+1, numUses++);
2095 }
2096 }
2097 if (dfAttributes & DF_HAS_DEFS) {
2098 mir->ssaRep->fpDef[0] = dfAttributes & DF_FP_A;
2099 handleSSADef(cUnit, mir->ssaRep->defs, dInsn->vA, 0);
2100 if (dfAttributes & DF_DA_WIDE) {
2101 mir->ssaRep->fpDef[1] = dfAttributes & DF_FP_A;
2102 handleSSADef(cUnit, mir->ssaRep->defs, dInsn->vA+1, 1);
2103 }
2104 }
2105 }
2106
2107 /*
2108 * Take a snapshot of Dalvik->SSA mapping at the end of each block. The
2109 * input to PHI nodes can be derived from the snapshot of all predecessor
2110 * blocks.
2111 */
2112 bb->dataFlowInfo->dalvikToSSAMap =
Ian Rogers0cfe1fb2011-08-26 03:29:44 -07002113 (int *)oatNew(sizeof(int) * cUnit->method->NumRegisters(),
buzbee67bf8852011-08-17 17:51:35 -07002114 false);
2115
2116 memcpy(bb->dataFlowInfo->dalvikToSSAMap, cUnit->dalvikToSSAMap,
Ian Rogers0cfe1fb2011-08-26 03:29:44 -07002117 sizeof(int) * cUnit->method->NumRegisters());
buzbee67bf8852011-08-17 17:51:35 -07002118 return true;
2119}
2120
2121/* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
2122static void setConstant(CompilationUnit* cUnit, int ssaReg, int value)
2123{
2124 oatSetBit(cUnit->isConstantV, ssaReg);
2125 cUnit->constantValues[ssaReg] = value;
2126}
2127
2128bool oatDoConstantPropagation(CompilationUnit* cUnit, BasicBlock* bb)
2129{
2130 MIR* mir;
2131 ArenaBitVector *isConstantV = cUnit->isConstantV;
2132
2133 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
2134 int dfAttributes =
2135 oatDataFlowAttributes[mir->dalvikInsn.opcode];
2136
2137 DecodedInstruction *dInsn = &mir->dalvikInsn;
2138
2139 if (!(dfAttributes & DF_HAS_DEFS)) continue;
2140
2141 /* Handle instructions that set up constants directly */
2142 if (dfAttributes & DF_SETS_CONST) {
2143 if (dfAttributes & DF_DA) {
2144 switch (dInsn->opcode) {
2145 case OP_CONST_4:
2146 case OP_CONST_16:
2147 case OP_CONST:
2148 setConstant(cUnit, mir->ssaRep->defs[0], dInsn->vB);
2149 break;
2150 case OP_CONST_HIGH16:
2151 setConstant(cUnit, mir->ssaRep->defs[0],
2152 dInsn->vB << 16);
2153 break;
2154 default:
2155 break;
2156 }
2157 } else if (dfAttributes & DF_DA_WIDE) {
2158 switch (dInsn->opcode) {
2159 case OP_CONST_WIDE_16:
2160 case OP_CONST_WIDE_32:
2161 setConstant(cUnit, mir->ssaRep->defs[0], dInsn->vB);
2162 setConstant(cUnit, mir->ssaRep->defs[1], 0);
2163 break;
2164 case OP_CONST_WIDE:
2165 setConstant(cUnit, mir->ssaRep->defs[0],
2166 (int) dInsn->vB_wide);
2167 setConstant(cUnit, mir->ssaRep->defs[1],
2168 (int) (dInsn->vB_wide >> 32));
2169 break;
2170 case OP_CONST_WIDE_HIGH16:
2171 setConstant(cUnit, mir->ssaRep->defs[0], 0);
2172 setConstant(cUnit, mir->ssaRep->defs[1],
2173 dInsn->vB << 16);
2174 break;
2175 default:
2176 break;
2177 }
2178 }
2179 /* Handle instructions that set up constants directly */
2180 } else if (dfAttributes & DF_IS_MOVE) {
2181 int i;
2182
2183 for (i = 0; i < mir->ssaRep->numUses; i++) {
2184 if (!oatIsBitSet(isConstantV, mir->ssaRep->uses[i])) break;
2185 }
2186 /* Move a register holding a constant to another register */
2187 if (i == mir->ssaRep->numUses) {
2188 setConstant(cUnit, mir->ssaRep->defs[0],
2189 cUnit->constantValues[mir->ssaRep->uses[0]]);
2190 if (dfAttributes & DF_DA_WIDE) {
2191 setConstant(cUnit, mir->ssaRep->defs[1],
2192 cUnit->constantValues[mir->ssaRep->uses[1]]);
2193 }
2194 }
2195 }
2196 }
2197 /* TODO: implement code to handle arithmetic operations */
2198 return true;
2199}
2200
2201/* Setup the basic data structures for SSA conversion */
2202void oatInitializeSSAConversion(CompilationUnit* cUnit)
2203{
2204 int i;
Ian Rogers0cfe1fb2011-08-26 03:29:44 -07002205 int numDalvikReg = cUnit->method->NumRegisters();
buzbee67bf8852011-08-17 17:51:35 -07002206
2207 cUnit->ssaToDalvikMap = (GrowableList *)oatNew(sizeof(GrowableList),
2208 false);
2209 oatInitGrowableList(cUnit->ssaToDalvikMap, numDalvikReg);
2210
2211 /*
2212 * Initial number of SSA registers is equal to the number of Dalvik
2213 * registers.
2214 */
2215 cUnit->numSSARegs = numDalvikReg;
2216
2217 /*
2218 * Initialize the SSA2Dalvik map list. For the first numDalvikReg elements,
2219 * the subscript is 0 so we use the ENCODE_REG_SUB macro to encode the value
2220 * into "(0 << 16) | i"
2221 */
2222 for (i = 0; i < numDalvikReg; i++) {
2223 oatInsertGrowableList(cUnit->ssaToDalvikMap, ENCODE_REG_SUB(i, 0));
2224 }
2225
2226 /*
2227 * Initialize the DalvikToSSAMap map. The low 16 bit is the SSA register id,
2228 * while the high 16 bit is the current subscript. The original Dalvik
2229 * register N is mapped to SSA register N with subscript 0.
2230 */
2231 cUnit->dalvikToSSAMap = (int *)oatNew(sizeof(int) * numDalvikReg,
2232 false);
buzbeef0cde542011-09-13 14:55:02 -07002233 /* Keep track of the higest def for each dalvik reg */
2234 cUnit->SSALastDefs = (int *)oatNew(sizeof(int) * numDalvikReg,
2235 false);
2236
buzbee67bf8852011-08-17 17:51:35 -07002237 for (i = 0; i < numDalvikReg; i++) {
2238 cUnit->dalvikToSSAMap[i] = i;
buzbeef0cde542011-09-13 14:55:02 -07002239 cUnit->SSALastDefs[i] = 0;
buzbee67bf8852011-08-17 17:51:35 -07002240 }
2241
2242 /*
2243 * Allocate the BasicBlockDataFlow structure for the entry and code blocks
2244 */
2245 GrowableListIterator iterator;
2246
2247 oatGrowableListIteratorInit(&cUnit->blockList, &iterator);
2248
2249 while (true) {
2250 BasicBlock* bb = (BasicBlock *) oatGrowableListIteratorNext(&iterator);
2251 if (bb == NULL) break;
2252 if (bb->hidden == true) continue;
2253 if (bb->blockType == kDalvikByteCode ||
2254 bb->blockType == kEntryBlock ||
2255 bb->blockType == kExitBlock) {
2256 bb->dataFlowInfo = (BasicBlockDataFlow *)
2257 oatNew(sizeof(BasicBlockDataFlow),
2258 true);
2259 }
2260 }
2261}
2262
2263/* Clear the visited flag for each BB */
2264bool oatClearVisitedFlag(struct CompilationUnit* cUnit,
2265 struct BasicBlock* bb)
2266{
2267 bb->visited = false;
2268 return true;
2269}
2270
2271void oatDataFlowAnalysisDispatcher(CompilationUnit* cUnit,
2272 bool (*func)(CompilationUnit*, BasicBlock*),
2273 DataFlowAnalysisMode dfaMode,
2274 bool isIterative)
2275{
2276 bool change = true;
2277
2278 while (change) {
2279 change = false;
2280
2281 /* Scan all blocks and perform the operations specified in func */
2282 if (dfaMode == kAllNodes) {
2283 GrowableListIterator iterator;
2284 oatGrowableListIteratorInit(&cUnit->blockList, &iterator);
2285 while (true) {
2286 BasicBlock* bb =
2287 (BasicBlock *) oatGrowableListIteratorNext(&iterator);
2288 if (bb == NULL) break;
2289 if (bb->hidden == true) continue;
2290 change |= (*func)(cUnit, bb);
2291 }
2292 }
2293 /*
2294 * Scan all reachable blocks and perform the operations specified in
2295 * func.
2296 */
2297 else if (dfaMode == kReachableNodes) {
2298 int numReachableBlocks = cUnit->numReachableBlocks;
2299 int idx;
2300 const GrowableList *blockList = &cUnit->blockList;
2301
2302 for (idx = 0; idx < numReachableBlocks; idx++) {
2303 int blockIdx = cUnit->dfsOrder.elemList[idx];
2304 BasicBlock* bb =
2305 (BasicBlock *) oatGrowableListGetElement(blockList,
2306 blockIdx);
2307 change |= (*func)(cUnit, bb);
2308 }
2309 }
2310 /*
2311 * Scan all reachable blocks by the pre-order in the depth-first-search
2312 * CFG and perform the operations specified in func.
2313 */
2314 else if (dfaMode == kPreOrderDFSTraversal) {
2315 int numReachableBlocks = cUnit->numReachableBlocks;
2316 int idx;
2317 const GrowableList *blockList = &cUnit->blockList;
2318
2319 for (idx = 0; idx < numReachableBlocks; idx++) {
2320 int dfsIdx = cUnit->dfsOrder.elemList[idx];
2321 BasicBlock* bb =
2322 (BasicBlock *) oatGrowableListGetElement(blockList, dfsIdx);
2323 change |= (*func)(cUnit, bb);
2324 }
2325 }
2326 /*
2327 * Scan all reachable blocks by the post-order in the depth-first-search
2328 * CFG and perform the operations specified in func.
2329 */
2330 else if (dfaMode == kPostOrderDFSTraversal) {
2331 int numReachableBlocks = cUnit->numReachableBlocks;
2332 int idx;
2333 const GrowableList *blockList = &cUnit->blockList;
2334
2335 for (idx = numReachableBlocks - 1; idx >= 0; idx--) {
2336 int dfsIdx = cUnit->dfsOrder.elemList[idx];
2337 BasicBlock* bb =
2338 (BasicBlock *) oatGrowableListGetElement(blockList, dfsIdx);
2339 change |= (*func)(cUnit, bb);
2340 }
2341 }
2342 /*
2343 * Scan all reachable blocks by the post-order in the dominator tree
2344 * and perform the operations specified in func.
2345 */
2346 else if (dfaMode == kPostOrderDOMTraversal) {
2347 int numReachableBlocks = cUnit->numReachableBlocks;
2348 int idx;
2349 const GrowableList *blockList = &cUnit->blockList;
2350
2351 for (idx = 0; idx < numReachableBlocks; idx++) {
2352 int domIdx = cUnit->domPostOrderTraversal.elemList[idx];
2353 BasicBlock* bb =
2354 (BasicBlock *) oatGrowableListGetElement(blockList, domIdx);
2355 change |= (*func)(cUnit, bb);
2356 }
2357 }
2358 /* If isIterative is false, exit the loop after the first iteration */
2359 change &= isIterative;
2360 }
2361}
buzbee43a36422011-09-14 14:00:13 -07002362
2363static bool nullCheckEliminationInit(struct CompilationUnit* cUnit,
2364 struct BasicBlock* bb)
2365{
2366 if (bb->dataFlowInfo == NULL) return false;
2367 bb->dataFlowInfo->endingNullCheckV =
2368 oatAllocBitVector(cUnit->numSSARegs, false);
2369 oatClearAllBits(bb->dataFlowInfo->endingNullCheckV);
2370 return true;
2371}
2372
2373/* Eliminate unnecessary null checks for a basic block. */
2374static bool eliminateNullChecks( struct CompilationUnit* cUnit,
2375 struct BasicBlock* bb)
2376{
2377 if (bb->dataFlowInfo == NULL) return false;
2378 /*
2379 * Set initial state. Be conservative with catch
2380 * blocks and start with no assumptions about null check
2381 * status (except for "this").
2382 */
2383
2384 if ((bb->blockType == kEntryBlock) | bb->catchEntry) {
2385 oatClearAllBits(cUnit->tempSSARegisterV);
2386 if (!cUnit->method->IsStatic()) {
2387 // If non-static method, mark "this" as non-null
2388 int thisReg = cUnit->method->NumRegisters() -
2389 cUnit->method->NumIns();
2390 oatSetBit(cUnit->tempSSARegisterV, thisReg);
2391 }
2392 } else {
2393 // Starting state is intesection of all incoming arcs
2394 GrowableList* blockList = &cUnit->blockList;
2395 ArenaBitVectorIterator bvIterator;
2396 oatBitVectorIteratorInit(bb->predecessors, &bvIterator);
2397 int predBBIdx = oatBitVectorIteratorNext(&bvIterator);
2398 DCHECK(predBBIdx != -1);
2399 BasicBlock* predBB = (BasicBlock*)oatGrowableListGetElement(
2400 blockList, predBBIdx);
2401 oatCopyBitVector(cUnit->tempSSARegisterV,
2402 predBB->dataFlowInfo->endingNullCheckV);
2403 while (true) {
2404 predBBIdx = oatBitVectorIteratorNext(&bvIterator);
2405 if (predBBIdx == -1) break;
2406 predBB = (BasicBlock*)oatGrowableListGetElement(
2407 blockList, predBBIdx);
2408 oatIntersectBitVectors(cUnit->tempSSARegisterV,
2409 cUnit->tempSSARegisterV,
2410 predBB->dataFlowInfo->endingNullCheckV);
2411 }
2412 }
2413
2414 // Walk through the instruction in the block, updating as necessary
2415 for (MIR* mir = bb->firstMIRInsn; mir; mir = mir->next) {
2416 if (mir->ssaRep == NULL) {
2417 continue;
2418 }
2419 int dfAttributes =
2420 oatDataFlowAttributes[mir->dalvikInsn.opcode];
2421
2422 // Mark target of NEW* as non-null
2423 if (dfAttributes & DF_NON_NULL_DST) {
2424 oatSetBit(cUnit->tempSSARegisterV, mir->ssaRep->defs[0]);
2425 }
2426
2427 // Mark non-null returns from invoke-style NEW*
2428 if (dfAttributes & DF_NON_NULL_RET) {
2429 MIR* nextMir = mir->next;
2430 // Next should be an OP_MOVE_RESULT_OBJECT
2431 if (nextMir && nextMir->dalvikInsn.opcode == OP_MOVE_RESULT_OBJECT) {
2432 // Mark as null checked
2433 oatSetBit(cUnit->tempSSARegisterV, nextMir->ssaRep->uses[0]);
2434 } else {
2435 if (nextMir) {
2436 LOG(WARNING) << "Unexpected opcode following new: " <<
2437 (int)nextMir->dalvikInsn.opcode;
2438 } else {
2439 LOG(WARNING) << "Unexpected termination following new";
2440 }
2441 }
2442 }
2443
2444 /*
2445 * Propagate nullcheck state on register copies (including
2446 * Phi pseudo copies. For the latter, nullcheck state is
2447 * the "and" of all the Phi's operands.
2448 */
2449 if (dfAttributes & (DF_NULL_TRANSFER_0 | DF_NULL_TRANSFER_N)) {
2450 int tgtSreg = mir->ssaRep->defs[0];
2451 int operands = (dfAttributes & DF_NULL_TRANSFER_0) ? 1 :
2452 mir->ssaRep->numUses;
2453 bool nullChecked = true;
2454 for (int i = 0; i < operands; i++) {
2455 nullChecked &= oatIsBitSet(cUnit->tempSSARegisterV,
2456 mir->ssaRep->uses[i]);
2457 }
2458 if (nullChecked) {
2459 oatSetBit(cUnit->tempSSARegisterV, tgtSreg);
2460 }
2461 }
2462
2463 // Already nullchecked?
2464 if (dfAttributes & DF_HAS_NULL_CHKS) {
2465 int srcSreg = (dfAttributes & DF_NULL_CHK_1) ?
2466 mir->ssaRep->uses[1] : mir->ssaRep->uses[0];
2467 if (oatIsBitSet(cUnit->tempSSARegisterV, srcSreg)) {
2468 // Eliminate the null check
2469 mir->optimizationFlags |= MIR_IGNORE_NULL_CHECK;
2470 } else {
2471 // Mark sReg as null-checked
2472 oatSetBit(cUnit->tempSSARegisterV, srcSreg);
2473 }
2474 }
2475 }
2476
2477 // Did anything change?
2478 bool res = oatCompareBitVectors(bb->dataFlowInfo->endingNullCheckV,
2479 cUnit->tempSSARegisterV);
2480 if (res) {
2481 oatCopyBitVector(bb->dataFlowInfo->endingNullCheckV,
2482 cUnit->tempSSARegisterV);
2483 }
2484 return res;
2485}
2486
2487void oatMethodNullCheckElimination(CompilationUnit *cUnit)
2488{
2489 if (!(cUnit->disableOpt & (1 << kNullCheckElimination))) {
2490 DCHECK(cUnit->tempSSARegisterV != NULL);
2491 oatDataFlowAnalysisDispatcher(cUnit, nullCheckEliminationInit,
2492 kAllNodes,
2493 false /* isIterative */);
2494 oatDataFlowAnalysisDispatcher(cUnit, eliminateNullChecks,
2495 kPreOrderDFSTraversal,
2496 true /* isIterative */);
2497 }
2498}