blob: f73fa517af54d9f5e2061dc885ab827fcce4fcc2 [file] [log] [blame]
Elliott Hughes2faa5f12012-01-30 14:42:07 -08001/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Ian Rogersbdb03912011-09-14 00:55:44 -070016
Ian Rogers166db042013-07-26 12:05:57 -070017#ifndef ART_RUNTIME_ARCH_X86_CONTEXT_X86_H_
18#define ART_RUNTIME_ARCH_X86_CONTEXT_X86_H_
Ian Rogersbdb03912011-09-14 00:55:44 -070019
Ian Rogers166db042013-07-26 12:05:57 -070020#include "arch/context.h"
21#include "base/logging.h"
22#include "registers_x86.h"
Ian Rogers67375ac2011-09-14 00:55:44 -070023
Ian Rogersbdb03912011-09-14 00:55:44 -070024namespace art {
25namespace x86 {
26
27class X86Context : public Context {
28 public:
Mathieu Chartier67022432012-11-29 18:04:50 -080029 X86Context() {
30 Reset();
31 }
Ian Rogersbdb03912011-09-14 00:55:44 -070032 virtual ~X86Context() {}
33
Sebastien Hertz0bcb2902014-06-17 15:52:45 +020034 void Reset() OVERRIDE;
Mathieu Chartier67022432012-11-29 18:04:50 -080035
Sebastien Hertz0bcb2902014-06-17 15:52:45 +020036 void FillCalleeSaves(const StackVisitor& fr) OVERRIDE SHARED_LOCKS_REQUIRED(Locks::mutator_lock_);
Ian Rogersbdb03912011-09-14 00:55:44 -070037
Sebastien Hertz0bcb2902014-06-17 15:52:45 +020038 void SetSP(uintptr_t new_sp) OVERRIDE {
Sebastien Hertz96ba8dc2015-01-22 18:57:14 +010039 SetGPR(ESP, new_sp);
Ian Rogersbdb03912011-09-14 00:55:44 -070040 }
41
Sebastien Hertz0bcb2902014-06-17 15:52:45 +020042 void SetPC(uintptr_t new_pc) OVERRIDE {
Ian Rogersbdb03912011-09-14 00:55:44 -070043 eip_ = new_pc;
44 }
45
Sebastien Hertz96ba8dc2015-01-22 18:57:14 +010046 bool IsAccessibleGPR(uint32_t reg) OVERRIDE {
47 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters));
48 return gprs_[reg] != nullptr;
49 }
50
Sebastien Hertz0bcb2902014-06-17 15:52:45 +020051 uintptr_t* GetGPRAddress(uint32_t reg) OVERRIDE {
Mathieu Chartier17a7fc72014-02-19 11:18:43 -080052 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters));
Mathieu Chartier815873e2014-02-13 18:02:13 -080053 return gprs_[reg];
54 }
55
Sebastien Hertz96ba8dc2015-01-22 18:57:14 +010056 uintptr_t GetGPR(uint32_t reg) OVERRIDE {
Mathieu Chartier17a7fc72014-02-19 11:18:43 -080057 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters));
Sebastien Hertz96ba8dc2015-01-22 18:57:14 +010058 DCHECK(IsAccessibleGPR(reg));
59 return *gprs_[reg];
Ian Rogersd6b1f612011-09-27 13:38:14 -070060 }
61
Sebastien Hertz96ba8dc2015-01-22 18:57:14 +010062 void SetGPR(uint32_t reg, uintptr_t value) OVERRIDE;
Mathieu Chartier67022432012-11-29 18:04:50 -080063
Sebastien Hertz96ba8dc2015-01-22 18:57:14 +010064 bool IsAccessibleFPR(uint32_t reg) OVERRIDE {
Mark Mendell3d2c8e72015-01-13 17:32:55 -050065 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfFloatRegisters));
Sebastien Hertz96ba8dc2015-01-22 18:57:14 +010066 return fprs_[reg] != nullptr;
Mark Mendell3d2c8e72015-01-13 17:32:55 -050067 }
Sebastien Hertz0bcb2902014-06-17 15:52:45 +020068
Sebastien Hertz96ba8dc2015-01-22 18:57:14 +010069 uintptr_t GetFPR(uint32_t reg) OVERRIDE {
70 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfFloatRegisters));
71 DCHECK(IsAccessibleFPR(reg));
72 return *fprs_[reg];
73 }
74
75 void SetFPR(uint32_t reg, uintptr_t value) OVERRIDE;
Sebastien Hertz0bcb2902014-06-17 15:52:45 +020076
77 void SmashCallerSaves() OVERRIDE;
78 void DoLongJump() OVERRIDE;
Ian Rogersbdb03912011-09-14 00:55:44 -070079
80 private:
Mark Mendell3d2c8e72015-01-13 17:32:55 -050081 // Pretend XMM registers are made of uin32_t pieces, because they are manipulated
82 // in uint32_t chunks.
83 enum {
84 XMM0_0 = 0, XMM0_1,
85 XMM1_0, XMM1_1,
86 XMM2_0, XMM2_1,
87 XMM3_0, XMM3_1,
88 XMM4_0, XMM4_1,
89 XMM5_0, XMM5_1,
90 XMM6_0, XMM6_1,
91 XMM7_0, XMM7_1,
92 kNumberOfFloatRegisters};
93
94 // Pointers to register locations. Values are initialized to NULL or the special registers below.
Mathieu Chartier67022432012-11-29 18:04:50 -080095 uintptr_t* gprs_[kNumberOfCpuRegisters];
Mark Mendell3d2c8e72015-01-13 17:32:55 -050096 uintptr_t* fprs_[kNumberOfFloatRegisters];
Mathieu Chartier67022432012-11-29 18:04:50 -080097 // Hold values for esp and eip if they are not located within a stack frame. EIP is somewhat
98 // special in that it cannot be encoded normally as a register operand to an instruction (except
99 // in 64bit addressing modes).
100 uintptr_t esp_, eip_;
Ian Rogersbdb03912011-09-14 00:55:44 -0700101};
102} // namespace x86
103} // namespace art
104
Ian Rogers166db042013-07-26 12:05:57 -0700105#endif // ART_RUNTIME_ARCH_X86_CONTEXT_X86_H_