Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include "dex/compiler_ir.h" |
Vladimir Marko | 5c96e6b | 2013-11-14 15:34:17 +0000 | [diff] [blame] | 18 | #include "dex/frontend.h" |
| 19 | #include "dex/quick/dex_file_method_inliner.h" |
| 20 | #include "dex/quick/dex_file_to_method_inliner_map.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 21 | #include "dex_file-inl.h" |
Ian Rogers | 166db04 | 2013-07-26 12:05:57 -0700 | [diff] [blame] | 22 | #include "entrypoints/quick/quick_entrypoints.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 23 | #include "invoke_type.h" |
| 24 | #include "mirror/array.h" |
| 25 | #include "mirror/string.h" |
| 26 | #include "mir_to_lir-inl.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 27 | #include "x86/codegen_x86.h" |
| 28 | |
| 29 | namespace art { |
| 30 | |
| 31 | /* |
| 32 | * This source files contains "gen" codegen routines that should |
| 33 | * be applicable to most targets. Only mid-level support utilities |
| 34 | * and "op" calls may be used here. |
| 35 | */ |
| 36 | |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 37 | void Mir2Lir::AddIntrinsicLaunchpad(CallInfo* info, LIR* branch, LIR* resume) { |
| 38 | class IntrinsicLaunchpadPath : public Mir2Lir::LIRSlowPath { |
| 39 | public: |
| 40 | IntrinsicLaunchpadPath(Mir2Lir* m2l, CallInfo* info, LIR* branch, LIR* resume = nullptr) |
| 41 | : LIRSlowPath(m2l, info->offset, branch, resume), info_(info) { |
| 42 | } |
| 43 | |
| 44 | void Compile() { |
| 45 | m2l_->ResetRegPool(); |
| 46 | m2l_->ResetDefTracking(); |
| 47 | LIR* label = GenerateTargetLabel(); |
| 48 | label->opcode = kPseudoIntrinsicRetry; |
| 49 | // NOTE: GenInvokeNoInline() handles MarkSafepointPC. |
| 50 | m2l_->GenInvokeNoInline(info_); |
| 51 | if (cont_ != nullptr) { |
| 52 | m2l_->OpUnconditionalBranch(cont_); |
| 53 | } |
| 54 | } |
| 55 | |
| 56 | private: |
| 57 | CallInfo* const info_; |
| 58 | }; |
| 59 | |
| 60 | AddSlowPath(new (arena_) IntrinsicLaunchpadPath(this, info, branch, resume)); |
| 61 | } |
| 62 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 63 | /* |
| 64 | * To save scheduling time, helper calls are broken into two parts: generation of |
| 65 | * the helper target address, and the actuall call to the helper. Because x86 |
| 66 | * has a memory call operation, part 1 is a NOP for x86. For other targets, |
| 67 | * load arguments between the two parts. |
| 68 | */ |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 69 | int Mir2Lir::CallHelperSetup(ThreadOffset helper_offset) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 70 | return (cu_->instruction_set == kX86) ? 0 : LoadHelper(helper_offset); |
| 71 | } |
| 72 | |
| 73 | /* NOTE: if r_tgt is a temp, it will be freed following use */ |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 74 | LIR* Mir2Lir::CallHelper(int r_tgt, ThreadOffset helper_offset, bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 75 | LIR* call_inst; |
| 76 | if (cu_->instruction_set == kX86) { |
| 77 | call_inst = OpThreadMem(kOpBlx, helper_offset); |
| 78 | } else { |
| 79 | call_inst = OpReg(kOpBlx, r_tgt); |
| 80 | FreeTemp(r_tgt); |
| 81 | } |
| 82 | if (safepoint_pc) { |
| 83 | MarkSafepointPC(call_inst); |
| 84 | } |
| 85 | return call_inst; |
| 86 | } |
| 87 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 88 | void Mir2Lir::CallRuntimeHelperImm(ThreadOffset helper_offset, int arg0, bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 89 | int r_tgt = CallHelperSetup(helper_offset); |
| 90 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 91 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 92 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 93 | } |
| 94 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 95 | void Mir2Lir::CallRuntimeHelperReg(ThreadOffset helper_offset, int arg0, bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 96 | int r_tgt = CallHelperSetup(helper_offset); |
| 97 | OpRegCopy(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 98 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 99 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 100 | } |
| 101 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 102 | void Mir2Lir::CallRuntimeHelperRegLocation(ThreadOffset helper_offset, RegLocation arg0, |
| 103 | bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 104 | int r_tgt = CallHelperSetup(helper_offset); |
Zheng Xu | 9a84ad9 | 2014-03-13 18:00:21 +0000 | [diff] [blame] | 105 | if (arg0.wide) { |
| 106 | LoadValueDirectWideFixed(arg0, arg0.fp ? TargetReg(kFArg0) : TargetReg(kArg0), |
| 107 | arg0.fp ? TargetReg(kFArg1) : TargetReg(kArg1)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 108 | } else { |
Zheng Xu | 9a84ad9 | 2014-03-13 18:00:21 +0000 | [diff] [blame] | 109 | LoadValueDirectFixed(arg0, arg0.fp ? TargetReg(kFArg0) : TargetReg(kArg0)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 110 | } |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 111 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 112 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 113 | } |
| 114 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 115 | void Mir2Lir::CallRuntimeHelperImmImm(ThreadOffset helper_offset, int arg0, int arg1, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 116 | bool safepoint_pc) { |
| 117 | int r_tgt = CallHelperSetup(helper_offset); |
| 118 | LoadConstant(TargetReg(kArg0), arg0); |
| 119 | LoadConstant(TargetReg(kArg1), arg1); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 120 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 121 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 122 | } |
| 123 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 124 | void Mir2Lir::CallRuntimeHelperImmRegLocation(ThreadOffset helper_offset, int arg0, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 125 | RegLocation arg1, bool safepoint_pc) { |
| 126 | int r_tgt = CallHelperSetup(helper_offset); |
| 127 | if (arg1.wide == 0) { |
| 128 | LoadValueDirectFixed(arg1, TargetReg(kArg1)); |
| 129 | } else { |
| 130 | LoadValueDirectWideFixed(arg1, TargetReg(kArg1), TargetReg(kArg2)); |
| 131 | } |
| 132 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 133 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 134 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 135 | } |
| 136 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 137 | void Mir2Lir::CallRuntimeHelperRegLocationImm(ThreadOffset helper_offset, RegLocation arg0, int arg1, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 138 | bool safepoint_pc) { |
| 139 | int r_tgt = CallHelperSetup(helper_offset); |
| 140 | LoadValueDirectFixed(arg0, TargetReg(kArg0)); |
| 141 | LoadConstant(TargetReg(kArg1), arg1); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 142 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 143 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 144 | } |
| 145 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 146 | void Mir2Lir::CallRuntimeHelperImmReg(ThreadOffset helper_offset, int arg0, int arg1, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 147 | bool safepoint_pc) { |
| 148 | int r_tgt = CallHelperSetup(helper_offset); |
| 149 | OpRegCopy(TargetReg(kArg1), arg1); |
| 150 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 151 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 152 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 153 | } |
| 154 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 155 | void Mir2Lir::CallRuntimeHelperRegImm(ThreadOffset helper_offset, int arg0, int arg1, |
| 156 | bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 157 | int r_tgt = CallHelperSetup(helper_offset); |
| 158 | OpRegCopy(TargetReg(kArg0), arg0); |
| 159 | LoadConstant(TargetReg(kArg1), arg1); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 160 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 161 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 162 | } |
| 163 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 164 | void Mir2Lir::CallRuntimeHelperImmMethod(ThreadOffset helper_offset, int arg0, bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 165 | int r_tgt = CallHelperSetup(helper_offset); |
| 166 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 167 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 168 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 169 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 170 | } |
| 171 | |
Hiroshi Yamauchi | be1ca55 | 2014-01-15 11:46:48 -0800 | [diff] [blame] | 172 | void Mir2Lir::CallRuntimeHelperRegMethod(ThreadOffset helper_offset, int arg0, bool safepoint_pc) { |
| 173 | int r_tgt = CallHelperSetup(helper_offset); |
| 174 | DCHECK_NE(TargetReg(kArg1), arg0); |
| 175 | if (TargetReg(kArg0) != arg0) { |
| 176 | OpRegCopy(TargetReg(kArg0), arg0); |
| 177 | } |
| 178 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 179 | ClobberCallerSave(); |
| 180 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 181 | } |
| 182 | |
Hiroshi Yamauchi | bb8f0ab | 2014-01-27 16:50:29 -0800 | [diff] [blame] | 183 | void Mir2Lir::CallRuntimeHelperRegMethodRegLocation(ThreadOffset helper_offset, int arg0, |
| 184 | RegLocation arg2, bool safepoint_pc) { |
| 185 | int r_tgt = CallHelperSetup(helper_offset); |
| 186 | DCHECK_NE(TargetReg(kArg1), arg0); |
| 187 | if (TargetReg(kArg0) != arg0) { |
| 188 | OpRegCopy(TargetReg(kArg0), arg0); |
| 189 | } |
| 190 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 191 | LoadValueDirectFixed(arg2, TargetReg(kArg2)); |
| 192 | ClobberCallerSave(); |
| 193 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 194 | } |
| 195 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 196 | void Mir2Lir::CallRuntimeHelperRegLocationRegLocation(ThreadOffset helper_offset, RegLocation arg0, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 197 | RegLocation arg1, bool safepoint_pc) { |
| 198 | int r_tgt = CallHelperSetup(helper_offset); |
| 199 | if (arg0.wide == 0) { |
| 200 | LoadValueDirectFixed(arg0, arg0.fp ? TargetReg(kFArg0) : TargetReg(kArg0)); |
| 201 | if (arg1.wide == 0) { |
| 202 | if (cu_->instruction_set == kMips) { |
| 203 | LoadValueDirectFixed(arg1, arg1.fp ? TargetReg(kFArg2) : TargetReg(kArg1)); |
| 204 | } else { |
| 205 | LoadValueDirectFixed(arg1, TargetReg(kArg1)); |
| 206 | } |
| 207 | } else { |
| 208 | if (cu_->instruction_set == kMips) { |
| 209 | LoadValueDirectWideFixed(arg1, arg1.fp ? TargetReg(kFArg2) : TargetReg(kArg1), arg1.fp ? TargetReg(kFArg3) : TargetReg(kArg2)); |
| 210 | } else { |
| 211 | LoadValueDirectWideFixed(arg1, TargetReg(kArg1), TargetReg(kArg2)); |
| 212 | } |
| 213 | } |
| 214 | } else { |
| 215 | LoadValueDirectWideFixed(arg0, arg0.fp ? TargetReg(kFArg0) : TargetReg(kArg0), arg0.fp ? TargetReg(kFArg1) : TargetReg(kArg1)); |
| 216 | if (arg1.wide == 0) { |
| 217 | LoadValueDirectFixed(arg1, arg1.fp ? TargetReg(kFArg2) : TargetReg(kArg2)); |
| 218 | } else { |
| 219 | LoadValueDirectWideFixed(arg1, arg1.fp ? TargetReg(kFArg2) : TargetReg(kArg2), arg1.fp ? TargetReg(kFArg3) : TargetReg(kArg3)); |
| 220 | } |
| 221 | } |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 222 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 223 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 224 | } |
| 225 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 226 | void Mir2Lir::CallRuntimeHelperRegReg(ThreadOffset helper_offset, int arg0, int arg1, |
| 227 | bool safepoint_pc) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 228 | int r_tgt = CallHelperSetup(helper_offset); |
| 229 | DCHECK_NE(TargetReg(kArg0), arg1); // check copy into arg0 won't clobber arg1 |
| 230 | OpRegCopy(TargetReg(kArg0), arg0); |
| 231 | OpRegCopy(TargetReg(kArg1), arg1); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 232 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 233 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 234 | } |
| 235 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 236 | void Mir2Lir::CallRuntimeHelperRegRegImm(ThreadOffset helper_offset, int arg0, int arg1, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 237 | int arg2, bool safepoint_pc) { |
| 238 | int r_tgt = CallHelperSetup(helper_offset); |
| 239 | DCHECK_NE(TargetReg(kArg0), arg1); // check copy into arg0 won't clobber arg1 |
| 240 | OpRegCopy(TargetReg(kArg0), arg0); |
| 241 | OpRegCopy(TargetReg(kArg1), arg1); |
| 242 | LoadConstant(TargetReg(kArg2), arg2); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 243 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 244 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 245 | } |
| 246 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 247 | void Mir2Lir::CallRuntimeHelperImmMethodRegLocation(ThreadOffset helper_offset, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 248 | int arg0, RegLocation arg2, bool safepoint_pc) { |
| 249 | int r_tgt = CallHelperSetup(helper_offset); |
| 250 | LoadValueDirectFixed(arg2, TargetReg(kArg2)); |
| 251 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 252 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 253 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 254 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 255 | } |
| 256 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 257 | void Mir2Lir::CallRuntimeHelperImmMethodImm(ThreadOffset helper_offset, int arg0, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 258 | int arg2, bool safepoint_pc) { |
| 259 | int r_tgt = CallHelperSetup(helper_offset); |
| 260 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 261 | LoadConstant(TargetReg(kArg2), arg2); |
| 262 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 263 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 264 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 265 | } |
| 266 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 267 | void Mir2Lir::CallRuntimeHelperImmRegLocationRegLocation(ThreadOffset helper_offset, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 268 | int arg0, RegLocation arg1, |
| 269 | RegLocation arg2, bool safepoint_pc) { |
| 270 | int r_tgt = CallHelperSetup(helper_offset); |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 271 | DCHECK_EQ(arg1.wide, 0U); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 272 | LoadValueDirectFixed(arg1, TargetReg(kArg1)); |
| 273 | if (arg2.wide == 0) { |
| 274 | LoadValueDirectFixed(arg2, TargetReg(kArg2)); |
| 275 | } else { |
| 276 | LoadValueDirectWideFixed(arg2, TargetReg(kArg2), TargetReg(kArg3)); |
| 277 | } |
| 278 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 279 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 280 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 281 | } |
| 282 | |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 283 | void Mir2Lir::CallRuntimeHelperRegLocationRegLocationRegLocation(ThreadOffset helper_offset, |
| 284 | RegLocation arg0, RegLocation arg1, |
| 285 | RegLocation arg2, |
| 286 | bool safepoint_pc) { |
| 287 | int r_tgt = CallHelperSetup(helper_offset); |
| 288 | DCHECK_EQ(arg0.wide, 0U); |
| 289 | LoadValueDirectFixed(arg0, TargetReg(kArg0)); |
| 290 | DCHECK_EQ(arg1.wide, 0U); |
| 291 | LoadValueDirectFixed(arg1, TargetReg(kArg1)); |
| 292 | DCHECK_EQ(arg1.wide, 0U); |
| 293 | LoadValueDirectFixed(arg2, TargetReg(kArg2)); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 294 | ClobberCallerSave(); |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 295 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 296 | } |
| 297 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 298 | /* |
| 299 | * If there are any ins passed in registers that have not been promoted |
| 300 | * to a callee-save register, flush them to the frame. Perform intial |
| 301 | * assignment of promoted arguments. |
| 302 | * |
| 303 | * ArgLocs is an array of location records describing the incoming arguments |
| 304 | * with one location record per word of argument. |
| 305 | */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 306 | void Mir2Lir::FlushIns(RegLocation* ArgLocs, RegLocation rl_method) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 307 | /* |
| 308 | * Dummy up a RegLocation for the incoming Method* |
| 309 | * It will attempt to keep kArg0 live (or copy it to home location |
| 310 | * if promoted). |
| 311 | */ |
| 312 | RegLocation rl_src = rl_method; |
| 313 | rl_src.location = kLocPhysReg; |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 314 | rl_src.reg = RegStorage(RegStorage::k32BitSolo, TargetReg(kArg0)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 315 | rl_src.home = false; |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 316 | MarkLive(rl_src.reg.GetReg(), rl_src.s_reg_low); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 317 | StoreValue(rl_method, rl_src); |
| 318 | // If Method* has been promoted, explicitly flush |
| 319 | if (rl_method.location == kLocPhysReg) { |
| 320 | StoreWordDisp(TargetReg(kSp), 0, TargetReg(kArg0)); |
| 321 | } |
| 322 | |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 323 | if (cu_->num_ins == 0) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 324 | return; |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 325 | } |
| 326 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 327 | int start_vreg = cu_->num_dalvik_registers - cu_->num_ins; |
| 328 | /* |
| 329 | * Copy incoming arguments to their proper home locations. |
| 330 | * NOTE: an older version of dx had an issue in which |
| 331 | * it would reuse static method argument registers. |
| 332 | * This could result in the same Dalvik virtual register |
| 333 | * being promoted to both core and fp regs. To account for this, |
| 334 | * we only copy to the corresponding promoted physical register |
| 335 | * if it matches the type of the SSA name for the incoming |
| 336 | * argument. It is also possible that long and double arguments |
| 337 | * end up half-promoted. In those cases, we must flush the promoted |
| 338 | * half to memory as well. |
| 339 | */ |
| 340 | for (int i = 0; i < cu_->num_ins; i++) { |
| 341 | PromotionMap* v_map = &promotion_map_[start_vreg + i]; |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 342 | int reg = GetArgMappingToPhysicalReg(i); |
| 343 | |
| 344 | if (reg != INVALID_REG) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 345 | // If arriving in register |
| 346 | bool need_flush = true; |
| 347 | RegLocation* t_loc = &ArgLocs[i]; |
| 348 | if ((v_map->core_location == kLocPhysReg) && !t_loc->fp) { |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 349 | OpRegCopy(v_map->core_reg, reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 350 | need_flush = false; |
| 351 | } else if ((v_map->fp_location == kLocPhysReg) && t_loc->fp) { |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 352 | OpRegCopy(v_map->FpReg, reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 353 | need_flush = false; |
| 354 | } else { |
| 355 | need_flush = true; |
| 356 | } |
| 357 | |
buzbee | d0a03b8 | 2013-09-14 08:21:05 -0700 | [diff] [blame] | 358 | // For wide args, force flush if not fully promoted |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 359 | if (t_loc->wide) { |
| 360 | PromotionMap* p_map = v_map + (t_loc->high_word ? -1 : +1); |
buzbee | d0a03b8 | 2013-09-14 08:21:05 -0700 | [diff] [blame] | 361 | // Is only half promoted? |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 362 | need_flush |= (p_map->core_location != v_map->core_location) || |
| 363 | (p_map->fp_location != v_map->fp_location); |
buzbee | d0a03b8 | 2013-09-14 08:21:05 -0700 | [diff] [blame] | 364 | if ((cu_->instruction_set == kThumb2) && t_loc->fp && !need_flush) { |
| 365 | /* |
| 366 | * In Arm, a double is represented as a pair of consecutive single float |
| 367 | * registers starting at an even number. It's possible that both Dalvik vRegs |
| 368 | * representing the incoming double were independently promoted as singles - but |
| 369 | * not in a form usable as a double. If so, we need to flush - even though the |
| 370 | * incoming arg appears fully in register. At this point in the code, both |
| 371 | * halves of the double are promoted. Make sure they are in a usable form. |
| 372 | */ |
| 373 | int lowreg_index = start_vreg + i + (t_loc->high_word ? -1 : 0); |
| 374 | int low_reg = promotion_map_[lowreg_index].FpReg; |
| 375 | int high_reg = promotion_map_[lowreg_index + 1].FpReg; |
| 376 | if (((low_reg & 0x1) != 0) || (high_reg != (low_reg + 1))) { |
| 377 | need_flush = true; |
| 378 | } |
| 379 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 380 | } |
| 381 | if (need_flush) { |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 382 | StoreBaseDisp(TargetReg(kSp), SRegOffset(start_vreg + i), reg, kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 383 | } |
| 384 | } else { |
| 385 | // If arriving in frame & promoted |
| 386 | if (v_map->core_location == kLocPhysReg) { |
| 387 | LoadWordDisp(TargetReg(kSp), SRegOffset(start_vreg + i), |
| 388 | v_map->core_reg); |
| 389 | } |
| 390 | if (v_map->fp_location == kLocPhysReg) { |
| 391 | LoadWordDisp(TargetReg(kSp), SRegOffset(start_vreg + i), |
| 392 | v_map->FpReg); |
| 393 | } |
| 394 | } |
| 395 | } |
| 396 | } |
| 397 | |
| 398 | /* |
| 399 | * Bit of a hack here - in the absence of a real scheduling pass, |
| 400 | * emit the next instruction in static & direct invoke sequences. |
| 401 | */ |
| 402 | static int NextSDCallInsn(CompilationUnit* cu, CallInfo* info, |
| 403 | int state, const MethodReference& target_method, |
| 404 | uint32_t unused, |
| 405 | uintptr_t direct_code, uintptr_t direct_method, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 406 | InvokeType type) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 407 | Mir2Lir* cg = static_cast<Mir2Lir*>(cu->cg.get()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 408 | if (direct_code != 0 && direct_method != 0) { |
| 409 | switch (state) { |
| 410 | case 0: // Get the current Method* [sets kArg0] |
| 411 | if (direct_code != static_cast<unsigned int>(-1)) { |
Ian Rogers | 83883d7 | 2013-10-21 21:07:24 -0700 | [diff] [blame] | 412 | if (cu->instruction_set != kX86) { |
| 413 | cg->LoadConstant(cg->TargetReg(kInvokeTgt), direct_code); |
| 414 | } |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 415 | } else if (cu->instruction_set != kX86) { |
Jeff Hao | 49161ce | 2014-03-12 11:05:25 -0700 | [diff] [blame] | 416 | cg->LoadCodeAddress(target_method, type, kInvokeTgt); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 417 | } |
| 418 | if (direct_method != static_cast<unsigned int>(-1)) { |
| 419 | cg->LoadConstant(cg->TargetReg(kArg0), direct_method); |
| 420 | } else { |
Jeff Hao | 49161ce | 2014-03-12 11:05:25 -0700 | [diff] [blame] | 421 | cg->LoadMethodAddress(target_method, type, kArg0); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 422 | } |
| 423 | break; |
| 424 | default: |
| 425 | return -1; |
| 426 | } |
| 427 | } else { |
| 428 | switch (state) { |
| 429 | case 0: // Get the current Method* [sets kArg0] |
| 430 | // TUNING: we can save a reg copy if Method* has been promoted. |
| 431 | cg->LoadCurrMethodDirect(cg->TargetReg(kArg0)); |
| 432 | break; |
| 433 | case 1: // Get method->dex_cache_resolved_methods_ |
| 434 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
Brian Carlstrom | ea46f95 | 2013-07-30 01:26:50 -0700 | [diff] [blame] | 435 | mirror::ArtMethod::DexCacheResolvedMethodsOffset().Int32Value(), cg->TargetReg(kArg0)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 436 | // Set up direct code if known. |
| 437 | if (direct_code != 0) { |
| 438 | if (direct_code != static_cast<unsigned int>(-1)) { |
| 439 | cg->LoadConstant(cg->TargetReg(kInvokeTgt), direct_code); |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 440 | } else if (cu->instruction_set != kX86) { |
Ian Rogers | 83883d7 | 2013-10-21 21:07:24 -0700 | [diff] [blame] | 441 | CHECK_LT(target_method.dex_method_index, target_method.dex_file->NumMethodIds()); |
Jeff Hao | 49161ce | 2014-03-12 11:05:25 -0700 | [diff] [blame] | 442 | cg->LoadCodeAddress(target_method, type, kInvokeTgt); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 443 | } |
| 444 | } |
| 445 | break; |
| 446 | case 2: // Grab target method* |
| 447 | CHECK_EQ(cu->dex_file, target_method.dex_file); |
| 448 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
| 449 | mirror::Array::DataOffset(sizeof(mirror::Object*)).Int32Value() + |
| 450 | (target_method.dex_method_index * 4), |
| 451 | cg-> TargetReg(kArg0)); |
| 452 | break; |
| 453 | case 3: // Grab the code from the method* |
| 454 | if (cu->instruction_set != kX86) { |
| 455 | if (direct_code == 0) { |
| 456 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
Ian Rogers | ef7d42f | 2014-01-06 12:55:46 -0800 | [diff] [blame] | 457 | mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset().Int32Value(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 458 | cg->TargetReg(kInvokeTgt)); |
| 459 | } |
| 460 | break; |
| 461 | } |
| 462 | // Intentional fallthrough for x86 |
| 463 | default: |
| 464 | return -1; |
| 465 | } |
| 466 | } |
| 467 | return state + 1; |
| 468 | } |
| 469 | |
| 470 | /* |
| 471 | * Bit of a hack here - in the absence of a real scheduling pass, |
| 472 | * emit the next instruction in a virtual invoke sequence. |
| 473 | * We can use kLr as a temp prior to target address loading |
| 474 | * Note also that we'll load the first argument ("this") into |
| 475 | * kArg1 here rather than the standard LoadArgRegs. |
| 476 | */ |
| 477 | static int NextVCallInsn(CompilationUnit* cu, CallInfo* info, |
| 478 | int state, const MethodReference& target_method, |
| 479 | uint32_t method_idx, uintptr_t unused, uintptr_t unused2, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 480 | InvokeType unused3) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 481 | Mir2Lir* cg = static_cast<Mir2Lir*>(cu->cg.get()); |
| 482 | /* |
| 483 | * This is the fast path in which the target virtual method is |
| 484 | * fully resolved at compile time. |
| 485 | */ |
| 486 | switch (state) { |
| 487 | case 0: { // Get "this" [set kArg1] |
| 488 | RegLocation rl_arg = info->args[0]; |
| 489 | cg->LoadValueDirectFixed(rl_arg, cg->TargetReg(kArg1)); |
| 490 | break; |
| 491 | } |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 492 | case 1: // Is "this" null? [use kArg1] |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 493 | cg->GenNullCheck(cg->TargetReg(kArg1), info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 494 | // get this->klass_ [use kArg1, set kInvokeTgt] |
| 495 | cg->LoadWordDisp(cg->TargetReg(kArg1), mirror::Object::ClassOffset().Int32Value(), |
| 496 | cg->TargetReg(kInvokeTgt)); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 497 | cg->MarkPossibleNullPointerException(info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 498 | break; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 499 | case 2: // Get this->klass_->vtable [usr kInvokeTgt, set kInvokeTgt] |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 500 | cg->LoadWordDisp(cg->TargetReg(kInvokeTgt), mirror::Class::VTableOffset().Int32Value(), |
| 501 | cg->TargetReg(kInvokeTgt)); |
| 502 | break; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 503 | case 3: // Get target method [use kInvokeTgt, set kArg0] |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 504 | cg->LoadWordDisp(cg->TargetReg(kInvokeTgt), (method_idx * 4) + |
| 505 | mirror::Array::DataOffset(sizeof(mirror::Object*)).Int32Value(), |
| 506 | cg->TargetReg(kArg0)); |
| 507 | break; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 508 | case 4: // Get the compiled code address [uses kArg0, sets kInvokeTgt] |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 509 | if (cu->instruction_set != kX86) { |
| 510 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
Ian Rogers | ef7d42f | 2014-01-06 12:55:46 -0800 | [diff] [blame] | 511 | mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset().Int32Value(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 512 | cg->TargetReg(kInvokeTgt)); |
| 513 | break; |
| 514 | } |
| 515 | // Intentional fallthrough for X86 |
| 516 | default: |
| 517 | return -1; |
| 518 | } |
| 519 | return state + 1; |
| 520 | } |
| 521 | |
| 522 | /* |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 523 | * Emit the next instruction in an invoke interface sequence. This will do a lookup in the |
| 524 | * class's IMT, calling either the actual method or art_quick_imt_conflict_trampoline if |
| 525 | * more than one interface method map to the same index. Note also that we'll load the first |
| 526 | * argument ("this") into kArg1 here rather than the standard LoadArgRegs. |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 527 | */ |
| 528 | static int NextInterfaceCallInsn(CompilationUnit* cu, CallInfo* info, int state, |
| 529 | const MethodReference& target_method, |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 530 | uint32_t method_idx, uintptr_t unused, |
| 531 | uintptr_t direct_method, InvokeType unused2) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 532 | Mir2Lir* cg = static_cast<Mir2Lir*>(cu->cg.get()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 533 | |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 534 | switch (state) { |
| 535 | case 0: // Set target method index in case of conflict [set kHiddenArg, kHiddenFpArg (x86)] |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 536 | CHECK_LT(target_method.dex_method_index, target_method.dex_file->NumMethodIds()); |
| 537 | cg->LoadConstant(cg->TargetReg(kHiddenArg), target_method.dex_method_index); |
| 538 | if (cu->instruction_set == kX86) { |
| 539 | cg->OpRegCopy(cg->TargetReg(kHiddenFpArg), cg->TargetReg(kHiddenArg)); |
| 540 | } |
| 541 | break; |
| 542 | case 1: { // Get "this" [set kArg1] |
| 543 | RegLocation rl_arg = info->args[0]; |
| 544 | cg->LoadValueDirectFixed(rl_arg, cg->TargetReg(kArg1)); |
| 545 | break; |
| 546 | } |
| 547 | case 2: // Is "this" null? [use kArg1] |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 548 | cg->GenNullCheck(cg->TargetReg(kArg1), info->opt_flags); |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 549 | // Get this->klass_ [use kArg1, set kInvokeTgt] |
| 550 | cg->LoadWordDisp(cg->TargetReg(kArg1), mirror::Object::ClassOffset().Int32Value(), |
| 551 | cg->TargetReg(kInvokeTgt)); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 552 | cg->MarkPossibleNullPointerException(info->opt_flags); |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 553 | break; |
| 554 | case 3: // Get this->klass_->imtable [use kInvokeTgt, set kInvokeTgt] |
| 555 | cg->LoadWordDisp(cg->TargetReg(kInvokeTgt), mirror::Class::ImTableOffset().Int32Value(), |
| 556 | cg->TargetReg(kInvokeTgt)); |
| 557 | break; |
| 558 | case 4: // Get target method [use kInvokeTgt, set kArg0] |
| 559 | cg->LoadWordDisp(cg->TargetReg(kInvokeTgt), ((method_idx % ClassLinker::kImtSize) * 4) + |
| 560 | mirror::Array::DataOffset(sizeof(mirror::Object*)).Int32Value(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 561 | cg->TargetReg(kArg0)); |
| 562 | break; |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 563 | case 5: // Get the compiled code address [use kArg0, set kInvokeTgt] |
| 564 | if (cu->instruction_set != kX86) { |
| 565 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
Ian Rogers | ef7d42f | 2014-01-06 12:55:46 -0800 | [diff] [blame] | 566 | mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset().Int32Value(), |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 567 | cg->TargetReg(kInvokeTgt)); |
| 568 | break; |
| 569 | } |
| 570 | // Intentional fallthrough for X86 |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 571 | default: |
| 572 | return -1; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 573 | } |
| 574 | return state + 1; |
| 575 | } |
| 576 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 577 | static int NextInvokeInsnSP(CompilationUnit* cu, CallInfo* info, ThreadOffset trampoline, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 578 | int state, const MethodReference& target_method, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 579 | uint32_t method_idx) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 580 | Mir2Lir* cg = static_cast<Mir2Lir*>(cu->cg.get()); |
| 581 | /* |
| 582 | * This handles the case in which the base method is not fully |
| 583 | * resolved at compile time, we bail to a runtime helper. |
| 584 | */ |
| 585 | if (state == 0) { |
| 586 | if (cu->instruction_set != kX86) { |
| 587 | // Load trampoline target |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 588 | cg->LoadWordDisp(cg->TargetReg(kSelf), trampoline.Int32Value(), cg->TargetReg(kInvokeTgt)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 589 | } |
| 590 | // Load kArg0 with method index |
| 591 | CHECK_EQ(cu->dex_file, target_method.dex_file); |
| 592 | cg->LoadConstant(cg->TargetReg(kArg0), target_method.dex_method_index); |
| 593 | return 1; |
| 594 | } |
| 595 | return -1; |
| 596 | } |
| 597 | |
| 598 | static int NextStaticCallInsnSP(CompilationUnit* cu, CallInfo* info, |
| 599 | int state, |
| 600 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 601 | uint32_t unused, uintptr_t unused2, |
| 602 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 603 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeStaticTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 604 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 605 | } |
| 606 | |
| 607 | static int NextDirectCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, |
| 608 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 609 | uint32_t unused, uintptr_t unused2, |
| 610 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 611 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeDirectTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 612 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 613 | } |
| 614 | |
| 615 | static int NextSuperCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, |
| 616 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 617 | uint32_t unused, uintptr_t unused2, |
| 618 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 619 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeSuperTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 620 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 621 | } |
| 622 | |
| 623 | static int NextVCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, |
| 624 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 625 | uint32_t unused, uintptr_t unused2, |
| 626 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 627 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeVirtualTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 628 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 629 | } |
| 630 | |
| 631 | static int NextInterfaceCallInsnWithAccessCheck(CompilationUnit* cu, |
| 632 | CallInfo* info, int state, |
| 633 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 634 | uint32_t unused, uintptr_t unused2, |
| 635 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 636 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeInterfaceTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 637 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 638 | } |
| 639 | |
| 640 | int Mir2Lir::LoadArgRegs(CallInfo* info, int call_state, |
| 641 | NextCallInsn next_call_insn, |
| 642 | const MethodReference& target_method, |
| 643 | uint32_t vtable_idx, uintptr_t direct_code, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 644 | uintptr_t direct_method, InvokeType type, bool skip_this) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 645 | int last_arg_reg = TargetReg(kArg3); |
| 646 | int next_reg = TargetReg(kArg1); |
| 647 | int next_arg = 0; |
| 648 | if (skip_this) { |
| 649 | next_reg++; |
| 650 | next_arg++; |
| 651 | } |
| 652 | for (; (next_reg <= last_arg_reg) && (next_arg < info->num_arg_words); next_reg++) { |
| 653 | RegLocation rl_arg = info->args[next_arg++]; |
| 654 | rl_arg = UpdateRawLoc(rl_arg); |
| 655 | if (rl_arg.wide && (next_reg <= TargetReg(kArg2))) { |
| 656 | LoadValueDirectWideFixed(rl_arg, next_reg, next_reg + 1); |
| 657 | next_reg++; |
| 658 | next_arg++; |
| 659 | } else { |
| 660 | if (rl_arg.wide) { |
| 661 | rl_arg.wide = false; |
| 662 | rl_arg.is_const = false; |
| 663 | } |
| 664 | LoadValueDirectFixed(rl_arg, next_reg); |
| 665 | } |
| 666 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 667 | direct_code, direct_method, type); |
| 668 | } |
| 669 | return call_state; |
| 670 | } |
| 671 | |
| 672 | /* |
| 673 | * Load up to 5 arguments, the first three of which will be in |
| 674 | * kArg1 .. kArg3. On entry kArg0 contains the current method pointer, |
| 675 | * and as part of the load sequence, it must be replaced with |
| 676 | * the target method pointer. Note, this may also be called |
| 677 | * for "range" variants if the number of arguments is 5 or fewer. |
| 678 | */ |
| 679 | int Mir2Lir::GenDalvikArgsNoRange(CallInfo* info, |
| 680 | int call_state, LIR** pcrLabel, NextCallInsn next_call_insn, |
| 681 | const MethodReference& target_method, |
| 682 | uint32_t vtable_idx, uintptr_t direct_code, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 683 | uintptr_t direct_method, InvokeType type, bool skip_this) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 684 | RegLocation rl_arg; |
| 685 | |
| 686 | /* If no arguments, just return */ |
| 687 | if (info->num_arg_words == 0) |
| 688 | return call_state; |
| 689 | |
| 690 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 691 | direct_code, direct_method, type); |
| 692 | |
| 693 | DCHECK_LE(info->num_arg_words, 5); |
| 694 | if (info->num_arg_words > 3) { |
| 695 | int32_t next_use = 3; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 696 | // Detect special case of wide arg spanning arg3/arg4 |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 697 | RegLocation rl_use0 = info->args[0]; |
| 698 | RegLocation rl_use1 = info->args[1]; |
| 699 | RegLocation rl_use2 = info->args[2]; |
| 700 | if (((!rl_use0.wide && !rl_use1.wide) || rl_use0.wide) && |
| 701 | rl_use2.wide) { |
| 702 | int reg = -1; |
| 703 | // Wide spans, we need the 2nd half of uses[2]. |
| 704 | rl_arg = UpdateLocWide(rl_use2); |
| 705 | if (rl_arg.location == kLocPhysReg) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 706 | reg = rl_arg.reg.GetHighReg(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 707 | } else { |
| 708 | // kArg2 & rArg3 can safely be used here |
| 709 | reg = TargetReg(kArg3); |
| 710 | LoadWordDisp(TargetReg(kSp), SRegOffset(rl_arg.s_reg_low) + 4, reg); |
| 711 | call_state = next_call_insn(cu_, info, call_state, target_method, |
| 712 | vtable_idx, direct_code, direct_method, type); |
| 713 | } |
| 714 | StoreBaseDisp(TargetReg(kSp), (next_use + 1) * 4, reg, kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 715 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 716 | direct_code, direct_method, type); |
| 717 | next_use++; |
| 718 | } |
| 719 | // Loop through the rest |
| 720 | while (next_use < info->num_arg_words) { |
| 721 | int low_reg; |
| 722 | int high_reg = -1; |
| 723 | rl_arg = info->args[next_use]; |
| 724 | rl_arg = UpdateRawLoc(rl_arg); |
| 725 | if (rl_arg.location == kLocPhysReg) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 726 | low_reg = rl_arg.reg.GetReg(); |
| 727 | if (rl_arg.wide) { |
| 728 | high_reg = rl_arg.reg.GetHighReg(); |
| 729 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 730 | } else { |
| 731 | low_reg = TargetReg(kArg2); |
| 732 | if (rl_arg.wide) { |
| 733 | high_reg = TargetReg(kArg3); |
| 734 | LoadValueDirectWideFixed(rl_arg, low_reg, high_reg); |
| 735 | } else { |
| 736 | LoadValueDirectFixed(rl_arg, low_reg); |
| 737 | } |
| 738 | call_state = next_call_insn(cu_, info, call_state, target_method, |
| 739 | vtable_idx, direct_code, direct_method, type); |
| 740 | } |
| 741 | int outs_offset = (next_use + 1) * 4; |
| 742 | if (rl_arg.wide) { |
| 743 | StoreBaseDispWide(TargetReg(kSp), outs_offset, low_reg, high_reg); |
| 744 | next_use += 2; |
| 745 | } else { |
| 746 | StoreWordDisp(TargetReg(kSp), outs_offset, low_reg); |
| 747 | next_use++; |
| 748 | } |
| 749 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 750 | direct_code, direct_method, type); |
| 751 | } |
| 752 | } |
| 753 | |
| 754 | call_state = LoadArgRegs(info, call_state, next_call_insn, |
| 755 | target_method, vtable_idx, direct_code, direct_method, |
| 756 | type, skip_this); |
| 757 | |
| 758 | if (pcrLabel) { |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 759 | *pcrLabel = GenNullCheck(TargetReg(kArg1), info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 760 | } |
| 761 | return call_state; |
| 762 | } |
| 763 | |
| 764 | /* |
| 765 | * May have 0+ arguments (also used for jumbo). Note that |
| 766 | * source virtual registers may be in physical registers, so may |
| 767 | * need to be flushed to home location before copying. This |
| 768 | * applies to arg3 and above (see below). |
| 769 | * |
| 770 | * Two general strategies: |
| 771 | * If < 20 arguments |
| 772 | * Pass args 3-18 using vldm/vstm block copy |
| 773 | * Pass arg0, arg1 & arg2 in kArg1-kArg3 |
| 774 | * If 20+ arguments |
| 775 | * Pass args arg19+ using memcpy block copy |
| 776 | * Pass arg0, arg1 & arg2 in kArg1-kArg3 |
| 777 | * |
| 778 | */ |
| 779 | int Mir2Lir::GenDalvikArgsRange(CallInfo* info, int call_state, |
| 780 | LIR** pcrLabel, NextCallInsn next_call_insn, |
| 781 | const MethodReference& target_method, |
| 782 | uint32_t vtable_idx, uintptr_t direct_code, uintptr_t direct_method, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 783 | InvokeType type, bool skip_this) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 784 | // If we can treat it as non-range (Jumbo ops will use range form) |
| 785 | if (info->num_arg_words <= 5) |
| 786 | return GenDalvikArgsNoRange(info, call_state, pcrLabel, |
| 787 | next_call_insn, target_method, vtable_idx, |
| 788 | direct_code, direct_method, type, skip_this); |
| 789 | /* |
| 790 | * First load the non-register arguments. Both forms expect all |
| 791 | * of the source arguments to be in their home frame location, so |
| 792 | * scan the s_reg names and flush any that have been promoted to |
| 793 | * frame backing storage. |
| 794 | */ |
| 795 | // Scan the rest of the args - if in phys_reg flush to memory |
| 796 | for (int next_arg = 0; next_arg < info->num_arg_words;) { |
| 797 | RegLocation loc = info->args[next_arg]; |
| 798 | if (loc.wide) { |
| 799 | loc = UpdateLocWide(loc); |
| 800 | if ((next_arg >= 2) && (loc.location == kLocPhysReg)) { |
| 801 | StoreBaseDispWide(TargetReg(kSp), SRegOffset(loc.s_reg_low), |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 802 | loc.reg.GetReg(), loc.reg.GetHighReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 803 | } |
| 804 | next_arg += 2; |
| 805 | } else { |
| 806 | loc = UpdateLoc(loc); |
| 807 | if ((next_arg >= 3) && (loc.location == kLocPhysReg)) { |
| 808 | StoreBaseDisp(TargetReg(kSp), SRegOffset(loc.s_reg_low), |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 809 | loc.reg.GetReg(), kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 810 | } |
| 811 | next_arg++; |
| 812 | } |
| 813 | } |
| 814 | |
Razvan A Lupusoru | 2c498d1 | 2014-01-29 16:02:57 -0800 | [diff] [blame] | 815 | // Logic below assumes that Method pointer is at offset zero from SP. |
| 816 | DCHECK_EQ(VRegOffset(static_cast<int>(kVRegMethodPtrBaseReg)), 0); |
| 817 | |
| 818 | // The first 3 arguments are passed via registers. |
| 819 | // TODO: For 64-bit, instead of hardcoding 4 for Method* size, we should either |
| 820 | // get size of uintptr_t or size of object reference according to model being used. |
| 821 | int outs_offset = 4 /* Method* */ + (3 * sizeof(uint32_t)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 822 | int start_offset = SRegOffset(info->args[3].s_reg_low); |
Razvan A Lupusoru | 2c498d1 | 2014-01-29 16:02:57 -0800 | [diff] [blame] | 823 | int regs_left_to_pass_via_stack = info->num_arg_words - 3; |
| 824 | DCHECK_GT(regs_left_to_pass_via_stack, 0); |
| 825 | |
| 826 | if (cu_->instruction_set == kThumb2 && regs_left_to_pass_via_stack <= 16) { |
| 827 | // Use vldm/vstm pair using kArg3 as a temp |
| 828 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 829 | direct_code, direct_method, type); |
| 830 | OpRegRegImm(kOpAdd, TargetReg(kArg3), TargetReg(kSp), start_offset); |
| 831 | LIR* ld = OpVldm(TargetReg(kArg3), regs_left_to_pass_via_stack); |
| 832 | // TUNING: loosen barrier |
| 833 | ld->u.m.def_mask = ENCODE_ALL; |
| 834 | SetMemRefType(ld, true /* is_load */, kDalvikReg); |
| 835 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 836 | direct_code, direct_method, type); |
| 837 | OpRegRegImm(kOpAdd, TargetReg(kArg3), TargetReg(kSp), 4 /* Method* */ + (3 * 4)); |
| 838 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 839 | direct_code, direct_method, type); |
| 840 | LIR* st = OpVstm(TargetReg(kArg3), regs_left_to_pass_via_stack); |
| 841 | SetMemRefType(st, false /* is_load */, kDalvikReg); |
| 842 | st->u.m.def_mask = ENCODE_ALL; |
| 843 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 844 | direct_code, direct_method, type); |
| 845 | } else if (cu_->instruction_set == kX86) { |
| 846 | int current_src_offset = start_offset; |
| 847 | int current_dest_offset = outs_offset; |
| 848 | |
| 849 | while (regs_left_to_pass_via_stack > 0) { |
| 850 | // This is based on the knowledge that the stack itself is 16-byte aligned. |
| 851 | bool src_is_16b_aligned = (current_src_offset & 0xF) == 0; |
| 852 | bool dest_is_16b_aligned = (current_dest_offset & 0xF) == 0; |
| 853 | size_t bytes_to_move; |
| 854 | |
| 855 | /* |
| 856 | * The amount to move defaults to 32-bit. If there are 4 registers left to move, then do a |
| 857 | * a 128-bit move because we won't get the chance to try to aligned. If there are more than |
| 858 | * 4 registers left to move, consider doing a 128-bit only if either src or dest are aligned. |
| 859 | * We do this because we could potentially do a smaller move to align. |
| 860 | */ |
| 861 | if (regs_left_to_pass_via_stack == 4 || |
| 862 | (regs_left_to_pass_via_stack > 4 && (src_is_16b_aligned || dest_is_16b_aligned))) { |
| 863 | // Moving 128-bits via xmm register. |
| 864 | bytes_to_move = sizeof(uint32_t) * 4; |
| 865 | |
| 866 | // Allocate a free xmm temp. Since we are working through the calling sequence, |
| 867 | // we expect to have an xmm temporary available. |
| 868 | int temp = AllocTempDouble(); |
| 869 | CHECK_GT(temp, 0); |
| 870 | |
| 871 | LIR* ld1 = nullptr; |
| 872 | LIR* ld2 = nullptr; |
| 873 | LIR* st1 = nullptr; |
| 874 | LIR* st2 = nullptr; |
| 875 | |
| 876 | /* |
| 877 | * The logic is similar for both loads and stores. If we have 16-byte alignment, |
| 878 | * do an aligned move. If we have 8-byte alignment, then do the move in two |
| 879 | * parts. This approach prevents possible cache line splits. Finally, fall back |
| 880 | * to doing an unaligned move. In most cases we likely won't split the cache |
| 881 | * line but we cannot prove it and thus take a conservative approach. |
| 882 | */ |
| 883 | bool src_is_8b_aligned = (current_src_offset & 0x7) == 0; |
| 884 | bool dest_is_8b_aligned = (current_dest_offset & 0x7) == 0; |
| 885 | |
| 886 | if (src_is_16b_aligned) { |
| 887 | ld1 = OpMovRegMem(temp, TargetReg(kSp), current_src_offset, kMovA128FP); |
| 888 | } else if (src_is_8b_aligned) { |
| 889 | ld1 = OpMovRegMem(temp, TargetReg(kSp), current_src_offset, kMovLo128FP); |
| 890 | ld2 = OpMovRegMem(temp, TargetReg(kSp), current_src_offset + (bytes_to_move >> 1), kMovHi128FP); |
| 891 | } else { |
| 892 | ld1 = OpMovRegMem(temp, TargetReg(kSp), current_src_offset, kMovU128FP); |
| 893 | } |
| 894 | |
| 895 | if (dest_is_16b_aligned) { |
| 896 | st1 = OpMovMemReg(TargetReg(kSp), current_dest_offset, temp, kMovA128FP); |
| 897 | } else if (dest_is_8b_aligned) { |
| 898 | st1 = OpMovMemReg(TargetReg(kSp), current_dest_offset, temp, kMovLo128FP); |
| 899 | st2 = OpMovMemReg(TargetReg(kSp), current_dest_offset + (bytes_to_move >> 1), temp, kMovHi128FP); |
| 900 | } else { |
| 901 | st1 = OpMovMemReg(TargetReg(kSp), current_dest_offset, temp, kMovU128FP); |
| 902 | } |
| 903 | |
| 904 | // TODO If we could keep track of aliasing information for memory accesses that are wider |
| 905 | // than 64-bit, we wouldn't need to set up a barrier. |
| 906 | if (ld1 != nullptr) { |
| 907 | if (ld2 != nullptr) { |
| 908 | // For 64-bit load we can actually set up the aliasing information. |
| 909 | AnnotateDalvikRegAccess(ld1, current_src_offset >> 2, true, true); |
| 910 | AnnotateDalvikRegAccess(ld2, (current_src_offset + (bytes_to_move >> 1)) >> 2, true, true); |
| 911 | } else { |
| 912 | // Set barrier for 128-bit load. |
| 913 | SetMemRefType(ld1, true /* is_load */, kDalvikReg); |
| 914 | ld1->u.m.def_mask = ENCODE_ALL; |
| 915 | } |
| 916 | } |
| 917 | if (st1 != nullptr) { |
| 918 | if (st2 != nullptr) { |
| 919 | // For 64-bit store we can actually set up the aliasing information. |
| 920 | AnnotateDalvikRegAccess(st1, current_dest_offset >> 2, false, true); |
| 921 | AnnotateDalvikRegAccess(st2, (current_dest_offset + (bytes_to_move >> 1)) >> 2, false, true); |
| 922 | } else { |
| 923 | // Set barrier for 128-bit store. |
| 924 | SetMemRefType(st1, false /* is_load */, kDalvikReg); |
| 925 | st1->u.m.def_mask = ENCODE_ALL; |
| 926 | } |
| 927 | } |
| 928 | |
| 929 | // Free the temporary used for the data movement. |
| 930 | FreeTemp(temp); |
| 931 | } else { |
| 932 | // Moving 32-bits via general purpose register. |
| 933 | bytes_to_move = sizeof(uint32_t); |
| 934 | |
| 935 | // Instead of allocating a new temp, simply reuse one of the registers being used |
| 936 | // for argument passing. |
| 937 | int temp = TargetReg(kArg3); |
| 938 | |
| 939 | // Now load the argument VR and store to the outs. |
| 940 | LoadWordDisp(TargetReg(kSp), current_src_offset, temp); |
| 941 | StoreWordDisp(TargetReg(kSp), current_dest_offset, temp); |
| 942 | } |
| 943 | |
| 944 | current_src_offset += bytes_to_move; |
| 945 | current_dest_offset += bytes_to_move; |
| 946 | regs_left_to_pass_via_stack -= (bytes_to_move >> 2); |
| 947 | } |
| 948 | } else { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 949 | // Generate memcpy |
| 950 | OpRegRegImm(kOpAdd, TargetReg(kArg0), TargetReg(kSp), outs_offset); |
| 951 | OpRegRegImm(kOpAdd, TargetReg(kArg1), TargetReg(kSp), start_offset); |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 952 | CallRuntimeHelperRegRegImm(QUICK_ENTRYPOINT_OFFSET(pMemcpy), TargetReg(kArg0), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 953 | TargetReg(kArg1), (info->num_arg_words - 3) * 4, false); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 954 | } |
| 955 | |
| 956 | call_state = LoadArgRegs(info, call_state, next_call_insn, |
| 957 | target_method, vtable_idx, direct_code, direct_method, |
| 958 | type, skip_this); |
| 959 | |
| 960 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 961 | direct_code, direct_method, type); |
| 962 | if (pcrLabel) { |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 963 | *pcrLabel = GenNullCheck(TargetReg(kArg1), info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 964 | } |
| 965 | return call_state; |
| 966 | } |
| 967 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 968 | RegLocation Mir2Lir::InlineTarget(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 969 | RegLocation res; |
| 970 | if (info->result.location == kLocInvalid) { |
| 971 | res = GetReturn(false); |
| 972 | } else { |
| 973 | res = info->result; |
| 974 | } |
| 975 | return res; |
| 976 | } |
| 977 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 978 | RegLocation Mir2Lir::InlineTargetWide(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 979 | RegLocation res; |
| 980 | if (info->result.location == kLocInvalid) { |
| 981 | res = GetReturnWide(false); |
| 982 | } else { |
| 983 | res = info->result; |
| 984 | } |
| 985 | return res; |
| 986 | } |
| 987 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 988 | bool Mir2Lir::GenInlinedCharAt(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 989 | if (cu_->instruction_set == kMips) { |
| 990 | // TODO - add Mips implementation |
| 991 | return false; |
| 992 | } |
| 993 | // Location of reference to data array |
| 994 | int value_offset = mirror::String::ValueOffset().Int32Value(); |
| 995 | // Location of count |
| 996 | int count_offset = mirror::String::CountOffset().Int32Value(); |
| 997 | // Starting offset within data array |
| 998 | int offset_offset = mirror::String::OffsetOffset().Int32Value(); |
| 999 | // Start of char data with array_ |
| 1000 | int data_offset = mirror::Array::DataOffset(sizeof(uint16_t)).Int32Value(); |
| 1001 | |
| 1002 | RegLocation rl_obj = info->args[0]; |
| 1003 | RegLocation rl_idx = info->args[1]; |
| 1004 | rl_obj = LoadValue(rl_obj, kCoreReg); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1005 | // X86 wants to avoid putting a constant index into a register. |
| 1006 | if (!(cu_->instruction_set == kX86 && rl_idx.is_const)) { |
| 1007 | rl_idx = LoadValue(rl_idx, kCoreReg); |
| 1008 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1009 | int reg_max; |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1010 | GenNullCheck(rl_obj.reg.GetReg(), info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1011 | bool range_check = (!(info->opt_flags & MIR_IGNORE_RANGE_CHECK)); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1012 | LIR* range_check_branch = nullptr; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1013 | int reg_off = INVALID_REG; |
| 1014 | int reg_ptr = INVALID_REG; |
| 1015 | if (cu_->instruction_set != kX86) { |
| 1016 | reg_off = AllocTemp(); |
| 1017 | reg_ptr = AllocTemp(); |
| 1018 | if (range_check) { |
| 1019 | reg_max = AllocTemp(); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1020 | LoadWordDisp(rl_obj.reg.GetReg(), count_offset, reg_max); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1021 | MarkPossibleNullPointerException(info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1022 | } |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1023 | LoadWordDisp(rl_obj.reg.GetReg(), offset_offset, reg_off); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1024 | MarkPossibleNullPointerException(info->opt_flags); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1025 | LoadWordDisp(rl_obj.reg.GetReg(), value_offset, reg_ptr); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1026 | if (range_check) { |
| 1027 | // Set up a launch pad to allow retry in case of bounds violation */ |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1028 | OpRegReg(kOpCmp, rl_idx.reg.GetReg(), reg_max); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1029 | FreeTemp(reg_max); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1030 | range_check_branch = OpCondBranch(kCondUge, nullptr); |
Brian Carlstrom | 6f485c6 | 2013-07-18 15:35:35 -0700 | [diff] [blame] | 1031 | } |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1032 | OpRegImm(kOpAdd, reg_ptr, data_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1033 | } else { |
| 1034 | if (range_check) { |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1035 | // On x86, we can compare to memory directly |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1036 | // Set up a launch pad to allow retry in case of bounds violation */ |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1037 | if (rl_idx.is_const) { |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1038 | range_check_branch = OpCmpMemImmBranch( |
| 1039 | kCondUlt, INVALID_REG, rl_obj.reg.GetReg(), count_offset, |
| 1040 | mir_graph_->ConstantValue(rl_idx.orig_sreg), nullptr); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1041 | } else { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1042 | OpRegMem(kOpCmp, rl_idx.reg.GetReg(), rl_obj.reg.GetReg(), count_offset); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1043 | range_check_branch = OpCondBranch(kCondUge, nullptr); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1044 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1045 | } |
| 1046 | reg_off = AllocTemp(); |
| 1047 | reg_ptr = AllocTemp(); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1048 | LoadWordDisp(rl_obj.reg.GetReg(), offset_offset, reg_off); |
| 1049 | LoadWordDisp(rl_obj.reg.GetReg(), value_offset, reg_ptr); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1050 | } |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1051 | if (rl_idx.is_const) { |
| 1052 | OpRegImm(kOpAdd, reg_off, mir_graph_->ConstantValue(rl_idx.orig_sreg)); |
| 1053 | } else { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1054 | OpRegReg(kOpAdd, reg_off, rl_idx.reg.GetReg()); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1055 | } |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1056 | FreeTemp(rl_obj.reg.GetReg()); |
| 1057 | if (rl_idx.location == kLocPhysReg) { |
| 1058 | FreeTemp(rl_idx.reg.GetReg()); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1059 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1060 | RegLocation rl_dest = InlineTarget(info); |
| 1061 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1062 | if (cu_->instruction_set != kX86) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1063 | LoadBaseIndexed(reg_ptr, reg_off, rl_result.reg.GetReg(), 1, kUnsignedHalf); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1064 | } else { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1065 | LoadBaseIndexedDisp(reg_ptr, reg_off, 1, data_offset, rl_result.reg.GetReg(), |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1066 | INVALID_REG, kUnsignedHalf, INVALID_SREG); |
| 1067 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1068 | FreeTemp(reg_off); |
| 1069 | FreeTemp(reg_ptr); |
| 1070 | StoreValue(rl_dest, rl_result); |
| 1071 | if (range_check) { |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1072 | DCHECK(range_check_branch != nullptr); |
| 1073 | info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've already null checked. |
| 1074 | AddIntrinsicLaunchpad(info, range_check_branch); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1075 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1076 | return true; |
| 1077 | } |
| 1078 | |
| 1079 | // Generates an inlined String.is_empty or String.length. |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1080 | bool Mir2Lir::GenInlinedStringIsEmptyOrLength(CallInfo* info, bool is_empty) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1081 | if (cu_->instruction_set == kMips) { |
| 1082 | // TODO - add Mips implementation |
| 1083 | return false; |
| 1084 | } |
| 1085 | // dst = src.length(); |
| 1086 | RegLocation rl_obj = info->args[0]; |
| 1087 | rl_obj = LoadValue(rl_obj, kCoreReg); |
| 1088 | RegLocation rl_dest = InlineTarget(info); |
| 1089 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1090 | GenNullCheck(rl_obj.reg.GetReg(), info->opt_flags); |
| 1091 | LoadWordDisp(rl_obj.reg.GetReg(), mirror::String::CountOffset().Int32Value(), |
| 1092 | rl_result.reg.GetReg()); |
| 1093 | MarkPossibleNullPointerException(info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1094 | if (is_empty) { |
| 1095 | // dst = (dst == 0); |
| 1096 | if (cu_->instruction_set == kThumb2) { |
| 1097 | int t_reg = AllocTemp(); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1098 | OpRegReg(kOpNeg, t_reg, rl_result.reg.GetReg()); |
| 1099 | OpRegRegReg(kOpAdc, rl_result.reg.GetReg(), rl_result.reg.GetReg(), t_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1100 | } else { |
| 1101 | DCHECK_EQ(cu_->instruction_set, kX86); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1102 | OpRegImm(kOpSub, rl_result.reg.GetReg(), 1); |
| 1103 | OpRegImm(kOpLsr, rl_result.reg.GetReg(), 31); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1104 | } |
| 1105 | } |
| 1106 | StoreValue(rl_dest, rl_result); |
| 1107 | return true; |
| 1108 | } |
| 1109 | |
Vladimir Marko | 6bdf1ff | 2013-10-29 17:40:46 +0000 | [diff] [blame] | 1110 | bool Mir2Lir::GenInlinedReverseBytes(CallInfo* info, OpSize size) { |
| 1111 | if (cu_->instruction_set == kMips) { |
| 1112 | // TODO - add Mips implementation |
| 1113 | return false; |
| 1114 | } |
| 1115 | RegLocation rl_src_i = info->args[0]; |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 1116 | RegLocation rl_dest = (size == kLong) ? InlineTargetWide(info) : InlineTarget(info); // result reg |
Vladimir Marko | 6bdf1ff | 2013-10-29 17:40:46 +0000 | [diff] [blame] | 1117 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1118 | if (size == kLong) { |
| 1119 | RegLocation rl_i = LoadValueWide(rl_src_i, kCoreReg); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1120 | int r_i_low = rl_i.reg.GetReg(); |
| 1121 | if (rl_i.reg.GetReg() == rl_result.reg.GetReg()) { |
| 1122 | // First REV shall clobber rl_result.reg.GetReg(), save the value in a temp for the second REV. |
Vladimir Marko | f246af2 | 2013-11-27 12:30:15 +0000 | [diff] [blame] | 1123 | r_i_low = AllocTemp(); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1124 | OpRegCopy(r_i_low, rl_i.reg.GetReg()); |
Vladimir Marko | f246af2 | 2013-11-27 12:30:15 +0000 | [diff] [blame] | 1125 | } |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1126 | OpRegReg(kOpRev, rl_result.reg.GetReg(), rl_i.reg.GetHighReg()); |
| 1127 | OpRegReg(kOpRev, rl_result.reg.GetHighReg(), r_i_low); |
| 1128 | if (rl_i.reg.GetReg() == rl_result.reg.GetReg()) { |
Vladimir Marko | f246af2 | 2013-11-27 12:30:15 +0000 | [diff] [blame] | 1129 | FreeTemp(r_i_low); |
| 1130 | } |
Vladimir Marko | 6bdf1ff | 2013-10-29 17:40:46 +0000 | [diff] [blame] | 1131 | StoreValueWide(rl_dest, rl_result); |
| 1132 | } else { |
| 1133 | DCHECK(size == kWord || size == kSignedHalf); |
| 1134 | OpKind op = (size == kWord) ? kOpRev : kOpRevsh; |
| 1135 | RegLocation rl_i = LoadValue(rl_src_i, kCoreReg); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1136 | OpRegReg(op, rl_result.reg.GetReg(), rl_i.reg.GetReg()); |
Vladimir Marko | 6bdf1ff | 2013-10-29 17:40:46 +0000 | [diff] [blame] | 1137 | StoreValue(rl_dest, rl_result); |
| 1138 | } |
| 1139 | return true; |
| 1140 | } |
| 1141 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1142 | bool Mir2Lir::GenInlinedAbsInt(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1143 | if (cu_->instruction_set == kMips) { |
| 1144 | // TODO - add Mips implementation |
| 1145 | return false; |
| 1146 | } |
| 1147 | RegLocation rl_src = info->args[0]; |
| 1148 | rl_src = LoadValue(rl_src, kCoreReg); |
| 1149 | RegLocation rl_dest = InlineTarget(info); |
| 1150 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1151 | int sign_reg = AllocTemp(); |
| 1152 | // abs(x) = y<=x>>31, (x+y)^y. |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1153 | OpRegRegImm(kOpAsr, sign_reg, rl_src.reg.GetReg(), 31); |
| 1154 | OpRegRegReg(kOpAdd, rl_result.reg.GetReg(), rl_src.reg.GetReg(), sign_reg); |
| 1155 | OpRegReg(kOpXor, rl_result.reg.GetReg(), sign_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1156 | StoreValue(rl_dest, rl_result); |
| 1157 | return true; |
| 1158 | } |
| 1159 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1160 | bool Mir2Lir::GenInlinedAbsLong(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1161 | if (cu_->instruction_set == kMips) { |
| 1162 | // TODO - add Mips implementation |
| 1163 | return false; |
| 1164 | } |
| 1165 | if (cu_->instruction_set == kThumb2) { |
| 1166 | RegLocation rl_src = info->args[0]; |
| 1167 | rl_src = LoadValueWide(rl_src, kCoreReg); |
| 1168 | RegLocation rl_dest = InlineTargetWide(info); |
| 1169 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1170 | int sign_reg = AllocTemp(); |
| 1171 | // abs(x) = y<=x>>31, (x+y)^y. |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1172 | OpRegRegImm(kOpAsr, sign_reg, rl_src.reg.GetHighReg(), 31); |
| 1173 | OpRegRegReg(kOpAdd, rl_result.reg.GetReg(), rl_src.reg.GetReg(), sign_reg); |
| 1174 | OpRegRegReg(kOpAdc, rl_result.reg.GetHighReg(), rl_src.reg.GetHighReg(), sign_reg); |
| 1175 | OpRegReg(kOpXor, rl_result.reg.GetReg(), sign_reg); |
| 1176 | OpRegReg(kOpXor, rl_result.reg.GetHighReg(), sign_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1177 | StoreValueWide(rl_dest, rl_result); |
| 1178 | return true; |
| 1179 | } else { |
| 1180 | DCHECK_EQ(cu_->instruction_set, kX86); |
| 1181 | // Reuse source registers to avoid running out of temps |
| 1182 | RegLocation rl_src = info->args[0]; |
| 1183 | rl_src = LoadValueWide(rl_src, kCoreReg); |
| 1184 | RegLocation rl_dest = InlineTargetWide(info); |
| 1185 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1186 | OpRegCopyWide(rl_result.reg.GetReg(), rl_result.reg.GetHighReg(), rl_src.reg.GetReg(), rl_src.reg.GetHighReg()); |
| 1187 | FreeTemp(rl_src.reg.GetReg()); |
| 1188 | FreeTemp(rl_src.reg.GetHighReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1189 | int sign_reg = AllocTemp(); |
| 1190 | // abs(x) = y<=x>>31, (x+y)^y. |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1191 | OpRegRegImm(kOpAsr, sign_reg, rl_result.reg.GetHighReg(), 31); |
| 1192 | OpRegReg(kOpAdd, rl_result.reg.GetReg(), sign_reg); |
| 1193 | OpRegReg(kOpAdc, rl_result.reg.GetHighReg(), sign_reg); |
| 1194 | OpRegReg(kOpXor, rl_result.reg.GetReg(), sign_reg); |
| 1195 | OpRegReg(kOpXor, rl_result.reg.GetHighReg(), sign_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1196 | StoreValueWide(rl_dest, rl_result); |
| 1197 | return true; |
| 1198 | } |
| 1199 | } |
| 1200 | |
Yixin Shou | dbb17e3 | 2014-02-07 05:09:30 -0800 | [diff] [blame] | 1201 | bool Mir2Lir::GenInlinedAbsFloat(CallInfo* info) { |
| 1202 | if (cu_->instruction_set == kMips) { |
| 1203 | // TODO - add Mips implementation |
| 1204 | return false; |
| 1205 | } |
| 1206 | RegLocation rl_src = info->args[0]; |
| 1207 | rl_src = LoadValue(rl_src, kCoreReg); |
| 1208 | RegLocation rl_dest = InlineTarget(info); |
| 1209 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1210 | int signMask = AllocTemp(); |
| 1211 | LoadConstant(signMask, 0x7fffffff); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1212 | OpRegRegReg(kOpAnd, rl_result.reg.GetReg(), rl_src.reg.GetReg(), signMask); |
Yixin Shou | dbb17e3 | 2014-02-07 05:09:30 -0800 | [diff] [blame] | 1213 | FreeTemp(signMask); |
| 1214 | StoreValue(rl_dest, rl_result); |
| 1215 | return true; |
| 1216 | } |
| 1217 | |
| 1218 | bool Mir2Lir::GenInlinedAbsDouble(CallInfo* info) { |
| 1219 | if (cu_->instruction_set == kMips) { |
| 1220 | // TODO - add Mips implementation |
| 1221 | return false; |
| 1222 | } |
| 1223 | RegLocation rl_src = info->args[0]; |
| 1224 | rl_src = LoadValueWide(rl_src, kCoreReg); |
| 1225 | RegLocation rl_dest = InlineTargetWide(info); |
| 1226 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1227 | OpRegCopyWide(rl_result.reg.GetReg(), rl_result.reg.GetHighReg(), rl_src.reg.GetReg(), rl_src.reg.GetHighReg()); |
| 1228 | FreeTemp(rl_src.reg.GetReg()); |
| 1229 | FreeTemp(rl_src.reg.GetHighReg()); |
Yixin Shou | dbb17e3 | 2014-02-07 05:09:30 -0800 | [diff] [blame] | 1230 | int signMask = AllocTemp(); |
| 1231 | LoadConstant(signMask, 0x7fffffff); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1232 | OpRegReg(kOpAnd, rl_result.reg.GetHighReg(), signMask); |
Yixin Shou | dbb17e3 | 2014-02-07 05:09:30 -0800 | [diff] [blame] | 1233 | FreeTemp(signMask); |
| 1234 | StoreValueWide(rl_dest, rl_result); |
| 1235 | return true; |
| 1236 | } |
| 1237 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1238 | bool Mir2Lir::GenInlinedFloatCvt(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1239 | if (cu_->instruction_set == kMips) { |
| 1240 | // TODO - add Mips implementation |
| 1241 | return false; |
| 1242 | } |
| 1243 | RegLocation rl_src = info->args[0]; |
| 1244 | RegLocation rl_dest = InlineTarget(info); |
| 1245 | StoreValue(rl_dest, rl_src); |
| 1246 | return true; |
| 1247 | } |
| 1248 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1249 | bool Mir2Lir::GenInlinedDoubleCvt(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1250 | if (cu_->instruction_set == kMips) { |
| 1251 | // TODO - add Mips implementation |
| 1252 | return false; |
| 1253 | } |
| 1254 | RegLocation rl_src = info->args[0]; |
| 1255 | RegLocation rl_dest = InlineTargetWide(info); |
| 1256 | StoreValueWide(rl_dest, rl_src); |
| 1257 | return true; |
| 1258 | } |
| 1259 | |
| 1260 | /* |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1261 | * Fast String.indexOf(I) & (II). Tests for simple case of char <= 0xFFFF, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1262 | * otherwise bails to standard library code. |
| 1263 | */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1264 | bool Mir2Lir::GenInlinedIndexOf(CallInfo* info, bool zero_based) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1265 | if (cu_->instruction_set == kMips) { |
| 1266 | // TODO - add Mips implementation |
| 1267 | return false; |
| 1268 | } |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1269 | RegLocation rl_obj = info->args[0]; |
| 1270 | RegLocation rl_char = info->args[1]; |
| 1271 | if (rl_char.is_const && (mir_graph_->ConstantValue(rl_char) & ~0xFFFF) != 0) { |
| 1272 | // Code point beyond 0xFFFF. Punt to the real String.indexOf(). |
| 1273 | return false; |
| 1274 | } |
| 1275 | |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 1276 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1277 | LockCallTemps(); // Using fixed registers |
| 1278 | int reg_ptr = TargetReg(kArg0); |
| 1279 | int reg_char = TargetReg(kArg1); |
| 1280 | int reg_start = TargetReg(kArg2); |
| 1281 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1282 | LoadValueDirectFixed(rl_obj, reg_ptr); |
| 1283 | LoadValueDirectFixed(rl_char, reg_char); |
| 1284 | if (zero_based) { |
| 1285 | LoadConstant(reg_start, 0); |
| 1286 | } else { |
buzbee | a44d4f5 | 2014-03-05 11:26:39 -0800 | [diff] [blame] | 1287 | RegLocation rl_start = info->args[2]; // 3rd arg only present in III flavor of IndexOf. |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1288 | LoadValueDirectFixed(rl_start, reg_start); |
| 1289 | } |
Mark Mendell | 4028a6c | 2014-02-19 20:06:20 -0800 | [diff] [blame] | 1290 | int r_tgt = LoadHelper(QUICK_ENTRYPOINT_OFFSET(pIndexOf)); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1291 | GenNullCheck(reg_ptr, info->opt_flags); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1292 | LIR* high_code_point_branch = |
| 1293 | rl_char.is_const ? nullptr : OpCmpImmBranch(kCondGt, reg_char, 0xFFFF, nullptr); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1294 | // NOTE: not a safepoint |
Mark Mendell | 4028a6c | 2014-02-19 20:06:20 -0800 | [diff] [blame] | 1295 | OpReg(kOpBlx, r_tgt); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1296 | if (!rl_char.is_const) { |
| 1297 | // Add the slow path for code points beyond 0xFFFF. |
| 1298 | DCHECK(high_code_point_branch != nullptr); |
| 1299 | LIR* resume_tgt = NewLIR0(kPseudoTargetLabel); |
| 1300 | info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've null checked. |
| 1301 | AddIntrinsicLaunchpad(info, high_code_point_branch, resume_tgt); |
| 1302 | } else { |
| 1303 | DCHECK_EQ(mir_graph_->ConstantValue(rl_char) & ~0xFFFF, 0); |
| 1304 | DCHECK(high_code_point_branch == nullptr); |
| 1305 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1306 | RegLocation rl_return = GetReturn(false); |
| 1307 | RegLocation rl_dest = InlineTarget(info); |
| 1308 | StoreValue(rl_dest, rl_return); |
| 1309 | return true; |
| 1310 | } |
| 1311 | |
| 1312 | /* Fast string.compareTo(Ljava/lang/string;)I. */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1313 | bool Mir2Lir::GenInlinedStringCompareTo(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1314 | if (cu_->instruction_set == kMips) { |
| 1315 | // TODO - add Mips implementation |
| 1316 | return false; |
| 1317 | } |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 1318 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1319 | LockCallTemps(); // Using fixed registers |
| 1320 | int reg_this = TargetReg(kArg0); |
| 1321 | int reg_cmp = TargetReg(kArg1); |
| 1322 | |
| 1323 | RegLocation rl_this = info->args[0]; |
| 1324 | RegLocation rl_cmp = info->args[1]; |
| 1325 | LoadValueDirectFixed(rl_this, reg_this); |
| 1326 | LoadValueDirectFixed(rl_cmp, reg_cmp); |
| 1327 | int r_tgt = (cu_->instruction_set != kX86) ? |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1328 | LoadHelper(QUICK_ENTRYPOINT_OFFSET(pStringCompareTo)) : 0; |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1329 | GenNullCheck(reg_this, info->opt_flags); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1330 | info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've null checked. |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 1331 | // TUNING: check if rl_cmp.s_reg_low is already null checked |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1332 | LIR* cmp_null_check_branch = OpCmpImmBranch(kCondEq, reg_cmp, 0, nullptr); |
| 1333 | AddIntrinsicLaunchpad(info, cmp_null_check_branch); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1334 | // NOTE: not a safepoint |
| 1335 | if (cu_->instruction_set != kX86) { |
| 1336 | OpReg(kOpBlx, r_tgt); |
| 1337 | } else { |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1338 | OpThreadMem(kOpBlx, QUICK_ENTRYPOINT_OFFSET(pStringCompareTo)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1339 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1340 | RegLocation rl_return = GetReturn(false); |
| 1341 | RegLocation rl_dest = InlineTarget(info); |
| 1342 | StoreValue(rl_dest, rl_return); |
| 1343 | return true; |
| 1344 | } |
| 1345 | |
| 1346 | bool Mir2Lir::GenInlinedCurrentThread(CallInfo* info) { |
| 1347 | RegLocation rl_dest = InlineTarget(info); |
| 1348 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1349 | ThreadOffset offset = Thread::PeerOffset(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1350 | if (cu_->instruction_set == kThumb2 || cu_->instruction_set == kMips) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1351 | LoadWordDisp(TargetReg(kSelf), offset.Int32Value(), rl_result.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1352 | } else { |
| 1353 | CHECK(cu_->instruction_set == kX86); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1354 | reinterpret_cast<X86Mir2Lir*>(this)->OpRegThreadMem(kOpMov, rl_result.reg.GetReg(), offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1355 | } |
| 1356 | StoreValue(rl_dest, rl_result); |
| 1357 | return true; |
| 1358 | } |
| 1359 | |
| 1360 | bool Mir2Lir::GenInlinedUnsafeGet(CallInfo* info, |
| 1361 | bool is_long, bool is_volatile) { |
| 1362 | if (cu_->instruction_set == kMips) { |
| 1363 | // TODO - add Mips implementation |
| 1364 | return false; |
| 1365 | } |
| 1366 | // Unused - RegLocation rl_src_unsafe = info->args[0]; |
| 1367 | RegLocation rl_src_obj = info->args[1]; // Object |
| 1368 | RegLocation rl_src_offset = info->args[2]; // long low |
| 1369 | rl_src_offset.wide = 0; // ignore high half in info->args[3] |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 1370 | RegLocation rl_dest = is_long ? InlineTargetWide(info) : InlineTarget(info); // result reg |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1371 | if (is_volatile) { |
| 1372 | GenMemBarrier(kLoadLoad); |
| 1373 | } |
| 1374 | RegLocation rl_object = LoadValue(rl_src_obj, kCoreReg); |
| 1375 | RegLocation rl_offset = LoadValue(rl_src_offset, kCoreReg); |
| 1376 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1377 | if (is_long) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1378 | OpRegReg(kOpAdd, rl_object.reg.GetReg(), rl_offset.reg.GetReg()); |
| 1379 | LoadBaseDispWide(rl_object.reg.GetReg(), 0, rl_result.reg.GetReg(), rl_result.reg.GetHighReg(), INVALID_SREG); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1380 | StoreValueWide(rl_dest, rl_result); |
| 1381 | } else { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1382 | LoadBaseIndexed(rl_object.reg.GetReg(), rl_offset.reg.GetReg(), rl_result.reg.GetReg(), 0, kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1383 | StoreValue(rl_dest, rl_result); |
| 1384 | } |
| 1385 | return true; |
| 1386 | } |
| 1387 | |
| 1388 | bool Mir2Lir::GenInlinedUnsafePut(CallInfo* info, bool is_long, |
| 1389 | bool is_object, bool is_volatile, bool is_ordered) { |
| 1390 | if (cu_->instruction_set == kMips) { |
| 1391 | // TODO - add Mips implementation |
| 1392 | return false; |
| 1393 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1394 | // Unused - RegLocation rl_src_unsafe = info->args[0]; |
| 1395 | RegLocation rl_src_obj = info->args[1]; // Object |
| 1396 | RegLocation rl_src_offset = info->args[2]; // long low |
| 1397 | rl_src_offset.wide = 0; // ignore high half in info->args[3] |
| 1398 | RegLocation rl_src_value = info->args[4]; // value to store |
| 1399 | if (is_volatile || is_ordered) { |
| 1400 | GenMemBarrier(kStoreStore); |
| 1401 | } |
| 1402 | RegLocation rl_object = LoadValue(rl_src_obj, kCoreReg); |
| 1403 | RegLocation rl_offset = LoadValue(rl_src_offset, kCoreReg); |
| 1404 | RegLocation rl_value; |
| 1405 | if (is_long) { |
| 1406 | rl_value = LoadValueWide(rl_src_value, kCoreReg); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1407 | OpRegReg(kOpAdd, rl_object.reg.GetReg(), rl_offset.reg.GetReg()); |
| 1408 | StoreBaseDispWide(rl_object.reg.GetReg(), 0, rl_value.reg.GetReg(), rl_value.reg.GetHighReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1409 | } else { |
| 1410 | rl_value = LoadValue(rl_src_value, kCoreReg); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1411 | StoreBaseIndexed(rl_object.reg.GetReg(), rl_offset.reg.GetReg(), rl_value.reg.GetReg(), 0, kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1412 | } |
Mark Mendell | df8ee2e | 2014-01-27 16:37:47 -0800 | [diff] [blame] | 1413 | |
| 1414 | // Free up the temp early, to ensure x86 doesn't run out of temporaries in MarkGCCard. |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1415 | FreeTemp(rl_offset.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1416 | if (is_volatile) { |
| 1417 | GenMemBarrier(kStoreLoad); |
| 1418 | } |
| 1419 | if (is_object) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1420 | MarkGCCard(rl_value.reg.GetReg(), rl_object.reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1421 | } |
| 1422 | return true; |
| 1423 | } |
| 1424 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1425 | void Mir2Lir::GenInvoke(CallInfo* info) { |
Vladimir Marko | 9820b7c | 2014-01-02 16:40:37 +0000 | [diff] [blame^] | 1426 | if ((info->opt_flags & MIR_INLINED) != 0) { |
| 1427 | // Already inlined but we may still need the null check. |
| 1428 | if (info->type != kStatic && |
| 1429 | ((cu_->disable_opt & (1 << kNullCheckElimination)) != 0 || |
| 1430 | (info->opt_flags & MIR_IGNORE_NULL_CHECK) == 0)) { |
| 1431 | RegLocation rl_obj = LoadValue(info->args[0], kCoreReg); |
| 1432 | GenImmedCheck(kCondEq, rl_obj.reg.GetReg(), 0, kThrowNullPointer); |
| 1433 | } |
| 1434 | return; |
| 1435 | } |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1436 | DCHECK(cu_->compiler_driver->GetMethodInlinerMap() != nullptr); |
| 1437 | if (cu_->compiler_driver->GetMethodInlinerMap()->GetMethodInliner(cu_->dex_file) |
| 1438 | ->GenIntrinsic(this, info)) { |
| 1439 | return; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1440 | } |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1441 | GenInvokeNoInline(info); |
| 1442 | } |
| 1443 | |
| 1444 | void Mir2Lir::GenInvokeNoInline(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1445 | int call_state = 0; |
| 1446 | LIR* null_ck; |
| 1447 | LIR** p_null_ck = NULL; |
| 1448 | NextCallInsn next_call_insn; |
| 1449 | FlushAllRegs(); /* Everything to home location */ |
| 1450 | // Explicit register usage |
| 1451 | LockCallTemps(); |
| 1452 | |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1453 | const MirMethodLoweringInfo& method_info = mir_graph_->GetMethodLoweringInfo(info->mir); |
| 1454 | cu_->compiler_driver->ProcessedInvoke(method_info.GetInvokeType(), method_info.StatsFlags()); |
| 1455 | InvokeType original_type = static_cast<InvokeType>(method_info.GetInvokeType()); |
| 1456 | info->type = static_cast<InvokeType>(method_info.GetSharpType()); |
| 1457 | bool fast_path = method_info.FastPath(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1458 | bool skip_this; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1459 | if (info->type == kInterface) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1460 | next_call_insn = fast_path ? NextInterfaceCallInsn : NextInterfaceCallInsnWithAccessCheck; |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 1461 | skip_this = fast_path; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1462 | } else if (info->type == kDirect) { |
| 1463 | if (fast_path) { |
| 1464 | p_null_ck = &null_ck; |
| 1465 | } |
| 1466 | next_call_insn = fast_path ? NextSDCallInsn : NextDirectCallInsnSP; |
| 1467 | skip_this = false; |
| 1468 | } else if (info->type == kStatic) { |
| 1469 | next_call_insn = fast_path ? NextSDCallInsn : NextStaticCallInsnSP; |
| 1470 | skip_this = false; |
| 1471 | } else if (info->type == kSuper) { |
| 1472 | DCHECK(!fast_path); // Fast path is a direct call. |
| 1473 | next_call_insn = NextSuperCallInsnSP; |
| 1474 | skip_this = false; |
| 1475 | } else { |
| 1476 | DCHECK_EQ(info->type, kVirtual); |
| 1477 | next_call_insn = fast_path ? NextVCallInsn : NextVCallInsnSP; |
| 1478 | skip_this = fast_path; |
| 1479 | } |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1480 | MethodReference target_method = method_info.GetTargetMethod(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1481 | if (!info->is_range) { |
| 1482 | call_state = GenDalvikArgsNoRange(info, call_state, p_null_ck, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1483 | next_call_insn, target_method, method_info.VTableIndex(), |
| 1484 | method_info.DirectCode(), method_info.DirectMethod(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1485 | original_type, skip_this); |
| 1486 | } else { |
| 1487 | call_state = GenDalvikArgsRange(info, call_state, p_null_ck, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1488 | next_call_insn, target_method, method_info.VTableIndex(), |
| 1489 | method_info.DirectCode(), method_info.DirectMethod(), |
| 1490 | original_type, skip_this); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1491 | } |
| 1492 | // Finish up any of the call sequence not interleaved in arg loading |
| 1493 | while (call_state >= 0) { |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1494 | call_state = next_call_insn(cu_, info, call_state, target_method, method_info.VTableIndex(), |
| 1495 | method_info.DirectCode(), method_info.DirectMethod(), original_type); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1496 | } |
| 1497 | LIR* call_inst; |
| 1498 | if (cu_->instruction_set != kX86) { |
| 1499 | call_inst = OpReg(kOpBlx, TargetReg(kInvokeTgt)); |
| 1500 | } else { |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 1501 | if (fast_path) { |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1502 | if (method_info.DirectCode() == static_cast<uintptr_t>(-1)) { |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 1503 | // We can have the linker fixup a call relative. |
| 1504 | call_inst = |
Jeff Hao | 49161ce | 2014-03-12 11:05:25 -0700 | [diff] [blame] | 1505 | reinterpret_cast<X86Mir2Lir*>(this)->CallWithLinkerFixup(target_method, info->type); |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 1506 | } else { |
| 1507 | call_inst = OpMem(kOpBlx, TargetReg(kArg0), |
| 1508 | mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset().Int32Value()); |
| 1509 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1510 | } else { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1511 | ThreadOffset trampoline(-1); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1512 | switch (info->type) { |
| 1513 | case kInterface: |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 1514 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeInterfaceTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1515 | break; |
| 1516 | case kDirect: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1517 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeDirectTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1518 | break; |
| 1519 | case kStatic: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1520 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeStaticTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1521 | break; |
| 1522 | case kSuper: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1523 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeSuperTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1524 | break; |
| 1525 | case kVirtual: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1526 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeVirtualTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1527 | break; |
| 1528 | default: |
| 1529 | LOG(FATAL) << "Unexpected invoke type"; |
| 1530 | } |
| 1531 | call_inst = OpThreadMem(kOpBlx, trampoline); |
| 1532 | } |
| 1533 | } |
| 1534 | MarkSafepointPC(call_inst); |
| 1535 | |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 1536 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1537 | if (info->result.location != kLocInvalid) { |
| 1538 | // We have a following MOVE_RESULT - do it now. |
| 1539 | if (info->result.wide) { |
| 1540 | RegLocation ret_loc = GetReturnWide(info->result.fp); |
| 1541 | StoreValueWide(info->result, ret_loc); |
| 1542 | } else { |
| 1543 | RegLocation ret_loc = GetReturn(info->result.fp); |
| 1544 | StoreValue(info->result, ret_loc); |
| 1545 | } |
| 1546 | } |
| 1547 | } |
| 1548 | |
| 1549 | } // namespace art |