Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include "code_generator_mips64.h" |
| 18 | |
| 19 | #include "entrypoints/quick/quick_entrypoints.h" |
| 20 | #include "entrypoints/quick/quick_entrypoints_enum.h" |
| 21 | #include "gc/accounting/card_table.h" |
| 22 | #include "intrinsics.h" |
| 23 | #include "art_method.h" |
| 24 | #include "mirror/array-inl.h" |
| 25 | #include "mirror/class-inl.h" |
| 26 | #include "offsets.h" |
| 27 | #include "thread.h" |
| 28 | #include "utils/mips64/assembler_mips64.h" |
| 29 | #include "utils/assembler.h" |
| 30 | #include "utils/stack_checks.h" |
| 31 | |
| 32 | namespace art { |
| 33 | namespace mips64 { |
| 34 | |
| 35 | static constexpr int kCurrentMethodStackOffset = 0; |
| 36 | static constexpr GpuRegister kMethodRegisterArgument = A0; |
| 37 | |
| 38 | // We need extra temporary/scratch registers (in addition to AT) in some cases. |
| 39 | static constexpr GpuRegister TMP = T8; |
| 40 | static constexpr FpuRegister FTMP = F8; |
| 41 | |
| 42 | // ART Thread Register. |
| 43 | static constexpr GpuRegister TR = S1; |
| 44 | |
| 45 | Location Mips64ReturnLocation(Primitive::Type return_type) { |
| 46 | switch (return_type) { |
| 47 | case Primitive::kPrimBoolean: |
| 48 | case Primitive::kPrimByte: |
| 49 | case Primitive::kPrimChar: |
| 50 | case Primitive::kPrimShort: |
| 51 | case Primitive::kPrimInt: |
| 52 | case Primitive::kPrimNot: |
| 53 | case Primitive::kPrimLong: |
| 54 | return Location::RegisterLocation(V0); |
| 55 | |
| 56 | case Primitive::kPrimFloat: |
| 57 | case Primitive::kPrimDouble: |
| 58 | return Location::FpuRegisterLocation(F0); |
| 59 | |
| 60 | case Primitive::kPrimVoid: |
| 61 | return Location(); |
| 62 | } |
| 63 | UNREACHABLE(); |
| 64 | } |
| 65 | |
| 66 | Location InvokeDexCallingConventionVisitorMIPS64::GetReturnLocation(Primitive::Type type) const { |
| 67 | return Mips64ReturnLocation(type); |
| 68 | } |
| 69 | |
| 70 | Location InvokeDexCallingConventionVisitorMIPS64::GetMethodLocation() const { |
| 71 | return Location::RegisterLocation(kMethodRegisterArgument); |
| 72 | } |
| 73 | |
| 74 | Location InvokeDexCallingConventionVisitorMIPS64::GetNextLocation(Primitive::Type type) { |
| 75 | Location next_location; |
| 76 | if (type == Primitive::kPrimVoid) { |
| 77 | LOG(FATAL) << "Unexpected parameter type " << type; |
| 78 | } |
| 79 | |
| 80 | if (Primitive::IsFloatingPointType(type) && |
| 81 | (float_index_ < calling_convention.GetNumberOfFpuRegisters())) { |
| 82 | next_location = Location::FpuRegisterLocation( |
| 83 | calling_convention.GetFpuRegisterAt(float_index_++)); |
| 84 | gp_index_++; |
| 85 | } else if (!Primitive::IsFloatingPointType(type) && |
| 86 | (gp_index_ < calling_convention.GetNumberOfRegisters())) { |
| 87 | next_location = Location::RegisterLocation(calling_convention.GetRegisterAt(gp_index_++)); |
| 88 | float_index_++; |
| 89 | } else { |
| 90 | size_t stack_offset = calling_convention.GetStackOffsetOf(stack_index_); |
| 91 | next_location = Primitive::Is64BitType(type) ? Location::DoubleStackSlot(stack_offset) |
| 92 | : Location::StackSlot(stack_offset); |
| 93 | } |
| 94 | |
| 95 | // Space on the stack is reserved for all arguments. |
| 96 | stack_index_ += Primitive::Is64BitType(type) ? 2 : 1; |
| 97 | |
| 98 | // TODO: review |
| 99 | |
| 100 | // TODO: shouldn't we use a whole machine word per argument on the stack? |
| 101 | // Implicit 4-byte method pointer (and such) will cause misalignment. |
| 102 | |
| 103 | return next_location; |
| 104 | } |
| 105 | |
| 106 | Location InvokeRuntimeCallingConvention::GetReturnLocation(Primitive::Type type) { |
| 107 | return Mips64ReturnLocation(type); |
| 108 | } |
| 109 | |
| 110 | #define __ down_cast<CodeGeneratorMIPS64*>(codegen)->GetAssembler()-> |
| 111 | #define QUICK_ENTRY_POINT(x) QUICK_ENTRYPOINT_OFFSET(kMips64WordSize, x).Int32Value() |
| 112 | |
| 113 | class BoundsCheckSlowPathMIPS64 : public SlowPathCodeMIPS64 { |
| 114 | public: |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 115 | explicit BoundsCheckSlowPathMIPS64(HBoundsCheck* instruction) : instruction_(instruction) {} |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 116 | |
| 117 | void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 118 | LocationSummary* locations = instruction_->GetLocations(); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 119 | CodeGeneratorMIPS64* mips64_codegen = down_cast<CodeGeneratorMIPS64*>(codegen); |
| 120 | __ Bind(GetEntryLabel()); |
David Brazdil | 77a48ae | 2015-09-15 12:34:04 +0000 | [diff] [blame] | 121 | if (instruction_->CanThrowIntoCatchBlock()) { |
| 122 | // Live registers will be restored in the catch block if caught. |
| 123 | SaveLiveRegisters(codegen, instruction_->GetLocations()); |
| 124 | } |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 125 | // We're moving two locations to locations that could overlap, so we need a parallel |
| 126 | // move resolver. |
| 127 | InvokeRuntimeCallingConvention calling_convention; |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 128 | codegen->EmitParallelMoves(locations->InAt(0), |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 129 | Location::RegisterLocation(calling_convention.GetRegisterAt(0)), |
| 130 | Primitive::kPrimInt, |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 131 | locations->InAt(1), |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 132 | Location::RegisterLocation(calling_convention.GetRegisterAt(1)), |
| 133 | Primitive::kPrimInt); |
| 134 | mips64_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pThrowArrayBounds), |
| 135 | instruction_, |
| 136 | instruction_->GetDexPc(), |
| 137 | this); |
| 138 | CheckEntrypointTypes<kQuickThrowArrayBounds, void, int32_t, int32_t>(); |
| 139 | } |
| 140 | |
Alexandre Rames | 8158f28 | 2015-08-07 10:26:17 +0100 | [diff] [blame] | 141 | bool IsFatal() const OVERRIDE { return true; } |
| 142 | |
Roland Levillain | 4664889 | 2015-06-19 16:07:18 +0100 | [diff] [blame] | 143 | const char* GetDescription() const OVERRIDE { return "BoundsCheckSlowPathMIPS64"; } |
| 144 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 145 | private: |
| 146 | HBoundsCheck* const instruction_; |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 147 | |
| 148 | DISALLOW_COPY_AND_ASSIGN(BoundsCheckSlowPathMIPS64); |
| 149 | }; |
| 150 | |
| 151 | class DivZeroCheckSlowPathMIPS64 : public SlowPathCodeMIPS64 { |
| 152 | public: |
| 153 | explicit DivZeroCheckSlowPathMIPS64(HDivZeroCheck* instruction) : instruction_(instruction) {} |
| 154 | |
| 155 | void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { |
| 156 | CodeGeneratorMIPS64* mips64_codegen = down_cast<CodeGeneratorMIPS64*>(codegen); |
| 157 | __ Bind(GetEntryLabel()); |
David Brazdil | 77a48ae | 2015-09-15 12:34:04 +0000 | [diff] [blame] | 158 | if (instruction_->CanThrowIntoCatchBlock()) { |
| 159 | // Live registers will be restored in the catch block if caught. |
| 160 | SaveLiveRegisters(codegen, instruction_->GetLocations()); |
| 161 | } |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 162 | mips64_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pThrowDivZero), |
| 163 | instruction_, |
| 164 | instruction_->GetDexPc(), |
| 165 | this); |
| 166 | CheckEntrypointTypes<kQuickThrowDivZero, void, void>(); |
| 167 | } |
| 168 | |
Alexandre Rames | 8158f28 | 2015-08-07 10:26:17 +0100 | [diff] [blame] | 169 | bool IsFatal() const OVERRIDE { return true; } |
| 170 | |
Roland Levillain | 4664889 | 2015-06-19 16:07:18 +0100 | [diff] [blame] | 171 | const char* GetDescription() const OVERRIDE { return "DivZeroCheckSlowPathMIPS64"; } |
| 172 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 173 | private: |
| 174 | HDivZeroCheck* const instruction_; |
| 175 | DISALLOW_COPY_AND_ASSIGN(DivZeroCheckSlowPathMIPS64); |
| 176 | }; |
| 177 | |
| 178 | class LoadClassSlowPathMIPS64 : public SlowPathCodeMIPS64 { |
| 179 | public: |
| 180 | LoadClassSlowPathMIPS64(HLoadClass* cls, |
| 181 | HInstruction* at, |
| 182 | uint32_t dex_pc, |
| 183 | bool do_clinit) |
| 184 | : cls_(cls), at_(at), dex_pc_(dex_pc), do_clinit_(do_clinit) { |
| 185 | DCHECK(at->IsLoadClass() || at->IsClinitCheck()); |
| 186 | } |
| 187 | |
| 188 | void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { |
| 189 | LocationSummary* locations = at_->GetLocations(); |
| 190 | CodeGeneratorMIPS64* mips64_codegen = down_cast<CodeGeneratorMIPS64*>(codegen); |
| 191 | |
| 192 | __ Bind(GetEntryLabel()); |
| 193 | SaveLiveRegisters(codegen, locations); |
| 194 | |
| 195 | InvokeRuntimeCallingConvention calling_convention; |
| 196 | __ LoadConst32(calling_convention.GetRegisterAt(0), cls_->GetTypeIndex()); |
| 197 | int32_t entry_point_offset = do_clinit_ ? QUICK_ENTRY_POINT(pInitializeStaticStorage) |
| 198 | : QUICK_ENTRY_POINT(pInitializeType); |
| 199 | mips64_codegen->InvokeRuntime(entry_point_offset, at_, dex_pc_, this); |
| 200 | if (do_clinit_) { |
| 201 | CheckEntrypointTypes<kQuickInitializeStaticStorage, void*, uint32_t>(); |
| 202 | } else { |
| 203 | CheckEntrypointTypes<kQuickInitializeType, void*, uint32_t>(); |
| 204 | } |
| 205 | |
| 206 | // Move the class to the desired location. |
| 207 | Location out = locations->Out(); |
| 208 | if (out.IsValid()) { |
| 209 | DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); |
| 210 | Primitive::Type type = at_->GetType(); |
| 211 | mips64_codegen->MoveLocation(out, calling_convention.GetReturnLocation(type), type); |
| 212 | } |
| 213 | |
| 214 | RestoreLiveRegisters(codegen, locations); |
| 215 | __ B(GetExitLabel()); |
| 216 | } |
| 217 | |
Roland Levillain | 4664889 | 2015-06-19 16:07:18 +0100 | [diff] [blame] | 218 | const char* GetDescription() const OVERRIDE { return "LoadClassSlowPathMIPS64"; } |
| 219 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 220 | private: |
| 221 | // The class this slow path will load. |
| 222 | HLoadClass* const cls_; |
| 223 | |
| 224 | // The instruction where this slow path is happening. |
| 225 | // (Might be the load class or an initialization check). |
| 226 | HInstruction* const at_; |
| 227 | |
| 228 | // The dex PC of `at_`. |
| 229 | const uint32_t dex_pc_; |
| 230 | |
| 231 | // Whether to initialize the class. |
| 232 | const bool do_clinit_; |
| 233 | |
| 234 | DISALLOW_COPY_AND_ASSIGN(LoadClassSlowPathMIPS64); |
| 235 | }; |
| 236 | |
| 237 | class LoadStringSlowPathMIPS64 : public SlowPathCodeMIPS64 { |
| 238 | public: |
| 239 | explicit LoadStringSlowPathMIPS64(HLoadString* instruction) : instruction_(instruction) {} |
| 240 | |
| 241 | void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { |
| 242 | LocationSummary* locations = instruction_->GetLocations(); |
| 243 | DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); |
| 244 | CodeGeneratorMIPS64* mips64_codegen = down_cast<CodeGeneratorMIPS64*>(codegen); |
| 245 | |
| 246 | __ Bind(GetEntryLabel()); |
| 247 | SaveLiveRegisters(codegen, locations); |
| 248 | |
| 249 | InvokeRuntimeCallingConvention calling_convention; |
| 250 | __ LoadConst32(calling_convention.GetRegisterAt(0), instruction_->GetStringIndex()); |
| 251 | mips64_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pResolveString), |
| 252 | instruction_, |
| 253 | instruction_->GetDexPc(), |
| 254 | this); |
| 255 | CheckEntrypointTypes<kQuickResolveString, void*, uint32_t>(); |
| 256 | Primitive::Type type = instruction_->GetType(); |
| 257 | mips64_codegen->MoveLocation(locations->Out(), |
| 258 | calling_convention.GetReturnLocation(type), |
| 259 | type); |
| 260 | |
| 261 | RestoreLiveRegisters(codegen, locations); |
| 262 | __ B(GetExitLabel()); |
| 263 | } |
| 264 | |
Roland Levillain | 4664889 | 2015-06-19 16:07:18 +0100 | [diff] [blame] | 265 | const char* GetDescription() const OVERRIDE { return "LoadStringSlowPathMIPS64"; } |
| 266 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 267 | private: |
| 268 | HLoadString* const instruction_; |
| 269 | |
| 270 | DISALLOW_COPY_AND_ASSIGN(LoadStringSlowPathMIPS64); |
| 271 | }; |
| 272 | |
| 273 | class NullCheckSlowPathMIPS64 : public SlowPathCodeMIPS64 { |
| 274 | public: |
| 275 | explicit NullCheckSlowPathMIPS64(HNullCheck* instr) : instruction_(instr) {} |
| 276 | |
| 277 | void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { |
| 278 | CodeGeneratorMIPS64* mips64_codegen = down_cast<CodeGeneratorMIPS64*>(codegen); |
| 279 | __ Bind(GetEntryLabel()); |
David Brazdil | 77a48ae | 2015-09-15 12:34:04 +0000 | [diff] [blame] | 280 | if (instruction_->CanThrowIntoCatchBlock()) { |
| 281 | // Live registers will be restored in the catch block if caught. |
| 282 | SaveLiveRegisters(codegen, instruction_->GetLocations()); |
| 283 | } |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 284 | mips64_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pThrowNullPointer), |
| 285 | instruction_, |
| 286 | instruction_->GetDexPc(), |
| 287 | this); |
| 288 | CheckEntrypointTypes<kQuickThrowNullPointer, void, void>(); |
| 289 | } |
| 290 | |
Alexandre Rames | 8158f28 | 2015-08-07 10:26:17 +0100 | [diff] [blame] | 291 | bool IsFatal() const OVERRIDE { return true; } |
| 292 | |
Roland Levillain | 4664889 | 2015-06-19 16:07:18 +0100 | [diff] [blame] | 293 | const char* GetDescription() const OVERRIDE { return "NullCheckSlowPathMIPS64"; } |
| 294 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 295 | private: |
| 296 | HNullCheck* const instruction_; |
| 297 | |
| 298 | DISALLOW_COPY_AND_ASSIGN(NullCheckSlowPathMIPS64); |
| 299 | }; |
| 300 | |
| 301 | class SuspendCheckSlowPathMIPS64 : public SlowPathCodeMIPS64 { |
| 302 | public: |
Roland Levillain | 3887c46 | 2015-08-12 18:15:42 +0100 | [diff] [blame] | 303 | SuspendCheckSlowPathMIPS64(HSuspendCheck* instruction, HBasicBlock* successor) |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 304 | : instruction_(instruction), successor_(successor) {} |
| 305 | |
| 306 | void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { |
| 307 | CodeGeneratorMIPS64* mips64_codegen = down_cast<CodeGeneratorMIPS64*>(codegen); |
| 308 | __ Bind(GetEntryLabel()); |
| 309 | SaveLiveRegisters(codegen, instruction_->GetLocations()); |
| 310 | mips64_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pTestSuspend), |
| 311 | instruction_, |
| 312 | instruction_->GetDexPc(), |
| 313 | this); |
| 314 | CheckEntrypointTypes<kQuickTestSuspend, void, void>(); |
| 315 | RestoreLiveRegisters(codegen, instruction_->GetLocations()); |
| 316 | if (successor_ == nullptr) { |
| 317 | __ B(GetReturnLabel()); |
| 318 | } else { |
| 319 | __ B(mips64_codegen->GetLabelOf(successor_)); |
| 320 | } |
| 321 | } |
| 322 | |
| 323 | Label* GetReturnLabel() { |
| 324 | DCHECK(successor_ == nullptr); |
| 325 | return &return_label_; |
| 326 | } |
| 327 | |
Roland Levillain | 4664889 | 2015-06-19 16:07:18 +0100 | [diff] [blame] | 328 | const char* GetDescription() const OVERRIDE { return "SuspendCheckSlowPathMIPS64"; } |
| 329 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 330 | private: |
| 331 | HSuspendCheck* const instruction_; |
| 332 | // If not null, the block to branch to after the suspend check. |
| 333 | HBasicBlock* const successor_; |
| 334 | |
| 335 | // If `successor_` is null, the label to branch to after the suspend check. |
| 336 | Label return_label_; |
| 337 | |
| 338 | DISALLOW_COPY_AND_ASSIGN(SuspendCheckSlowPathMIPS64); |
| 339 | }; |
| 340 | |
| 341 | class TypeCheckSlowPathMIPS64 : public SlowPathCodeMIPS64 { |
| 342 | public: |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 343 | explicit TypeCheckSlowPathMIPS64(HInstruction* instruction) : instruction_(instruction) {} |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 344 | |
| 345 | void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { |
| 346 | LocationSummary* locations = instruction_->GetLocations(); |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 347 | Location object_class = instruction_->IsCheckCast() ? locations->GetTemp(0) |
| 348 | : locations->Out(); |
| 349 | uint32_t dex_pc = instruction_->GetDexPc(); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 350 | DCHECK(instruction_->IsCheckCast() |
| 351 | || !locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); |
| 352 | CodeGeneratorMIPS64* mips64_codegen = down_cast<CodeGeneratorMIPS64*>(codegen); |
| 353 | |
| 354 | __ Bind(GetEntryLabel()); |
| 355 | SaveLiveRegisters(codegen, locations); |
| 356 | |
| 357 | // We're moving two locations to locations that could overlap, so we need a parallel |
| 358 | // move resolver. |
| 359 | InvokeRuntimeCallingConvention calling_convention; |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 360 | codegen->EmitParallelMoves(locations->InAt(1), |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 361 | Location::RegisterLocation(calling_convention.GetRegisterAt(0)), |
| 362 | Primitive::kPrimNot, |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 363 | object_class, |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 364 | Location::RegisterLocation(calling_convention.GetRegisterAt(1)), |
| 365 | Primitive::kPrimNot); |
| 366 | |
| 367 | if (instruction_->IsInstanceOf()) { |
| 368 | mips64_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pInstanceofNonTrivial), |
| 369 | instruction_, |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 370 | dex_pc, |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 371 | this); |
| 372 | Primitive::Type ret_type = instruction_->GetType(); |
| 373 | Location ret_loc = calling_convention.GetReturnLocation(ret_type); |
| 374 | mips64_codegen->MoveLocation(locations->Out(), ret_loc, ret_type); |
| 375 | CheckEntrypointTypes<kQuickInstanceofNonTrivial, |
| 376 | uint32_t, |
| 377 | const mirror::Class*, |
| 378 | const mirror::Class*>(); |
| 379 | } else { |
| 380 | DCHECK(instruction_->IsCheckCast()); |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 381 | mips64_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pCheckCast), instruction_, dex_pc, this); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 382 | CheckEntrypointTypes<kQuickCheckCast, void, const mirror::Class*, const mirror::Class*>(); |
| 383 | } |
| 384 | |
| 385 | RestoreLiveRegisters(codegen, locations); |
| 386 | __ B(GetExitLabel()); |
| 387 | } |
| 388 | |
Roland Levillain | 4664889 | 2015-06-19 16:07:18 +0100 | [diff] [blame] | 389 | const char* GetDescription() const OVERRIDE { return "TypeCheckSlowPathMIPS64"; } |
| 390 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 391 | private: |
| 392 | HInstruction* const instruction_; |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 393 | |
| 394 | DISALLOW_COPY_AND_ASSIGN(TypeCheckSlowPathMIPS64); |
| 395 | }; |
| 396 | |
| 397 | class DeoptimizationSlowPathMIPS64 : public SlowPathCodeMIPS64 { |
| 398 | public: |
| 399 | explicit DeoptimizationSlowPathMIPS64(HInstruction* instruction) |
| 400 | : instruction_(instruction) {} |
| 401 | |
| 402 | void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { |
| 403 | __ Bind(GetEntryLabel()); |
| 404 | SaveLiveRegisters(codegen, instruction_->GetLocations()); |
| 405 | DCHECK(instruction_->IsDeoptimize()); |
| 406 | HDeoptimize* deoptimize = instruction_->AsDeoptimize(); |
| 407 | uint32_t dex_pc = deoptimize->GetDexPc(); |
| 408 | CodeGeneratorMIPS64* mips64_codegen = down_cast<CodeGeneratorMIPS64*>(codegen); |
| 409 | mips64_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pDeoptimize), instruction_, dex_pc, this); |
| 410 | } |
| 411 | |
Roland Levillain | 4664889 | 2015-06-19 16:07:18 +0100 | [diff] [blame] | 412 | const char* GetDescription() const OVERRIDE { return "DeoptimizationSlowPathMIPS64"; } |
| 413 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 414 | private: |
| 415 | HInstruction* const instruction_; |
| 416 | DISALLOW_COPY_AND_ASSIGN(DeoptimizationSlowPathMIPS64); |
| 417 | }; |
| 418 | |
| 419 | CodeGeneratorMIPS64::CodeGeneratorMIPS64(HGraph* graph, |
| 420 | const Mips64InstructionSetFeatures& isa_features, |
Serban Constantinescu | ecc4366 | 2015-08-13 13:33:12 +0100 | [diff] [blame] | 421 | const CompilerOptions& compiler_options, |
| 422 | OptimizingCompilerStats* stats) |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 423 | : CodeGenerator(graph, |
| 424 | kNumberOfGpuRegisters, |
| 425 | kNumberOfFpuRegisters, |
| 426 | 0, // kNumberOfRegisterPairs |
| 427 | ComputeRegisterMask(reinterpret_cast<const int*>(kCoreCalleeSaves), |
| 428 | arraysize(kCoreCalleeSaves)), |
| 429 | ComputeRegisterMask(reinterpret_cast<const int*>(kFpuCalleeSaves), |
| 430 | arraysize(kFpuCalleeSaves)), |
Serban Constantinescu | ecc4366 | 2015-08-13 13:33:12 +0100 | [diff] [blame] | 431 | compiler_options, |
| 432 | stats), |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 433 | block_labels_(graph->GetArena(), 0), |
| 434 | location_builder_(graph, this), |
| 435 | instruction_visitor_(graph, this), |
| 436 | move_resolver_(graph->GetArena(), this), |
| 437 | isa_features_(isa_features) { |
| 438 | // Save RA (containing the return address) to mimic Quick. |
| 439 | AddAllocatedRegister(Location::RegisterLocation(RA)); |
| 440 | } |
| 441 | |
| 442 | #undef __ |
| 443 | #define __ down_cast<Mips64Assembler*>(GetAssembler())-> |
| 444 | #define QUICK_ENTRY_POINT(x) QUICK_ENTRYPOINT_OFFSET(kMips64WordSize, x).Int32Value() |
| 445 | |
| 446 | void CodeGeneratorMIPS64::Finalize(CodeAllocator* allocator) { |
| 447 | CodeGenerator::Finalize(allocator); |
| 448 | } |
| 449 | |
| 450 | Mips64Assembler* ParallelMoveResolverMIPS64::GetAssembler() const { |
| 451 | return codegen_->GetAssembler(); |
| 452 | } |
| 453 | |
| 454 | void ParallelMoveResolverMIPS64::EmitMove(size_t index) { |
| 455 | MoveOperands* move = moves_.Get(index); |
| 456 | codegen_->MoveLocation(move->GetDestination(), move->GetSource(), move->GetType()); |
| 457 | } |
| 458 | |
| 459 | void ParallelMoveResolverMIPS64::EmitSwap(size_t index) { |
| 460 | MoveOperands* move = moves_.Get(index); |
| 461 | codegen_->SwapLocations(move->GetDestination(), move->GetSource(), move->GetType()); |
| 462 | } |
| 463 | |
| 464 | void ParallelMoveResolverMIPS64::RestoreScratch(int reg) { |
| 465 | // Pop reg |
| 466 | __ Ld(GpuRegister(reg), SP, 0); |
| 467 | __ DecreaseFrameSize(kMips64WordSize); |
| 468 | } |
| 469 | |
| 470 | void ParallelMoveResolverMIPS64::SpillScratch(int reg) { |
| 471 | // Push reg |
| 472 | __ IncreaseFrameSize(kMips64WordSize); |
| 473 | __ Sd(GpuRegister(reg), SP, 0); |
| 474 | } |
| 475 | |
| 476 | void ParallelMoveResolverMIPS64::Exchange(int index1, int index2, bool double_slot) { |
| 477 | LoadOperandType load_type = double_slot ? kLoadDoubleword : kLoadWord; |
| 478 | StoreOperandType store_type = double_slot ? kStoreDoubleword : kStoreWord; |
| 479 | // Allocate a scratch register other than TMP, if available. |
| 480 | // Else, spill V0 (arbitrary choice) and use it as a scratch register (it will be |
| 481 | // automatically unspilled when the scratch scope object is destroyed). |
| 482 | ScratchRegisterScope ensure_scratch(this, TMP, V0, codegen_->GetNumberOfCoreRegisters()); |
| 483 | // If V0 spills onto the stack, SP-relative offsets need to be adjusted. |
| 484 | int stack_offset = ensure_scratch.IsSpilled() ? kMips64WordSize : 0; |
| 485 | __ LoadFromOffset(load_type, |
| 486 | GpuRegister(ensure_scratch.GetRegister()), |
| 487 | SP, |
| 488 | index1 + stack_offset); |
| 489 | __ LoadFromOffset(load_type, |
| 490 | TMP, |
| 491 | SP, |
| 492 | index2 + stack_offset); |
| 493 | __ StoreToOffset(store_type, |
| 494 | GpuRegister(ensure_scratch.GetRegister()), |
| 495 | SP, |
| 496 | index2 + stack_offset); |
| 497 | __ StoreToOffset(store_type, TMP, SP, index1 + stack_offset); |
| 498 | } |
| 499 | |
| 500 | static dwarf::Reg DWARFReg(GpuRegister reg) { |
| 501 | return dwarf::Reg::Mips64Core(static_cast<int>(reg)); |
| 502 | } |
| 503 | |
| 504 | // TODO: mapping of floating-point registers to DWARF |
| 505 | |
| 506 | void CodeGeneratorMIPS64::GenerateFrameEntry() { |
| 507 | __ Bind(&frame_entry_label_); |
| 508 | |
| 509 | bool do_overflow_check = FrameNeedsStackCheck(GetFrameSize(), kMips64) || !IsLeafMethod(); |
| 510 | |
| 511 | if (do_overflow_check) { |
| 512 | __ LoadFromOffset(kLoadWord, |
| 513 | ZERO, |
| 514 | SP, |
| 515 | -static_cast<int32_t>(GetStackOverflowReservedBytes(kMips64))); |
| 516 | RecordPcInfo(nullptr, 0); |
| 517 | } |
| 518 | |
| 519 | // TODO: anything related to T9/GP/GOT/PIC/.so's? |
| 520 | |
| 521 | if (HasEmptyFrame()) { |
| 522 | return; |
| 523 | } |
| 524 | |
| 525 | // Make sure the frame size isn't unreasonably large. Per the various APIs |
| 526 | // it looks like it should always be less than 2GB in size, which allows |
| 527 | // us using 32-bit signed offsets from the stack pointer. |
| 528 | if (GetFrameSize() > 0x7FFFFFFF) |
| 529 | LOG(FATAL) << "Stack frame larger than 2GB"; |
| 530 | |
| 531 | // Spill callee-saved registers. |
| 532 | // Note that their cumulative size is small and they can be indexed using |
| 533 | // 16-bit offsets. |
| 534 | |
| 535 | // TODO: increment/decrement SP in one step instead of two or remove this comment. |
| 536 | |
| 537 | uint32_t ofs = FrameEntrySpillSize(); |
| 538 | __ IncreaseFrameSize(ofs); |
| 539 | |
| 540 | for (int i = arraysize(kCoreCalleeSaves) - 1; i >= 0; --i) { |
| 541 | GpuRegister reg = kCoreCalleeSaves[i]; |
| 542 | if (allocated_registers_.ContainsCoreRegister(reg)) { |
| 543 | ofs -= kMips64WordSize; |
| 544 | __ Sd(reg, SP, ofs); |
| 545 | __ cfi().RelOffset(DWARFReg(reg), ofs); |
| 546 | } |
| 547 | } |
| 548 | |
| 549 | for (int i = arraysize(kFpuCalleeSaves) - 1; i >= 0; --i) { |
| 550 | FpuRegister reg = kFpuCalleeSaves[i]; |
| 551 | if (allocated_registers_.ContainsFloatingPointRegister(reg)) { |
| 552 | ofs -= kMips64WordSize; |
| 553 | __ Sdc1(reg, SP, ofs); |
| 554 | // TODO: __ cfi().RelOffset(DWARFReg(reg), ofs); |
| 555 | } |
| 556 | } |
| 557 | |
| 558 | // Allocate the rest of the frame and store the current method pointer |
| 559 | // at its end. |
| 560 | |
| 561 | __ IncreaseFrameSize(GetFrameSize() - FrameEntrySpillSize()); |
| 562 | |
| 563 | static_assert(IsInt<16>(kCurrentMethodStackOffset), |
| 564 | "kCurrentMethodStackOffset must fit into int16_t"); |
| 565 | __ Sd(kMethodRegisterArgument, SP, kCurrentMethodStackOffset); |
| 566 | } |
| 567 | |
| 568 | void CodeGeneratorMIPS64::GenerateFrameExit() { |
| 569 | __ cfi().RememberState(); |
| 570 | |
| 571 | // TODO: anything related to T9/GP/GOT/PIC/.so's? |
| 572 | |
| 573 | if (!HasEmptyFrame()) { |
| 574 | // Deallocate the rest of the frame. |
| 575 | |
| 576 | __ DecreaseFrameSize(GetFrameSize() - FrameEntrySpillSize()); |
| 577 | |
| 578 | // Restore callee-saved registers. |
| 579 | // Note that their cumulative size is small and they can be indexed using |
| 580 | // 16-bit offsets. |
| 581 | |
| 582 | // TODO: increment/decrement SP in one step instead of two or remove this comment. |
| 583 | |
| 584 | uint32_t ofs = 0; |
| 585 | |
| 586 | for (size_t i = 0; i < arraysize(kFpuCalleeSaves); ++i) { |
| 587 | FpuRegister reg = kFpuCalleeSaves[i]; |
| 588 | if (allocated_registers_.ContainsFloatingPointRegister(reg)) { |
| 589 | __ Ldc1(reg, SP, ofs); |
| 590 | ofs += kMips64WordSize; |
| 591 | // TODO: __ cfi().Restore(DWARFReg(reg)); |
| 592 | } |
| 593 | } |
| 594 | |
| 595 | for (size_t i = 0; i < arraysize(kCoreCalleeSaves); ++i) { |
| 596 | GpuRegister reg = kCoreCalleeSaves[i]; |
| 597 | if (allocated_registers_.ContainsCoreRegister(reg)) { |
| 598 | __ Ld(reg, SP, ofs); |
| 599 | ofs += kMips64WordSize; |
| 600 | __ cfi().Restore(DWARFReg(reg)); |
| 601 | } |
| 602 | } |
| 603 | |
| 604 | DCHECK_EQ(ofs, FrameEntrySpillSize()); |
| 605 | __ DecreaseFrameSize(ofs); |
| 606 | } |
| 607 | |
| 608 | __ Jr(RA); |
| 609 | |
| 610 | __ cfi().RestoreState(); |
| 611 | __ cfi().DefCFAOffset(GetFrameSize()); |
| 612 | } |
| 613 | |
| 614 | void CodeGeneratorMIPS64::Bind(HBasicBlock* block) { |
| 615 | __ Bind(GetLabelOf(block)); |
| 616 | } |
| 617 | |
| 618 | void CodeGeneratorMIPS64::MoveLocation(Location destination, |
| 619 | Location source, |
| 620 | Primitive::Type type) { |
| 621 | if (source.Equals(destination)) { |
| 622 | return; |
| 623 | } |
| 624 | |
| 625 | // A valid move can always be inferred from the destination and source |
| 626 | // locations. When moving from and to a register, the argument type can be |
| 627 | // used to generate 32bit instead of 64bit moves. |
| 628 | bool unspecified_type = (type == Primitive::kPrimVoid); |
| 629 | DCHECK_EQ(unspecified_type, false); |
| 630 | |
| 631 | if (destination.IsRegister() || destination.IsFpuRegister()) { |
| 632 | if (unspecified_type) { |
| 633 | HConstant* src_cst = source.IsConstant() ? source.GetConstant() : nullptr; |
| 634 | if (source.IsStackSlot() || |
| 635 | (src_cst != nullptr && (src_cst->IsIntConstant() |
| 636 | || src_cst->IsFloatConstant() |
| 637 | || src_cst->IsNullConstant()))) { |
| 638 | // For stack slots and 32bit constants, a 64bit type is appropriate. |
| 639 | type = destination.IsRegister() ? Primitive::kPrimInt : Primitive::kPrimFloat; |
| 640 | } else { |
| 641 | // If the source is a double stack slot or a 64bit constant, a 64bit |
| 642 | // type is appropriate. Else the source is a register, and since the |
| 643 | // type has not been specified, we chose a 64bit type to force a 64bit |
| 644 | // move. |
| 645 | type = destination.IsRegister() ? Primitive::kPrimLong : Primitive::kPrimDouble; |
| 646 | } |
| 647 | } |
| 648 | DCHECK((destination.IsFpuRegister() && Primitive::IsFloatingPointType(type)) || |
| 649 | (destination.IsRegister() && !Primitive::IsFloatingPointType(type))); |
| 650 | if (source.IsStackSlot() || source.IsDoubleStackSlot()) { |
| 651 | // Move to GPR/FPR from stack |
| 652 | LoadOperandType load_type = source.IsStackSlot() ? kLoadWord : kLoadDoubleword; |
| 653 | if (Primitive::IsFloatingPointType(type)) { |
| 654 | __ LoadFpuFromOffset(load_type, |
| 655 | destination.AsFpuRegister<FpuRegister>(), |
| 656 | SP, |
| 657 | source.GetStackIndex()); |
| 658 | } else { |
| 659 | // TODO: use load_type = kLoadUnsignedWord when type == Primitive::kPrimNot. |
| 660 | __ LoadFromOffset(load_type, |
| 661 | destination.AsRegister<GpuRegister>(), |
| 662 | SP, |
| 663 | source.GetStackIndex()); |
| 664 | } |
| 665 | } else if (source.IsConstant()) { |
| 666 | // Move to GPR/FPR from constant |
| 667 | GpuRegister gpr = AT; |
| 668 | if (!Primitive::IsFloatingPointType(type)) { |
| 669 | gpr = destination.AsRegister<GpuRegister>(); |
| 670 | } |
| 671 | if (type == Primitive::kPrimInt || type == Primitive::kPrimFloat) { |
| 672 | __ LoadConst32(gpr, GetInt32ValueOf(source.GetConstant()->AsConstant())); |
| 673 | } else { |
| 674 | __ LoadConst64(gpr, GetInt64ValueOf(source.GetConstant()->AsConstant())); |
| 675 | } |
| 676 | if (type == Primitive::kPrimFloat) { |
| 677 | __ Mtc1(gpr, destination.AsFpuRegister<FpuRegister>()); |
| 678 | } else if (type == Primitive::kPrimDouble) { |
| 679 | __ Dmtc1(gpr, destination.AsFpuRegister<FpuRegister>()); |
| 680 | } |
| 681 | } else { |
| 682 | if (destination.IsRegister()) { |
| 683 | // Move to GPR from GPR |
| 684 | __ Move(destination.AsRegister<GpuRegister>(), source.AsRegister<GpuRegister>()); |
| 685 | } else { |
| 686 | // Move to FPR from FPR |
| 687 | if (type == Primitive::kPrimFloat) { |
| 688 | __ MovS(destination.AsFpuRegister<FpuRegister>(), source.AsFpuRegister<FpuRegister>()); |
| 689 | } else { |
| 690 | DCHECK_EQ(type, Primitive::kPrimDouble); |
| 691 | __ MovD(destination.AsFpuRegister<FpuRegister>(), source.AsFpuRegister<FpuRegister>()); |
| 692 | } |
| 693 | } |
| 694 | } |
| 695 | } else { // The destination is not a register. It must be a stack slot. |
| 696 | DCHECK(destination.IsStackSlot() || destination.IsDoubleStackSlot()); |
| 697 | if (source.IsRegister() || source.IsFpuRegister()) { |
| 698 | if (unspecified_type) { |
| 699 | if (source.IsRegister()) { |
| 700 | type = destination.IsStackSlot() ? Primitive::kPrimInt : Primitive::kPrimLong; |
| 701 | } else { |
| 702 | type = destination.IsStackSlot() ? Primitive::kPrimFloat : Primitive::kPrimDouble; |
| 703 | } |
| 704 | } |
| 705 | DCHECK((destination.IsDoubleStackSlot() == Primitive::Is64BitType(type)) && |
| 706 | (source.IsFpuRegister() == Primitive::IsFloatingPointType(type))); |
| 707 | // Move to stack from GPR/FPR |
| 708 | StoreOperandType store_type = destination.IsStackSlot() ? kStoreWord : kStoreDoubleword; |
| 709 | if (source.IsRegister()) { |
| 710 | __ StoreToOffset(store_type, |
| 711 | source.AsRegister<GpuRegister>(), |
| 712 | SP, |
| 713 | destination.GetStackIndex()); |
| 714 | } else { |
| 715 | __ StoreFpuToOffset(store_type, |
| 716 | source.AsFpuRegister<FpuRegister>(), |
| 717 | SP, |
| 718 | destination.GetStackIndex()); |
| 719 | } |
| 720 | } else if (source.IsConstant()) { |
| 721 | // Move to stack from constant |
| 722 | HConstant* src_cst = source.GetConstant(); |
| 723 | StoreOperandType store_type = destination.IsStackSlot() ? kStoreWord : kStoreDoubleword; |
| 724 | if (destination.IsStackSlot()) { |
| 725 | __ LoadConst32(TMP, GetInt32ValueOf(src_cst->AsConstant())); |
| 726 | } else { |
| 727 | __ LoadConst64(TMP, GetInt64ValueOf(src_cst->AsConstant())); |
| 728 | } |
| 729 | __ StoreToOffset(store_type, TMP, SP, destination.GetStackIndex()); |
| 730 | } else { |
| 731 | DCHECK(source.IsStackSlot() || source.IsDoubleStackSlot()); |
| 732 | DCHECK_EQ(source.IsDoubleStackSlot(), destination.IsDoubleStackSlot()); |
| 733 | // Move to stack from stack |
| 734 | if (destination.IsStackSlot()) { |
| 735 | __ LoadFromOffset(kLoadWord, TMP, SP, source.GetStackIndex()); |
| 736 | __ StoreToOffset(kStoreWord, TMP, SP, destination.GetStackIndex()); |
| 737 | } else { |
| 738 | __ LoadFromOffset(kLoadDoubleword, TMP, SP, source.GetStackIndex()); |
| 739 | __ StoreToOffset(kStoreDoubleword, TMP, SP, destination.GetStackIndex()); |
| 740 | } |
| 741 | } |
| 742 | } |
| 743 | } |
| 744 | |
| 745 | void CodeGeneratorMIPS64::SwapLocations(Location loc1, |
| 746 | Location loc2, |
| 747 | Primitive::Type type ATTRIBUTE_UNUSED) { |
| 748 | DCHECK(!loc1.IsConstant()); |
| 749 | DCHECK(!loc2.IsConstant()); |
| 750 | |
| 751 | if (loc1.Equals(loc2)) { |
| 752 | return; |
| 753 | } |
| 754 | |
| 755 | bool is_slot1 = loc1.IsStackSlot() || loc1.IsDoubleStackSlot(); |
| 756 | bool is_slot2 = loc2.IsStackSlot() || loc2.IsDoubleStackSlot(); |
| 757 | bool is_fp_reg1 = loc1.IsFpuRegister(); |
| 758 | bool is_fp_reg2 = loc2.IsFpuRegister(); |
| 759 | |
| 760 | if (loc2.IsRegister() && loc1.IsRegister()) { |
| 761 | // Swap 2 GPRs |
| 762 | GpuRegister r1 = loc1.AsRegister<GpuRegister>(); |
| 763 | GpuRegister r2 = loc2.AsRegister<GpuRegister>(); |
| 764 | __ Move(TMP, r2); |
| 765 | __ Move(r2, r1); |
| 766 | __ Move(r1, TMP); |
| 767 | } else if (is_fp_reg2 && is_fp_reg1) { |
| 768 | // Swap 2 FPRs |
| 769 | FpuRegister r1 = loc1.AsFpuRegister<FpuRegister>(); |
| 770 | FpuRegister r2 = loc2.AsFpuRegister<FpuRegister>(); |
| 771 | // TODO: Can MOV.S/MOV.D be used here to save one instruction? |
| 772 | // Need to distinguish float from double, right? |
| 773 | __ Dmfc1(TMP, r2); |
| 774 | __ Dmfc1(AT, r1); |
| 775 | __ Dmtc1(TMP, r1); |
| 776 | __ Dmtc1(AT, r2); |
| 777 | } else if (is_slot1 != is_slot2) { |
| 778 | // Swap GPR/FPR and stack slot |
| 779 | Location reg_loc = is_slot1 ? loc2 : loc1; |
| 780 | Location mem_loc = is_slot1 ? loc1 : loc2; |
| 781 | LoadOperandType load_type = mem_loc.IsStackSlot() ? kLoadWord : kLoadDoubleword; |
| 782 | StoreOperandType store_type = mem_loc.IsStackSlot() ? kStoreWord : kStoreDoubleword; |
| 783 | // TODO: use load_type = kLoadUnsignedWord when type == Primitive::kPrimNot. |
| 784 | __ LoadFromOffset(load_type, TMP, SP, mem_loc.GetStackIndex()); |
| 785 | if (reg_loc.IsFpuRegister()) { |
| 786 | __ StoreFpuToOffset(store_type, |
| 787 | reg_loc.AsFpuRegister<FpuRegister>(), |
| 788 | SP, |
| 789 | mem_loc.GetStackIndex()); |
| 790 | // TODO: review this MTC1/DMTC1 move |
| 791 | if (mem_loc.IsStackSlot()) { |
| 792 | __ Mtc1(TMP, reg_loc.AsFpuRegister<FpuRegister>()); |
| 793 | } else { |
| 794 | DCHECK(mem_loc.IsDoubleStackSlot()); |
| 795 | __ Dmtc1(TMP, reg_loc.AsFpuRegister<FpuRegister>()); |
| 796 | } |
| 797 | } else { |
| 798 | __ StoreToOffset(store_type, reg_loc.AsRegister<GpuRegister>(), SP, mem_loc.GetStackIndex()); |
| 799 | __ Move(reg_loc.AsRegister<GpuRegister>(), TMP); |
| 800 | } |
| 801 | } else if (is_slot1 && is_slot2) { |
| 802 | move_resolver_.Exchange(loc1.GetStackIndex(), |
| 803 | loc2.GetStackIndex(), |
| 804 | loc1.IsDoubleStackSlot()); |
| 805 | } else { |
| 806 | LOG(FATAL) << "Unimplemented swap between locations " << loc1 << " and " << loc2; |
| 807 | } |
| 808 | } |
| 809 | |
| 810 | void CodeGeneratorMIPS64::Move(HInstruction* instruction, |
| 811 | Location location, |
| 812 | HInstruction* move_for) { |
| 813 | LocationSummary* locations = instruction->GetLocations(); |
| 814 | Primitive::Type type = instruction->GetType(); |
| 815 | DCHECK_NE(type, Primitive::kPrimVoid); |
| 816 | |
| 817 | if (instruction->IsCurrentMethod()) { |
| 818 | MoveLocation(location, Location::DoubleStackSlot(kCurrentMethodStackOffset), type); |
| 819 | } else if (locations != nullptr && locations->Out().Equals(location)) { |
| 820 | return; |
| 821 | } else if (instruction->IsIntConstant() |
| 822 | || instruction->IsLongConstant() |
| 823 | || instruction->IsNullConstant()) { |
| 824 | if (location.IsRegister()) { |
| 825 | // Move to GPR from constant |
| 826 | GpuRegister dst = location.AsRegister<GpuRegister>(); |
| 827 | if (instruction->IsNullConstant() || instruction->IsIntConstant()) { |
| 828 | __ LoadConst32(dst, GetInt32ValueOf(instruction->AsConstant())); |
| 829 | } else { |
| 830 | __ LoadConst64(dst, instruction->AsLongConstant()->GetValue()); |
| 831 | } |
| 832 | } else { |
| 833 | DCHECK(location.IsStackSlot() || location.IsDoubleStackSlot()); |
| 834 | // Move to stack from constant |
| 835 | if (location.IsStackSlot()) { |
| 836 | __ LoadConst32(TMP, GetInt32ValueOf(instruction->AsConstant())); |
| 837 | __ StoreToOffset(kStoreWord, TMP, SP, location.GetStackIndex()); |
| 838 | } else { |
| 839 | __ LoadConst64(TMP, instruction->AsLongConstant()->GetValue()); |
| 840 | __ StoreToOffset(kStoreDoubleword, TMP, SP, location.GetStackIndex()); |
| 841 | } |
| 842 | } |
| 843 | } else if (instruction->IsTemporary()) { |
| 844 | Location temp_location = GetTemporaryLocation(instruction->AsTemporary()); |
| 845 | MoveLocation(location, temp_location, type); |
| 846 | } else if (instruction->IsLoadLocal()) { |
| 847 | uint32_t stack_slot = GetStackSlot(instruction->AsLoadLocal()->GetLocal()); |
| 848 | if (Primitive::Is64BitType(type)) { |
| 849 | MoveLocation(location, Location::DoubleStackSlot(stack_slot), type); |
| 850 | } else { |
| 851 | MoveLocation(location, Location::StackSlot(stack_slot), type); |
| 852 | } |
| 853 | } else { |
| 854 | DCHECK((instruction->GetNext() == move_for) || instruction->GetNext()->IsTemporary()); |
| 855 | MoveLocation(location, locations->Out(), type); |
| 856 | } |
| 857 | } |
| 858 | |
Calin Juravle | 175dc73 | 2015-08-25 15:42:32 +0100 | [diff] [blame] | 859 | void CodeGeneratorMIPS64::MoveConstant(Location location, int32_t value) { |
| 860 | DCHECK(location.IsRegister()); |
| 861 | __ LoadConst32(location.AsRegister<GpuRegister>(), value); |
| 862 | } |
| 863 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 864 | Location CodeGeneratorMIPS64::GetStackLocation(HLoadLocal* load) const { |
| 865 | Primitive::Type type = load->GetType(); |
| 866 | |
| 867 | switch (type) { |
| 868 | case Primitive::kPrimNot: |
| 869 | case Primitive::kPrimInt: |
| 870 | case Primitive::kPrimFloat: |
| 871 | return Location::StackSlot(GetStackSlot(load->GetLocal())); |
| 872 | |
| 873 | case Primitive::kPrimLong: |
| 874 | case Primitive::kPrimDouble: |
| 875 | return Location::DoubleStackSlot(GetStackSlot(load->GetLocal())); |
| 876 | |
| 877 | case Primitive::kPrimBoolean: |
| 878 | case Primitive::kPrimByte: |
| 879 | case Primitive::kPrimChar: |
| 880 | case Primitive::kPrimShort: |
| 881 | case Primitive::kPrimVoid: |
| 882 | LOG(FATAL) << "Unexpected type " << type; |
| 883 | } |
| 884 | |
| 885 | LOG(FATAL) << "Unreachable"; |
| 886 | return Location::NoLocation(); |
| 887 | } |
| 888 | |
| 889 | void CodeGeneratorMIPS64::MarkGCCard(GpuRegister object, GpuRegister value) { |
| 890 | Label done; |
| 891 | GpuRegister card = AT; |
| 892 | GpuRegister temp = TMP; |
| 893 | __ Beqzc(value, &done); |
| 894 | __ LoadFromOffset(kLoadDoubleword, |
| 895 | card, |
| 896 | TR, |
| 897 | Thread::CardTableOffset<kMips64WordSize>().Int32Value()); |
| 898 | __ Dsrl(temp, object, gc::accounting::CardTable::kCardShift); |
| 899 | __ Daddu(temp, card, temp); |
| 900 | __ Sb(card, temp, 0); |
| 901 | __ Bind(&done); |
| 902 | } |
| 903 | |
| 904 | void CodeGeneratorMIPS64::SetupBlockedRegisters(bool is_baseline ATTRIBUTE_UNUSED) const { |
| 905 | // ZERO, K0, K1, GP, SP, RA are always reserved and can't be allocated. |
| 906 | blocked_core_registers_[ZERO] = true; |
| 907 | blocked_core_registers_[K0] = true; |
| 908 | blocked_core_registers_[K1] = true; |
| 909 | blocked_core_registers_[GP] = true; |
| 910 | blocked_core_registers_[SP] = true; |
| 911 | blocked_core_registers_[RA] = true; |
| 912 | |
| 913 | // AT and TMP(T8) are used as temporary/scratch registers |
| 914 | // (similar to how AT is used by MIPS assemblers). |
| 915 | blocked_core_registers_[AT] = true; |
| 916 | blocked_core_registers_[TMP] = true; |
| 917 | blocked_fpu_registers_[FTMP] = true; |
| 918 | |
| 919 | // Reserve suspend and thread registers. |
| 920 | blocked_core_registers_[S0] = true; |
| 921 | blocked_core_registers_[TR] = true; |
| 922 | |
| 923 | // Reserve T9 for function calls |
| 924 | blocked_core_registers_[T9] = true; |
| 925 | |
| 926 | // TODO: review; anything else? |
| 927 | |
| 928 | // TODO: make these two for's conditional on is_baseline once |
| 929 | // all the issues with register saving/restoring are sorted out. |
| 930 | for (size_t i = 0; i < arraysize(kCoreCalleeSaves); ++i) { |
| 931 | blocked_core_registers_[kCoreCalleeSaves[i]] = true; |
| 932 | } |
| 933 | |
| 934 | for (size_t i = 0; i < arraysize(kFpuCalleeSaves); ++i) { |
| 935 | blocked_fpu_registers_[kFpuCalleeSaves[i]] = true; |
| 936 | } |
| 937 | } |
| 938 | |
| 939 | Location CodeGeneratorMIPS64::AllocateFreeRegister(Primitive::Type type) const { |
| 940 | if (type == Primitive::kPrimVoid) { |
| 941 | LOG(FATAL) << "Unreachable type " << type; |
| 942 | } |
| 943 | |
| 944 | if (Primitive::IsFloatingPointType(type)) { |
| 945 | size_t reg = FindFreeEntry(blocked_fpu_registers_, kNumberOfFpuRegisters); |
| 946 | return Location::FpuRegisterLocation(reg); |
| 947 | } else { |
| 948 | size_t reg = FindFreeEntry(blocked_core_registers_, kNumberOfGpuRegisters); |
| 949 | return Location::RegisterLocation(reg); |
| 950 | } |
| 951 | } |
| 952 | |
| 953 | size_t CodeGeneratorMIPS64::SaveCoreRegister(size_t stack_index, uint32_t reg_id) { |
| 954 | __ StoreToOffset(kStoreDoubleword, GpuRegister(reg_id), SP, stack_index); |
| 955 | return kMips64WordSize; |
| 956 | } |
| 957 | |
| 958 | size_t CodeGeneratorMIPS64::RestoreCoreRegister(size_t stack_index, uint32_t reg_id) { |
| 959 | __ LoadFromOffset(kLoadDoubleword, GpuRegister(reg_id), SP, stack_index); |
| 960 | return kMips64WordSize; |
| 961 | } |
| 962 | |
| 963 | size_t CodeGeneratorMIPS64::SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) { |
| 964 | __ StoreFpuToOffset(kStoreDoubleword, FpuRegister(reg_id), SP, stack_index); |
| 965 | return kMips64WordSize; |
| 966 | } |
| 967 | |
| 968 | size_t CodeGeneratorMIPS64::RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) { |
| 969 | __ LoadFpuFromOffset(kLoadDoubleword, FpuRegister(reg_id), SP, stack_index); |
| 970 | return kMips64WordSize; |
| 971 | } |
| 972 | |
| 973 | void CodeGeneratorMIPS64::DumpCoreRegister(std::ostream& stream, int reg) const { |
David Brazdil | 9f0dece | 2015-09-21 18:20:26 +0100 | [diff] [blame^] | 974 | stream << GpuRegister(reg); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 975 | } |
| 976 | |
| 977 | void CodeGeneratorMIPS64::DumpFloatingPointRegister(std::ostream& stream, int reg) const { |
David Brazdil | 9f0dece | 2015-09-21 18:20:26 +0100 | [diff] [blame^] | 978 | stream << FpuRegister(reg); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 979 | } |
| 980 | |
Calin Juravle | 175dc73 | 2015-08-25 15:42:32 +0100 | [diff] [blame] | 981 | void CodeGeneratorMIPS64::InvokeRuntime(QuickEntrypointEnum entrypoint, |
| 982 | HInstruction* instruction, |
| 983 | uint32_t dex_pc, |
| 984 | SlowPathCode* slow_path) { |
| 985 | InvokeRuntime(GetThreadOffset<kMips64WordSize>(entrypoint).Int32Value(), |
| 986 | instruction, |
| 987 | dex_pc, |
| 988 | slow_path); |
| 989 | } |
| 990 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 991 | void CodeGeneratorMIPS64::InvokeRuntime(int32_t entry_point_offset, |
| 992 | HInstruction* instruction, |
| 993 | uint32_t dex_pc, |
| 994 | SlowPathCode* slow_path) { |
Alexandre Rames | 78e3ef6 | 2015-08-12 13:43:29 +0100 | [diff] [blame] | 995 | ValidateInvokeRuntime(instruction, slow_path); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 996 | // TODO: anything related to T9/GP/GOT/PIC/.so's? |
| 997 | __ LoadFromOffset(kLoadDoubleword, T9, TR, entry_point_offset); |
| 998 | __ Jalr(T9); |
| 999 | RecordPcInfo(instruction, dex_pc, slow_path); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 1000 | } |
| 1001 | |
| 1002 | void InstructionCodeGeneratorMIPS64::GenerateClassInitializationCheck(SlowPathCodeMIPS64* slow_path, |
| 1003 | GpuRegister class_reg) { |
| 1004 | __ LoadFromOffset(kLoadWord, TMP, class_reg, mirror::Class::StatusOffset().Int32Value()); |
| 1005 | __ LoadConst32(AT, mirror::Class::kStatusInitialized); |
| 1006 | __ Bltc(TMP, AT, slow_path->GetEntryLabel()); |
| 1007 | // TODO: barrier needed? |
| 1008 | __ Bind(slow_path->GetExitLabel()); |
| 1009 | } |
| 1010 | |
| 1011 | void InstructionCodeGeneratorMIPS64::GenerateMemoryBarrier(MemBarrierKind kind ATTRIBUTE_UNUSED) { |
| 1012 | __ Sync(0); // only stype 0 is supported |
| 1013 | } |
| 1014 | |
| 1015 | void InstructionCodeGeneratorMIPS64::GenerateSuspendCheck(HSuspendCheck* instruction, |
| 1016 | HBasicBlock* successor) { |
| 1017 | SuspendCheckSlowPathMIPS64* slow_path = |
| 1018 | new (GetGraph()->GetArena()) SuspendCheckSlowPathMIPS64(instruction, successor); |
| 1019 | codegen_->AddSlowPath(slow_path); |
| 1020 | |
| 1021 | __ LoadFromOffset(kLoadUnsignedHalfword, |
| 1022 | TMP, |
| 1023 | TR, |
| 1024 | Thread::ThreadFlagsOffset<kMips64WordSize>().Int32Value()); |
| 1025 | if (successor == nullptr) { |
| 1026 | __ Bnezc(TMP, slow_path->GetEntryLabel()); |
| 1027 | __ Bind(slow_path->GetReturnLabel()); |
| 1028 | } else { |
| 1029 | __ Beqzc(TMP, codegen_->GetLabelOf(successor)); |
| 1030 | __ B(slow_path->GetEntryLabel()); |
| 1031 | // slow_path will return to GetLabelOf(successor). |
| 1032 | } |
| 1033 | } |
| 1034 | |
| 1035 | InstructionCodeGeneratorMIPS64::InstructionCodeGeneratorMIPS64(HGraph* graph, |
| 1036 | CodeGeneratorMIPS64* codegen) |
| 1037 | : HGraphVisitor(graph), |
| 1038 | assembler_(codegen->GetAssembler()), |
| 1039 | codegen_(codegen) {} |
| 1040 | |
| 1041 | void LocationsBuilderMIPS64::HandleBinaryOp(HBinaryOperation* instruction) { |
| 1042 | DCHECK_EQ(instruction->InputCount(), 2U); |
| 1043 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); |
| 1044 | Primitive::Type type = instruction->GetResultType(); |
| 1045 | switch (type) { |
| 1046 | case Primitive::kPrimInt: |
| 1047 | case Primitive::kPrimLong: { |
| 1048 | locations->SetInAt(0, Location::RequiresRegister()); |
| 1049 | HInstruction* right = instruction->InputAt(1); |
| 1050 | bool can_use_imm = false; |
| 1051 | if (right->IsConstant()) { |
| 1052 | int64_t imm = CodeGenerator::GetInt64ValueOf(right->AsConstant()); |
| 1053 | if (instruction->IsAnd() || instruction->IsOr() || instruction->IsXor()) { |
| 1054 | can_use_imm = IsUint<16>(imm); |
| 1055 | } else if (instruction->IsAdd()) { |
| 1056 | can_use_imm = IsInt<16>(imm); |
| 1057 | } else { |
| 1058 | DCHECK(instruction->IsSub()); |
| 1059 | can_use_imm = IsInt<16>(-imm); |
| 1060 | } |
| 1061 | } |
| 1062 | if (can_use_imm) |
| 1063 | locations->SetInAt(1, Location::ConstantLocation(right->AsConstant())); |
| 1064 | else |
| 1065 | locations->SetInAt(1, Location::RequiresRegister()); |
| 1066 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 1067 | } |
| 1068 | break; |
| 1069 | |
| 1070 | case Primitive::kPrimFloat: |
| 1071 | case Primitive::kPrimDouble: |
| 1072 | locations->SetInAt(0, Location::RequiresFpuRegister()); |
| 1073 | locations->SetInAt(1, Location::RequiresFpuRegister()); |
| 1074 | locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); |
| 1075 | break; |
| 1076 | |
| 1077 | default: |
| 1078 | LOG(FATAL) << "Unexpected " << instruction->DebugName() << " type " << type; |
| 1079 | } |
| 1080 | } |
| 1081 | |
| 1082 | void InstructionCodeGeneratorMIPS64::HandleBinaryOp(HBinaryOperation* instruction) { |
| 1083 | Primitive::Type type = instruction->GetType(); |
| 1084 | LocationSummary* locations = instruction->GetLocations(); |
| 1085 | |
| 1086 | switch (type) { |
| 1087 | case Primitive::kPrimInt: |
| 1088 | case Primitive::kPrimLong: { |
| 1089 | GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); |
| 1090 | GpuRegister lhs = locations->InAt(0).AsRegister<GpuRegister>(); |
| 1091 | Location rhs_location = locations->InAt(1); |
| 1092 | |
| 1093 | GpuRegister rhs_reg = ZERO; |
| 1094 | int64_t rhs_imm = 0; |
| 1095 | bool use_imm = rhs_location.IsConstant(); |
| 1096 | if (use_imm) { |
| 1097 | rhs_imm = CodeGenerator::GetInt64ValueOf(rhs_location.GetConstant()); |
| 1098 | } else { |
| 1099 | rhs_reg = rhs_location.AsRegister<GpuRegister>(); |
| 1100 | } |
| 1101 | |
| 1102 | if (instruction->IsAnd()) { |
| 1103 | if (use_imm) |
| 1104 | __ Andi(dst, lhs, rhs_imm); |
| 1105 | else |
| 1106 | __ And(dst, lhs, rhs_reg); |
| 1107 | } else if (instruction->IsOr()) { |
| 1108 | if (use_imm) |
| 1109 | __ Ori(dst, lhs, rhs_imm); |
| 1110 | else |
| 1111 | __ Or(dst, lhs, rhs_reg); |
| 1112 | } else if (instruction->IsXor()) { |
| 1113 | if (use_imm) |
| 1114 | __ Xori(dst, lhs, rhs_imm); |
| 1115 | else |
| 1116 | __ Xor(dst, lhs, rhs_reg); |
| 1117 | } else if (instruction->IsAdd()) { |
| 1118 | if (type == Primitive::kPrimInt) { |
| 1119 | if (use_imm) |
| 1120 | __ Addiu(dst, lhs, rhs_imm); |
| 1121 | else |
| 1122 | __ Addu(dst, lhs, rhs_reg); |
| 1123 | } else { |
| 1124 | if (use_imm) |
| 1125 | __ Daddiu(dst, lhs, rhs_imm); |
| 1126 | else |
| 1127 | __ Daddu(dst, lhs, rhs_reg); |
| 1128 | } |
| 1129 | } else { |
| 1130 | DCHECK(instruction->IsSub()); |
| 1131 | if (type == Primitive::kPrimInt) { |
| 1132 | if (use_imm) |
| 1133 | __ Addiu(dst, lhs, -rhs_imm); |
| 1134 | else |
| 1135 | __ Subu(dst, lhs, rhs_reg); |
| 1136 | } else { |
| 1137 | if (use_imm) |
| 1138 | __ Daddiu(dst, lhs, -rhs_imm); |
| 1139 | else |
| 1140 | __ Dsubu(dst, lhs, rhs_reg); |
| 1141 | } |
| 1142 | } |
| 1143 | break; |
| 1144 | } |
| 1145 | case Primitive::kPrimFloat: |
| 1146 | case Primitive::kPrimDouble: { |
| 1147 | FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); |
| 1148 | FpuRegister lhs = locations->InAt(0).AsFpuRegister<FpuRegister>(); |
| 1149 | FpuRegister rhs = locations->InAt(1).AsFpuRegister<FpuRegister>(); |
| 1150 | if (instruction->IsAdd()) { |
| 1151 | if (type == Primitive::kPrimFloat) |
| 1152 | __ AddS(dst, lhs, rhs); |
| 1153 | else |
| 1154 | __ AddD(dst, lhs, rhs); |
| 1155 | } else if (instruction->IsSub()) { |
| 1156 | if (type == Primitive::kPrimFloat) |
| 1157 | __ SubS(dst, lhs, rhs); |
| 1158 | else |
| 1159 | __ SubD(dst, lhs, rhs); |
| 1160 | } else { |
| 1161 | LOG(FATAL) << "Unexpected floating-point binary operation"; |
| 1162 | } |
| 1163 | break; |
| 1164 | } |
| 1165 | default: |
| 1166 | LOG(FATAL) << "Unexpected binary operation type " << type; |
| 1167 | } |
| 1168 | } |
| 1169 | |
| 1170 | void LocationsBuilderMIPS64::HandleShift(HBinaryOperation* instr) { |
| 1171 | DCHECK(instr->IsShl() || instr->IsShr() || instr->IsUShr()); |
| 1172 | |
| 1173 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instr); |
| 1174 | Primitive::Type type = instr->GetResultType(); |
| 1175 | switch (type) { |
| 1176 | case Primitive::kPrimInt: |
| 1177 | case Primitive::kPrimLong: { |
| 1178 | locations->SetInAt(0, Location::RequiresRegister()); |
| 1179 | locations->SetInAt(1, Location::RegisterOrConstant(instr->InputAt(1))); |
| 1180 | locations->SetOut(Location::RequiresRegister()); |
| 1181 | break; |
| 1182 | } |
| 1183 | default: |
| 1184 | LOG(FATAL) << "Unexpected shift type " << type; |
| 1185 | } |
| 1186 | } |
| 1187 | |
| 1188 | void InstructionCodeGeneratorMIPS64::HandleShift(HBinaryOperation* instr) { |
| 1189 | DCHECK(instr->IsShl() || instr->IsShr() || instr->IsUShr()); |
| 1190 | LocationSummary* locations = instr->GetLocations(); |
| 1191 | Primitive::Type type = instr->GetType(); |
| 1192 | |
| 1193 | switch (type) { |
| 1194 | case Primitive::kPrimInt: |
| 1195 | case Primitive::kPrimLong: { |
| 1196 | GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); |
| 1197 | GpuRegister lhs = locations->InAt(0).AsRegister<GpuRegister>(); |
| 1198 | Location rhs_location = locations->InAt(1); |
| 1199 | |
| 1200 | GpuRegister rhs_reg = ZERO; |
| 1201 | int64_t rhs_imm = 0; |
| 1202 | bool use_imm = rhs_location.IsConstant(); |
| 1203 | if (use_imm) { |
| 1204 | rhs_imm = CodeGenerator::GetInt64ValueOf(rhs_location.GetConstant()); |
| 1205 | } else { |
| 1206 | rhs_reg = rhs_location.AsRegister<GpuRegister>(); |
| 1207 | } |
| 1208 | |
| 1209 | if (use_imm) { |
| 1210 | uint32_t shift_value = (type == Primitive::kPrimInt) |
| 1211 | ? static_cast<uint32_t>(rhs_imm & kMaxIntShiftValue) |
| 1212 | : static_cast<uint32_t>(rhs_imm & kMaxLongShiftValue); |
| 1213 | |
| 1214 | if (type == Primitive::kPrimInt) { |
| 1215 | if (instr->IsShl()) { |
| 1216 | __ Sll(dst, lhs, shift_value); |
| 1217 | } else if (instr->IsShr()) { |
| 1218 | __ Sra(dst, lhs, shift_value); |
| 1219 | } else { |
| 1220 | __ Srl(dst, lhs, shift_value); |
| 1221 | } |
| 1222 | } else { |
| 1223 | if (shift_value < 32) { |
| 1224 | if (instr->IsShl()) { |
| 1225 | __ Dsll(dst, lhs, shift_value); |
| 1226 | } else if (instr->IsShr()) { |
| 1227 | __ Dsra(dst, lhs, shift_value); |
| 1228 | } else { |
| 1229 | __ Dsrl(dst, lhs, shift_value); |
| 1230 | } |
| 1231 | } else { |
| 1232 | shift_value -= 32; |
| 1233 | if (instr->IsShl()) { |
| 1234 | __ Dsll32(dst, lhs, shift_value); |
| 1235 | } else if (instr->IsShr()) { |
| 1236 | __ Dsra32(dst, lhs, shift_value); |
| 1237 | } else { |
| 1238 | __ Dsrl32(dst, lhs, shift_value); |
| 1239 | } |
| 1240 | } |
| 1241 | } |
| 1242 | } else { |
| 1243 | if (type == Primitive::kPrimInt) { |
| 1244 | if (instr->IsShl()) { |
| 1245 | __ Sllv(dst, lhs, rhs_reg); |
| 1246 | } else if (instr->IsShr()) { |
| 1247 | __ Srav(dst, lhs, rhs_reg); |
| 1248 | } else { |
| 1249 | __ Srlv(dst, lhs, rhs_reg); |
| 1250 | } |
| 1251 | } else { |
| 1252 | if (instr->IsShl()) { |
| 1253 | __ Dsllv(dst, lhs, rhs_reg); |
| 1254 | } else if (instr->IsShr()) { |
| 1255 | __ Dsrav(dst, lhs, rhs_reg); |
| 1256 | } else { |
| 1257 | __ Dsrlv(dst, lhs, rhs_reg); |
| 1258 | } |
| 1259 | } |
| 1260 | } |
| 1261 | break; |
| 1262 | } |
| 1263 | default: |
| 1264 | LOG(FATAL) << "Unexpected shift operation type " << type; |
| 1265 | } |
| 1266 | } |
| 1267 | |
| 1268 | void LocationsBuilderMIPS64::VisitAdd(HAdd* instruction) { |
| 1269 | HandleBinaryOp(instruction); |
| 1270 | } |
| 1271 | |
| 1272 | void InstructionCodeGeneratorMIPS64::VisitAdd(HAdd* instruction) { |
| 1273 | HandleBinaryOp(instruction); |
| 1274 | } |
| 1275 | |
| 1276 | void LocationsBuilderMIPS64::VisitAnd(HAnd* instruction) { |
| 1277 | HandleBinaryOp(instruction); |
| 1278 | } |
| 1279 | |
| 1280 | void InstructionCodeGeneratorMIPS64::VisitAnd(HAnd* instruction) { |
| 1281 | HandleBinaryOp(instruction); |
| 1282 | } |
| 1283 | |
| 1284 | void LocationsBuilderMIPS64::VisitArrayGet(HArrayGet* instruction) { |
| 1285 | LocationSummary* locations = |
| 1286 | new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall); |
| 1287 | locations->SetInAt(0, Location::RequiresRegister()); |
| 1288 | locations->SetInAt(1, Location::RegisterOrConstant(instruction->InputAt(1))); |
| 1289 | if (Primitive::IsFloatingPointType(instruction->GetType())) { |
| 1290 | locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); |
| 1291 | } else { |
| 1292 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 1293 | } |
| 1294 | } |
| 1295 | |
| 1296 | void InstructionCodeGeneratorMIPS64::VisitArrayGet(HArrayGet* instruction) { |
| 1297 | LocationSummary* locations = instruction->GetLocations(); |
| 1298 | GpuRegister obj = locations->InAt(0).AsRegister<GpuRegister>(); |
| 1299 | Location index = locations->InAt(1); |
| 1300 | Primitive::Type type = instruction->GetType(); |
| 1301 | |
| 1302 | switch (type) { |
| 1303 | case Primitive::kPrimBoolean: { |
| 1304 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(uint8_t)).Uint32Value(); |
| 1305 | GpuRegister out = locations->Out().AsRegister<GpuRegister>(); |
| 1306 | if (index.IsConstant()) { |
| 1307 | size_t offset = |
| 1308 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_1) + data_offset; |
| 1309 | __ LoadFromOffset(kLoadUnsignedByte, out, obj, offset); |
| 1310 | } else { |
| 1311 | __ Daddu(TMP, obj, index.AsRegister<GpuRegister>()); |
| 1312 | __ LoadFromOffset(kLoadUnsignedByte, out, TMP, data_offset); |
| 1313 | } |
| 1314 | break; |
| 1315 | } |
| 1316 | |
| 1317 | case Primitive::kPrimByte: { |
| 1318 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(int8_t)).Uint32Value(); |
| 1319 | GpuRegister out = locations->Out().AsRegister<GpuRegister>(); |
| 1320 | if (index.IsConstant()) { |
| 1321 | size_t offset = |
| 1322 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_1) + data_offset; |
| 1323 | __ LoadFromOffset(kLoadSignedByte, out, obj, offset); |
| 1324 | } else { |
| 1325 | __ Daddu(TMP, obj, index.AsRegister<GpuRegister>()); |
| 1326 | __ LoadFromOffset(kLoadSignedByte, out, TMP, data_offset); |
| 1327 | } |
| 1328 | break; |
| 1329 | } |
| 1330 | |
| 1331 | case Primitive::kPrimShort: { |
| 1332 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(int16_t)).Uint32Value(); |
| 1333 | GpuRegister out = locations->Out().AsRegister<GpuRegister>(); |
| 1334 | if (index.IsConstant()) { |
| 1335 | size_t offset = |
| 1336 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset; |
| 1337 | __ LoadFromOffset(kLoadSignedHalfword, out, obj, offset); |
| 1338 | } else { |
| 1339 | __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_2); |
| 1340 | __ Daddu(TMP, obj, TMP); |
| 1341 | __ LoadFromOffset(kLoadSignedHalfword, out, TMP, data_offset); |
| 1342 | } |
| 1343 | break; |
| 1344 | } |
| 1345 | |
| 1346 | case Primitive::kPrimChar: { |
| 1347 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(uint16_t)).Uint32Value(); |
| 1348 | GpuRegister out = locations->Out().AsRegister<GpuRegister>(); |
| 1349 | if (index.IsConstant()) { |
| 1350 | size_t offset = |
| 1351 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset; |
| 1352 | __ LoadFromOffset(kLoadUnsignedHalfword, out, obj, offset); |
| 1353 | } else { |
| 1354 | __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_2); |
| 1355 | __ Daddu(TMP, obj, TMP); |
| 1356 | __ LoadFromOffset(kLoadUnsignedHalfword, out, TMP, data_offset); |
| 1357 | } |
| 1358 | break; |
| 1359 | } |
| 1360 | |
| 1361 | case Primitive::kPrimInt: |
| 1362 | case Primitive::kPrimNot: { |
| 1363 | DCHECK_EQ(sizeof(mirror::HeapReference<mirror::Object>), sizeof(int32_t)); |
| 1364 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(int32_t)).Uint32Value(); |
| 1365 | GpuRegister out = locations->Out().AsRegister<GpuRegister>(); |
| 1366 | LoadOperandType load_type = (type == Primitive::kPrimNot) ? kLoadUnsignedWord : kLoadWord; |
| 1367 | if (index.IsConstant()) { |
| 1368 | size_t offset = |
| 1369 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset; |
| 1370 | __ LoadFromOffset(load_type, out, obj, offset); |
| 1371 | } else { |
| 1372 | __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_4); |
| 1373 | __ Daddu(TMP, obj, TMP); |
| 1374 | __ LoadFromOffset(load_type, out, TMP, data_offset); |
| 1375 | } |
| 1376 | break; |
| 1377 | } |
| 1378 | |
| 1379 | case Primitive::kPrimLong: { |
| 1380 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(int64_t)).Uint32Value(); |
| 1381 | GpuRegister out = locations->Out().AsRegister<GpuRegister>(); |
| 1382 | if (index.IsConstant()) { |
| 1383 | size_t offset = |
| 1384 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset; |
| 1385 | __ LoadFromOffset(kLoadDoubleword, out, obj, offset); |
| 1386 | } else { |
| 1387 | __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_8); |
| 1388 | __ Daddu(TMP, obj, TMP); |
| 1389 | __ LoadFromOffset(kLoadDoubleword, out, TMP, data_offset); |
| 1390 | } |
| 1391 | break; |
| 1392 | } |
| 1393 | |
| 1394 | case Primitive::kPrimFloat: { |
| 1395 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(float)).Uint32Value(); |
| 1396 | FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>(); |
| 1397 | if (index.IsConstant()) { |
| 1398 | size_t offset = |
| 1399 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset; |
| 1400 | __ LoadFpuFromOffset(kLoadWord, out, obj, offset); |
| 1401 | } else { |
| 1402 | __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_4); |
| 1403 | __ Daddu(TMP, obj, TMP); |
| 1404 | __ LoadFpuFromOffset(kLoadWord, out, TMP, data_offset); |
| 1405 | } |
| 1406 | break; |
| 1407 | } |
| 1408 | |
| 1409 | case Primitive::kPrimDouble: { |
| 1410 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(double)).Uint32Value(); |
| 1411 | FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>(); |
| 1412 | if (index.IsConstant()) { |
| 1413 | size_t offset = |
| 1414 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset; |
| 1415 | __ LoadFpuFromOffset(kLoadDoubleword, out, obj, offset); |
| 1416 | } else { |
| 1417 | __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_8); |
| 1418 | __ Daddu(TMP, obj, TMP); |
| 1419 | __ LoadFpuFromOffset(kLoadDoubleword, out, TMP, data_offset); |
| 1420 | } |
| 1421 | break; |
| 1422 | } |
| 1423 | |
| 1424 | case Primitive::kPrimVoid: |
| 1425 | LOG(FATAL) << "Unreachable type " << instruction->GetType(); |
| 1426 | UNREACHABLE(); |
| 1427 | } |
| 1428 | codegen_->MaybeRecordImplicitNullCheck(instruction); |
| 1429 | } |
| 1430 | |
| 1431 | void LocationsBuilderMIPS64::VisitArrayLength(HArrayLength* instruction) { |
| 1432 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); |
| 1433 | locations->SetInAt(0, Location::RequiresRegister()); |
| 1434 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 1435 | } |
| 1436 | |
| 1437 | void InstructionCodeGeneratorMIPS64::VisitArrayLength(HArrayLength* instruction) { |
| 1438 | LocationSummary* locations = instruction->GetLocations(); |
| 1439 | uint32_t offset = mirror::Array::LengthOffset().Uint32Value(); |
| 1440 | GpuRegister obj = locations->InAt(0).AsRegister<GpuRegister>(); |
| 1441 | GpuRegister out = locations->Out().AsRegister<GpuRegister>(); |
| 1442 | __ LoadFromOffset(kLoadWord, out, obj, offset); |
| 1443 | codegen_->MaybeRecordImplicitNullCheck(instruction); |
| 1444 | } |
| 1445 | |
| 1446 | void LocationsBuilderMIPS64::VisitArraySet(HArraySet* instruction) { |
| 1447 | Primitive::Type value_type = instruction->GetComponentType(); |
| 1448 | bool is_object = value_type == Primitive::kPrimNot; |
| 1449 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary( |
| 1450 | instruction, |
| 1451 | is_object ? LocationSummary::kCall : LocationSummary::kNoCall); |
| 1452 | if (is_object) { |
| 1453 | InvokeRuntimeCallingConvention calling_convention; |
| 1454 | locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0))); |
| 1455 | locations->SetInAt(1, Location::RegisterLocation(calling_convention.GetRegisterAt(1))); |
| 1456 | locations->SetInAt(2, Location::RegisterLocation(calling_convention.GetRegisterAt(2))); |
| 1457 | } else { |
| 1458 | locations->SetInAt(0, Location::RequiresRegister()); |
| 1459 | locations->SetInAt(1, Location::RegisterOrConstant(instruction->InputAt(1))); |
| 1460 | if (Primitive::IsFloatingPointType(instruction->InputAt(2)->GetType())) { |
| 1461 | locations->SetInAt(2, Location::RequiresFpuRegister()); |
| 1462 | } else { |
| 1463 | locations->SetInAt(2, Location::RequiresRegister()); |
| 1464 | } |
| 1465 | } |
| 1466 | } |
| 1467 | |
| 1468 | void InstructionCodeGeneratorMIPS64::VisitArraySet(HArraySet* instruction) { |
| 1469 | LocationSummary* locations = instruction->GetLocations(); |
| 1470 | GpuRegister obj = locations->InAt(0).AsRegister<GpuRegister>(); |
| 1471 | Location index = locations->InAt(1); |
| 1472 | Primitive::Type value_type = instruction->GetComponentType(); |
| 1473 | bool needs_runtime_call = locations->WillCall(); |
| 1474 | bool needs_write_barrier = |
| 1475 | CodeGenerator::StoreNeedsWriteBarrier(value_type, instruction->GetValue()); |
| 1476 | |
| 1477 | switch (value_type) { |
| 1478 | case Primitive::kPrimBoolean: |
| 1479 | case Primitive::kPrimByte: { |
| 1480 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(uint8_t)).Uint32Value(); |
| 1481 | GpuRegister value = locations->InAt(2).AsRegister<GpuRegister>(); |
| 1482 | if (index.IsConstant()) { |
| 1483 | size_t offset = |
| 1484 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_1) + data_offset; |
| 1485 | __ StoreToOffset(kStoreByte, value, obj, offset); |
| 1486 | } else { |
| 1487 | __ Daddu(TMP, obj, index.AsRegister<GpuRegister>()); |
| 1488 | __ StoreToOffset(kStoreByte, value, TMP, data_offset); |
| 1489 | } |
| 1490 | break; |
| 1491 | } |
| 1492 | |
| 1493 | case Primitive::kPrimShort: |
| 1494 | case Primitive::kPrimChar: { |
| 1495 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(uint16_t)).Uint32Value(); |
| 1496 | GpuRegister value = locations->InAt(2).AsRegister<GpuRegister>(); |
| 1497 | if (index.IsConstant()) { |
| 1498 | size_t offset = |
| 1499 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset; |
| 1500 | __ StoreToOffset(kStoreHalfword, value, obj, offset); |
| 1501 | } else { |
| 1502 | __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_2); |
| 1503 | __ Daddu(TMP, obj, TMP); |
| 1504 | __ StoreToOffset(kStoreHalfword, value, TMP, data_offset); |
| 1505 | } |
| 1506 | break; |
| 1507 | } |
| 1508 | |
| 1509 | case Primitive::kPrimInt: |
| 1510 | case Primitive::kPrimNot: { |
| 1511 | if (!needs_runtime_call) { |
| 1512 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(int32_t)).Uint32Value(); |
| 1513 | GpuRegister value = locations->InAt(2).AsRegister<GpuRegister>(); |
| 1514 | if (index.IsConstant()) { |
| 1515 | size_t offset = |
| 1516 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset; |
| 1517 | __ StoreToOffset(kStoreWord, value, obj, offset); |
| 1518 | } else { |
| 1519 | DCHECK(index.IsRegister()) << index; |
| 1520 | __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_4); |
| 1521 | __ Daddu(TMP, obj, TMP); |
| 1522 | __ StoreToOffset(kStoreWord, value, TMP, data_offset); |
| 1523 | } |
| 1524 | codegen_->MaybeRecordImplicitNullCheck(instruction); |
| 1525 | if (needs_write_barrier) { |
| 1526 | DCHECK_EQ(value_type, Primitive::kPrimNot); |
| 1527 | codegen_->MarkGCCard(obj, value); |
| 1528 | } |
| 1529 | } else { |
| 1530 | DCHECK_EQ(value_type, Primitive::kPrimNot); |
| 1531 | codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pAputObject), |
| 1532 | instruction, |
| 1533 | instruction->GetDexPc(), |
| 1534 | nullptr); |
| 1535 | } |
| 1536 | break; |
| 1537 | } |
| 1538 | |
| 1539 | case Primitive::kPrimLong: { |
| 1540 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(int64_t)).Uint32Value(); |
| 1541 | GpuRegister value = locations->InAt(2).AsRegister<GpuRegister>(); |
| 1542 | if (index.IsConstant()) { |
| 1543 | size_t offset = |
| 1544 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset; |
| 1545 | __ StoreToOffset(kStoreDoubleword, value, obj, offset); |
| 1546 | } else { |
| 1547 | __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_8); |
| 1548 | __ Daddu(TMP, obj, TMP); |
| 1549 | __ StoreToOffset(kStoreDoubleword, value, TMP, data_offset); |
| 1550 | } |
| 1551 | break; |
| 1552 | } |
| 1553 | |
| 1554 | case Primitive::kPrimFloat: { |
| 1555 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(float)).Uint32Value(); |
| 1556 | FpuRegister value = locations->InAt(2).AsFpuRegister<FpuRegister>(); |
| 1557 | DCHECK(locations->InAt(2).IsFpuRegister()); |
| 1558 | if (index.IsConstant()) { |
| 1559 | size_t offset = |
| 1560 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset; |
| 1561 | __ StoreFpuToOffset(kStoreWord, value, obj, offset); |
| 1562 | } else { |
| 1563 | __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_4); |
| 1564 | __ Daddu(TMP, obj, TMP); |
| 1565 | __ StoreFpuToOffset(kStoreWord, value, TMP, data_offset); |
| 1566 | } |
| 1567 | break; |
| 1568 | } |
| 1569 | |
| 1570 | case Primitive::kPrimDouble: { |
| 1571 | uint32_t data_offset = mirror::Array::DataOffset(sizeof(double)).Uint32Value(); |
| 1572 | FpuRegister value = locations->InAt(2).AsFpuRegister<FpuRegister>(); |
| 1573 | DCHECK(locations->InAt(2).IsFpuRegister()); |
| 1574 | if (index.IsConstant()) { |
| 1575 | size_t offset = |
| 1576 | (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset; |
| 1577 | __ StoreFpuToOffset(kStoreDoubleword, value, obj, offset); |
| 1578 | } else { |
| 1579 | __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_8); |
| 1580 | __ Daddu(TMP, obj, TMP); |
| 1581 | __ StoreFpuToOffset(kStoreDoubleword, value, TMP, data_offset); |
| 1582 | } |
| 1583 | break; |
| 1584 | } |
| 1585 | |
| 1586 | case Primitive::kPrimVoid: |
| 1587 | LOG(FATAL) << "Unreachable type " << instruction->GetType(); |
| 1588 | UNREACHABLE(); |
| 1589 | } |
| 1590 | |
| 1591 | // Ints and objects are handled in the switch. |
| 1592 | if (value_type != Primitive::kPrimInt && value_type != Primitive::kPrimNot) { |
| 1593 | codegen_->MaybeRecordImplicitNullCheck(instruction); |
| 1594 | } |
| 1595 | } |
| 1596 | |
| 1597 | void LocationsBuilderMIPS64::VisitBoundsCheck(HBoundsCheck* instruction) { |
David Brazdil | 77a48ae | 2015-09-15 12:34:04 +0000 | [diff] [blame] | 1598 | LocationSummary::CallKind call_kind = instruction->CanThrowIntoCatchBlock() |
| 1599 | ? LocationSummary::kCallOnSlowPath |
| 1600 | : LocationSummary::kNoCall; |
| 1601 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 1602 | locations->SetInAt(0, Location::RequiresRegister()); |
| 1603 | locations->SetInAt(1, Location::RequiresRegister()); |
| 1604 | if (instruction->HasUses()) { |
| 1605 | locations->SetOut(Location::SameAsFirstInput()); |
| 1606 | } |
| 1607 | } |
| 1608 | |
| 1609 | void InstructionCodeGeneratorMIPS64::VisitBoundsCheck(HBoundsCheck* instruction) { |
| 1610 | LocationSummary* locations = instruction->GetLocations(); |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 1611 | BoundsCheckSlowPathMIPS64* slow_path = |
| 1612 | new (GetGraph()->GetArena()) BoundsCheckSlowPathMIPS64(instruction); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 1613 | codegen_->AddSlowPath(slow_path); |
| 1614 | |
| 1615 | GpuRegister index = locations->InAt(0).AsRegister<GpuRegister>(); |
| 1616 | GpuRegister length = locations->InAt(1).AsRegister<GpuRegister>(); |
| 1617 | |
| 1618 | // length is limited by the maximum positive signed 32-bit integer. |
| 1619 | // Unsigned comparison of length and index checks for index < 0 |
| 1620 | // and for length <= index simultaneously. |
| 1621 | // Mips R6 requires lhs != rhs for compact branches. |
| 1622 | if (index == length) { |
| 1623 | __ B(slow_path->GetEntryLabel()); |
| 1624 | } else { |
| 1625 | __ Bgeuc(index, length, slow_path->GetEntryLabel()); |
| 1626 | } |
| 1627 | } |
| 1628 | |
| 1629 | void LocationsBuilderMIPS64::VisitCheckCast(HCheckCast* instruction) { |
| 1630 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary( |
| 1631 | instruction, |
| 1632 | LocationSummary::kCallOnSlowPath); |
| 1633 | locations->SetInAt(0, Location::RequiresRegister()); |
| 1634 | locations->SetInAt(1, Location::RequiresRegister()); |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 1635 | // Note that TypeCheckSlowPathMIPS64 uses this register too. |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 1636 | locations->AddTemp(Location::RequiresRegister()); |
| 1637 | } |
| 1638 | |
| 1639 | void InstructionCodeGeneratorMIPS64::VisitCheckCast(HCheckCast* instruction) { |
| 1640 | LocationSummary* locations = instruction->GetLocations(); |
| 1641 | GpuRegister obj = locations->InAt(0).AsRegister<GpuRegister>(); |
| 1642 | GpuRegister cls = locations->InAt(1).AsRegister<GpuRegister>(); |
| 1643 | GpuRegister obj_cls = locations->GetTemp(0).AsRegister<GpuRegister>(); |
| 1644 | |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 1645 | SlowPathCodeMIPS64* slow_path = |
| 1646 | new (GetGraph()->GetArena()) TypeCheckSlowPathMIPS64(instruction); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 1647 | codegen_->AddSlowPath(slow_path); |
| 1648 | |
| 1649 | // TODO: avoid this check if we know obj is not null. |
| 1650 | __ Beqzc(obj, slow_path->GetExitLabel()); |
| 1651 | // Compare the class of `obj` with `cls`. |
| 1652 | __ LoadFromOffset(kLoadUnsignedWord, obj_cls, obj, mirror::Object::ClassOffset().Int32Value()); |
| 1653 | __ Bnec(obj_cls, cls, slow_path->GetEntryLabel()); |
| 1654 | __ Bind(slow_path->GetExitLabel()); |
| 1655 | } |
| 1656 | |
| 1657 | void LocationsBuilderMIPS64::VisitClinitCheck(HClinitCheck* check) { |
| 1658 | LocationSummary* locations = |
| 1659 | new (GetGraph()->GetArena()) LocationSummary(check, LocationSummary::kCallOnSlowPath); |
| 1660 | locations->SetInAt(0, Location::RequiresRegister()); |
| 1661 | if (check->HasUses()) { |
| 1662 | locations->SetOut(Location::SameAsFirstInput()); |
| 1663 | } |
| 1664 | } |
| 1665 | |
| 1666 | void InstructionCodeGeneratorMIPS64::VisitClinitCheck(HClinitCheck* check) { |
| 1667 | // We assume the class is not null. |
| 1668 | SlowPathCodeMIPS64* slow_path = new (GetGraph()->GetArena()) LoadClassSlowPathMIPS64( |
| 1669 | check->GetLoadClass(), |
| 1670 | check, |
| 1671 | check->GetDexPc(), |
| 1672 | true); |
| 1673 | codegen_->AddSlowPath(slow_path); |
| 1674 | GenerateClassInitializationCheck(slow_path, |
| 1675 | check->GetLocations()->InAt(0).AsRegister<GpuRegister>()); |
| 1676 | } |
| 1677 | |
| 1678 | void LocationsBuilderMIPS64::VisitCompare(HCompare* compare) { |
| 1679 | Primitive::Type in_type = compare->InputAt(0)->GetType(); |
| 1680 | |
| 1681 | LocationSummary::CallKind call_kind = Primitive::IsFloatingPointType(in_type) |
| 1682 | ? LocationSummary::kCall |
| 1683 | : LocationSummary::kNoCall; |
| 1684 | |
| 1685 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(compare, call_kind); |
| 1686 | |
| 1687 | switch (in_type) { |
| 1688 | case Primitive::kPrimLong: |
| 1689 | locations->SetInAt(0, Location::RequiresRegister()); |
| 1690 | locations->SetInAt(1, Location::RequiresRegister()); |
| 1691 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 1692 | break; |
| 1693 | |
| 1694 | case Primitive::kPrimFloat: |
| 1695 | case Primitive::kPrimDouble: { |
| 1696 | InvokeRuntimeCallingConvention calling_convention; |
| 1697 | locations->SetInAt(0, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0))); |
| 1698 | locations->SetInAt(1, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(1))); |
| 1699 | locations->SetOut(calling_convention.GetReturnLocation(Primitive::kPrimInt)); |
| 1700 | break; |
| 1701 | } |
| 1702 | |
| 1703 | default: |
| 1704 | LOG(FATAL) << "Unexpected type for compare operation " << in_type; |
| 1705 | } |
| 1706 | } |
| 1707 | |
| 1708 | void InstructionCodeGeneratorMIPS64::VisitCompare(HCompare* instruction) { |
| 1709 | LocationSummary* locations = instruction->GetLocations(); |
| 1710 | Primitive::Type in_type = instruction->InputAt(0)->GetType(); |
| 1711 | |
| 1712 | // 0 if: left == right |
| 1713 | // 1 if: left > right |
| 1714 | // -1 if: left < right |
| 1715 | switch (in_type) { |
| 1716 | case Primitive::kPrimLong: { |
| 1717 | GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); |
| 1718 | GpuRegister lhs = locations->InAt(0).AsRegister<GpuRegister>(); |
| 1719 | GpuRegister rhs = locations->InAt(1).AsRegister<GpuRegister>(); |
| 1720 | // TODO: more efficient (direct) comparison with a constant |
| 1721 | __ Slt(TMP, lhs, rhs); |
| 1722 | __ Slt(dst, rhs, lhs); |
| 1723 | __ Subu(dst, dst, TMP); |
| 1724 | break; |
| 1725 | } |
| 1726 | |
| 1727 | case Primitive::kPrimFloat: |
| 1728 | case Primitive::kPrimDouble: { |
| 1729 | int32_t entry_point_offset; |
| 1730 | if (in_type == Primitive::kPrimFloat) { |
| 1731 | entry_point_offset = instruction->IsGtBias() ? QUICK_ENTRY_POINT(pCmpgFloat) |
| 1732 | : QUICK_ENTRY_POINT(pCmplFloat); |
| 1733 | } else { |
| 1734 | entry_point_offset = instruction->IsGtBias() ? QUICK_ENTRY_POINT(pCmpgDouble) |
| 1735 | : QUICK_ENTRY_POINT(pCmplDouble); |
| 1736 | } |
| 1737 | codegen_->InvokeRuntime(entry_point_offset, instruction, instruction->GetDexPc(), nullptr); |
| 1738 | break; |
| 1739 | } |
| 1740 | |
| 1741 | default: |
| 1742 | LOG(FATAL) << "Unimplemented compare type " << in_type; |
| 1743 | } |
| 1744 | } |
| 1745 | |
| 1746 | void LocationsBuilderMIPS64::VisitCondition(HCondition* instruction) { |
| 1747 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); |
| 1748 | locations->SetInAt(0, Location::RequiresRegister()); |
| 1749 | locations->SetInAt(1, Location::RegisterOrConstant(instruction->InputAt(1))); |
| 1750 | if (instruction->NeedsMaterialization()) { |
| 1751 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 1752 | } |
| 1753 | } |
| 1754 | |
| 1755 | void InstructionCodeGeneratorMIPS64::VisitCondition(HCondition* instruction) { |
| 1756 | if (!instruction->NeedsMaterialization()) { |
| 1757 | return; |
| 1758 | } |
| 1759 | |
| 1760 | LocationSummary* locations = instruction->GetLocations(); |
| 1761 | |
| 1762 | GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); |
| 1763 | GpuRegister lhs = locations->InAt(0).AsRegister<GpuRegister>(); |
| 1764 | Location rhs_location = locations->InAt(1); |
| 1765 | |
| 1766 | GpuRegister rhs_reg = ZERO; |
| 1767 | int64_t rhs_imm = 0; |
| 1768 | bool use_imm = rhs_location.IsConstant(); |
| 1769 | if (use_imm) { |
| 1770 | rhs_imm = CodeGenerator::GetInt32ValueOf(rhs_location.GetConstant()); |
| 1771 | } else { |
| 1772 | rhs_reg = rhs_location.AsRegister<GpuRegister>(); |
| 1773 | } |
| 1774 | |
| 1775 | IfCondition if_cond = instruction->GetCondition(); |
| 1776 | |
| 1777 | switch (if_cond) { |
| 1778 | case kCondEQ: |
| 1779 | case kCondNE: |
| 1780 | if (use_imm && IsUint<16>(rhs_imm)) { |
| 1781 | __ Xori(dst, lhs, rhs_imm); |
| 1782 | } else { |
| 1783 | if (use_imm) { |
| 1784 | rhs_reg = TMP; |
| 1785 | __ LoadConst32(rhs_reg, rhs_imm); |
| 1786 | } |
| 1787 | __ Xor(dst, lhs, rhs_reg); |
| 1788 | } |
| 1789 | if (if_cond == kCondEQ) { |
| 1790 | __ Sltiu(dst, dst, 1); |
| 1791 | } else { |
| 1792 | __ Sltu(dst, ZERO, dst); |
| 1793 | } |
| 1794 | break; |
| 1795 | |
| 1796 | case kCondLT: |
| 1797 | case kCondGE: |
| 1798 | if (use_imm && IsInt<16>(rhs_imm)) { |
| 1799 | __ Slti(dst, lhs, rhs_imm); |
| 1800 | } else { |
| 1801 | if (use_imm) { |
| 1802 | rhs_reg = TMP; |
| 1803 | __ LoadConst32(rhs_reg, rhs_imm); |
| 1804 | } |
| 1805 | __ Slt(dst, lhs, rhs_reg); |
| 1806 | } |
| 1807 | if (if_cond == kCondGE) { |
| 1808 | // Simulate lhs >= rhs via !(lhs < rhs) since there's |
| 1809 | // only the slt instruction but no sge. |
| 1810 | __ Xori(dst, dst, 1); |
| 1811 | } |
| 1812 | break; |
| 1813 | |
| 1814 | case kCondLE: |
| 1815 | case kCondGT: |
| 1816 | if (use_imm && IsInt<16>(rhs_imm + 1)) { |
| 1817 | // Simulate lhs <= rhs via lhs < rhs + 1. |
| 1818 | __ Slti(dst, lhs, rhs_imm + 1); |
| 1819 | if (if_cond == kCondGT) { |
| 1820 | // Simulate lhs > rhs via !(lhs <= rhs) since there's |
| 1821 | // only the slti instruction but no sgti. |
| 1822 | __ Xori(dst, dst, 1); |
| 1823 | } |
| 1824 | } else { |
| 1825 | if (use_imm) { |
| 1826 | rhs_reg = TMP; |
| 1827 | __ LoadConst32(rhs_reg, rhs_imm); |
| 1828 | } |
| 1829 | __ Slt(dst, rhs_reg, lhs); |
| 1830 | if (if_cond == kCondLE) { |
| 1831 | // Simulate lhs <= rhs via !(rhs < lhs) since there's |
| 1832 | // only the slt instruction but no sle. |
| 1833 | __ Xori(dst, dst, 1); |
| 1834 | } |
| 1835 | } |
| 1836 | break; |
| 1837 | } |
| 1838 | } |
| 1839 | |
| 1840 | void LocationsBuilderMIPS64::VisitDiv(HDiv* div) { |
| 1841 | LocationSummary* locations = |
| 1842 | new (GetGraph()->GetArena()) LocationSummary(div, LocationSummary::kNoCall); |
| 1843 | switch (div->GetResultType()) { |
| 1844 | case Primitive::kPrimInt: |
| 1845 | case Primitive::kPrimLong: |
| 1846 | locations->SetInAt(0, Location::RequiresRegister()); |
| 1847 | locations->SetInAt(1, Location::RequiresRegister()); |
| 1848 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 1849 | break; |
| 1850 | |
| 1851 | case Primitive::kPrimFloat: |
| 1852 | case Primitive::kPrimDouble: |
| 1853 | locations->SetInAt(0, Location::RequiresFpuRegister()); |
| 1854 | locations->SetInAt(1, Location::RequiresFpuRegister()); |
| 1855 | locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); |
| 1856 | break; |
| 1857 | |
| 1858 | default: |
| 1859 | LOG(FATAL) << "Unexpected div type " << div->GetResultType(); |
| 1860 | } |
| 1861 | } |
| 1862 | |
| 1863 | void InstructionCodeGeneratorMIPS64::VisitDiv(HDiv* instruction) { |
| 1864 | Primitive::Type type = instruction->GetType(); |
| 1865 | LocationSummary* locations = instruction->GetLocations(); |
| 1866 | |
| 1867 | switch (type) { |
| 1868 | case Primitive::kPrimInt: |
| 1869 | case Primitive::kPrimLong: { |
| 1870 | GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); |
| 1871 | GpuRegister lhs = locations->InAt(0).AsRegister<GpuRegister>(); |
| 1872 | GpuRegister rhs = locations->InAt(1).AsRegister<GpuRegister>(); |
| 1873 | if (type == Primitive::kPrimInt) |
| 1874 | __ DivR6(dst, lhs, rhs); |
| 1875 | else |
| 1876 | __ Ddiv(dst, lhs, rhs); |
| 1877 | break; |
| 1878 | } |
| 1879 | case Primitive::kPrimFloat: |
| 1880 | case Primitive::kPrimDouble: { |
| 1881 | FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); |
| 1882 | FpuRegister lhs = locations->InAt(0).AsFpuRegister<FpuRegister>(); |
| 1883 | FpuRegister rhs = locations->InAt(1).AsFpuRegister<FpuRegister>(); |
| 1884 | if (type == Primitive::kPrimFloat) |
| 1885 | __ DivS(dst, lhs, rhs); |
| 1886 | else |
| 1887 | __ DivD(dst, lhs, rhs); |
| 1888 | break; |
| 1889 | } |
| 1890 | default: |
| 1891 | LOG(FATAL) << "Unexpected div type " << type; |
| 1892 | } |
| 1893 | } |
| 1894 | |
| 1895 | void LocationsBuilderMIPS64::VisitDivZeroCheck(HDivZeroCheck* instruction) { |
David Brazdil | 77a48ae | 2015-09-15 12:34:04 +0000 | [diff] [blame] | 1896 | LocationSummary::CallKind call_kind = instruction->CanThrowIntoCatchBlock() |
| 1897 | ? LocationSummary::kCallOnSlowPath |
| 1898 | : LocationSummary::kNoCall; |
| 1899 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 1900 | locations->SetInAt(0, Location::RegisterOrConstant(instruction->InputAt(0))); |
| 1901 | if (instruction->HasUses()) { |
| 1902 | locations->SetOut(Location::SameAsFirstInput()); |
| 1903 | } |
| 1904 | } |
| 1905 | |
| 1906 | void InstructionCodeGeneratorMIPS64::VisitDivZeroCheck(HDivZeroCheck* instruction) { |
| 1907 | SlowPathCodeMIPS64* slow_path = |
| 1908 | new (GetGraph()->GetArena()) DivZeroCheckSlowPathMIPS64(instruction); |
| 1909 | codegen_->AddSlowPath(slow_path); |
| 1910 | Location value = instruction->GetLocations()->InAt(0); |
| 1911 | |
| 1912 | Primitive::Type type = instruction->GetType(); |
| 1913 | |
Serguei Katkov | 8c0676c | 2015-08-03 13:55:33 +0600 | [diff] [blame] | 1914 | if ((type == Primitive::kPrimBoolean) || !Primitive::IsIntegralType(type)) { |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 1915 | LOG(FATAL) << "Unexpected type " << type << " for DivZeroCheck."; |
Serguei Katkov | 8c0676c | 2015-08-03 13:55:33 +0600 | [diff] [blame] | 1916 | return; |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 1917 | } |
| 1918 | |
| 1919 | if (value.IsConstant()) { |
| 1920 | int64_t divisor = codegen_->GetInt64ValueOf(value.GetConstant()->AsConstant()); |
| 1921 | if (divisor == 0) { |
| 1922 | __ B(slow_path->GetEntryLabel()); |
| 1923 | } else { |
| 1924 | // A division by a non-null constant is valid. We don't need to perform |
| 1925 | // any check, so simply fall through. |
| 1926 | } |
| 1927 | } else { |
| 1928 | __ Beqzc(value.AsRegister<GpuRegister>(), slow_path->GetEntryLabel()); |
| 1929 | } |
| 1930 | } |
| 1931 | |
| 1932 | void LocationsBuilderMIPS64::VisitDoubleConstant(HDoubleConstant* constant) { |
| 1933 | LocationSummary* locations = |
| 1934 | new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall); |
| 1935 | locations->SetOut(Location::ConstantLocation(constant)); |
| 1936 | } |
| 1937 | |
| 1938 | void InstructionCodeGeneratorMIPS64::VisitDoubleConstant(HDoubleConstant* cst ATTRIBUTE_UNUSED) { |
| 1939 | // Will be generated at use site. |
| 1940 | } |
| 1941 | |
| 1942 | void LocationsBuilderMIPS64::VisitExit(HExit* exit) { |
| 1943 | exit->SetLocations(nullptr); |
| 1944 | } |
| 1945 | |
| 1946 | void InstructionCodeGeneratorMIPS64::VisitExit(HExit* exit ATTRIBUTE_UNUSED) { |
| 1947 | } |
| 1948 | |
| 1949 | void LocationsBuilderMIPS64::VisitFloatConstant(HFloatConstant* constant) { |
| 1950 | LocationSummary* locations = |
| 1951 | new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall); |
| 1952 | locations->SetOut(Location::ConstantLocation(constant)); |
| 1953 | } |
| 1954 | |
| 1955 | void InstructionCodeGeneratorMIPS64::VisitFloatConstant(HFloatConstant* constant ATTRIBUTE_UNUSED) { |
| 1956 | // Will be generated at use site. |
| 1957 | } |
| 1958 | |
David Brazdil | fc6a86a | 2015-06-26 10:33:45 +0000 | [diff] [blame] | 1959 | void InstructionCodeGeneratorMIPS64::HandleGoto(HInstruction* got, HBasicBlock* successor) { |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 1960 | DCHECK(!successor->IsExitBlock()); |
| 1961 | HBasicBlock* block = got->GetBlock(); |
| 1962 | HInstruction* previous = got->GetPrevious(); |
| 1963 | HLoopInformation* info = block->GetLoopInformation(); |
| 1964 | |
| 1965 | if (info != nullptr && info->IsBackEdge(*block) && info->HasSuspendCheck()) { |
| 1966 | codegen_->ClearSpillSlotsFromLoopPhisInStackMap(info->GetSuspendCheck()); |
| 1967 | GenerateSuspendCheck(info->GetSuspendCheck(), successor); |
| 1968 | return; |
| 1969 | } |
| 1970 | if (block->IsEntryBlock() && (previous != nullptr) && previous->IsSuspendCheck()) { |
| 1971 | GenerateSuspendCheck(previous->AsSuspendCheck(), nullptr); |
| 1972 | } |
| 1973 | if (!codegen_->GoesToNextBlock(block, successor)) { |
| 1974 | __ B(codegen_->GetLabelOf(successor)); |
| 1975 | } |
| 1976 | } |
| 1977 | |
David Brazdil | fc6a86a | 2015-06-26 10:33:45 +0000 | [diff] [blame] | 1978 | void LocationsBuilderMIPS64::VisitGoto(HGoto* got) { |
| 1979 | got->SetLocations(nullptr); |
| 1980 | } |
| 1981 | |
| 1982 | void InstructionCodeGeneratorMIPS64::VisitGoto(HGoto* got) { |
| 1983 | HandleGoto(got, got->GetSuccessor()); |
| 1984 | } |
| 1985 | |
| 1986 | void LocationsBuilderMIPS64::VisitTryBoundary(HTryBoundary* try_boundary) { |
| 1987 | try_boundary->SetLocations(nullptr); |
| 1988 | } |
| 1989 | |
| 1990 | void InstructionCodeGeneratorMIPS64::VisitTryBoundary(HTryBoundary* try_boundary) { |
| 1991 | HBasicBlock* successor = try_boundary->GetNormalFlowSuccessor(); |
| 1992 | if (!successor->IsExitBlock()) { |
| 1993 | HandleGoto(try_boundary, successor); |
| 1994 | } |
| 1995 | } |
| 1996 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 1997 | void InstructionCodeGeneratorMIPS64::GenerateTestAndBranch(HInstruction* instruction, |
| 1998 | Label* true_target, |
| 1999 | Label* false_target, |
| 2000 | Label* always_true_target) { |
| 2001 | HInstruction* cond = instruction->InputAt(0); |
| 2002 | HCondition* condition = cond->AsCondition(); |
| 2003 | |
| 2004 | if (cond->IsIntConstant()) { |
| 2005 | int32_t cond_value = cond->AsIntConstant()->GetValue(); |
| 2006 | if (cond_value == 1) { |
| 2007 | if (always_true_target != nullptr) { |
| 2008 | __ B(always_true_target); |
| 2009 | } |
| 2010 | return; |
| 2011 | } else { |
| 2012 | DCHECK_EQ(cond_value, 0); |
| 2013 | } |
| 2014 | } else if (!cond->IsCondition() || condition->NeedsMaterialization()) { |
| 2015 | // The condition instruction has been materialized, compare the output to 0. |
| 2016 | Location cond_val = instruction->GetLocations()->InAt(0); |
| 2017 | DCHECK(cond_val.IsRegister()); |
| 2018 | __ Bnezc(cond_val.AsRegister<GpuRegister>(), true_target); |
| 2019 | } else { |
| 2020 | // The condition instruction has not been materialized, use its inputs as |
| 2021 | // the comparison and its condition as the branch condition. |
| 2022 | GpuRegister lhs = condition->GetLocations()->InAt(0).AsRegister<GpuRegister>(); |
| 2023 | Location rhs_location = condition->GetLocations()->InAt(1); |
| 2024 | GpuRegister rhs_reg = ZERO; |
| 2025 | int32_t rhs_imm = 0; |
| 2026 | bool use_imm = rhs_location.IsConstant(); |
| 2027 | if (use_imm) { |
| 2028 | rhs_imm = CodeGenerator::GetInt32ValueOf(rhs_location.GetConstant()); |
| 2029 | } else { |
| 2030 | rhs_reg = rhs_location.AsRegister<GpuRegister>(); |
| 2031 | } |
| 2032 | |
| 2033 | IfCondition if_cond = condition->GetCondition(); |
| 2034 | if (use_imm && rhs_imm == 0) { |
| 2035 | switch (if_cond) { |
| 2036 | case kCondEQ: |
| 2037 | __ Beqzc(lhs, true_target); |
| 2038 | break; |
| 2039 | case kCondNE: |
| 2040 | __ Bnezc(lhs, true_target); |
| 2041 | break; |
| 2042 | case kCondLT: |
| 2043 | __ Bltzc(lhs, true_target); |
| 2044 | break; |
| 2045 | case kCondGE: |
| 2046 | __ Bgezc(lhs, true_target); |
| 2047 | break; |
| 2048 | case kCondLE: |
| 2049 | __ Blezc(lhs, true_target); |
| 2050 | break; |
| 2051 | case kCondGT: |
| 2052 | __ Bgtzc(lhs, true_target); |
| 2053 | break; |
| 2054 | } |
| 2055 | } else { |
| 2056 | if (use_imm) { |
| 2057 | rhs_reg = TMP; |
| 2058 | __ LoadConst32(rhs_reg, rhs_imm); |
| 2059 | } |
| 2060 | // It looks like we can get here with lhs == rhs. Should that be possible at all? |
| 2061 | // Mips R6 requires lhs != rhs for compact branches. |
| 2062 | if (lhs == rhs_reg) { |
| 2063 | DCHECK(!use_imm); |
| 2064 | switch (if_cond) { |
| 2065 | case kCondEQ: |
| 2066 | case kCondGE: |
| 2067 | case kCondLE: |
| 2068 | // if lhs == rhs for a positive condition, then it is a branch |
| 2069 | __ B(true_target); |
| 2070 | break; |
| 2071 | case kCondNE: |
| 2072 | case kCondLT: |
| 2073 | case kCondGT: |
| 2074 | // if lhs == rhs for a negative condition, then it is a NOP |
| 2075 | break; |
| 2076 | } |
| 2077 | } else { |
| 2078 | switch (if_cond) { |
| 2079 | case kCondEQ: |
| 2080 | __ Beqc(lhs, rhs_reg, true_target); |
| 2081 | break; |
| 2082 | case kCondNE: |
| 2083 | __ Bnec(lhs, rhs_reg, true_target); |
| 2084 | break; |
| 2085 | case kCondLT: |
| 2086 | __ Bltc(lhs, rhs_reg, true_target); |
| 2087 | break; |
| 2088 | case kCondGE: |
| 2089 | __ Bgec(lhs, rhs_reg, true_target); |
| 2090 | break; |
| 2091 | case kCondLE: |
| 2092 | __ Bgec(rhs_reg, lhs, true_target); |
| 2093 | break; |
| 2094 | case kCondGT: |
| 2095 | __ Bltc(rhs_reg, lhs, true_target); |
| 2096 | break; |
| 2097 | } |
| 2098 | } |
| 2099 | } |
| 2100 | } |
| 2101 | if (false_target != nullptr) { |
| 2102 | __ B(false_target); |
| 2103 | } |
| 2104 | } |
| 2105 | |
| 2106 | void LocationsBuilderMIPS64::VisitIf(HIf* if_instr) { |
| 2107 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(if_instr); |
| 2108 | HInstruction* cond = if_instr->InputAt(0); |
| 2109 | if (!cond->IsCondition() || cond->AsCondition()->NeedsMaterialization()) { |
| 2110 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2111 | } |
| 2112 | } |
| 2113 | |
| 2114 | void InstructionCodeGeneratorMIPS64::VisitIf(HIf* if_instr) { |
| 2115 | Label* true_target = codegen_->GetLabelOf(if_instr->IfTrueSuccessor()); |
| 2116 | Label* false_target = codegen_->GetLabelOf(if_instr->IfFalseSuccessor()); |
| 2117 | Label* always_true_target = true_target; |
| 2118 | if (codegen_->GoesToNextBlock(if_instr->GetBlock(), |
| 2119 | if_instr->IfTrueSuccessor())) { |
| 2120 | always_true_target = nullptr; |
| 2121 | } |
| 2122 | if (codegen_->GoesToNextBlock(if_instr->GetBlock(), |
| 2123 | if_instr->IfFalseSuccessor())) { |
| 2124 | false_target = nullptr; |
| 2125 | } |
| 2126 | GenerateTestAndBranch(if_instr, true_target, false_target, always_true_target); |
| 2127 | } |
| 2128 | |
| 2129 | void LocationsBuilderMIPS64::VisitDeoptimize(HDeoptimize* deoptimize) { |
| 2130 | LocationSummary* locations = new (GetGraph()->GetArena()) |
| 2131 | LocationSummary(deoptimize, LocationSummary::kCallOnSlowPath); |
| 2132 | HInstruction* cond = deoptimize->InputAt(0); |
| 2133 | DCHECK(cond->IsCondition()); |
| 2134 | if (cond->AsCondition()->NeedsMaterialization()) { |
| 2135 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2136 | } |
| 2137 | } |
| 2138 | |
| 2139 | void InstructionCodeGeneratorMIPS64::VisitDeoptimize(HDeoptimize* deoptimize) { |
| 2140 | SlowPathCodeMIPS64* slow_path = new (GetGraph()->GetArena()) |
| 2141 | DeoptimizationSlowPathMIPS64(deoptimize); |
| 2142 | codegen_->AddSlowPath(slow_path); |
| 2143 | Label* slow_path_entry = slow_path->GetEntryLabel(); |
| 2144 | GenerateTestAndBranch(deoptimize, slow_path_entry, nullptr, slow_path_entry); |
| 2145 | } |
| 2146 | |
| 2147 | void LocationsBuilderMIPS64::HandleFieldGet(HInstruction* instruction, |
| 2148 | const FieldInfo& field_info ATTRIBUTE_UNUSED) { |
| 2149 | LocationSummary* locations = |
| 2150 | new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall); |
| 2151 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2152 | if (Primitive::IsFloatingPointType(instruction->GetType())) { |
| 2153 | locations->SetOut(Location::RequiresFpuRegister()); |
| 2154 | } else { |
| 2155 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 2156 | } |
| 2157 | } |
| 2158 | |
| 2159 | void InstructionCodeGeneratorMIPS64::HandleFieldGet(HInstruction* instruction, |
| 2160 | const FieldInfo& field_info) { |
| 2161 | Primitive::Type type = field_info.GetFieldType(); |
| 2162 | LocationSummary* locations = instruction->GetLocations(); |
| 2163 | GpuRegister obj = locations->InAt(0).AsRegister<GpuRegister>(); |
| 2164 | LoadOperandType load_type = kLoadUnsignedByte; |
| 2165 | switch (type) { |
| 2166 | case Primitive::kPrimBoolean: |
| 2167 | load_type = kLoadUnsignedByte; |
| 2168 | break; |
| 2169 | case Primitive::kPrimByte: |
| 2170 | load_type = kLoadSignedByte; |
| 2171 | break; |
| 2172 | case Primitive::kPrimShort: |
| 2173 | load_type = kLoadSignedHalfword; |
| 2174 | break; |
| 2175 | case Primitive::kPrimChar: |
| 2176 | load_type = kLoadUnsignedHalfword; |
| 2177 | break; |
| 2178 | case Primitive::kPrimInt: |
| 2179 | case Primitive::kPrimFloat: |
| 2180 | load_type = kLoadWord; |
| 2181 | break; |
| 2182 | case Primitive::kPrimLong: |
| 2183 | case Primitive::kPrimDouble: |
| 2184 | load_type = kLoadDoubleword; |
| 2185 | break; |
| 2186 | case Primitive::kPrimNot: |
| 2187 | load_type = kLoadUnsignedWord; |
| 2188 | break; |
| 2189 | case Primitive::kPrimVoid: |
| 2190 | LOG(FATAL) << "Unreachable type " << type; |
| 2191 | UNREACHABLE(); |
| 2192 | } |
| 2193 | if (!Primitive::IsFloatingPointType(type)) { |
| 2194 | DCHECK(locations->Out().IsRegister()); |
| 2195 | GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); |
| 2196 | __ LoadFromOffset(load_type, dst, obj, field_info.GetFieldOffset().Uint32Value()); |
| 2197 | } else { |
| 2198 | DCHECK(locations->Out().IsFpuRegister()); |
| 2199 | FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); |
| 2200 | __ LoadFpuFromOffset(load_type, dst, obj, field_info.GetFieldOffset().Uint32Value()); |
| 2201 | } |
| 2202 | |
| 2203 | codegen_->MaybeRecordImplicitNullCheck(instruction); |
| 2204 | // TODO: memory barrier? |
| 2205 | } |
| 2206 | |
| 2207 | void LocationsBuilderMIPS64::HandleFieldSet(HInstruction* instruction, |
| 2208 | const FieldInfo& field_info ATTRIBUTE_UNUSED) { |
| 2209 | LocationSummary* locations = |
| 2210 | new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall); |
| 2211 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2212 | if (Primitive::IsFloatingPointType(instruction->InputAt(1)->GetType())) { |
| 2213 | locations->SetInAt(1, Location::RequiresFpuRegister()); |
| 2214 | } else { |
| 2215 | locations->SetInAt(1, Location::RequiresRegister()); |
| 2216 | } |
| 2217 | } |
| 2218 | |
| 2219 | void InstructionCodeGeneratorMIPS64::HandleFieldSet(HInstruction* instruction, |
| 2220 | const FieldInfo& field_info) { |
| 2221 | Primitive::Type type = field_info.GetFieldType(); |
| 2222 | LocationSummary* locations = instruction->GetLocations(); |
| 2223 | GpuRegister obj = locations->InAt(0).AsRegister<GpuRegister>(); |
| 2224 | StoreOperandType store_type = kStoreByte; |
| 2225 | switch (type) { |
| 2226 | case Primitive::kPrimBoolean: |
| 2227 | case Primitive::kPrimByte: |
| 2228 | store_type = kStoreByte; |
| 2229 | break; |
| 2230 | case Primitive::kPrimShort: |
| 2231 | case Primitive::kPrimChar: |
| 2232 | store_type = kStoreHalfword; |
| 2233 | break; |
| 2234 | case Primitive::kPrimInt: |
| 2235 | case Primitive::kPrimFloat: |
| 2236 | case Primitive::kPrimNot: |
| 2237 | store_type = kStoreWord; |
| 2238 | break; |
| 2239 | case Primitive::kPrimLong: |
| 2240 | case Primitive::kPrimDouble: |
| 2241 | store_type = kStoreDoubleword; |
| 2242 | break; |
| 2243 | case Primitive::kPrimVoid: |
| 2244 | LOG(FATAL) << "Unreachable type " << type; |
| 2245 | UNREACHABLE(); |
| 2246 | } |
| 2247 | if (!Primitive::IsFloatingPointType(type)) { |
| 2248 | DCHECK(locations->InAt(1).IsRegister()); |
| 2249 | GpuRegister src = locations->InAt(1).AsRegister<GpuRegister>(); |
| 2250 | __ StoreToOffset(store_type, src, obj, field_info.GetFieldOffset().Uint32Value()); |
| 2251 | } else { |
| 2252 | DCHECK(locations->InAt(1).IsFpuRegister()); |
| 2253 | FpuRegister src = locations->InAt(1).AsFpuRegister<FpuRegister>(); |
| 2254 | __ StoreFpuToOffset(store_type, src, obj, field_info.GetFieldOffset().Uint32Value()); |
| 2255 | } |
| 2256 | |
| 2257 | codegen_->MaybeRecordImplicitNullCheck(instruction); |
| 2258 | // TODO: memory barriers? |
| 2259 | if (CodeGenerator::StoreNeedsWriteBarrier(type, instruction->InputAt(1))) { |
| 2260 | DCHECK(locations->InAt(1).IsRegister()); |
| 2261 | GpuRegister src = locations->InAt(1).AsRegister<GpuRegister>(); |
| 2262 | codegen_->MarkGCCard(obj, src); |
| 2263 | } |
| 2264 | } |
| 2265 | |
| 2266 | void LocationsBuilderMIPS64::VisitInstanceFieldGet(HInstanceFieldGet* instruction) { |
| 2267 | HandleFieldGet(instruction, instruction->GetFieldInfo()); |
| 2268 | } |
| 2269 | |
| 2270 | void InstructionCodeGeneratorMIPS64::VisitInstanceFieldGet(HInstanceFieldGet* instruction) { |
| 2271 | HandleFieldGet(instruction, instruction->GetFieldInfo()); |
| 2272 | } |
| 2273 | |
| 2274 | void LocationsBuilderMIPS64::VisitInstanceFieldSet(HInstanceFieldSet* instruction) { |
| 2275 | HandleFieldSet(instruction, instruction->GetFieldInfo()); |
| 2276 | } |
| 2277 | |
| 2278 | void InstructionCodeGeneratorMIPS64::VisitInstanceFieldSet(HInstanceFieldSet* instruction) { |
| 2279 | HandleFieldSet(instruction, instruction->GetFieldInfo()); |
| 2280 | } |
| 2281 | |
| 2282 | void LocationsBuilderMIPS64::VisitInstanceOf(HInstanceOf* instruction) { |
| 2283 | LocationSummary::CallKind call_kind = |
Nicolas Geoffray | 85c7bab | 2015-09-18 13:40:46 +0000 | [diff] [blame] | 2284 | instruction->IsExactCheck() ? LocationSummary::kNoCall : LocationSummary::kCallOnSlowPath; |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2285 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind); |
| 2286 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2287 | locations->SetInAt(1, Location::RequiresRegister()); |
| 2288 | // The output does overlap inputs. |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 2289 | // Note that TypeCheckSlowPathMIPS64 uses this register too. |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2290 | locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap); |
| 2291 | } |
| 2292 | |
| 2293 | void InstructionCodeGeneratorMIPS64::VisitInstanceOf(HInstanceOf* instruction) { |
| 2294 | LocationSummary* locations = instruction->GetLocations(); |
| 2295 | GpuRegister obj = locations->InAt(0).AsRegister<GpuRegister>(); |
| 2296 | GpuRegister cls = locations->InAt(1).AsRegister<GpuRegister>(); |
| 2297 | GpuRegister out = locations->Out().AsRegister<GpuRegister>(); |
| 2298 | |
| 2299 | Label done; |
| 2300 | |
| 2301 | // Return 0 if `obj` is null. |
| 2302 | // TODO: Avoid this check if we know `obj` is not null. |
| 2303 | __ Move(out, ZERO); |
| 2304 | __ Beqzc(obj, &done); |
| 2305 | |
| 2306 | // Compare the class of `obj` with `cls`. |
| 2307 | __ LoadFromOffset(kLoadUnsignedWord, out, obj, mirror::Object::ClassOffset().Int32Value()); |
Nicolas Geoffray | 85c7bab | 2015-09-18 13:40:46 +0000 | [diff] [blame] | 2308 | if (instruction->IsExactCheck()) { |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2309 | // Classes must be equal for the instanceof to succeed. |
| 2310 | __ Xor(out, out, cls); |
| 2311 | __ Sltiu(out, out, 1); |
| 2312 | } else { |
| 2313 | // If the classes are not equal, we go into a slow path. |
| 2314 | DCHECK(locations->OnlyCallsOnSlowPath()); |
| 2315 | SlowPathCodeMIPS64* slow_path = |
Serban Constantinescu | 5a6cc49 | 2015-08-13 15:20:25 +0100 | [diff] [blame] | 2316 | new (GetGraph()->GetArena()) TypeCheckSlowPathMIPS64(instruction); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2317 | codegen_->AddSlowPath(slow_path); |
| 2318 | __ Bnec(out, cls, slow_path->GetEntryLabel()); |
| 2319 | __ LoadConst32(out, 1); |
| 2320 | __ Bind(slow_path->GetExitLabel()); |
| 2321 | } |
| 2322 | |
| 2323 | __ Bind(&done); |
| 2324 | } |
| 2325 | |
| 2326 | void LocationsBuilderMIPS64::VisitIntConstant(HIntConstant* constant) { |
| 2327 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(constant); |
| 2328 | locations->SetOut(Location::ConstantLocation(constant)); |
| 2329 | } |
| 2330 | |
| 2331 | void InstructionCodeGeneratorMIPS64::VisitIntConstant(HIntConstant* constant ATTRIBUTE_UNUSED) { |
| 2332 | // Will be generated at use site. |
| 2333 | } |
| 2334 | |
| 2335 | void LocationsBuilderMIPS64::VisitNullConstant(HNullConstant* constant) { |
| 2336 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(constant); |
| 2337 | locations->SetOut(Location::ConstantLocation(constant)); |
| 2338 | } |
| 2339 | |
| 2340 | void InstructionCodeGeneratorMIPS64::VisitNullConstant(HNullConstant* constant ATTRIBUTE_UNUSED) { |
| 2341 | // Will be generated at use site. |
| 2342 | } |
| 2343 | |
Calin Juravle | 175dc73 | 2015-08-25 15:42:32 +0100 | [diff] [blame] | 2344 | void LocationsBuilderMIPS64::VisitInvokeUnresolved(HInvokeUnresolved* invoke) { |
| 2345 | // The trampoline uses the same calling convention as dex calling conventions, |
| 2346 | // except instead of loading arg0/r0 with the target Method*, arg0/r0 will contain |
| 2347 | // the method_idx. |
| 2348 | HandleInvoke(invoke); |
| 2349 | } |
| 2350 | |
| 2351 | void InstructionCodeGeneratorMIPS64::VisitInvokeUnresolved(HInvokeUnresolved* invoke) { |
| 2352 | codegen_->GenerateInvokeUnresolvedRuntimeCall(invoke); |
| 2353 | } |
| 2354 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2355 | void LocationsBuilderMIPS64::HandleInvoke(HInvoke* invoke) { |
| 2356 | InvokeDexCallingConventionVisitorMIPS64 calling_convention_visitor; |
| 2357 | CodeGenerator::CreateCommonInvokeLocationSummary(invoke, &calling_convention_visitor); |
| 2358 | } |
| 2359 | |
| 2360 | void LocationsBuilderMIPS64::VisitInvokeInterface(HInvokeInterface* invoke) { |
| 2361 | HandleInvoke(invoke); |
| 2362 | // The register T0 is required to be used for the hidden argument in |
| 2363 | // art_quick_imt_conflict_trampoline, so add the hidden argument. |
| 2364 | invoke->GetLocations()->AddTemp(Location::RegisterLocation(T0)); |
| 2365 | } |
| 2366 | |
| 2367 | void InstructionCodeGeneratorMIPS64::VisitInvokeInterface(HInvokeInterface* invoke) { |
| 2368 | // TODO: b/18116999, our IMTs can miss an IncompatibleClassChangeError. |
| 2369 | GpuRegister temp = invoke->GetLocations()->GetTemp(0).AsRegister<GpuRegister>(); |
| 2370 | uint32_t method_offset = mirror::Class::EmbeddedImTableEntryOffset( |
| 2371 | invoke->GetImtIndex() % mirror::Class::kImtSize, kMips64PointerSize).Uint32Value(); |
| 2372 | Location receiver = invoke->GetLocations()->InAt(0); |
| 2373 | uint32_t class_offset = mirror::Object::ClassOffset().Int32Value(); |
| 2374 | Offset entry_point = ArtMethod::EntryPointFromQuickCompiledCodeOffset(kMips64WordSize); |
| 2375 | |
| 2376 | // Set the hidden argument. |
| 2377 | __ LoadConst32(invoke->GetLocations()->GetTemp(1).AsRegister<GpuRegister>(), |
| 2378 | invoke->GetDexMethodIndex()); |
| 2379 | |
| 2380 | // temp = object->GetClass(); |
| 2381 | if (receiver.IsStackSlot()) { |
| 2382 | __ LoadFromOffset(kLoadUnsignedWord, temp, SP, receiver.GetStackIndex()); |
| 2383 | __ LoadFromOffset(kLoadUnsignedWord, temp, temp, class_offset); |
| 2384 | } else { |
| 2385 | __ LoadFromOffset(kLoadUnsignedWord, temp, receiver.AsRegister<GpuRegister>(), class_offset); |
| 2386 | } |
| 2387 | codegen_->MaybeRecordImplicitNullCheck(invoke); |
| 2388 | // temp = temp->GetImtEntryAt(method_offset); |
| 2389 | __ LoadFromOffset(kLoadDoubleword, temp, temp, method_offset); |
| 2390 | // T9 = temp->GetEntryPoint(); |
| 2391 | __ LoadFromOffset(kLoadDoubleword, T9, temp, entry_point.Int32Value()); |
| 2392 | // T9(); |
| 2393 | __ Jalr(T9); |
| 2394 | DCHECK(!codegen_->IsLeafMethod()); |
| 2395 | codegen_->RecordPcInfo(invoke, invoke->GetDexPc()); |
| 2396 | } |
| 2397 | |
| 2398 | void LocationsBuilderMIPS64::VisitInvokeVirtual(HInvokeVirtual* invoke) { |
| 2399 | // TODO intrinsic function |
| 2400 | HandleInvoke(invoke); |
| 2401 | } |
| 2402 | |
| 2403 | void LocationsBuilderMIPS64::VisitInvokeStaticOrDirect(HInvokeStaticOrDirect* invoke) { |
| 2404 | // When we do not run baseline, explicit clinit checks triggered by static |
| 2405 | // invokes must have been pruned by art::PrepareForRegisterAllocation. |
| 2406 | DCHECK(codegen_->IsBaseline() || !invoke->IsStaticWithExplicitClinitCheck()); |
| 2407 | |
| 2408 | // TODO - intrinsic function |
| 2409 | HandleInvoke(invoke); |
| 2410 | |
| 2411 | // While SetupBlockedRegisters() blocks registers S2-S8 due to their |
| 2412 | // clobbering somewhere else, reduce further register pressure by avoiding |
| 2413 | // allocation of a register for the current method pointer like on x86 baseline. |
| 2414 | // TODO: remove this once all the issues with register saving/restoring are |
| 2415 | // sorted out. |
| 2416 | LocationSummary* locations = invoke->GetLocations(); |
| 2417 | Location location = locations->InAt(invoke->GetCurrentMethodInputIndex()); |
| 2418 | if (location.IsUnallocated() && location.GetPolicy() == Location::kRequiresRegister) { |
| 2419 | locations->SetInAt(invoke->GetCurrentMethodInputIndex(), Location::NoLocation()); |
| 2420 | } |
| 2421 | } |
| 2422 | |
| 2423 | static bool TryGenerateIntrinsicCode(HInvoke* invoke, |
| 2424 | CodeGeneratorMIPS64* codegen ATTRIBUTE_UNUSED) { |
| 2425 | if (invoke->GetLocations()->Intrinsified()) { |
| 2426 | // TODO - intrinsic function |
| 2427 | return true; |
| 2428 | } |
| 2429 | return false; |
| 2430 | } |
| 2431 | |
| 2432 | void CodeGeneratorMIPS64::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) { |
| 2433 | // All registers are assumed to be correctly set up per the calling convention. |
| 2434 | |
Vladimir Marko | 5815501 | 2015-08-19 12:49:41 +0000 | [diff] [blame] | 2435 | Location callee_method = temp; // For all kinds except kRecursive, callee will be in temp. |
| 2436 | switch (invoke->GetMethodLoadKind()) { |
| 2437 | case HInvokeStaticOrDirect::MethodLoadKind::kStringInit: |
| 2438 | // temp = thread->string_init_entrypoint |
| 2439 | __ LoadFromOffset(kLoadDoubleword, |
| 2440 | temp.AsRegister<GpuRegister>(), |
| 2441 | TR, |
| 2442 | invoke->GetStringInitOffset()); |
| 2443 | break; |
| 2444 | case HInvokeStaticOrDirect::MethodLoadKind::kRecursive: |
| 2445 | callee_method = invoke->GetLocations()->InAt(invoke->GetCurrentMethodInputIndex()); |
| 2446 | break; |
| 2447 | case HInvokeStaticOrDirect::MethodLoadKind::kDirectAddress: |
| 2448 | __ LoadConst64(temp.AsRegister<GpuRegister>(), invoke->GetMethodAddress()); |
| 2449 | break; |
| 2450 | case HInvokeStaticOrDirect::MethodLoadKind::kDirectAddressWithFixup: |
| 2451 | // TODO: Implement this type. (Needs literal support.) At the moment, the |
| 2452 | // CompilerDriver will not direct the backend to use this type for MIPS. |
| 2453 | LOG(FATAL) << "Unsupported!"; |
| 2454 | UNREACHABLE(); |
| 2455 | case HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative: |
| 2456 | // TODO: Implement this type. For the moment, we fall back to kDexCacheViaMethod. |
| 2457 | FALLTHROUGH_INTENDED; |
| 2458 | case HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod: { |
| 2459 | Location current_method = invoke->GetLocations()->InAt(invoke->GetCurrentMethodInputIndex()); |
| 2460 | GpuRegister reg = temp.AsRegister<GpuRegister>(); |
| 2461 | GpuRegister method_reg; |
| 2462 | if (current_method.IsRegister()) { |
| 2463 | method_reg = current_method.AsRegister<GpuRegister>(); |
| 2464 | } else { |
| 2465 | // TODO: use the appropriate DCHECK() here if possible. |
| 2466 | // DCHECK(invoke->GetLocations()->Intrinsified()); |
| 2467 | DCHECK(!current_method.IsValid()); |
| 2468 | method_reg = reg; |
| 2469 | __ Ld(reg, SP, kCurrentMethodStackOffset); |
| 2470 | } |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2471 | |
Vladimir Marko | 5815501 | 2015-08-19 12:49:41 +0000 | [diff] [blame] | 2472 | // temp = temp->dex_cache_resolved_methods_; |
Vladimir Marko | 05792b9 | 2015-08-03 11:56:49 +0100 | [diff] [blame] | 2473 | __ LoadFromOffset(kLoadDoubleword, |
Vladimir Marko | 5815501 | 2015-08-19 12:49:41 +0000 | [diff] [blame] | 2474 | reg, |
| 2475 | method_reg, |
Vladimir Marko | 05792b9 | 2015-08-03 11:56:49 +0100 | [diff] [blame] | 2476 | ArtMethod::DexCacheResolvedMethodsOffset(kMips64PointerSize).Int32Value()); |
Vladimir Marko | 5815501 | 2015-08-19 12:49:41 +0000 | [diff] [blame] | 2477 | // temp = temp[index_in_cache] |
| 2478 | uint32_t index_in_cache = invoke->GetTargetMethod().dex_method_index; |
| 2479 | __ LoadFromOffset(kLoadDoubleword, |
| 2480 | reg, |
| 2481 | reg, |
| 2482 | CodeGenerator::GetCachePointerOffset(index_in_cache)); |
| 2483 | break; |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2484 | } |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2485 | } |
| 2486 | |
Vladimir Marko | 5815501 | 2015-08-19 12:49:41 +0000 | [diff] [blame] | 2487 | switch (invoke->GetCodePtrLocation()) { |
| 2488 | case HInvokeStaticOrDirect::CodePtrLocation::kCallSelf: |
| 2489 | __ Jalr(&frame_entry_label_, T9); |
| 2490 | break; |
| 2491 | case HInvokeStaticOrDirect::CodePtrLocation::kCallDirect: |
| 2492 | // LR = invoke->GetDirectCodePtr(); |
| 2493 | __ LoadConst64(T9, invoke->GetDirectCodePtr()); |
| 2494 | // LR() |
| 2495 | __ Jalr(T9); |
| 2496 | break; |
| 2497 | case HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative: |
| 2498 | // TODO: Implement kCallPCRelative. For the moment, we fall back to kMethodCode. |
| 2499 | FALLTHROUGH_INTENDED; |
| 2500 | case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup: |
| 2501 | // TODO: Implement kDirectCodeFixup. For the moment, we fall back to kMethodCode. |
| 2502 | FALLTHROUGH_INTENDED; |
| 2503 | case HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod: |
| 2504 | // T9 = callee_method->entry_point_from_quick_compiled_code_; |
| 2505 | __ LoadFromOffset(kLoadDoubleword, |
| 2506 | T9, |
| 2507 | callee_method.AsRegister<GpuRegister>(), |
| 2508 | ArtMethod::EntryPointFromQuickCompiledCodeOffset( |
| 2509 | kMips64WordSize).Int32Value()); |
| 2510 | // T9() |
| 2511 | __ Jalr(T9); |
| 2512 | break; |
| 2513 | } |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2514 | DCHECK(!IsLeafMethod()); |
| 2515 | } |
| 2516 | |
| 2517 | void InstructionCodeGeneratorMIPS64::VisitInvokeStaticOrDirect(HInvokeStaticOrDirect* invoke) { |
| 2518 | // When we do not run baseline, explicit clinit checks triggered by static |
| 2519 | // invokes must have been pruned by art::PrepareForRegisterAllocation. |
| 2520 | DCHECK(codegen_->IsBaseline() || !invoke->IsStaticWithExplicitClinitCheck()); |
| 2521 | |
| 2522 | if (TryGenerateIntrinsicCode(invoke, codegen_)) { |
| 2523 | return; |
| 2524 | } |
| 2525 | |
| 2526 | LocationSummary* locations = invoke->GetLocations(); |
| 2527 | codegen_->GenerateStaticOrDirectCall(invoke, |
| 2528 | locations->HasTemps() |
| 2529 | ? locations->GetTemp(0) |
| 2530 | : Location::NoLocation()); |
| 2531 | codegen_->RecordPcInfo(invoke, invoke->GetDexPc()); |
| 2532 | } |
| 2533 | |
| 2534 | void InstructionCodeGeneratorMIPS64::VisitInvokeVirtual(HInvokeVirtual* invoke) { |
| 2535 | // TODO: Try to generate intrinsics code. |
| 2536 | LocationSummary* locations = invoke->GetLocations(); |
| 2537 | Location receiver = locations->InAt(0); |
| 2538 | GpuRegister temp = invoke->GetLocations()->GetTemp(0).AsRegister<GpuRegister>(); |
| 2539 | size_t method_offset = mirror::Class::EmbeddedVTableEntryOffset( |
| 2540 | invoke->GetVTableIndex(), kMips64PointerSize).SizeValue(); |
| 2541 | uint32_t class_offset = mirror::Object::ClassOffset().Int32Value(); |
| 2542 | Offset entry_point = ArtMethod::EntryPointFromQuickCompiledCodeOffset(kMips64WordSize); |
| 2543 | |
| 2544 | // temp = object->GetClass(); |
| 2545 | DCHECK(receiver.IsRegister()); |
| 2546 | __ LoadFromOffset(kLoadUnsignedWord, temp, receiver.AsRegister<GpuRegister>(), class_offset); |
| 2547 | codegen_->MaybeRecordImplicitNullCheck(invoke); |
| 2548 | // temp = temp->GetMethodAt(method_offset); |
| 2549 | __ LoadFromOffset(kLoadDoubleword, temp, temp, method_offset); |
| 2550 | // T9 = temp->GetEntryPoint(); |
| 2551 | __ LoadFromOffset(kLoadDoubleword, T9, temp, entry_point.Int32Value()); |
| 2552 | // T9(); |
| 2553 | __ Jalr(T9); |
| 2554 | DCHECK(!codegen_->IsLeafMethod()); |
| 2555 | codegen_->RecordPcInfo(invoke, invoke->GetDexPc()); |
| 2556 | } |
| 2557 | |
| 2558 | void LocationsBuilderMIPS64::VisitLoadClass(HLoadClass* cls) { |
| 2559 | LocationSummary::CallKind call_kind = cls->CanCallRuntime() ? LocationSummary::kCallOnSlowPath |
| 2560 | : LocationSummary::kNoCall; |
| 2561 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(cls, call_kind); |
| 2562 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2563 | locations->SetOut(Location::RequiresRegister()); |
| 2564 | } |
| 2565 | |
| 2566 | void InstructionCodeGeneratorMIPS64::VisitLoadClass(HLoadClass* cls) { |
| 2567 | LocationSummary* locations = cls->GetLocations(); |
| 2568 | GpuRegister out = locations->Out().AsRegister<GpuRegister>(); |
| 2569 | GpuRegister current_method = locations->InAt(0).AsRegister<GpuRegister>(); |
| 2570 | if (cls->IsReferrersClass()) { |
| 2571 | DCHECK(!cls->CanCallRuntime()); |
| 2572 | DCHECK(!cls->MustGenerateClinitCheck()); |
| 2573 | __ LoadFromOffset(kLoadUnsignedWord, out, current_method, |
| 2574 | ArtMethod::DeclaringClassOffset().Int32Value()); |
| 2575 | } else { |
| 2576 | DCHECK(cls->CanCallRuntime()); |
Vladimir Marko | 05792b9 | 2015-08-03 11:56:49 +0100 | [diff] [blame] | 2577 | __ LoadFromOffset(kLoadDoubleword, out, current_method, |
| 2578 | ArtMethod::DexCacheResolvedTypesOffset(kMips64PointerSize).Int32Value()); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2579 | __ LoadFromOffset(kLoadUnsignedWord, out, out, CodeGenerator::GetCacheOffset(cls->GetTypeIndex())); |
Vladimir Marko | 05792b9 | 2015-08-03 11:56:49 +0100 | [diff] [blame] | 2580 | // TODO: We will need a read barrier here. |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2581 | SlowPathCodeMIPS64* slow_path = new (GetGraph()->GetArena()) LoadClassSlowPathMIPS64( |
| 2582 | cls, |
| 2583 | cls, |
| 2584 | cls->GetDexPc(), |
| 2585 | cls->MustGenerateClinitCheck()); |
| 2586 | codegen_->AddSlowPath(slow_path); |
| 2587 | __ Beqzc(out, slow_path->GetEntryLabel()); |
| 2588 | if (cls->MustGenerateClinitCheck()) { |
| 2589 | GenerateClassInitializationCheck(slow_path, out); |
| 2590 | } else { |
| 2591 | __ Bind(slow_path->GetExitLabel()); |
| 2592 | } |
| 2593 | } |
| 2594 | } |
| 2595 | |
David Brazdil | cb1c055 | 2015-08-04 16:22:25 +0100 | [diff] [blame] | 2596 | static int32_t GetExceptionTlsOffset() { |
| 2597 | return Thread::ExceptionOffset<kMips64WordSize>().Int32Value(); |
| 2598 | } |
| 2599 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2600 | void LocationsBuilderMIPS64::VisitLoadException(HLoadException* load) { |
| 2601 | LocationSummary* locations = |
| 2602 | new (GetGraph()->GetArena()) LocationSummary(load, LocationSummary::kNoCall); |
| 2603 | locations->SetOut(Location::RequiresRegister()); |
| 2604 | } |
| 2605 | |
| 2606 | void InstructionCodeGeneratorMIPS64::VisitLoadException(HLoadException* load) { |
| 2607 | GpuRegister out = load->GetLocations()->Out().AsRegister<GpuRegister>(); |
David Brazdil | cb1c055 | 2015-08-04 16:22:25 +0100 | [diff] [blame] | 2608 | __ LoadFromOffset(kLoadUnsignedWord, out, TR, GetExceptionTlsOffset()); |
| 2609 | } |
| 2610 | |
| 2611 | void LocationsBuilderMIPS64::VisitClearException(HClearException* clear) { |
| 2612 | new (GetGraph()->GetArena()) LocationSummary(clear, LocationSummary::kNoCall); |
| 2613 | } |
| 2614 | |
| 2615 | void InstructionCodeGeneratorMIPS64::VisitClearException(HClearException* clear ATTRIBUTE_UNUSED) { |
| 2616 | __ StoreToOffset(kStoreWord, ZERO, TR, GetExceptionTlsOffset()); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2617 | } |
| 2618 | |
| 2619 | void LocationsBuilderMIPS64::VisitLoadLocal(HLoadLocal* load) { |
| 2620 | load->SetLocations(nullptr); |
| 2621 | } |
| 2622 | |
| 2623 | void InstructionCodeGeneratorMIPS64::VisitLoadLocal(HLoadLocal* load ATTRIBUTE_UNUSED) { |
| 2624 | // Nothing to do, this is driven by the code generator. |
| 2625 | } |
| 2626 | |
| 2627 | void LocationsBuilderMIPS64::VisitLoadString(HLoadString* load) { |
| 2628 | LocationSummary* locations = |
| 2629 | new (GetGraph()->GetArena()) LocationSummary(load, LocationSummary::kCallOnSlowPath); |
| 2630 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2631 | locations->SetOut(Location::RequiresRegister()); |
| 2632 | } |
| 2633 | |
| 2634 | void InstructionCodeGeneratorMIPS64::VisitLoadString(HLoadString* load) { |
| 2635 | SlowPathCodeMIPS64* slow_path = new (GetGraph()->GetArena()) LoadStringSlowPathMIPS64(load); |
| 2636 | codegen_->AddSlowPath(slow_path); |
| 2637 | |
| 2638 | LocationSummary* locations = load->GetLocations(); |
| 2639 | GpuRegister out = locations->Out().AsRegister<GpuRegister>(); |
| 2640 | GpuRegister current_method = locations->InAt(0).AsRegister<GpuRegister>(); |
| 2641 | __ LoadFromOffset(kLoadUnsignedWord, out, current_method, |
| 2642 | ArtMethod::DeclaringClassOffset().Int32Value()); |
Vladimir Marko | 05792b9 | 2015-08-03 11:56:49 +0100 | [diff] [blame] | 2643 | __ LoadFromOffset(kLoadDoubleword, out, out, mirror::Class::DexCacheStringsOffset().Int32Value()); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2644 | __ LoadFromOffset(kLoadUnsignedWord, out, out, CodeGenerator::GetCacheOffset(load->GetStringIndex())); |
Vladimir Marko | 05792b9 | 2015-08-03 11:56:49 +0100 | [diff] [blame] | 2645 | // TODO: We will need a read barrier here. |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2646 | __ Beqzc(out, slow_path->GetEntryLabel()); |
| 2647 | __ Bind(slow_path->GetExitLabel()); |
| 2648 | } |
| 2649 | |
| 2650 | void LocationsBuilderMIPS64::VisitLocal(HLocal* local) { |
| 2651 | local->SetLocations(nullptr); |
| 2652 | } |
| 2653 | |
| 2654 | void InstructionCodeGeneratorMIPS64::VisitLocal(HLocal* local) { |
| 2655 | DCHECK_EQ(local->GetBlock(), GetGraph()->GetEntryBlock()); |
| 2656 | } |
| 2657 | |
| 2658 | void LocationsBuilderMIPS64::VisitLongConstant(HLongConstant* constant) { |
| 2659 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(constant); |
| 2660 | locations->SetOut(Location::ConstantLocation(constant)); |
| 2661 | } |
| 2662 | |
| 2663 | void InstructionCodeGeneratorMIPS64::VisitLongConstant(HLongConstant* constant ATTRIBUTE_UNUSED) { |
| 2664 | // Will be generated at use site. |
| 2665 | } |
| 2666 | |
| 2667 | void LocationsBuilderMIPS64::VisitMonitorOperation(HMonitorOperation* instruction) { |
| 2668 | LocationSummary* locations = |
| 2669 | new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCall); |
| 2670 | InvokeRuntimeCallingConvention calling_convention; |
| 2671 | locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0))); |
| 2672 | } |
| 2673 | |
| 2674 | void InstructionCodeGeneratorMIPS64::VisitMonitorOperation(HMonitorOperation* instruction) { |
| 2675 | codegen_->InvokeRuntime(instruction->IsEnter() |
| 2676 | ? QUICK_ENTRY_POINT(pLockObject) |
| 2677 | : QUICK_ENTRY_POINT(pUnlockObject), |
| 2678 | instruction, |
| 2679 | instruction->GetDexPc(), |
| 2680 | nullptr); |
| 2681 | CheckEntrypointTypes<kQuickLockObject, void, mirror::Object*>(); |
| 2682 | } |
| 2683 | |
| 2684 | void LocationsBuilderMIPS64::VisitMul(HMul* mul) { |
| 2685 | LocationSummary* locations = |
| 2686 | new (GetGraph()->GetArena()) LocationSummary(mul, LocationSummary::kNoCall); |
| 2687 | switch (mul->GetResultType()) { |
| 2688 | case Primitive::kPrimInt: |
| 2689 | case Primitive::kPrimLong: |
| 2690 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2691 | locations->SetInAt(1, Location::RequiresRegister()); |
| 2692 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 2693 | break; |
| 2694 | |
| 2695 | case Primitive::kPrimFloat: |
| 2696 | case Primitive::kPrimDouble: |
| 2697 | locations->SetInAt(0, Location::RequiresFpuRegister()); |
| 2698 | locations->SetInAt(1, Location::RequiresFpuRegister()); |
| 2699 | locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); |
| 2700 | break; |
| 2701 | |
| 2702 | default: |
| 2703 | LOG(FATAL) << "Unexpected mul type " << mul->GetResultType(); |
| 2704 | } |
| 2705 | } |
| 2706 | |
| 2707 | void InstructionCodeGeneratorMIPS64::VisitMul(HMul* instruction) { |
| 2708 | Primitive::Type type = instruction->GetType(); |
| 2709 | LocationSummary* locations = instruction->GetLocations(); |
| 2710 | |
| 2711 | switch (type) { |
| 2712 | case Primitive::kPrimInt: |
| 2713 | case Primitive::kPrimLong: { |
| 2714 | GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); |
| 2715 | GpuRegister lhs = locations->InAt(0).AsRegister<GpuRegister>(); |
| 2716 | GpuRegister rhs = locations->InAt(1).AsRegister<GpuRegister>(); |
| 2717 | if (type == Primitive::kPrimInt) |
| 2718 | __ MulR6(dst, lhs, rhs); |
| 2719 | else |
| 2720 | __ Dmul(dst, lhs, rhs); |
| 2721 | break; |
| 2722 | } |
| 2723 | case Primitive::kPrimFloat: |
| 2724 | case Primitive::kPrimDouble: { |
| 2725 | FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); |
| 2726 | FpuRegister lhs = locations->InAt(0).AsFpuRegister<FpuRegister>(); |
| 2727 | FpuRegister rhs = locations->InAt(1).AsFpuRegister<FpuRegister>(); |
| 2728 | if (type == Primitive::kPrimFloat) |
| 2729 | __ MulS(dst, lhs, rhs); |
| 2730 | else |
| 2731 | __ MulD(dst, lhs, rhs); |
| 2732 | break; |
| 2733 | } |
| 2734 | default: |
| 2735 | LOG(FATAL) << "Unexpected mul type " << type; |
| 2736 | } |
| 2737 | } |
| 2738 | |
| 2739 | void LocationsBuilderMIPS64::VisitNeg(HNeg* neg) { |
| 2740 | LocationSummary* locations = |
| 2741 | new (GetGraph()->GetArena()) LocationSummary(neg, LocationSummary::kNoCall); |
| 2742 | switch (neg->GetResultType()) { |
| 2743 | case Primitive::kPrimInt: |
| 2744 | case Primitive::kPrimLong: |
| 2745 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2746 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 2747 | break; |
| 2748 | |
| 2749 | case Primitive::kPrimFloat: |
| 2750 | case Primitive::kPrimDouble: |
| 2751 | locations->SetInAt(0, Location::RequiresFpuRegister()); |
| 2752 | locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); |
| 2753 | break; |
| 2754 | |
| 2755 | default: |
| 2756 | LOG(FATAL) << "Unexpected neg type " << neg->GetResultType(); |
| 2757 | } |
| 2758 | } |
| 2759 | |
| 2760 | void InstructionCodeGeneratorMIPS64::VisitNeg(HNeg* instruction) { |
| 2761 | Primitive::Type type = instruction->GetType(); |
| 2762 | LocationSummary* locations = instruction->GetLocations(); |
| 2763 | |
| 2764 | switch (type) { |
| 2765 | case Primitive::kPrimInt: |
| 2766 | case Primitive::kPrimLong: { |
| 2767 | GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); |
| 2768 | GpuRegister src = locations->InAt(0).AsRegister<GpuRegister>(); |
| 2769 | if (type == Primitive::kPrimInt) |
| 2770 | __ Subu(dst, ZERO, src); |
| 2771 | else |
| 2772 | __ Dsubu(dst, ZERO, src); |
| 2773 | break; |
| 2774 | } |
| 2775 | case Primitive::kPrimFloat: |
| 2776 | case Primitive::kPrimDouble: { |
| 2777 | FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); |
| 2778 | FpuRegister src = locations->InAt(0).AsFpuRegister<FpuRegister>(); |
| 2779 | if (type == Primitive::kPrimFloat) |
| 2780 | __ NegS(dst, src); |
| 2781 | else |
| 2782 | __ NegD(dst, src); |
| 2783 | break; |
| 2784 | } |
| 2785 | default: |
| 2786 | LOG(FATAL) << "Unexpected neg type " << type; |
| 2787 | } |
| 2788 | } |
| 2789 | |
| 2790 | void LocationsBuilderMIPS64::VisitNewArray(HNewArray* instruction) { |
| 2791 | LocationSummary* locations = |
| 2792 | new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCall); |
| 2793 | InvokeRuntimeCallingConvention calling_convention; |
| 2794 | locations->AddTemp(Location::RegisterLocation(calling_convention.GetRegisterAt(0))); |
| 2795 | locations->SetOut(calling_convention.GetReturnLocation(Primitive::kPrimNot)); |
| 2796 | locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(1))); |
| 2797 | locations->SetInAt(1, Location::RegisterLocation(calling_convention.GetRegisterAt(2))); |
| 2798 | } |
| 2799 | |
| 2800 | void InstructionCodeGeneratorMIPS64::VisitNewArray(HNewArray* instruction) { |
| 2801 | LocationSummary* locations = instruction->GetLocations(); |
| 2802 | // Move an uint16_t value to a register. |
| 2803 | __ LoadConst32(locations->GetTemp(0).AsRegister<GpuRegister>(), instruction->GetTypeIndex()); |
Calin Juravle | 175dc73 | 2015-08-25 15:42:32 +0100 | [diff] [blame] | 2804 | codegen_->InvokeRuntime(instruction->GetEntrypoint(), |
| 2805 | instruction, |
| 2806 | instruction->GetDexPc(), |
| 2807 | nullptr); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2808 | CheckEntrypointTypes<kQuickAllocArrayWithAccessCheck, void*, uint32_t, int32_t, ArtMethod*>(); |
| 2809 | } |
| 2810 | |
| 2811 | void LocationsBuilderMIPS64::VisitNewInstance(HNewInstance* instruction) { |
| 2812 | LocationSummary* locations = |
| 2813 | new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCall); |
| 2814 | InvokeRuntimeCallingConvention calling_convention; |
| 2815 | locations->AddTemp(Location::RegisterLocation(calling_convention.GetRegisterAt(0))); |
| 2816 | locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(1))); |
| 2817 | locations->SetOut(calling_convention.GetReturnLocation(Primitive::kPrimNot)); |
| 2818 | } |
| 2819 | |
| 2820 | void InstructionCodeGeneratorMIPS64::VisitNewInstance(HNewInstance* instruction) { |
| 2821 | LocationSummary* locations = instruction->GetLocations(); |
| 2822 | // Move an uint16_t value to a register. |
| 2823 | __ LoadConst32(locations->GetTemp(0).AsRegister<GpuRegister>(), instruction->GetTypeIndex()); |
Calin Juravle | 175dc73 | 2015-08-25 15:42:32 +0100 | [diff] [blame] | 2824 | codegen_->InvokeRuntime(instruction->GetEntrypoint(), |
| 2825 | instruction, |
| 2826 | instruction->GetDexPc(), |
| 2827 | nullptr); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2828 | CheckEntrypointTypes<kQuickAllocObjectWithAccessCheck, void*, uint32_t, ArtMethod*>(); |
| 2829 | } |
| 2830 | |
| 2831 | void LocationsBuilderMIPS64::VisitNot(HNot* instruction) { |
| 2832 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); |
| 2833 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2834 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 2835 | } |
| 2836 | |
| 2837 | void InstructionCodeGeneratorMIPS64::VisitNot(HNot* instruction) { |
| 2838 | Primitive::Type type = instruction->GetType(); |
| 2839 | LocationSummary* locations = instruction->GetLocations(); |
| 2840 | |
| 2841 | switch (type) { |
| 2842 | case Primitive::kPrimInt: |
| 2843 | case Primitive::kPrimLong: { |
| 2844 | GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); |
| 2845 | GpuRegister src = locations->InAt(0).AsRegister<GpuRegister>(); |
| 2846 | __ Nor(dst, src, ZERO); |
| 2847 | break; |
| 2848 | } |
| 2849 | |
| 2850 | default: |
| 2851 | LOG(FATAL) << "Unexpected type for not operation " << instruction->GetResultType(); |
| 2852 | } |
| 2853 | } |
| 2854 | |
| 2855 | void LocationsBuilderMIPS64::VisitBooleanNot(HBooleanNot* instruction) { |
| 2856 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); |
| 2857 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2858 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 2859 | } |
| 2860 | |
| 2861 | void InstructionCodeGeneratorMIPS64::VisitBooleanNot(HBooleanNot* instruction) { |
| 2862 | LocationSummary* locations = instruction->GetLocations(); |
| 2863 | __ Xori(locations->Out().AsRegister<GpuRegister>(), |
| 2864 | locations->InAt(0).AsRegister<GpuRegister>(), |
| 2865 | 1); |
| 2866 | } |
| 2867 | |
| 2868 | void LocationsBuilderMIPS64::VisitNullCheck(HNullCheck* instruction) { |
David Brazdil | 77a48ae | 2015-09-15 12:34:04 +0000 | [diff] [blame] | 2869 | LocationSummary::CallKind call_kind = instruction->CanThrowIntoCatchBlock() |
| 2870 | ? LocationSummary::kCallOnSlowPath |
| 2871 | : LocationSummary::kNoCall; |
| 2872 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind); |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2873 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2874 | if (instruction->HasUses()) { |
| 2875 | locations->SetOut(Location::SameAsFirstInput()); |
| 2876 | } |
| 2877 | } |
| 2878 | |
| 2879 | void InstructionCodeGeneratorMIPS64::GenerateImplicitNullCheck(HNullCheck* instruction) { |
| 2880 | if (codegen_->CanMoveNullCheckToUser(instruction)) { |
| 2881 | return; |
| 2882 | } |
| 2883 | Location obj = instruction->GetLocations()->InAt(0); |
| 2884 | |
| 2885 | __ Lw(ZERO, obj.AsRegister<GpuRegister>(), 0); |
| 2886 | codegen_->RecordPcInfo(instruction, instruction->GetDexPc()); |
| 2887 | } |
| 2888 | |
| 2889 | void InstructionCodeGeneratorMIPS64::GenerateExplicitNullCheck(HNullCheck* instruction) { |
| 2890 | SlowPathCodeMIPS64* slow_path = new (GetGraph()->GetArena()) NullCheckSlowPathMIPS64(instruction); |
| 2891 | codegen_->AddSlowPath(slow_path); |
| 2892 | |
| 2893 | Location obj = instruction->GetLocations()->InAt(0); |
| 2894 | |
| 2895 | __ Beqzc(obj.AsRegister<GpuRegister>(), slow_path->GetEntryLabel()); |
| 2896 | } |
| 2897 | |
| 2898 | void InstructionCodeGeneratorMIPS64::VisitNullCheck(HNullCheck* instruction) { |
David Brazdil | 77a48ae | 2015-09-15 12:34:04 +0000 | [diff] [blame] | 2899 | if (codegen_->IsImplicitNullCheckAllowed(instruction)) { |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 2900 | GenerateImplicitNullCheck(instruction); |
| 2901 | } else { |
| 2902 | GenerateExplicitNullCheck(instruction); |
| 2903 | } |
| 2904 | } |
| 2905 | |
| 2906 | void LocationsBuilderMIPS64::VisitOr(HOr* instruction) { |
| 2907 | HandleBinaryOp(instruction); |
| 2908 | } |
| 2909 | |
| 2910 | void InstructionCodeGeneratorMIPS64::VisitOr(HOr* instruction) { |
| 2911 | HandleBinaryOp(instruction); |
| 2912 | } |
| 2913 | |
| 2914 | void LocationsBuilderMIPS64::VisitParallelMove(HParallelMove* instruction ATTRIBUTE_UNUSED) { |
| 2915 | LOG(FATAL) << "Unreachable"; |
| 2916 | } |
| 2917 | |
| 2918 | void InstructionCodeGeneratorMIPS64::VisitParallelMove(HParallelMove* instruction) { |
| 2919 | codegen_->GetMoveResolver()->EmitNativeCode(instruction); |
| 2920 | } |
| 2921 | |
| 2922 | void LocationsBuilderMIPS64::VisitParameterValue(HParameterValue* instruction) { |
| 2923 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); |
| 2924 | Location location = parameter_visitor_.GetNextLocation(instruction->GetType()); |
| 2925 | if (location.IsStackSlot()) { |
| 2926 | location = Location::StackSlot(location.GetStackIndex() + codegen_->GetFrameSize()); |
| 2927 | } else if (location.IsDoubleStackSlot()) { |
| 2928 | location = Location::DoubleStackSlot(location.GetStackIndex() + codegen_->GetFrameSize()); |
| 2929 | } |
| 2930 | locations->SetOut(location); |
| 2931 | } |
| 2932 | |
| 2933 | void InstructionCodeGeneratorMIPS64::VisitParameterValue(HParameterValue* instruction |
| 2934 | ATTRIBUTE_UNUSED) { |
| 2935 | // Nothing to do, the parameter is already at its location. |
| 2936 | } |
| 2937 | |
| 2938 | void LocationsBuilderMIPS64::VisitCurrentMethod(HCurrentMethod* instruction) { |
| 2939 | LocationSummary* locations = |
| 2940 | new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall); |
| 2941 | locations->SetOut(Location::RegisterLocation(kMethodRegisterArgument)); |
| 2942 | } |
| 2943 | |
| 2944 | void InstructionCodeGeneratorMIPS64::VisitCurrentMethod(HCurrentMethod* instruction |
| 2945 | ATTRIBUTE_UNUSED) { |
| 2946 | // Nothing to do, the method is already at its location. |
| 2947 | } |
| 2948 | |
| 2949 | void LocationsBuilderMIPS64::VisitPhi(HPhi* instruction) { |
| 2950 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); |
| 2951 | for (size_t i = 0, e = instruction->InputCount(); i < e; ++i) { |
| 2952 | locations->SetInAt(i, Location::Any()); |
| 2953 | } |
| 2954 | locations->SetOut(Location::Any()); |
| 2955 | } |
| 2956 | |
| 2957 | void InstructionCodeGeneratorMIPS64::VisitPhi(HPhi* instruction ATTRIBUTE_UNUSED) { |
| 2958 | LOG(FATAL) << "Unreachable"; |
| 2959 | } |
| 2960 | |
| 2961 | void LocationsBuilderMIPS64::VisitRem(HRem* rem) { |
| 2962 | Primitive::Type type = rem->GetResultType(); |
| 2963 | LocationSummary::CallKind call_kind = |
| 2964 | Primitive::IsFloatingPointType(type) ? LocationSummary::kCall : LocationSummary::kNoCall; |
| 2965 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(rem, call_kind); |
| 2966 | |
| 2967 | switch (type) { |
| 2968 | case Primitive::kPrimInt: |
| 2969 | case Primitive::kPrimLong: |
| 2970 | locations->SetInAt(0, Location::RequiresRegister()); |
| 2971 | locations->SetInAt(1, Location::RequiresRegister()); |
| 2972 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 2973 | break; |
| 2974 | |
| 2975 | case Primitive::kPrimFloat: |
| 2976 | case Primitive::kPrimDouble: { |
| 2977 | InvokeRuntimeCallingConvention calling_convention; |
| 2978 | locations->SetInAt(0, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0))); |
| 2979 | locations->SetInAt(1, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(1))); |
| 2980 | locations->SetOut(calling_convention.GetReturnLocation(type)); |
| 2981 | break; |
| 2982 | } |
| 2983 | |
| 2984 | default: |
| 2985 | LOG(FATAL) << "Unexpected rem type " << type; |
| 2986 | } |
| 2987 | } |
| 2988 | |
| 2989 | void InstructionCodeGeneratorMIPS64::VisitRem(HRem* instruction) { |
| 2990 | Primitive::Type type = instruction->GetType(); |
| 2991 | LocationSummary* locations = instruction->GetLocations(); |
| 2992 | |
| 2993 | switch (type) { |
| 2994 | case Primitive::kPrimInt: |
| 2995 | case Primitive::kPrimLong: { |
| 2996 | GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); |
| 2997 | GpuRegister lhs = locations->InAt(0).AsRegister<GpuRegister>(); |
| 2998 | GpuRegister rhs = locations->InAt(1).AsRegister<GpuRegister>(); |
| 2999 | if (type == Primitive::kPrimInt) |
| 3000 | __ ModR6(dst, lhs, rhs); |
| 3001 | else |
| 3002 | __ Dmod(dst, lhs, rhs); |
| 3003 | break; |
| 3004 | } |
| 3005 | |
| 3006 | case Primitive::kPrimFloat: |
| 3007 | case Primitive::kPrimDouble: { |
| 3008 | int32_t entry_offset = (type == Primitive::kPrimFloat) ? QUICK_ENTRY_POINT(pFmodf) |
| 3009 | : QUICK_ENTRY_POINT(pFmod); |
| 3010 | codegen_->InvokeRuntime(entry_offset, instruction, instruction->GetDexPc(), nullptr); |
| 3011 | break; |
| 3012 | } |
| 3013 | default: |
| 3014 | LOG(FATAL) << "Unexpected rem type " << type; |
| 3015 | } |
| 3016 | } |
| 3017 | |
| 3018 | void LocationsBuilderMIPS64::VisitMemoryBarrier(HMemoryBarrier* memory_barrier) { |
| 3019 | memory_barrier->SetLocations(nullptr); |
| 3020 | } |
| 3021 | |
| 3022 | void InstructionCodeGeneratorMIPS64::VisitMemoryBarrier(HMemoryBarrier* memory_barrier) { |
| 3023 | GenerateMemoryBarrier(memory_barrier->GetBarrierKind()); |
| 3024 | } |
| 3025 | |
| 3026 | void LocationsBuilderMIPS64::VisitReturn(HReturn* ret) { |
| 3027 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(ret); |
| 3028 | Primitive::Type return_type = ret->InputAt(0)->GetType(); |
| 3029 | locations->SetInAt(0, Mips64ReturnLocation(return_type)); |
| 3030 | } |
| 3031 | |
| 3032 | void InstructionCodeGeneratorMIPS64::VisitReturn(HReturn* ret ATTRIBUTE_UNUSED) { |
| 3033 | codegen_->GenerateFrameExit(); |
| 3034 | } |
| 3035 | |
| 3036 | void LocationsBuilderMIPS64::VisitReturnVoid(HReturnVoid* ret) { |
| 3037 | ret->SetLocations(nullptr); |
| 3038 | } |
| 3039 | |
| 3040 | void InstructionCodeGeneratorMIPS64::VisitReturnVoid(HReturnVoid* ret ATTRIBUTE_UNUSED) { |
| 3041 | codegen_->GenerateFrameExit(); |
| 3042 | } |
| 3043 | |
| 3044 | void LocationsBuilderMIPS64::VisitShl(HShl* shl) { |
| 3045 | HandleShift(shl); |
| 3046 | } |
| 3047 | |
| 3048 | void InstructionCodeGeneratorMIPS64::VisitShl(HShl* shl) { |
| 3049 | HandleShift(shl); |
| 3050 | } |
| 3051 | |
| 3052 | void LocationsBuilderMIPS64::VisitShr(HShr* shr) { |
| 3053 | HandleShift(shr); |
| 3054 | } |
| 3055 | |
| 3056 | void InstructionCodeGeneratorMIPS64::VisitShr(HShr* shr) { |
| 3057 | HandleShift(shr); |
| 3058 | } |
| 3059 | |
| 3060 | void LocationsBuilderMIPS64::VisitStoreLocal(HStoreLocal* store) { |
| 3061 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(store); |
| 3062 | Primitive::Type field_type = store->InputAt(1)->GetType(); |
| 3063 | switch (field_type) { |
| 3064 | case Primitive::kPrimNot: |
| 3065 | case Primitive::kPrimBoolean: |
| 3066 | case Primitive::kPrimByte: |
| 3067 | case Primitive::kPrimChar: |
| 3068 | case Primitive::kPrimShort: |
| 3069 | case Primitive::kPrimInt: |
| 3070 | case Primitive::kPrimFloat: |
| 3071 | locations->SetInAt(1, Location::StackSlot(codegen_->GetStackSlot(store->GetLocal()))); |
| 3072 | break; |
| 3073 | |
| 3074 | case Primitive::kPrimLong: |
| 3075 | case Primitive::kPrimDouble: |
| 3076 | locations->SetInAt(1, Location::DoubleStackSlot(codegen_->GetStackSlot(store->GetLocal()))); |
| 3077 | break; |
| 3078 | |
| 3079 | default: |
| 3080 | LOG(FATAL) << "Unimplemented local type " << field_type; |
| 3081 | } |
| 3082 | } |
| 3083 | |
| 3084 | void InstructionCodeGeneratorMIPS64::VisitStoreLocal(HStoreLocal* store ATTRIBUTE_UNUSED) { |
| 3085 | } |
| 3086 | |
| 3087 | void LocationsBuilderMIPS64::VisitSub(HSub* instruction) { |
| 3088 | HandleBinaryOp(instruction); |
| 3089 | } |
| 3090 | |
| 3091 | void InstructionCodeGeneratorMIPS64::VisitSub(HSub* instruction) { |
| 3092 | HandleBinaryOp(instruction); |
| 3093 | } |
| 3094 | |
| 3095 | void LocationsBuilderMIPS64::VisitStaticFieldGet(HStaticFieldGet* instruction) { |
| 3096 | HandleFieldGet(instruction, instruction->GetFieldInfo()); |
| 3097 | } |
| 3098 | |
| 3099 | void InstructionCodeGeneratorMIPS64::VisitStaticFieldGet(HStaticFieldGet* instruction) { |
| 3100 | HandleFieldGet(instruction, instruction->GetFieldInfo()); |
| 3101 | } |
| 3102 | |
| 3103 | void LocationsBuilderMIPS64::VisitStaticFieldSet(HStaticFieldSet* instruction) { |
| 3104 | HandleFieldSet(instruction, instruction->GetFieldInfo()); |
| 3105 | } |
| 3106 | |
| 3107 | void InstructionCodeGeneratorMIPS64::VisitStaticFieldSet(HStaticFieldSet* instruction) { |
| 3108 | HandleFieldSet(instruction, instruction->GetFieldInfo()); |
| 3109 | } |
| 3110 | |
| 3111 | void LocationsBuilderMIPS64::VisitSuspendCheck(HSuspendCheck* instruction) { |
| 3112 | new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCallOnSlowPath); |
| 3113 | } |
| 3114 | |
| 3115 | void InstructionCodeGeneratorMIPS64::VisitSuspendCheck(HSuspendCheck* instruction) { |
| 3116 | HBasicBlock* block = instruction->GetBlock(); |
| 3117 | if (block->GetLoopInformation() != nullptr) { |
| 3118 | DCHECK(block->GetLoopInformation()->GetSuspendCheck() == instruction); |
| 3119 | // The back edge will generate the suspend check. |
| 3120 | return; |
| 3121 | } |
| 3122 | if (block->IsEntryBlock() && instruction->GetNext()->IsGoto()) { |
| 3123 | // The goto will generate the suspend check. |
| 3124 | return; |
| 3125 | } |
| 3126 | GenerateSuspendCheck(instruction, nullptr); |
| 3127 | } |
| 3128 | |
| 3129 | void LocationsBuilderMIPS64::VisitTemporary(HTemporary* temp) { |
| 3130 | temp->SetLocations(nullptr); |
| 3131 | } |
| 3132 | |
| 3133 | void InstructionCodeGeneratorMIPS64::VisitTemporary(HTemporary* temp ATTRIBUTE_UNUSED) { |
| 3134 | // Nothing to do, this is driven by the code generator. |
| 3135 | } |
| 3136 | |
| 3137 | void LocationsBuilderMIPS64::VisitThrow(HThrow* instruction) { |
| 3138 | LocationSummary* locations = |
| 3139 | new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCall); |
| 3140 | InvokeRuntimeCallingConvention calling_convention; |
| 3141 | locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0))); |
| 3142 | } |
| 3143 | |
| 3144 | void InstructionCodeGeneratorMIPS64::VisitThrow(HThrow* instruction) { |
| 3145 | codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pDeliverException), |
| 3146 | instruction, |
| 3147 | instruction->GetDexPc(), |
| 3148 | nullptr); |
| 3149 | CheckEntrypointTypes<kQuickDeliverException, void, mirror::Object*>(); |
| 3150 | } |
| 3151 | |
| 3152 | void LocationsBuilderMIPS64::VisitTypeConversion(HTypeConversion* conversion) { |
| 3153 | Primitive::Type input_type = conversion->GetInputType(); |
| 3154 | Primitive::Type result_type = conversion->GetResultType(); |
| 3155 | DCHECK_NE(input_type, result_type); |
| 3156 | |
| 3157 | if ((input_type == Primitive::kPrimNot) || (input_type == Primitive::kPrimVoid) || |
| 3158 | (result_type == Primitive::kPrimNot) || (result_type == Primitive::kPrimVoid)) { |
| 3159 | LOG(FATAL) << "Unexpected type conversion from " << input_type << " to " << result_type; |
| 3160 | } |
| 3161 | |
| 3162 | LocationSummary::CallKind call_kind = LocationSummary::kNoCall; |
| 3163 | if ((Primitive::IsFloatingPointType(result_type) && input_type == Primitive::kPrimLong) || |
| 3164 | (Primitive::IsIntegralType(result_type) && Primitive::IsFloatingPointType(input_type))) { |
| 3165 | call_kind = LocationSummary::kCall; |
| 3166 | } |
| 3167 | |
| 3168 | LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(conversion, call_kind); |
| 3169 | |
| 3170 | if (call_kind == LocationSummary::kNoCall) { |
| 3171 | if (Primitive::IsFloatingPointType(input_type)) { |
| 3172 | locations->SetInAt(0, Location::RequiresFpuRegister()); |
| 3173 | } else { |
| 3174 | locations->SetInAt(0, Location::RequiresRegister()); |
| 3175 | } |
| 3176 | |
| 3177 | if (Primitive::IsFloatingPointType(result_type)) { |
| 3178 | locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); |
| 3179 | } else { |
| 3180 | locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); |
| 3181 | } |
| 3182 | } else { |
| 3183 | InvokeRuntimeCallingConvention calling_convention; |
| 3184 | |
| 3185 | if (Primitive::IsFloatingPointType(input_type)) { |
| 3186 | locations->SetInAt(0, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0))); |
| 3187 | } else { |
| 3188 | locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0))); |
| 3189 | } |
| 3190 | |
| 3191 | locations->SetOut(calling_convention.GetReturnLocation(result_type)); |
| 3192 | } |
| 3193 | } |
| 3194 | |
| 3195 | void InstructionCodeGeneratorMIPS64::VisitTypeConversion(HTypeConversion* conversion) { |
| 3196 | LocationSummary* locations = conversion->GetLocations(); |
| 3197 | Primitive::Type result_type = conversion->GetResultType(); |
| 3198 | Primitive::Type input_type = conversion->GetInputType(); |
| 3199 | |
| 3200 | DCHECK_NE(input_type, result_type); |
| 3201 | |
| 3202 | if (Primitive::IsIntegralType(result_type) && Primitive::IsIntegralType(input_type)) { |
| 3203 | GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); |
| 3204 | GpuRegister src = locations->InAt(0).AsRegister<GpuRegister>(); |
| 3205 | |
| 3206 | switch (result_type) { |
| 3207 | case Primitive::kPrimChar: |
| 3208 | __ Andi(dst, src, 0xFFFF); |
| 3209 | break; |
| 3210 | case Primitive::kPrimByte: |
| 3211 | // long is never converted into types narrower than int directly, |
| 3212 | // so SEB and SEH can be used without ever causing unpredictable results |
| 3213 | // on 64-bit inputs |
| 3214 | DCHECK(input_type != Primitive::kPrimLong); |
| 3215 | __ Seb(dst, src); |
| 3216 | break; |
| 3217 | case Primitive::kPrimShort: |
| 3218 | // long is never converted into types narrower than int directly, |
| 3219 | // so SEB and SEH can be used without ever causing unpredictable results |
| 3220 | // on 64-bit inputs |
| 3221 | DCHECK(input_type != Primitive::kPrimLong); |
| 3222 | __ Seh(dst, src); |
| 3223 | break; |
| 3224 | case Primitive::kPrimInt: |
| 3225 | case Primitive::kPrimLong: |
| 3226 | // Sign-extend 32-bit int into bits 32 through 63 for |
| 3227 | // int-to-long and long-to-int conversions |
| 3228 | __ Sll(dst, src, 0); |
| 3229 | break; |
| 3230 | |
| 3231 | default: |
| 3232 | LOG(FATAL) << "Unexpected type conversion from " << input_type |
| 3233 | << " to " << result_type; |
| 3234 | } |
| 3235 | } else if (Primitive::IsFloatingPointType(result_type) && Primitive::IsIntegralType(input_type)) { |
| 3236 | if (input_type != Primitive::kPrimLong) { |
| 3237 | FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); |
| 3238 | GpuRegister src = locations->InAt(0).AsRegister<GpuRegister>(); |
| 3239 | __ Mtc1(src, FTMP); |
| 3240 | if (result_type == Primitive::kPrimFloat) { |
| 3241 | __ Cvtsw(dst, FTMP); |
| 3242 | } else { |
| 3243 | __ Cvtdw(dst, FTMP); |
| 3244 | } |
| 3245 | } else { |
| 3246 | int32_t entry_offset = (result_type == Primitive::kPrimFloat) ? QUICK_ENTRY_POINT(pL2f) |
| 3247 | : QUICK_ENTRY_POINT(pL2d); |
| 3248 | codegen_->InvokeRuntime(entry_offset, |
| 3249 | conversion, |
| 3250 | conversion->GetDexPc(), |
| 3251 | nullptr); |
| 3252 | } |
| 3253 | } else if (Primitive::IsIntegralType(result_type) && Primitive::IsFloatingPointType(input_type)) { |
| 3254 | CHECK(result_type == Primitive::kPrimInt || result_type == Primitive::kPrimLong); |
| 3255 | int32_t entry_offset; |
| 3256 | if (result_type != Primitive::kPrimLong) { |
| 3257 | entry_offset = (input_type == Primitive::kPrimFloat) ? QUICK_ENTRY_POINT(pF2iz) |
| 3258 | : QUICK_ENTRY_POINT(pD2iz); |
| 3259 | } else { |
| 3260 | entry_offset = (input_type == Primitive::kPrimFloat) ? QUICK_ENTRY_POINT(pF2l) |
| 3261 | : QUICK_ENTRY_POINT(pD2l); |
| 3262 | } |
| 3263 | codegen_->InvokeRuntime(entry_offset, |
| 3264 | conversion, |
| 3265 | conversion->GetDexPc(), |
| 3266 | nullptr); |
| 3267 | } else if (Primitive::IsFloatingPointType(result_type) && |
| 3268 | Primitive::IsFloatingPointType(input_type)) { |
| 3269 | FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); |
| 3270 | FpuRegister src = locations->InAt(0).AsFpuRegister<FpuRegister>(); |
| 3271 | if (result_type == Primitive::kPrimFloat) { |
| 3272 | __ Cvtsd(dst, src); |
| 3273 | } else { |
| 3274 | __ Cvtds(dst, src); |
| 3275 | } |
| 3276 | } else { |
| 3277 | LOG(FATAL) << "Unexpected or unimplemented type conversion from " << input_type |
| 3278 | << " to " << result_type; |
| 3279 | } |
| 3280 | } |
| 3281 | |
| 3282 | void LocationsBuilderMIPS64::VisitUShr(HUShr* ushr) { |
| 3283 | HandleShift(ushr); |
| 3284 | } |
| 3285 | |
| 3286 | void InstructionCodeGeneratorMIPS64::VisitUShr(HUShr* ushr) { |
| 3287 | HandleShift(ushr); |
| 3288 | } |
| 3289 | |
| 3290 | void LocationsBuilderMIPS64::VisitXor(HXor* instruction) { |
| 3291 | HandleBinaryOp(instruction); |
| 3292 | } |
| 3293 | |
| 3294 | void InstructionCodeGeneratorMIPS64::VisitXor(HXor* instruction) { |
| 3295 | HandleBinaryOp(instruction); |
| 3296 | } |
| 3297 | |
| 3298 | void LocationsBuilderMIPS64::VisitBoundType(HBoundType* instruction ATTRIBUTE_UNUSED) { |
| 3299 | // Nothing to do, this should be removed during prepare for register allocator. |
| 3300 | LOG(FATAL) << "Unreachable"; |
| 3301 | } |
| 3302 | |
| 3303 | void InstructionCodeGeneratorMIPS64::VisitBoundType(HBoundType* instruction ATTRIBUTE_UNUSED) { |
| 3304 | // Nothing to do, this should be removed during prepare for register allocator. |
| 3305 | LOG(FATAL) << "Unreachable"; |
| 3306 | } |
| 3307 | |
| 3308 | void LocationsBuilderMIPS64::VisitEqual(HEqual* comp) { |
| 3309 | VisitCondition(comp); |
| 3310 | } |
| 3311 | |
| 3312 | void InstructionCodeGeneratorMIPS64::VisitEqual(HEqual* comp) { |
| 3313 | VisitCondition(comp); |
| 3314 | } |
| 3315 | |
| 3316 | void LocationsBuilderMIPS64::VisitNotEqual(HNotEqual* comp) { |
| 3317 | VisitCondition(comp); |
| 3318 | } |
| 3319 | |
| 3320 | void InstructionCodeGeneratorMIPS64::VisitNotEqual(HNotEqual* comp) { |
| 3321 | VisitCondition(comp); |
| 3322 | } |
| 3323 | |
| 3324 | void LocationsBuilderMIPS64::VisitLessThan(HLessThan* comp) { |
| 3325 | VisitCondition(comp); |
| 3326 | } |
| 3327 | |
| 3328 | void InstructionCodeGeneratorMIPS64::VisitLessThan(HLessThan* comp) { |
| 3329 | VisitCondition(comp); |
| 3330 | } |
| 3331 | |
| 3332 | void LocationsBuilderMIPS64::VisitLessThanOrEqual(HLessThanOrEqual* comp) { |
| 3333 | VisitCondition(comp); |
| 3334 | } |
| 3335 | |
| 3336 | void InstructionCodeGeneratorMIPS64::VisitLessThanOrEqual(HLessThanOrEqual* comp) { |
| 3337 | VisitCondition(comp); |
| 3338 | } |
| 3339 | |
| 3340 | void LocationsBuilderMIPS64::VisitGreaterThan(HGreaterThan* comp) { |
| 3341 | VisitCondition(comp); |
| 3342 | } |
| 3343 | |
| 3344 | void InstructionCodeGeneratorMIPS64::VisitGreaterThan(HGreaterThan* comp) { |
| 3345 | VisitCondition(comp); |
| 3346 | } |
| 3347 | |
| 3348 | void LocationsBuilderMIPS64::VisitGreaterThanOrEqual(HGreaterThanOrEqual* comp) { |
| 3349 | VisitCondition(comp); |
| 3350 | } |
| 3351 | |
| 3352 | void InstructionCodeGeneratorMIPS64::VisitGreaterThanOrEqual(HGreaterThanOrEqual* comp) { |
| 3353 | VisitCondition(comp); |
| 3354 | } |
| 3355 | |
Nicolas Geoffray | 2e7cd75 | 2015-07-10 11:38:52 +0100 | [diff] [blame] | 3356 | void LocationsBuilderMIPS64::VisitFakeString(HFakeString* instruction) { |
| 3357 | DCHECK(codegen_->IsBaseline()); |
| 3358 | LocationSummary* locations = |
| 3359 | new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall); |
| 3360 | locations->SetOut(Location::ConstantLocation(GetGraph()->GetNullConstant())); |
| 3361 | } |
| 3362 | |
| 3363 | void InstructionCodeGeneratorMIPS64::VisitFakeString(HFakeString* instruction ATTRIBUTE_UNUSED) { |
| 3364 | DCHECK(codegen_->IsBaseline()); |
| 3365 | // Will be generated at use site. |
| 3366 | } |
| 3367 | |
Alexey Frunze | 4dda337 | 2015-06-01 18:31:49 -0700 | [diff] [blame] | 3368 | } // namespace mips64 |
| 3369 | } // namespace art |