Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2016 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ART_COMPILER_OPTIMIZING_CODE_GENERATOR_ARM_VIXL_H_ |
| 18 | #define ART_COMPILER_OPTIMIZING_CODE_GENERATOR_ARM_VIXL_H_ |
| 19 | |
| 20 | #include "code_generator_arm.h" |
Artem Serov | cfbe913 | 2016-10-14 15:58:56 +0100 | [diff] [blame] | 21 | #include "common_arm.h" |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 22 | #include "utils/arm/assembler_arm_vixl.h" |
| 23 | |
| 24 | // TODO(VIXL): make vixl clean wrt -Wshadow. |
| 25 | #pragma GCC diagnostic push |
| 26 | #pragma GCC diagnostic ignored "-Wshadow" |
| 27 | #include "aarch32/constants-aarch32.h" |
| 28 | #include "aarch32/instructions-aarch32.h" |
| 29 | #include "aarch32/macro-assembler-aarch32.h" |
| 30 | #pragma GCC diagnostic pop |
| 31 | |
| 32 | // True if VIXL32 should be used for codegen on ARM. |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 33 | #ifdef ART_USE_VIXL_ARM_BACKEND |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 34 | static constexpr bool kArmUseVIXL32 = true; |
| 35 | #else |
| 36 | static constexpr bool kArmUseVIXL32 = false; |
| 37 | #endif |
| 38 | |
| 39 | namespace art { |
| 40 | namespace arm { |
| 41 | |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 42 | static const vixl::aarch32::Register kParameterCoreRegistersVIXL[] = { |
| 43 | vixl::aarch32::r1, |
| 44 | vixl::aarch32::r2, |
| 45 | vixl::aarch32::r3 |
| 46 | }; |
| 47 | static const size_t kParameterCoreRegistersLengthVIXL = arraysize(kParameterCoreRegisters); |
| 48 | static const vixl::aarch32::SRegister kParameterFpuRegistersVIXL[] = { |
| 49 | vixl::aarch32::s0, |
| 50 | vixl::aarch32::s1, |
| 51 | vixl::aarch32::s2, |
| 52 | vixl::aarch32::s3, |
| 53 | vixl::aarch32::s4, |
| 54 | vixl::aarch32::s5, |
| 55 | vixl::aarch32::s6, |
| 56 | vixl::aarch32::s7, |
| 57 | vixl::aarch32::s8, |
| 58 | vixl::aarch32::s9, |
| 59 | vixl::aarch32::s10, |
| 60 | vixl::aarch32::s11, |
| 61 | vixl::aarch32::s12, |
| 62 | vixl::aarch32::s13, |
| 63 | vixl::aarch32::s14, |
| 64 | vixl::aarch32::s15 |
| 65 | }; |
| 66 | static const size_t kParameterFpuRegistersLengthVIXL = arraysize(kParameterFpuRegisters); |
| 67 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 68 | static const vixl::aarch32::Register kMethodRegister = vixl::aarch32::r0; |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 69 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 70 | static const vixl::aarch32::Register kCoreAlwaysSpillRegister = vixl::aarch32::r5; |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 71 | |
| 72 | // Callee saves core registers r5, r6, r7, r8, r10, r11, and lr. |
| 73 | static const vixl::aarch32::RegisterList kCoreCalleeSaves = vixl::aarch32::RegisterList::Union( |
| 74 | vixl::aarch32::RegisterList(vixl::aarch32::r5, |
| 75 | vixl::aarch32::r6, |
| 76 | vixl::aarch32::r7, |
| 77 | vixl::aarch32::r8), |
| 78 | vixl::aarch32::RegisterList(vixl::aarch32::r10, |
| 79 | vixl::aarch32::r11, |
| 80 | vixl::aarch32::lr)); |
| 81 | |
| 82 | // Callee saves FP registers s16 to s31 inclusive. |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 83 | static const vixl::aarch32::SRegisterList kFpuCalleeSaves = |
| 84 | vixl::aarch32::SRegisterList(vixl::aarch32::s16, 16); |
| 85 | |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 86 | static const vixl::aarch32::Register kRuntimeParameterCoreRegistersVIXL[] = { |
| 87 | vixl::aarch32::r0, |
| 88 | vixl::aarch32::r1, |
| 89 | vixl::aarch32::r2, |
| 90 | vixl::aarch32::r3 |
| 91 | }; |
| 92 | static const size_t kRuntimeParameterCoreRegistersLengthVIXL = |
| 93 | arraysize(kRuntimeParameterCoreRegisters); |
| 94 | static const vixl::aarch32::SRegister kRuntimeParameterFpuRegistersVIXL[] = { |
| 95 | vixl::aarch32::s0, |
| 96 | vixl::aarch32::s1, |
| 97 | vixl::aarch32::s2, |
| 98 | vixl::aarch32::s3 |
| 99 | }; |
| 100 | static const size_t kRuntimeParameterFpuRegistersLengthVIXL = |
| 101 | arraysize(kRuntimeParameterFpuRegisters); |
| 102 | |
| 103 | class LoadClassSlowPathARMVIXL; |
| 104 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 105 | #define FOR_EACH_IMPLEMENTED_INSTRUCTION(M) \ |
| 106 | M(Above) \ |
| 107 | M(AboveOrEqual) \ |
| 108 | M(Add) \ |
Artem Serov | 02109dd | 2016-09-23 17:17:54 +0100 | [diff] [blame] | 109 | M(And) \ |
Scott Wakeling | c34dba7 | 2016-10-03 10:14:44 +0100 | [diff] [blame] | 110 | M(ArrayGet) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 111 | M(ArrayLength) \ |
Scott Wakeling | c34dba7 | 2016-10-03 10:14:44 +0100 | [diff] [blame] | 112 | M(ArraySet) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 113 | M(Below) \ |
| 114 | M(BelowOrEqual) \ |
Artem Serov | 2bbc953 | 2016-10-21 11:51:50 +0100 | [diff] [blame] | 115 | M(BitwiseNegatedRight) \ |
Scott Wakeling | c34dba7 | 2016-10-03 10:14:44 +0100 | [diff] [blame] | 116 | M(BooleanNot) \ |
| 117 | M(BoundsCheck) \ |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 118 | M(BoundType) \ |
Anton Kirilov | e28d9ae | 2016-10-25 18:17:23 +0100 | [diff] [blame] | 119 | M(CheckCast) \ |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 120 | M(ClassTableGet) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 121 | M(ClearException) \ |
| 122 | M(ClinitCheck) \ |
Alexandre Rames | 9c19bd6 | 2016-10-24 11:50:32 +0100 | [diff] [blame] | 123 | M(Compare) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 124 | M(CurrentMethod) \ |
Scott Wakeling | c34dba7 | 2016-10-03 10:14:44 +0100 | [diff] [blame] | 125 | M(Deoptimize) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 126 | M(Div) \ |
| 127 | M(DivZeroCheck) \ |
Alexandre Rames | b45fbaa5 | 2016-10-17 14:57:13 +0100 | [diff] [blame] | 128 | M(DoubleConstant) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 129 | M(Equal) \ |
| 130 | M(Exit) \ |
Alexandre Rames | b45fbaa5 | 2016-10-17 14:57:13 +0100 | [diff] [blame] | 131 | M(FloatConstant) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 132 | M(Goto) \ |
| 133 | M(GreaterThan) \ |
| 134 | M(GreaterThanOrEqual) \ |
| 135 | M(If) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 136 | M(InstanceFieldGet) \ |
| 137 | M(InstanceFieldSet) \ |
Artem Serov | cfbe913 | 2016-10-14 15:58:56 +0100 | [diff] [blame] | 138 | M(InstanceOf) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 139 | M(IntConstant) \ |
Artem Serov | 2bbc953 | 2016-10-21 11:51:50 +0100 | [diff] [blame] | 140 | M(IntermediateAddress) \ |
Artem Serov | cfbe913 | 2016-10-14 15:58:56 +0100 | [diff] [blame] | 141 | M(InvokeInterface) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 142 | M(InvokeStaticOrDirect) \ |
Artem Serov | cfbe913 | 2016-10-14 15:58:56 +0100 | [diff] [blame] | 143 | M(InvokeUnresolved) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 144 | M(InvokeVirtual) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 145 | M(LessThan) \ |
| 146 | M(LessThanOrEqual) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 147 | M(LoadClass) \ |
| 148 | M(LoadException) \ |
| 149 | M(LoadString) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 150 | M(LongConstant) \ |
| 151 | M(MemoryBarrier) \ |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 152 | M(MonitorOperation) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 153 | M(Mul) \ |
Artem Serov | 2bbc953 | 2016-10-21 11:51:50 +0100 | [diff] [blame] | 154 | M(MultiplyAccumulate) \ |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 155 | M(NativeDebugInfo) \ |
Artem Serov | 02109dd | 2016-09-23 17:17:54 +0100 | [diff] [blame] | 156 | M(Neg) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 157 | M(NewArray) \ |
| 158 | M(NewInstance) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 159 | M(Not) \ |
| 160 | M(NotEqual) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 161 | M(NullCheck) \ |
| 162 | M(NullConstant) \ |
Artem Serov | 02109dd | 2016-09-23 17:17:54 +0100 | [diff] [blame] | 163 | M(Or) \ |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 164 | M(PackedSwitch) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 165 | M(ParallelMove) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 166 | M(ParameterValue) \ |
| 167 | M(Phi) \ |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 168 | M(Rem) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 169 | M(Return) \ |
| 170 | M(ReturnVoid) \ |
Artem Serov | 02109dd | 2016-09-23 17:17:54 +0100 | [diff] [blame] | 171 | M(Ror) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 172 | M(Select) \ |
Artem Serov | 02109dd | 2016-09-23 17:17:54 +0100 | [diff] [blame] | 173 | M(Shl) \ |
| 174 | M(Shr) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 175 | M(StaticFieldGet) \ |
Scott Wakeling | c34dba7 | 2016-10-03 10:14:44 +0100 | [diff] [blame] | 176 | M(StaticFieldSet) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 177 | M(Sub) \ |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 178 | M(SuspendCheck) \ |
| 179 | M(Throw) \ |
| 180 | M(TryBoundary) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 181 | M(TypeConversion) \ |
Artem Serov | cfbe913 | 2016-10-14 15:58:56 +0100 | [diff] [blame] | 182 | M(UnresolvedInstanceFieldGet) \ |
| 183 | M(UnresolvedInstanceFieldSet) \ |
| 184 | M(UnresolvedStaticFieldGet) \ |
| 185 | M(UnresolvedStaticFieldSet) \ |
Artem Serov | 02109dd | 2016-09-23 17:17:54 +0100 | [diff] [blame] | 186 | M(UShr) \ |
| 187 | M(Xor) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 188 | |
| 189 | // TODO: Remove once the VIXL32 backend is implemented completely. |
| 190 | #define FOR_EACH_UNIMPLEMENTED_INSTRUCTION(M) \ |
Artem Serov | cfbe913 | 2016-10-14 15:58:56 +0100 | [diff] [blame] | 191 | M(ArmDexCacheArraysBase) \ |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 192 | |
| 193 | class CodeGeneratorARMVIXL; |
| 194 | |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 195 | class JumpTableARMVIXL : public DeletableArenaObject<kArenaAllocSwitchTable> { |
| 196 | public: |
Artem Serov | 09a940d | 2016-11-11 16:15:11 +0000 | [diff] [blame] | 197 | typedef vixl::aarch32::Literal<int32_t> IntLiteral; |
| 198 | |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 199 | explicit JumpTableARMVIXL(HPackedSwitch* switch_instr) |
Artem Serov | 09a940d | 2016-11-11 16:15:11 +0000 | [diff] [blame] | 200 | : switch_instr_(switch_instr), |
| 201 | table_start_(), |
| 202 | bb_addresses_(switch_instr->GetArena()->Adapter(kArenaAllocCodeGenerator)) { |
| 203 | uint32_t num_entries = switch_instr_->GetNumEntries(); |
| 204 | for (uint32_t i = 0; i < num_entries; i++) { |
| 205 | IntLiteral *lit = new IntLiteral(0); |
| 206 | bb_addresses_.emplace_back(lit); |
| 207 | } |
| 208 | } |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 209 | |
| 210 | vixl::aarch32::Label* GetTableStartLabel() { return &table_start_; } |
| 211 | |
| 212 | void EmitTable(CodeGeneratorARMVIXL* codegen); |
Artem Serov | 09a940d | 2016-11-11 16:15:11 +0000 | [diff] [blame] | 213 | void FixTable(CodeGeneratorARMVIXL* codegen); |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 214 | |
| 215 | private: |
| 216 | HPackedSwitch* const switch_instr_; |
| 217 | vixl::aarch32::Label table_start_; |
Artem Serov | 09a940d | 2016-11-11 16:15:11 +0000 | [diff] [blame] | 218 | ArenaVector<std::unique_ptr<IntLiteral>> bb_addresses_; |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 219 | |
| 220 | DISALLOW_COPY_AND_ASSIGN(JumpTableARMVIXL); |
| 221 | }; |
| 222 | |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 223 | class InvokeRuntimeCallingConventionARMVIXL |
| 224 | : public CallingConvention<vixl::aarch32::Register, vixl::aarch32::SRegister> { |
| 225 | public: |
| 226 | InvokeRuntimeCallingConventionARMVIXL() |
| 227 | : CallingConvention(kRuntimeParameterCoreRegistersVIXL, |
| 228 | kRuntimeParameterCoreRegistersLengthVIXL, |
| 229 | kRuntimeParameterFpuRegistersVIXL, |
| 230 | kRuntimeParameterFpuRegistersLengthVIXL, |
| 231 | kArmPointerSize) {} |
| 232 | |
| 233 | private: |
| 234 | DISALLOW_COPY_AND_ASSIGN(InvokeRuntimeCallingConventionARMVIXL); |
| 235 | }; |
| 236 | |
| 237 | class InvokeDexCallingConventionARMVIXL |
| 238 | : public CallingConvention<vixl::aarch32::Register, vixl::aarch32::SRegister> { |
| 239 | public: |
| 240 | InvokeDexCallingConventionARMVIXL() |
| 241 | : CallingConvention(kParameterCoreRegistersVIXL, |
| 242 | kParameterCoreRegistersLengthVIXL, |
| 243 | kParameterFpuRegistersVIXL, |
| 244 | kParameterFpuRegistersLengthVIXL, |
| 245 | kArmPointerSize) {} |
| 246 | |
| 247 | private: |
| 248 | DISALLOW_COPY_AND_ASSIGN(InvokeDexCallingConventionARMVIXL); |
| 249 | }; |
| 250 | |
Artem Serov | cfbe913 | 2016-10-14 15:58:56 +0100 | [diff] [blame] | 251 | class FieldAccessCallingConventionARMVIXL : public FieldAccessCallingConvention { |
| 252 | public: |
| 253 | FieldAccessCallingConventionARMVIXL() {} |
| 254 | |
| 255 | Location GetObjectLocation() const OVERRIDE { |
| 256 | return helpers::LocationFrom(vixl::aarch32::r1); |
| 257 | } |
| 258 | Location GetFieldIndexLocation() const OVERRIDE { |
| 259 | return helpers::LocationFrom(vixl::aarch32::r0); |
| 260 | } |
| 261 | Location GetReturnLocation(Primitive::Type type) const OVERRIDE { |
| 262 | return Primitive::Is64BitType(type) |
| 263 | ? helpers::LocationFrom(vixl::aarch32::r0, vixl::aarch32::r1) |
| 264 | : helpers::LocationFrom(vixl::aarch32::r0); |
| 265 | } |
| 266 | Location GetSetValueLocation(Primitive::Type type, bool is_instance) const OVERRIDE { |
| 267 | return Primitive::Is64BitType(type) |
| 268 | ? helpers::LocationFrom(vixl::aarch32::r2, vixl::aarch32::r3) |
| 269 | : (is_instance |
| 270 | ? helpers::LocationFrom(vixl::aarch32::r2) |
| 271 | : helpers::LocationFrom(vixl::aarch32::r1)); |
| 272 | } |
| 273 | Location GetFpuLocation(Primitive::Type type) const OVERRIDE { |
| 274 | return Primitive::Is64BitType(type) |
| 275 | ? helpers::LocationFrom(vixl::aarch32::s0, vixl::aarch32::s1) |
| 276 | : helpers::LocationFrom(vixl::aarch32::s0); |
| 277 | } |
| 278 | |
| 279 | private: |
| 280 | DISALLOW_COPY_AND_ASSIGN(FieldAccessCallingConventionARMVIXL); |
| 281 | }; |
| 282 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 283 | class SlowPathCodeARMVIXL : public SlowPathCode { |
| 284 | public: |
| 285 | explicit SlowPathCodeARMVIXL(HInstruction* instruction) |
| 286 | : SlowPathCode(instruction), entry_label_(), exit_label_() {} |
| 287 | |
| 288 | vixl::aarch32::Label* GetEntryLabel() { return &entry_label_; } |
| 289 | vixl::aarch32::Label* GetExitLabel() { return &exit_label_; } |
| 290 | |
| 291 | void SaveLiveRegisters(CodeGenerator* codegen, LocationSummary* locations) OVERRIDE; |
| 292 | void RestoreLiveRegisters(CodeGenerator* codegen, LocationSummary* locations) OVERRIDE; |
| 293 | |
| 294 | private: |
| 295 | vixl::aarch32::Label entry_label_; |
| 296 | vixl::aarch32::Label exit_label_; |
| 297 | |
| 298 | DISALLOW_COPY_AND_ASSIGN(SlowPathCodeARMVIXL); |
| 299 | }; |
| 300 | |
| 301 | class ParallelMoveResolverARMVIXL : public ParallelMoveResolverWithSwap { |
| 302 | public: |
| 303 | ParallelMoveResolverARMVIXL(ArenaAllocator* allocator, CodeGeneratorARMVIXL* codegen) |
| 304 | : ParallelMoveResolverWithSwap(allocator), codegen_(codegen) {} |
| 305 | |
| 306 | void EmitMove(size_t index) OVERRIDE; |
| 307 | void EmitSwap(size_t index) OVERRIDE; |
| 308 | void SpillScratch(int reg) OVERRIDE; |
| 309 | void RestoreScratch(int reg) OVERRIDE; |
| 310 | |
| 311 | ArmVIXLAssembler* GetAssembler() const; |
| 312 | |
| 313 | private: |
Alexandre Rames | 9c19bd6 | 2016-10-24 11:50:32 +0100 | [diff] [blame] | 314 | void Exchange(vixl32::Register reg, int mem); |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 315 | void Exchange(int mem1, int mem2); |
| 316 | |
| 317 | CodeGeneratorARMVIXL* const codegen_; |
| 318 | |
| 319 | DISALLOW_COPY_AND_ASSIGN(ParallelMoveResolverARMVIXL); |
| 320 | }; |
| 321 | |
| 322 | #define DEFINE_IMPLEMENTED_INSTRUCTION_VISITOR(Name) \ |
| 323 | void Visit##Name(H##Name*) OVERRIDE; |
| 324 | |
| 325 | #define DEFINE_UNIMPLEMENTED_INSTRUCTION_VISITOR(Name) \ |
| 326 | void Visit##Name(H##Name* instr) OVERRIDE { \ |
| 327 | VisitUnimplemementedInstruction(instr); } |
| 328 | |
| 329 | class LocationsBuilderARMVIXL : public HGraphVisitor { |
| 330 | public: |
| 331 | LocationsBuilderARMVIXL(HGraph* graph, CodeGeneratorARMVIXL* codegen) |
| 332 | : HGraphVisitor(graph), codegen_(codegen) {} |
| 333 | |
| 334 | FOR_EACH_IMPLEMENTED_INSTRUCTION(DEFINE_IMPLEMENTED_INSTRUCTION_VISITOR) |
| 335 | |
| 336 | FOR_EACH_UNIMPLEMENTED_INSTRUCTION(DEFINE_UNIMPLEMENTED_INSTRUCTION_VISITOR) |
| 337 | |
| 338 | private: |
| 339 | void VisitUnimplemementedInstruction(HInstruction* instruction) { |
| 340 | LOG(FATAL) << "Unimplemented Instruction: " << instruction->DebugName(); |
| 341 | } |
| 342 | |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 343 | void HandleInvoke(HInvoke* invoke); |
Artem Serov | 02109dd | 2016-09-23 17:17:54 +0100 | [diff] [blame] | 344 | void HandleBitwiseOperation(HBinaryOperation* operation, Opcode opcode); |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 345 | void HandleCondition(HCondition* condition); |
Artem Serov | 02109dd | 2016-09-23 17:17:54 +0100 | [diff] [blame] | 346 | void HandleIntegerRotate(LocationSummary* locations); |
| 347 | void HandleLongRotate(LocationSummary* locations); |
| 348 | void HandleShift(HBinaryOperation* operation); |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 349 | void HandleFieldSet(HInstruction* instruction, const FieldInfo& field_info); |
| 350 | void HandleFieldGet(HInstruction* instruction, const FieldInfo& field_info); |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 351 | |
Alexandre Rames | 9c19bd6 | 2016-10-24 11:50:32 +0100 | [diff] [blame] | 352 | Location ArithmeticZeroOrFpuRegister(HInstruction* input); |
Artem Serov | 02109dd | 2016-09-23 17:17:54 +0100 | [diff] [blame] | 353 | Location ArmEncodableConstantOrRegister(HInstruction* constant, Opcode opcode); |
| 354 | bool CanEncodeConstantAsImmediate(HConstant* input_cst, Opcode opcode); |
| 355 | bool CanEncodeConstantAsImmediate(uint32_t value, Opcode opcode, SetCc set_cc = kCcDontCare); |
Alexandre Rames | 9c19bd6 | 2016-10-24 11:50:32 +0100 | [diff] [blame] | 356 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 357 | CodeGeneratorARMVIXL* const codegen_; |
| 358 | InvokeDexCallingConventionVisitorARM parameter_visitor_; |
| 359 | |
| 360 | DISALLOW_COPY_AND_ASSIGN(LocationsBuilderARMVIXL); |
| 361 | }; |
| 362 | |
| 363 | class InstructionCodeGeneratorARMVIXL : public InstructionCodeGenerator { |
| 364 | public: |
| 365 | InstructionCodeGeneratorARMVIXL(HGraph* graph, CodeGeneratorARMVIXL* codegen); |
| 366 | |
| 367 | FOR_EACH_IMPLEMENTED_INSTRUCTION(DEFINE_IMPLEMENTED_INSTRUCTION_VISITOR) |
| 368 | |
| 369 | FOR_EACH_UNIMPLEMENTED_INSTRUCTION(DEFINE_UNIMPLEMENTED_INSTRUCTION_VISITOR) |
| 370 | |
| 371 | ArmVIXLAssembler* GetAssembler() const { return assembler_; } |
| 372 | vixl::aarch32::MacroAssembler* GetVIXLAssembler() { return GetAssembler()->GetVIXLAssembler(); } |
| 373 | |
| 374 | private: |
| 375 | void VisitUnimplemementedInstruction(HInstruction* instruction) { |
| 376 | LOG(FATAL) << "Unimplemented Instruction: " << instruction->DebugName(); |
| 377 | } |
| 378 | |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 379 | // Generate code for the given suspend check. If not null, `successor` |
| 380 | // is the block to branch to if the suspend check is not needed, and after |
| 381 | // the suspend call. |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 382 | void GenerateSuspendCheck(HSuspendCheck* instruction, HBasicBlock* successor); |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 383 | void GenerateClassInitializationCheck(LoadClassSlowPathARMVIXL* slow_path, |
| 384 | vixl32::Register class_reg); |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 385 | void HandleGoto(HInstruction* got, HBasicBlock* successor); |
Artem Serov | 02109dd | 2016-09-23 17:17:54 +0100 | [diff] [blame] | 386 | void GenerateAndConst(vixl::aarch32::Register out, vixl::aarch32::Register first, uint32_t value); |
| 387 | void GenerateOrrConst(vixl::aarch32::Register out, vixl::aarch32::Register first, uint32_t value); |
| 388 | void GenerateEorConst(vixl::aarch32::Register out, vixl::aarch32::Register first, uint32_t value); |
| 389 | void HandleBitwiseOperation(HBinaryOperation* operation); |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 390 | void HandleCondition(HCondition* condition); |
Artem Serov | 02109dd | 2016-09-23 17:17:54 +0100 | [diff] [blame] | 391 | void HandleIntegerRotate(HRor* ror); |
| 392 | void HandleLongRotate(HRor* ror); |
| 393 | void HandleShift(HBinaryOperation* operation); |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 394 | |
| 395 | void GenerateWideAtomicStore(vixl::aarch32::Register addr, |
| 396 | uint32_t offset, |
| 397 | vixl::aarch32::Register value_lo, |
| 398 | vixl::aarch32::Register value_hi, |
| 399 | vixl::aarch32::Register temp1, |
| 400 | vixl::aarch32::Register temp2, |
| 401 | HInstruction* instruction); |
| 402 | void GenerateWideAtomicLoad(vixl::aarch32::Register addr, |
| 403 | uint32_t offset, |
| 404 | vixl::aarch32::Register out_lo, |
| 405 | vixl::aarch32::Register out_hi); |
| 406 | |
| 407 | void HandleFieldSet(HInstruction* instruction, |
| 408 | const FieldInfo& field_info, |
| 409 | bool value_can_be_null); |
| 410 | void HandleFieldGet(HInstruction* instruction, const FieldInfo& field_info); |
| 411 | |
Artem Serov | cfbe913 | 2016-10-14 15:58:56 +0100 | [diff] [blame] | 412 | // Generate a heap reference load using one register `out`: |
| 413 | // |
| 414 | // out <- *(out + offset) |
| 415 | // |
| 416 | // while honoring heap poisoning and/or read barriers (if any). |
| 417 | // |
| 418 | // Location `maybe_temp` is used when generating a read barrier and |
| 419 | // shall be a register in that case; it may be an invalid location |
| 420 | // otherwise. |
| 421 | void GenerateReferenceLoadOneRegister(HInstruction* instruction, |
| 422 | Location out, |
| 423 | uint32_t offset, |
| 424 | Location maybe_temp); |
Anton Kirilov | e28d9ae | 2016-10-25 18:17:23 +0100 | [diff] [blame] | 425 | // Generate a heap reference load using two different registers |
| 426 | // `out` and `obj`: |
| 427 | // |
| 428 | // out <- *(obj + offset) |
| 429 | // |
| 430 | // while honoring heap poisoning and/or read barriers (if any). |
| 431 | // |
| 432 | // Location `maybe_temp` is used when generating a Baker's (fast |
| 433 | // path) read barrier and shall be a register in that case; it may |
| 434 | // be an invalid location otherwise. |
| 435 | void GenerateReferenceLoadTwoRegisters(HInstruction* instruction, |
| 436 | Location out, |
| 437 | Location obj, |
| 438 | uint32_t offset, |
| 439 | Location maybe_temp); |
| 440 | |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 441 | // Generate a GC root reference load: |
| 442 | // |
| 443 | // root <- *(obj + offset) |
| 444 | // |
| 445 | // while honoring read barriers if `requires_read_barrier` is true. |
| 446 | void GenerateGcRootFieldLoad(HInstruction* instruction, |
| 447 | Location root, |
| 448 | vixl::aarch32::Register obj, |
| 449 | uint32_t offset, |
Roland Levillain | 00468f3 | 2016-10-27 18:02:48 +0100 | [diff] [blame] | 450 | bool requires_read_barrier); |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 451 | void GenerateTestAndBranch(HInstruction* instruction, |
| 452 | size_t condition_input_index, |
| 453 | vixl::aarch32::Label* true_target, |
| 454 | vixl::aarch32::Label* false_target); |
| 455 | void GenerateCompareTestAndBranch(HCondition* condition, |
| 456 | vixl::aarch32::Label* true_target, |
| 457 | vixl::aarch32::Label* false_target); |
| 458 | void GenerateVcmp(HInstruction* instruction); |
| 459 | void GenerateFPJumps(HCondition* cond, |
| 460 | vixl::aarch32::Label* true_label, |
| 461 | vixl::aarch32::Label* false_label); |
| 462 | void GenerateLongComparesAndJumps(HCondition* cond, |
| 463 | vixl::aarch32::Label* true_label, |
| 464 | vixl::aarch32::Label* false_label); |
| 465 | void DivRemOneOrMinusOne(HBinaryOperation* instruction); |
| 466 | void DivRemByPowerOfTwo(HBinaryOperation* instruction); |
| 467 | void GenerateDivRemWithAnyConstant(HBinaryOperation* instruction); |
| 468 | void GenerateDivRemConstantIntegral(HBinaryOperation* instruction); |
| 469 | |
| 470 | ArmVIXLAssembler* const assembler_; |
| 471 | CodeGeneratorARMVIXL* const codegen_; |
| 472 | |
| 473 | DISALLOW_COPY_AND_ASSIGN(InstructionCodeGeneratorARMVIXL); |
| 474 | }; |
| 475 | |
| 476 | class CodeGeneratorARMVIXL : public CodeGenerator { |
| 477 | public: |
| 478 | CodeGeneratorARMVIXL(HGraph* graph, |
| 479 | const ArmInstructionSetFeatures& isa_features, |
| 480 | const CompilerOptions& compiler_options, |
| 481 | OptimizingCompilerStats* stats = nullptr); |
| 482 | |
| 483 | virtual ~CodeGeneratorARMVIXL() {} |
| 484 | |
| 485 | void Initialize() OVERRIDE { |
| 486 | block_labels_.resize(GetGraph()->GetBlocks().size()); |
| 487 | } |
| 488 | |
| 489 | void GenerateFrameEntry() OVERRIDE; |
| 490 | void GenerateFrameExit() OVERRIDE; |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 491 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 492 | void Bind(HBasicBlock* block) OVERRIDE; |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 493 | |
| 494 | vixl::aarch32::Label* GetLabelOf(HBasicBlock* block) { |
| 495 | block = FirstNonEmptyBlock(block); |
| 496 | return &(block_labels_[block->GetBlockId()]); |
| 497 | } |
| 498 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 499 | void MoveConstant(Location destination, int32_t value) OVERRIDE; |
| 500 | void MoveLocation(Location dst, Location src, Primitive::Type dst_type) OVERRIDE; |
| 501 | void AddLocationAsTemp(Location location, LocationSummary* locations) OVERRIDE; |
| 502 | |
| 503 | ArmVIXLAssembler* GetAssembler() OVERRIDE { return &assembler_; } |
| 504 | |
| 505 | const ArmVIXLAssembler& GetAssembler() const OVERRIDE { return assembler_; } |
| 506 | |
| 507 | vixl::aarch32::MacroAssembler* GetVIXLAssembler() { return GetAssembler()->GetVIXLAssembler(); } |
| 508 | |
| 509 | size_t GetWordSize() const OVERRIDE { return kArmWordSize; } |
| 510 | |
| 511 | size_t GetFloatingPointSpillSlotSize() const OVERRIDE { return vixl::aarch32::kRegSizeInBytes; } |
| 512 | |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 513 | uintptr_t GetAddressOf(HBasicBlock* block) OVERRIDE { |
| 514 | vixl::aarch32::Label* block_entry_label = GetLabelOf(block); |
| 515 | DCHECK(block_entry_label->IsBound()); |
| 516 | return block_entry_label->GetLocation(); |
| 517 | } |
| 518 | |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 519 | JumpTableARMVIXL* CreateJumpTable(HPackedSwitch* switch_instr) { |
| 520 | jump_tables_.emplace_back(new (GetGraph()->GetArena()) JumpTableARMVIXL(switch_instr)); |
| 521 | return jump_tables_.back().get(); |
| 522 | } |
| 523 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 524 | HGraphVisitor* GetLocationBuilder() OVERRIDE { return &location_builder_; } |
| 525 | |
| 526 | HGraphVisitor* GetInstructionVisitor() OVERRIDE { return &instruction_visitor_; } |
| 527 | |
Artem Serov | 09a940d | 2016-11-11 16:15:11 +0000 | [diff] [blame] | 528 | void FixJumpTables(); |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 529 | void GenerateMemoryBarrier(MemBarrierKind kind); |
| 530 | void Finalize(CodeAllocator* allocator) OVERRIDE; |
| 531 | void SetupBlockedRegisters() const OVERRIDE; |
| 532 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 533 | void DumpCoreRegister(std::ostream& stream, int reg) const OVERRIDE; |
| 534 | void DumpFloatingPointRegister(std::ostream& stream, int reg) const OVERRIDE; |
| 535 | |
| 536 | InstructionSet GetInstructionSet() const OVERRIDE { return InstructionSet::kThumb2; } |
| 537 | |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 538 | // Helper method to move a 32-bit value between two locations. |
| 539 | void Move32(Location destination, Location source); |
| 540 | |
Scott Wakeling | c34dba7 | 2016-10-03 10:14:44 +0100 | [diff] [blame] | 541 | void LoadFromShiftedRegOffset(Primitive::Type type, |
| 542 | Location out_loc, |
| 543 | vixl::aarch32::Register base, |
| 544 | vixl::aarch32::Register reg_index, |
| 545 | vixl::aarch32::Condition cond = vixl::aarch32::al); |
| 546 | void StoreToShiftedRegOffset(Primitive::Type type, |
| 547 | Location out_loc, |
| 548 | vixl::aarch32::Register base, |
| 549 | vixl::aarch32::Register reg_index, |
| 550 | vixl::aarch32::Condition cond = vixl::aarch32::al); |
| 551 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 552 | const ArmInstructionSetFeatures& GetInstructionSetFeatures() const { return isa_features_; } |
| 553 | |
| 554 | vixl::aarch32::Label* GetFrameEntryLabel() { return &frame_entry_label_; } |
| 555 | |
| 556 | // Saves the register in the stack. Returns the size taken on stack. |
| 557 | size_t SaveCoreRegister(size_t stack_index ATTRIBUTE_UNUSED, |
| 558 | uint32_t reg_id ATTRIBUTE_UNUSED) OVERRIDE { |
| 559 | UNIMPLEMENTED(INFO) << "TODO: SaveCoreRegister"; |
| 560 | return 0; |
| 561 | } |
| 562 | |
| 563 | // Restores the register from the stack. Returns the size taken on stack. |
| 564 | size_t RestoreCoreRegister(size_t stack_index ATTRIBUTE_UNUSED, |
| 565 | uint32_t reg_id ATTRIBUTE_UNUSED) OVERRIDE { |
| 566 | UNIMPLEMENTED(INFO) << "TODO: RestoreCoreRegister"; |
| 567 | return 0; |
| 568 | } |
| 569 | |
| 570 | size_t SaveFloatingPointRegister(size_t stack_index ATTRIBUTE_UNUSED, |
| 571 | uint32_t reg_id ATTRIBUTE_UNUSED) OVERRIDE { |
| 572 | UNIMPLEMENTED(INFO) << "TODO: SaveFloatingPointRegister"; |
| 573 | return 0; |
| 574 | } |
| 575 | |
Anton Kirilov | e28d9ae | 2016-10-25 18:17:23 +0100 | [diff] [blame] | 576 | size_t RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 577 | |
| 578 | bool NeedsTwoRegisters(Primitive::Type type) const OVERRIDE { |
| 579 | return type == Primitive::kPrimDouble || type == Primitive::kPrimLong; |
| 580 | } |
| 581 | |
| 582 | void ComputeSpillMask() OVERRIDE; |
| 583 | |
| 584 | void GenerateImplicitNullCheck(HNullCheck* null_check) OVERRIDE; |
| 585 | void GenerateExplicitNullCheck(HNullCheck* null_check) OVERRIDE; |
| 586 | |
| 587 | ParallelMoveResolver* GetMoveResolver() OVERRIDE { |
| 588 | return &move_resolver_; |
| 589 | } |
| 590 | |
| 591 | // Generate code to invoke a runtime entry point. |
| 592 | void InvokeRuntime(QuickEntrypointEnum entrypoint, |
| 593 | HInstruction* instruction, |
| 594 | uint32_t dex_pc, |
| 595 | SlowPathCode* slow_path = nullptr) OVERRIDE; |
| 596 | |
| 597 | // Generate code to invoke a runtime entry point, but do not record |
| 598 | // PC-related information in a stack map. |
| 599 | void InvokeRuntimeWithoutRecordingPcInfo(int32_t entry_point_offset, |
| 600 | HInstruction* instruction, |
| 601 | SlowPathCode* slow_path); |
| 602 | |
| 603 | void GenerateInvokeRuntime(int32_t entry_point_offset); |
| 604 | |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 605 | // Emit a write barrier. |
| 606 | void MarkGCCard(vixl::aarch32::Register temp, |
| 607 | vixl::aarch32::Register card, |
| 608 | vixl::aarch32::Register object, |
| 609 | vixl::aarch32::Register value, |
| 610 | bool can_be_null); |
| 611 | |
Anton Kirilov | e28d9ae | 2016-10-25 18:17:23 +0100 | [diff] [blame] | 612 | // Fast path implementation of ReadBarrier::Barrier for a heap |
| 613 | // reference field load when Baker's read barriers are used. |
| 614 | void GenerateFieldLoadWithBakerReadBarrier(HInstruction* instruction, |
| 615 | Location ref, |
| 616 | vixl::aarch32::Register obj, |
| 617 | uint32_t offset, |
| 618 | Location temp, |
| 619 | bool needs_null_check); |
| 620 | |
| 621 | // Factored implementation, used by GenerateFieldLoadWithBakerReadBarrier, |
| 622 | // GenerateArrayLoadWithBakerReadBarrier and some intrinsics. |
| 623 | // |
| 624 | // Load the object reference located at the address |
| 625 | // `obj + offset + (index << scale_factor)`, held by object `obj`, into |
| 626 | // `ref`, and mark it if needed. |
| 627 | // |
| 628 | // If `always_update_field` is true, the value of the reference is |
| 629 | // atomically updated in the holder (`obj`). This operation |
| 630 | // requires an extra temporary register, which must be provided as a |
| 631 | // non-null pointer (`temp2`). |
| 632 | void GenerateReferenceLoadWithBakerReadBarrier(HInstruction* instruction, |
| 633 | Location ref, |
| 634 | vixl::aarch32::Register obj, |
| 635 | uint32_t offset, |
| 636 | Location index, |
| 637 | ScaleFactor scale_factor, |
| 638 | Location temp, |
| 639 | bool needs_null_check, |
| 640 | bool always_update_field = false, |
| 641 | vixl::aarch32::Register* temp2 = nullptr); |
| 642 | |
| 643 | // Generate a read barrier for a heap reference within `instruction` |
| 644 | // using a slow path. |
| 645 | // |
| 646 | // A read barrier for an object reference read from the heap is |
| 647 | // implemented as a call to the artReadBarrierSlow runtime entry |
| 648 | // point, which is passed the values in locations `ref`, `obj`, and |
| 649 | // `offset`: |
| 650 | // |
| 651 | // mirror::Object* artReadBarrierSlow(mirror::Object* ref, |
| 652 | // mirror::Object* obj, |
| 653 | // uint32_t offset); |
| 654 | // |
| 655 | // The `out` location contains the value returned by |
| 656 | // artReadBarrierSlow. |
| 657 | // |
| 658 | // When `index` is provided (i.e. for array accesses), the offset |
| 659 | // value passed to artReadBarrierSlow is adjusted to take `index` |
| 660 | // into account. |
| 661 | void GenerateReadBarrierSlow(HInstruction* instruction, |
| 662 | Location out, |
| 663 | Location ref, |
| 664 | Location obj, |
| 665 | uint32_t offset, |
| 666 | Location index = Location::NoLocation()); |
| 667 | |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 668 | // If read barriers are enabled, generate a read barrier for a heap |
| 669 | // reference using a slow path. If heap poisoning is enabled, also |
| 670 | // unpoison the reference in `out`. |
| 671 | void MaybeGenerateReadBarrierSlow(HInstruction* instruction, |
| 672 | Location out, |
| 673 | Location ref, |
| 674 | Location obj, |
| 675 | uint32_t offset, |
| 676 | Location index = Location::NoLocation()); |
| 677 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 678 | // Check if the desired_string_load_kind is supported. If it is, return it, |
| 679 | // otherwise return a fall-back kind that should be used instead. |
| 680 | HLoadString::LoadKind GetSupportedLoadStringKind( |
| 681 | HLoadString::LoadKind desired_string_load_kind) OVERRIDE; |
| 682 | |
| 683 | // Check if the desired_class_load_kind is supported. If it is, return it, |
| 684 | // otherwise return a fall-back kind that should be used instead. |
| 685 | HLoadClass::LoadKind GetSupportedLoadClassKind( |
| 686 | HLoadClass::LoadKind desired_class_load_kind) OVERRIDE; |
| 687 | |
| 688 | // Check if the desired_dispatch_info is supported. If it is, return it, |
| 689 | // otherwise return a fall-back info that should be used instead. |
| 690 | HInvokeStaticOrDirect::DispatchInfo GetSupportedInvokeStaticOrDirectDispatch( |
| 691 | const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, |
Nicolas Geoffray | 5e4e11e | 2016-09-22 13:17:41 +0100 | [diff] [blame] | 692 | HInvokeStaticOrDirect* invoke) OVERRIDE; |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 693 | |
| 694 | void GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) OVERRIDE; |
| 695 | void GenerateVirtualCall(HInvokeVirtual* invoke, Location temp) OVERRIDE; |
| 696 | |
| 697 | void MoveFromReturnRegister(Location trg, Primitive::Type type) OVERRIDE; |
| 698 | |
| 699 | void GenerateNop() OVERRIDE; |
| 700 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 701 | private: |
Scott Wakeling | a7812ae | 2016-10-17 10:03:36 +0100 | [diff] [blame] | 702 | vixl::aarch32::Register GetInvokeStaticOrDirectExtraParameter(HInvokeStaticOrDirect* invoke, |
| 703 | vixl::aarch32::Register temp); |
| 704 | |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 705 | // Labels for each block that will be compiled. |
| 706 | // We use a deque so that the `vixl::aarch32::Label` objects do not move in memory. |
| 707 | ArenaDeque<vixl::aarch32::Label> block_labels_; // Indexed by block id. |
| 708 | vixl::aarch32::Label frame_entry_label_; |
| 709 | |
Artem Serov | 551b28f | 2016-10-18 19:11:30 +0100 | [diff] [blame] | 710 | ArenaVector<std::unique_ptr<JumpTableARMVIXL>> jump_tables_; |
Scott Wakeling | fe88546 | 2016-09-22 10:24:38 +0100 | [diff] [blame] | 711 | LocationsBuilderARMVIXL location_builder_; |
| 712 | InstructionCodeGeneratorARMVIXL instruction_visitor_; |
| 713 | ParallelMoveResolverARMVIXL move_resolver_; |
| 714 | |
| 715 | ArmVIXLAssembler assembler_; |
| 716 | const ArmInstructionSetFeatures& isa_features_; |
| 717 | |
| 718 | DISALLOW_COPY_AND_ASSIGN(CodeGeneratorARMVIXL); |
| 719 | }; |
| 720 | |
| 721 | #undef FOR_EACH_IMPLEMENTED_INSTRUCTION |
| 722 | #undef FOR_EACH_UNIMPLEMENTED_INSTRUCTION |
| 723 | #undef DEFINE_IMPLEMENTED_INSTRUCTION_VISITOR |
| 724 | #undef DEFINE_UNIMPLEMENTED_INSTRUCTION_VISITOR |
| 725 | |
| 726 | |
| 727 | } // namespace arm |
| 728 | } // namespace art |
| 729 | |
| 730 | #endif // ART_COMPILER_OPTIMIZING_CODE_GENERATOR_ARM_VIXL_H_ |