Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include "dex/compiler_internals.h" |
| 18 | #include "dex/dataflow_iterator-inl.h" |
| 19 | #include "mir_to_lir-inl.h" |
| 20 | #include "object_utils.h" |
Ian Rogers | 02ed4c0 | 2013-09-06 13:10:04 -0700 | [diff] [blame] | 21 | #include "thread-inl.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 22 | |
| 23 | namespace art { |
| 24 | |
| 25 | /* |
| 26 | * Target-independent code generation. Use only high-level |
| 27 | * load/store utilities here, or target-dependent genXX() handlers |
| 28 | * when necessary. |
| 29 | */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 30 | void Mir2Lir::CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 31 | RegLocation rl_src[3]; |
| 32 | RegLocation rl_dest = mir_graph_->GetBadLoc(); |
| 33 | RegLocation rl_result = mir_graph_->GetBadLoc(); |
| 34 | Instruction::Code opcode = mir->dalvikInsn.opcode; |
| 35 | int opt_flags = mir->optimization_flags; |
| 36 | uint32_t vB = mir->dalvikInsn.vB; |
| 37 | uint32_t vC = mir->dalvikInsn.vC; |
| 38 | |
| 39 | // Prep Src and Dest locations. |
| 40 | int next_sreg = 0; |
| 41 | int next_loc = 0; |
| 42 | int attrs = mir_graph_->oat_data_flow_attributes_[opcode]; |
| 43 | rl_src[0] = rl_src[1] = rl_src[2] = mir_graph_->GetBadLoc(); |
| 44 | if (attrs & DF_UA) { |
| 45 | if (attrs & DF_A_WIDE) { |
| 46 | rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg); |
| 47 | next_sreg+= 2; |
| 48 | } else { |
| 49 | rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg); |
| 50 | next_sreg++; |
| 51 | } |
| 52 | } |
| 53 | if (attrs & DF_UB) { |
| 54 | if (attrs & DF_B_WIDE) { |
| 55 | rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg); |
| 56 | next_sreg+= 2; |
| 57 | } else { |
| 58 | rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg); |
| 59 | next_sreg++; |
| 60 | } |
| 61 | } |
| 62 | if (attrs & DF_UC) { |
| 63 | if (attrs & DF_C_WIDE) { |
| 64 | rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg); |
| 65 | } else { |
| 66 | rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg); |
| 67 | } |
| 68 | } |
| 69 | if (attrs & DF_DA) { |
| 70 | if (attrs & DF_A_WIDE) { |
| 71 | rl_dest = mir_graph_->GetDestWide(mir); |
| 72 | } else { |
| 73 | rl_dest = mir_graph_->GetDest(mir); |
| 74 | } |
| 75 | } |
| 76 | switch (opcode) { |
| 77 | case Instruction::NOP: |
| 78 | break; |
| 79 | |
| 80 | case Instruction::MOVE_EXCEPTION: |
| 81 | GenMoveException(rl_dest); |
| 82 | break; |
| 83 | |
| 84 | case Instruction::RETURN_VOID: |
| 85 | if (((cu_->access_flags & kAccConstructor) != 0) && |
| 86 | cu_->compiler_driver->RequiresConstructorBarrier(Thread::Current(), cu_->dex_file, |
| 87 | cu_->class_def_idx)) { |
| 88 | GenMemBarrier(kStoreStore); |
| 89 | } |
| 90 | if (!mir_graph_->MethodIsLeaf()) { |
| 91 | GenSuspendTest(opt_flags); |
| 92 | } |
| 93 | break; |
| 94 | |
| 95 | case Instruction::RETURN: |
| 96 | case Instruction::RETURN_OBJECT: |
| 97 | if (!mir_graph_->MethodIsLeaf()) { |
| 98 | GenSuspendTest(opt_flags); |
| 99 | } |
| 100 | StoreValue(GetReturn(cu_->shorty[0] == 'F'), rl_src[0]); |
| 101 | break; |
| 102 | |
| 103 | case Instruction::RETURN_WIDE: |
| 104 | if (!mir_graph_->MethodIsLeaf()) { |
| 105 | GenSuspendTest(opt_flags); |
| 106 | } |
| 107 | StoreValueWide(GetReturnWide(cu_->shorty[0] == 'D'), rl_src[0]); |
| 108 | break; |
| 109 | |
| 110 | case Instruction::MOVE_RESULT_WIDE: |
| 111 | if (opt_flags & MIR_INLINED) |
| 112 | break; // Nop - combined w/ previous invoke. |
| 113 | StoreValueWide(rl_dest, GetReturnWide(rl_dest.fp)); |
| 114 | break; |
| 115 | |
| 116 | case Instruction::MOVE_RESULT: |
| 117 | case Instruction::MOVE_RESULT_OBJECT: |
| 118 | if (opt_flags & MIR_INLINED) |
| 119 | break; // Nop - combined w/ previous invoke. |
| 120 | StoreValue(rl_dest, GetReturn(rl_dest.fp)); |
| 121 | break; |
| 122 | |
| 123 | case Instruction::MOVE: |
| 124 | case Instruction::MOVE_OBJECT: |
| 125 | case Instruction::MOVE_16: |
| 126 | case Instruction::MOVE_OBJECT_16: |
| 127 | case Instruction::MOVE_FROM16: |
| 128 | case Instruction::MOVE_OBJECT_FROM16: |
| 129 | StoreValue(rl_dest, rl_src[0]); |
| 130 | break; |
| 131 | |
| 132 | case Instruction::MOVE_WIDE: |
| 133 | case Instruction::MOVE_WIDE_16: |
| 134 | case Instruction::MOVE_WIDE_FROM16: |
| 135 | StoreValueWide(rl_dest, rl_src[0]); |
| 136 | break; |
| 137 | |
| 138 | case Instruction::CONST: |
| 139 | case Instruction::CONST_4: |
| 140 | case Instruction::CONST_16: |
| 141 | rl_result = EvalLoc(rl_dest, kAnyReg, true); |
| 142 | LoadConstantNoClobber(rl_result.low_reg, vB); |
| 143 | StoreValue(rl_dest, rl_result); |
| 144 | if (vB == 0) { |
| 145 | Workaround7250540(rl_dest, rl_result.low_reg); |
| 146 | } |
| 147 | break; |
| 148 | |
| 149 | case Instruction::CONST_HIGH16: |
| 150 | rl_result = EvalLoc(rl_dest, kAnyReg, true); |
| 151 | LoadConstantNoClobber(rl_result.low_reg, vB << 16); |
| 152 | StoreValue(rl_dest, rl_result); |
| 153 | if (vB == 0) { |
| 154 | Workaround7250540(rl_dest, rl_result.low_reg); |
| 155 | } |
| 156 | break; |
| 157 | |
| 158 | case Instruction::CONST_WIDE_16: |
| 159 | case Instruction::CONST_WIDE_32: |
| 160 | rl_result = EvalLoc(rl_dest, kAnyReg, true); |
| 161 | LoadConstantWide(rl_result.low_reg, rl_result.high_reg, |
| 162 | static_cast<int64_t>(static_cast<int32_t>(vB))); |
| 163 | StoreValueWide(rl_dest, rl_result); |
| 164 | break; |
| 165 | |
| 166 | case Instruction::CONST_WIDE: |
| 167 | rl_result = EvalLoc(rl_dest, kAnyReg, true); |
| 168 | LoadConstantWide(rl_result.low_reg, rl_result.high_reg, mir->dalvikInsn.vB_wide); |
| 169 | StoreValueWide(rl_dest, rl_result); |
| 170 | break; |
| 171 | |
| 172 | case Instruction::CONST_WIDE_HIGH16: |
| 173 | rl_result = EvalLoc(rl_dest, kAnyReg, true); |
| 174 | LoadConstantWide(rl_result.low_reg, rl_result.high_reg, |
| 175 | static_cast<int64_t>(vB) << 48); |
| 176 | StoreValueWide(rl_dest, rl_result); |
| 177 | break; |
| 178 | |
| 179 | case Instruction::MONITOR_ENTER: |
| 180 | GenMonitorEnter(opt_flags, rl_src[0]); |
| 181 | break; |
| 182 | |
| 183 | case Instruction::MONITOR_EXIT: |
| 184 | GenMonitorExit(opt_flags, rl_src[0]); |
| 185 | break; |
| 186 | |
| 187 | case Instruction::CHECK_CAST: { |
| 188 | GenCheckCast(mir->offset, vB, rl_src[0]); |
| 189 | break; |
| 190 | } |
| 191 | case Instruction::INSTANCE_OF: |
| 192 | GenInstanceof(vC, rl_dest, rl_src[0]); |
| 193 | break; |
| 194 | |
| 195 | case Instruction::NEW_INSTANCE: |
| 196 | GenNewInstance(vB, rl_dest); |
| 197 | break; |
| 198 | |
| 199 | case Instruction::THROW: |
| 200 | GenThrow(rl_src[0]); |
| 201 | break; |
| 202 | |
| 203 | case Instruction::ARRAY_LENGTH: |
| 204 | int len_offset; |
| 205 | len_offset = mirror::Array::LengthOffset().Int32Value(); |
| 206 | rl_src[0] = LoadValue(rl_src[0], kCoreReg); |
| 207 | GenNullCheck(rl_src[0].s_reg_low, rl_src[0].low_reg, opt_flags); |
| 208 | rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 209 | LoadWordDisp(rl_src[0].low_reg, len_offset, rl_result.low_reg); |
| 210 | StoreValue(rl_dest, rl_result); |
| 211 | break; |
| 212 | |
| 213 | case Instruction::CONST_STRING: |
| 214 | case Instruction::CONST_STRING_JUMBO: |
| 215 | GenConstString(vB, rl_dest); |
| 216 | break; |
| 217 | |
| 218 | case Instruction::CONST_CLASS: |
| 219 | GenConstClass(vB, rl_dest); |
| 220 | break; |
| 221 | |
| 222 | case Instruction::FILL_ARRAY_DATA: |
| 223 | GenFillArrayData(vB, rl_src[0]); |
| 224 | break; |
| 225 | |
| 226 | case Instruction::FILLED_NEW_ARRAY: |
| 227 | GenFilledNewArray(mir_graph_->NewMemCallInfo(bb, mir, kStatic, |
| 228 | false /* not range */)); |
| 229 | break; |
| 230 | |
| 231 | case Instruction::FILLED_NEW_ARRAY_RANGE: |
| 232 | GenFilledNewArray(mir_graph_->NewMemCallInfo(bb, mir, kStatic, |
| 233 | true /* range */)); |
| 234 | break; |
| 235 | |
| 236 | case Instruction::NEW_ARRAY: |
| 237 | GenNewArray(vC, rl_dest, rl_src[0]); |
| 238 | break; |
| 239 | |
| 240 | case Instruction::GOTO: |
| 241 | case Instruction::GOTO_16: |
| 242 | case Instruction::GOTO_32: |
buzbee | 9329e6d | 2013-08-19 12:55:10 -0700 | [diff] [blame] | 243 | if (mir_graph_->IsBackedge(bb, bb->taken)) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 244 | GenSuspendTestAndBranch(opt_flags, &label_list[bb->taken->id]); |
| 245 | } else { |
| 246 | OpUnconditionalBranch(&label_list[bb->taken->id]); |
| 247 | } |
| 248 | break; |
| 249 | |
| 250 | case Instruction::PACKED_SWITCH: |
| 251 | GenPackedSwitch(mir, vB, rl_src[0]); |
| 252 | break; |
| 253 | |
| 254 | case Instruction::SPARSE_SWITCH: |
| 255 | GenSparseSwitch(mir, vB, rl_src[0]); |
| 256 | break; |
| 257 | |
| 258 | case Instruction::CMPL_FLOAT: |
| 259 | case Instruction::CMPG_FLOAT: |
| 260 | case Instruction::CMPL_DOUBLE: |
| 261 | case Instruction::CMPG_DOUBLE: |
| 262 | GenCmpFP(opcode, rl_dest, rl_src[0], rl_src[1]); |
| 263 | break; |
| 264 | |
| 265 | case Instruction::CMP_LONG: |
| 266 | GenCmpLong(rl_dest, rl_src[0], rl_src[1]); |
| 267 | break; |
| 268 | |
| 269 | case Instruction::IF_EQ: |
| 270 | case Instruction::IF_NE: |
| 271 | case Instruction::IF_LT: |
| 272 | case Instruction::IF_GE: |
| 273 | case Instruction::IF_GT: |
| 274 | case Instruction::IF_LE: { |
| 275 | LIR* taken = &label_list[bb->taken->id]; |
| 276 | LIR* fall_through = &label_list[bb->fall_through->id]; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 277 | // Result known at compile time? |
| 278 | if (rl_src[0].is_const && rl_src[1].is_const) { |
| 279 | bool is_taken = EvaluateBranch(opcode, mir_graph_->ConstantValue(rl_src[0].orig_sreg), |
| 280 | mir_graph_->ConstantValue(rl_src[1].orig_sreg)); |
buzbee | 9329e6d | 2013-08-19 12:55:10 -0700 | [diff] [blame] | 281 | BasicBlock* target = is_taken ? bb->taken : bb->fall_through; |
| 282 | if (mir_graph_->IsBackedge(bb, target)) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 283 | GenSuspendTest(opt_flags); |
| 284 | } |
buzbee | 9329e6d | 2013-08-19 12:55:10 -0700 | [diff] [blame] | 285 | OpUnconditionalBranch(&label_list[target->id]); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 286 | } else { |
buzbee | 9329e6d | 2013-08-19 12:55:10 -0700 | [diff] [blame] | 287 | if (mir_graph_->IsBackwardsBranch(bb)) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 288 | GenSuspendTest(opt_flags); |
| 289 | } |
| 290 | GenCompareAndBranch(opcode, rl_src[0], rl_src[1], taken, |
| 291 | fall_through); |
| 292 | } |
| 293 | break; |
| 294 | } |
| 295 | |
| 296 | case Instruction::IF_EQZ: |
| 297 | case Instruction::IF_NEZ: |
| 298 | case Instruction::IF_LTZ: |
| 299 | case Instruction::IF_GEZ: |
| 300 | case Instruction::IF_GTZ: |
| 301 | case Instruction::IF_LEZ: { |
| 302 | LIR* taken = &label_list[bb->taken->id]; |
| 303 | LIR* fall_through = &label_list[bb->fall_through->id]; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 304 | // Result known at compile time? |
| 305 | if (rl_src[0].is_const) { |
| 306 | bool is_taken = EvaluateBranch(opcode, mir_graph_->ConstantValue(rl_src[0].orig_sreg), 0); |
buzbee | 9329e6d | 2013-08-19 12:55:10 -0700 | [diff] [blame] | 307 | BasicBlock* target = is_taken ? bb->taken : bb->fall_through; |
| 308 | if (mir_graph_->IsBackedge(bb, target)) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 309 | GenSuspendTest(opt_flags); |
| 310 | } |
buzbee | 9329e6d | 2013-08-19 12:55:10 -0700 | [diff] [blame] | 311 | OpUnconditionalBranch(&label_list[target->id]); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 312 | } else { |
buzbee | 9329e6d | 2013-08-19 12:55:10 -0700 | [diff] [blame] | 313 | if (mir_graph_->IsBackwardsBranch(bb)) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 314 | GenSuspendTest(opt_flags); |
| 315 | } |
| 316 | GenCompareZeroAndBranch(opcode, rl_src[0], taken, fall_through); |
| 317 | } |
| 318 | break; |
| 319 | } |
| 320 | |
| 321 | case Instruction::AGET_WIDE: |
| 322 | GenArrayGet(opt_flags, kLong, rl_src[0], rl_src[1], rl_dest, 3); |
| 323 | break; |
| 324 | case Instruction::AGET: |
| 325 | case Instruction::AGET_OBJECT: |
| 326 | GenArrayGet(opt_flags, kWord, rl_src[0], rl_src[1], rl_dest, 2); |
| 327 | break; |
| 328 | case Instruction::AGET_BOOLEAN: |
| 329 | GenArrayGet(opt_flags, kUnsignedByte, rl_src[0], rl_src[1], rl_dest, 0); |
| 330 | break; |
| 331 | case Instruction::AGET_BYTE: |
| 332 | GenArrayGet(opt_flags, kSignedByte, rl_src[0], rl_src[1], rl_dest, 0); |
| 333 | break; |
| 334 | case Instruction::AGET_CHAR: |
| 335 | GenArrayGet(opt_flags, kUnsignedHalf, rl_src[0], rl_src[1], rl_dest, 1); |
| 336 | break; |
| 337 | case Instruction::AGET_SHORT: |
| 338 | GenArrayGet(opt_flags, kSignedHalf, rl_src[0], rl_src[1], rl_dest, 1); |
| 339 | break; |
| 340 | case Instruction::APUT_WIDE: |
| 341 | GenArrayPut(opt_flags, kLong, rl_src[1], rl_src[2], rl_src[0], 3); |
| 342 | break; |
| 343 | case Instruction::APUT: |
| 344 | GenArrayPut(opt_flags, kWord, rl_src[1], rl_src[2], rl_src[0], 2); |
| 345 | break; |
| 346 | case Instruction::APUT_OBJECT: |
| 347 | GenArrayObjPut(opt_flags, rl_src[1], rl_src[2], rl_src[0], 2); |
| 348 | break; |
| 349 | case Instruction::APUT_SHORT: |
| 350 | case Instruction::APUT_CHAR: |
| 351 | GenArrayPut(opt_flags, kUnsignedHalf, rl_src[1], rl_src[2], rl_src[0], 1); |
| 352 | break; |
| 353 | case Instruction::APUT_BYTE: |
| 354 | case Instruction::APUT_BOOLEAN: |
| 355 | GenArrayPut(opt_flags, kUnsignedByte, rl_src[1], rl_src[2], |
| 356 | rl_src[0], 0); |
| 357 | break; |
| 358 | |
| 359 | case Instruction::IGET_OBJECT: |
| 360 | GenIGet(vC, opt_flags, kWord, rl_dest, rl_src[0], false, true); |
| 361 | break; |
| 362 | |
| 363 | case Instruction::IGET_WIDE: |
| 364 | GenIGet(vC, opt_flags, kLong, rl_dest, rl_src[0], true, false); |
| 365 | break; |
| 366 | |
| 367 | case Instruction::IGET: |
| 368 | GenIGet(vC, opt_flags, kWord, rl_dest, rl_src[0], false, false); |
| 369 | break; |
| 370 | |
| 371 | case Instruction::IGET_CHAR: |
| 372 | GenIGet(vC, opt_flags, kUnsignedHalf, rl_dest, rl_src[0], false, false); |
| 373 | break; |
| 374 | |
| 375 | case Instruction::IGET_SHORT: |
| 376 | GenIGet(vC, opt_flags, kSignedHalf, rl_dest, rl_src[0], false, false); |
| 377 | break; |
| 378 | |
| 379 | case Instruction::IGET_BOOLEAN: |
| 380 | case Instruction::IGET_BYTE: |
| 381 | GenIGet(vC, opt_flags, kUnsignedByte, rl_dest, rl_src[0], false, false); |
| 382 | break; |
| 383 | |
| 384 | case Instruction::IPUT_WIDE: |
| 385 | GenIPut(vC, opt_flags, kLong, rl_src[0], rl_src[1], true, false); |
| 386 | break; |
| 387 | |
| 388 | case Instruction::IPUT_OBJECT: |
| 389 | GenIPut(vC, opt_flags, kWord, rl_src[0], rl_src[1], false, true); |
| 390 | break; |
| 391 | |
| 392 | case Instruction::IPUT: |
| 393 | GenIPut(vC, opt_flags, kWord, rl_src[0], rl_src[1], false, false); |
| 394 | break; |
| 395 | |
| 396 | case Instruction::IPUT_BOOLEAN: |
| 397 | case Instruction::IPUT_BYTE: |
| 398 | GenIPut(vC, opt_flags, kUnsignedByte, rl_src[0], rl_src[1], false, false); |
| 399 | break; |
| 400 | |
| 401 | case Instruction::IPUT_CHAR: |
| 402 | GenIPut(vC, opt_flags, kUnsignedHalf, rl_src[0], rl_src[1], false, false); |
| 403 | break; |
| 404 | |
| 405 | case Instruction::IPUT_SHORT: |
| 406 | GenIPut(vC, opt_flags, kSignedHalf, rl_src[0], rl_src[1], false, false); |
| 407 | break; |
| 408 | |
| 409 | case Instruction::SGET_OBJECT: |
| 410 | GenSget(vB, rl_dest, false, true); |
| 411 | break; |
| 412 | case Instruction::SGET: |
| 413 | case Instruction::SGET_BOOLEAN: |
| 414 | case Instruction::SGET_BYTE: |
| 415 | case Instruction::SGET_CHAR: |
| 416 | case Instruction::SGET_SHORT: |
| 417 | GenSget(vB, rl_dest, false, false); |
| 418 | break; |
| 419 | |
| 420 | case Instruction::SGET_WIDE: |
| 421 | GenSget(vB, rl_dest, true, false); |
| 422 | break; |
| 423 | |
| 424 | case Instruction::SPUT_OBJECT: |
| 425 | GenSput(vB, rl_src[0], false, true); |
| 426 | break; |
| 427 | |
| 428 | case Instruction::SPUT: |
| 429 | case Instruction::SPUT_BOOLEAN: |
| 430 | case Instruction::SPUT_BYTE: |
| 431 | case Instruction::SPUT_CHAR: |
| 432 | case Instruction::SPUT_SHORT: |
| 433 | GenSput(vB, rl_src[0], false, false); |
| 434 | break; |
| 435 | |
| 436 | case Instruction::SPUT_WIDE: |
| 437 | GenSput(vB, rl_src[0], true, false); |
| 438 | break; |
| 439 | |
| 440 | case Instruction::INVOKE_STATIC_RANGE: |
| 441 | GenInvoke(mir_graph_->NewMemCallInfo(bb, mir, kStatic, true)); |
| 442 | break; |
| 443 | case Instruction::INVOKE_STATIC: |
| 444 | GenInvoke(mir_graph_->NewMemCallInfo(bb, mir, kStatic, false)); |
| 445 | break; |
| 446 | |
| 447 | case Instruction::INVOKE_DIRECT: |
| 448 | GenInvoke(mir_graph_->NewMemCallInfo(bb, mir, kDirect, false)); |
| 449 | break; |
| 450 | case Instruction::INVOKE_DIRECT_RANGE: |
| 451 | GenInvoke(mir_graph_->NewMemCallInfo(bb, mir, kDirect, true)); |
| 452 | break; |
| 453 | |
| 454 | case Instruction::INVOKE_VIRTUAL: |
| 455 | GenInvoke(mir_graph_->NewMemCallInfo(bb, mir, kVirtual, false)); |
| 456 | break; |
| 457 | case Instruction::INVOKE_VIRTUAL_RANGE: |
| 458 | GenInvoke(mir_graph_->NewMemCallInfo(bb, mir, kVirtual, true)); |
| 459 | break; |
| 460 | |
| 461 | case Instruction::INVOKE_SUPER: |
| 462 | GenInvoke(mir_graph_->NewMemCallInfo(bb, mir, kSuper, false)); |
| 463 | break; |
| 464 | case Instruction::INVOKE_SUPER_RANGE: |
| 465 | GenInvoke(mir_graph_->NewMemCallInfo(bb, mir, kSuper, true)); |
| 466 | break; |
| 467 | |
| 468 | case Instruction::INVOKE_INTERFACE: |
| 469 | GenInvoke(mir_graph_->NewMemCallInfo(bb, mir, kInterface, false)); |
| 470 | break; |
| 471 | case Instruction::INVOKE_INTERFACE_RANGE: |
| 472 | GenInvoke(mir_graph_->NewMemCallInfo(bb, mir, kInterface, true)); |
| 473 | break; |
| 474 | |
| 475 | case Instruction::NEG_INT: |
| 476 | case Instruction::NOT_INT: |
| 477 | GenArithOpInt(opcode, rl_dest, rl_src[0], rl_src[0]); |
| 478 | break; |
| 479 | |
| 480 | case Instruction::NEG_LONG: |
| 481 | case Instruction::NOT_LONG: |
| 482 | GenArithOpLong(opcode, rl_dest, rl_src[0], rl_src[0]); |
| 483 | break; |
| 484 | |
| 485 | case Instruction::NEG_FLOAT: |
| 486 | GenArithOpFloat(opcode, rl_dest, rl_src[0], rl_src[0]); |
| 487 | break; |
| 488 | |
| 489 | case Instruction::NEG_DOUBLE: |
| 490 | GenArithOpDouble(opcode, rl_dest, rl_src[0], rl_src[0]); |
| 491 | break; |
| 492 | |
| 493 | case Instruction::INT_TO_LONG: |
| 494 | GenIntToLong(rl_dest, rl_src[0]); |
| 495 | break; |
| 496 | |
| 497 | case Instruction::LONG_TO_INT: |
| 498 | rl_src[0] = UpdateLocWide(rl_src[0]); |
| 499 | rl_src[0] = WideToNarrow(rl_src[0]); |
| 500 | StoreValue(rl_dest, rl_src[0]); |
| 501 | break; |
| 502 | |
| 503 | case Instruction::INT_TO_BYTE: |
| 504 | case Instruction::INT_TO_SHORT: |
| 505 | case Instruction::INT_TO_CHAR: |
| 506 | GenIntNarrowing(opcode, rl_dest, rl_src[0]); |
| 507 | break; |
| 508 | |
| 509 | case Instruction::INT_TO_FLOAT: |
| 510 | case Instruction::INT_TO_DOUBLE: |
| 511 | case Instruction::LONG_TO_FLOAT: |
| 512 | case Instruction::LONG_TO_DOUBLE: |
| 513 | case Instruction::FLOAT_TO_INT: |
| 514 | case Instruction::FLOAT_TO_LONG: |
| 515 | case Instruction::FLOAT_TO_DOUBLE: |
| 516 | case Instruction::DOUBLE_TO_INT: |
| 517 | case Instruction::DOUBLE_TO_LONG: |
| 518 | case Instruction::DOUBLE_TO_FLOAT: |
| 519 | GenConversion(opcode, rl_dest, rl_src[0]); |
| 520 | break; |
| 521 | |
| 522 | |
| 523 | case Instruction::ADD_INT: |
| 524 | case Instruction::ADD_INT_2ADDR: |
| 525 | case Instruction::MUL_INT: |
| 526 | case Instruction::MUL_INT_2ADDR: |
| 527 | case Instruction::AND_INT: |
| 528 | case Instruction::AND_INT_2ADDR: |
| 529 | case Instruction::OR_INT: |
| 530 | case Instruction::OR_INT_2ADDR: |
| 531 | case Instruction::XOR_INT: |
| 532 | case Instruction::XOR_INT_2ADDR: |
| 533 | if (rl_src[0].is_const && |
| 534 | InexpensiveConstantInt(mir_graph_->ConstantValue(rl_src[0]))) { |
| 535 | GenArithOpIntLit(opcode, rl_dest, rl_src[1], |
| 536 | mir_graph_->ConstantValue(rl_src[0].orig_sreg)); |
| 537 | } else if (rl_src[1].is_const && |
| 538 | InexpensiveConstantInt(mir_graph_->ConstantValue(rl_src[1]))) { |
| 539 | GenArithOpIntLit(opcode, rl_dest, rl_src[0], |
| 540 | mir_graph_->ConstantValue(rl_src[1].orig_sreg)); |
| 541 | } else { |
| 542 | GenArithOpInt(opcode, rl_dest, rl_src[0], rl_src[1]); |
| 543 | } |
| 544 | break; |
| 545 | |
| 546 | case Instruction::SUB_INT: |
| 547 | case Instruction::SUB_INT_2ADDR: |
| 548 | case Instruction::DIV_INT: |
| 549 | case Instruction::DIV_INT_2ADDR: |
| 550 | case Instruction::REM_INT: |
| 551 | case Instruction::REM_INT_2ADDR: |
| 552 | case Instruction::SHL_INT: |
| 553 | case Instruction::SHL_INT_2ADDR: |
| 554 | case Instruction::SHR_INT: |
| 555 | case Instruction::SHR_INT_2ADDR: |
| 556 | case Instruction::USHR_INT: |
| 557 | case Instruction::USHR_INT_2ADDR: |
| 558 | if (rl_src[1].is_const && |
| 559 | InexpensiveConstantInt(mir_graph_->ConstantValue(rl_src[1]))) { |
| 560 | GenArithOpIntLit(opcode, rl_dest, rl_src[0], mir_graph_->ConstantValue(rl_src[1])); |
| 561 | } else { |
| 562 | GenArithOpInt(opcode, rl_dest, rl_src[0], rl_src[1]); |
| 563 | } |
| 564 | break; |
| 565 | |
| 566 | case Instruction::ADD_LONG: |
| 567 | case Instruction::SUB_LONG: |
| 568 | case Instruction::AND_LONG: |
| 569 | case Instruction::OR_LONG: |
| 570 | case Instruction::XOR_LONG: |
| 571 | case Instruction::ADD_LONG_2ADDR: |
| 572 | case Instruction::SUB_LONG_2ADDR: |
| 573 | case Instruction::AND_LONG_2ADDR: |
| 574 | case Instruction::OR_LONG_2ADDR: |
| 575 | case Instruction::XOR_LONG_2ADDR: |
| 576 | if (rl_src[0].is_const || rl_src[1].is_const) { |
| 577 | GenArithImmOpLong(opcode, rl_dest, rl_src[0], rl_src[1]); |
| 578 | break; |
| 579 | } |
| 580 | // Note: intentional fallthrough. |
| 581 | |
| 582 | case Instruction::MUL_LONG: |
| 583 | case Instruction::DIV_LONG: |
| 584 | case Instruction::REM_LONG: |
| 585 | case Instruction::MUL_LONG_2ADDR: |
| 586 | case Instruction::DIV_LONG_2ADDR: |
| 587 | case Instruction::REM_LONG_2ADDR: |
| 588 | GenArithOpLong(opcode, rl_dest, rl_src[0], rl_src[1]); |
| 589 | break; |
| 590 | |
| 591 | case Instruction::SHL_LONG: |
| 592 | case Instruction::SHR_LONG: |
| 593 | case Instruction::USHR_LONG: |
| 594 | case Instruction::SHL_LONG_2ADDR: |
| 595 | case Instruction::SHR_LONG_2ADDR: |
| 596 | case Instruction::USHR_LONG_2ADDR: |
| 597 | if (rl_src[1].is_const) { |
| 598 | GenShiftImmOpLong(opcode, rl_dest, rl_src[0], rl_src[1]); |
| 599 | } else { |
| 600 | GenShiftOpLong(opcode, rl_dest, rl_src[0], rl_src[1]); |
| 601 | } |
| 602 | break; |
| 603 | |
| 604 | case Instruction::ADD_FLOAT: |
| 605 | case Instruction::SUB_FLOAT: |
| 606 | case Instruction::MUL_FLOAT: |
| 607 | case Instruction::DIV_FLOAT: |
| 608 | case Instruction::REM_FLOAT: |
| 609 | case Instruction::ADD_FLOAT_2ADDR: |
| 610 | case Instruction::SUB_FLOAT_2ADDR: |
| 611 | case Instruction::MUL_FLOAT_2ADDR: |
| 612 | case Instruction::DIV_FLOAT_2ADDR: |
| 613 | case Instruction::REM_FLOAT_2ADDR: |
| 614 | GenArithOpFloat(opcode, rl_dest, rl_src[0], rl_src[1]); |
| 615 | break; |
| 616 | |
| 617 | case Instruction::ADD_DOUBLE: |
| 618 | case Instruction::SUB_DOUBLE: |
| 619 | case Instruction::MUL_DOUBLE: |
| 620 | case Instruction::DIV_DOUBLE: |
| 621 | case Instruction::REM_DOUBLE: |
| 622 | case Instruction::ADD_DOUBLE_2ADDR: |
| 623 | case Instruction::SUB_DOUBLE_2ADDR: |
| 624 | case Instruction::MUL_DOUBLE_2ADDR: |
| 625 | case Instruction::DIV_DOUBLE_2ADDR: |
| 626 | case Instruction::REM_DOUBLE_2ADDR: |
| 627 | GenArithOpDouble(opcode, rl_dest, rl_src[0], rl_src[1]); |
| 628 | break; |
| 629 | |
| 630 | case Instruction::RSUB_INT: |
| 631 | case Instruction::ADD_INT_LIT16: |
| 632 | case Instruction::MUL_INT_LIT16: |
| 633 | case Instruction::DIV_INT_LIT16: |
| 634 | case Instruction::REM_INT_LIT16: |
| 635 | case Instruction::AND_INT_LIT16: |
| 636 | case Instruction::OR_INT_LIT16: |
| 637 | case Instruction::XOR_INT_LIT16: |
| 638 | case Instruction::ADD_INT_LIT8: |
| 639 | case Instruction::RSUB_INT_LIT8: |
| 640 | case Instruction::MUL_INT_LIT8: |
| 641 | case Instruction::DIV_INT_LIT8: |
| 642 | case Instruction::REM_INT_LIT8: |
| 643 | case Instruction::AND_INT_LIT8: |
| 644 | case Instruction::OR_INT_LIT8: |
| 645 | case Instruction::XOR_INT_LIT8: |
| 646 | case Instruction::SHL_INT_LIT8: |
| 647 | case Instruction::SHR_INT_LIT8: |
| 648 | case Instruction::USHR_INT_LIT8: |
| 649 | GenArithOpIntLit(opcode, rl_dest, rl_src[0], vC); |
| 650 | break; |
| 651 | |
| 652 | default: |
| 653 | LOG(FATAL) << "Unexpected opcode: " << opcode; |
| 654 | } |
Brian Carlstrom | 1895ea3 | 2013-07-18 13:28:37 -0700 | [diff] [blame] | 655 | } // NOLINT(readability/fn_size) |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 656 | |
| 657 | // Process extended MIR instructions |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 658 | void Mir2Lir::HandleExtendedMethodMIR(BasicBlock* bb, MIR* mir) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 659 | switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) { |
| 660 | case kMirOpCopy: { |
| 661 | RegLocation rl_src = mir_graph_->GetSrc(mir, 0); |
| 662 | RegLocation rl_dest = mir_graph_->GetDest(mir); |
| 663 | StoreValue(rl_dest, rl_src); |
| 664 | break; |
| 665 | } |
| 666 | case kMirOpFusedCmplFloat: |
| 667 | GenFusedFPCmpBranch(bb, mir, false /*gt bias*/, false /*double*/); |
| 668 | break; |
| 669 | case kMirOpFusedCmpgFloat: |
| 670 | GenFusedFPCmpBranch(bb, mir, true /*gt bias*/, false /*double*/); |
| 671 | break; |
| 672 | case kMirOpFusedCmplDouble: |
| 673 | GenFusedFPCmpBranch(bb, mir, false /*gt bias*/, true /*double*/); |
| 674 | break; |
| 675 | case kMirOpFusedCmpgDouble: |
| 676 | GenFusedFPCmpBranch(bb, mir, true /*gt bias*/, true /*double*/); |
| 677 | break; |
| 678 | case kMirOpFusedCmpLong: |
| 679 | GenFusedLongCmpBranch(bb, mir); |
| 680 | break; |
| 681 | case kMirOpSelect: |
| 682 | GenSelect(bb, mir); |
| 683 | break; |
| 684 | default: |
| 685 | break; |
| 686 | } |
| 687 | } |
| 688 | |
| 689 | // Handle the content in each basic block. |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 690 | bool Mir2Lir::MethodBlockCodeGen(BasicBlock* bb) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 691 | if (bb->block_type == kDead) return false; |
| 692 | current_dalvik_offset_ = bb->start_offset; |
| 693 | MIR* mir; |
| 694 | int block_id = bb->id; |
| 695 | |
| 696 | block_label_list_[block_id].operands[0] = bb->start_offset; |
| 697 | |
| 698 | // Insert the block label. |
| 699 | block_label_list_[block_id].opcode = kPseudoNormalBlockLabel; |
buzbee | b48819d | 2013-09-14 16:15:25 -0700 | [diff] [blame^] | 700 | block_label_list_[block_id].flags.fixup = kFixupLabel; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 701 | AppendLIR(&block_label_list_[block_id]); |
| 702 | |
| 703 | LIR* head_lir = NULL; |
| 704 | |
| 705 | // If this is a catch block, export the start address. |
| 706 | if (bb->catch_entry) { |
| 707 | head_lir = NewLIR0(kPseudoExportedPC); |
| 708 | } |
| 709 | |
| 710 | // Free temp registers and reset redundant store tracking. |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 711 | ClobberAllRegs(); |
| 712 | |
| 713 | if (bb->block_type == kEntryBlock) { |
buzbee | 56c7178 | 2013-09-05 17:13:19 -0700 | [diff] [blame] | 714 | ResetRegPool(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 715 | int start_vreg = cu_->num_dalvik_registers - cu_->num_ins; |
| 716 | GenEntrySequence(&mir_graph_->reg_location_[start_vreg], |
| 717 | mir_graph_->reg_location_[mir_graph_->GetMethodSReg()]); |
| 718 | } else if (bb->block_type == kExitBlock) { |
buzbee | 56c7178 | 2013-09-05 17:13:19 -0700 | [diff] [blame] | 719 | ResetRegPool(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 720 | GenExitSequence(); |
| 721 | } |
| 722 | |
| 723 | for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { |
| 724 | ResetRegPool(); |
| 725 | if (cu_->disable_opt & (1 << kTrackLiveTemps)) { |
| 726 | ClobberAllRegs(); |
| 727 | } |
| 728 | |
| 729 | if (cu_->disable_opt & (1 << kSuppressLoads)) { |
| 730 | ResetDefTracking(); |
| 731 | } |
| 732 | |
| 733 | // Reset temp tracking sanity check. |
| 734 | if (kIsDebugBuild) { |
| 735 | live_sreg_ = INVALID_SREG; |
| 736 | } |
| 737 | |
| 738 | current_dalvik_offset_ = mir->offset; |
| 739 | int opcode = mir->dalvikInsn.opcode; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 740 | |
| 741 | // Mark the beginning of a Dalvik instruction for line tracking. |
buzbee | 252254b | 2013-09-08 16:20:53 -0700 | [diff] [blame] | 742 | if (cu_->verbose) { |
| 743 | char* inst_str = mir_graph_->GetDalvikDisassembly(mir); |
| 744 | MarkBoundary(mir->offset, inst_str); |
| 745 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 746 | // Remember the first LIR for this block. |
| 747 | if (head_lir == NULL) { |
buzbee | 252254b | 2013-09-08 16:20:53 -0700 | [diff] [blame] | 748 | head_lir = &block_label_list_[bb->id]; |
| 749 | // Set the first label as a scheduling barrier. |
buzbee | b48819d | 2013-09-14 16:15:25 -0700 | [diff] [blame^] | 750 | DCHECK(!head_lir->flags.use_def_invalid); |
| 751 | head_lir->u.m.def_mask = ENCODE_ALL; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 752 | } |
| 753 | |
| 754 | if (opcode == kMirOpCheck) { |
| 755 | // Combine check and work halves of throwing instruction. |
| 756 | MIR* work_half = mir->meta.throw_insn; |
| 757 | mir->dalvikInsn.opcode = work_half->dalvikInsn.opcode; |
| 758 | opcode = work_half->dalvikInsn.opcode; |
| 759 | SSARepresentation* ssa_rep = work_half->ssa_rep; |
| 760 | work_half->ssa_rep = mir->ssa_rep; |
| 761 | mir->ssa_rep = ssa_rep; |
| 762 | work_half->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpCheckPart2); |
| 763 | } |
| 764 | |
| 765 | if (opcode >= kMirOpFirst) { |
| 766 | HandleExtendedMethodMIR(bb, mir); |
| 767 | continue; |
| 768 | } |
| 769 | |
| 770 | CompileDalvikInstruction(mir, bb, block_label_list_); |
| 771 | } |
| 772 | |
| 773 | if (head_lir) { |
| 774 | // Eliminate redundant loads/stores and delay stores into later slots. |
| 775 | ApplyLocalOptimizations(head_lir, last_lir_insn_); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 776 | } |
| 777 | return false; |
| 778 | } |
| 779 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 780 | void Mir2Lir::SpecialMIR2LIR(SpecialCaseHandler special_case) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 781 | // Find the first DalvikByteCode block. |
| 782 | int num_reachable_blocks = mir_graph_->GetNumReachableBlocks(); |
| 783 | BasicBlock*bb = NULL; |
| 784 | for (int idx = 0; idx < num_reachable_blocks; idx++) { |
| 785 | // TODO: no direct access of growable lists. |
| 786 | int dfs_index = mir_graph_->GetDfsOrder()->Get(idx); |
| 787 | bb = mir_graph_->GetBasicBlock(dfs_index); |
| 788 | if (bb->block_type == kDalvikByteCode) { |
| 789 | break; |
| 790 | } |
| 791 | } |
| 792 | if (bb == NULL) { |
| 793 | return; |
| 794 | } |
| 795 | DCHECK_EQ(bb->start_offset, 0); |
| 796 | DCHECK(bb->first_mir_insn != NULL); |
| 797 | |
| 798 | // Get the first instruction. |
| 799 | MIR* mir = bb->first_mir_insn; |
| 800 | |
| 801 | // Free temp registers and reset redundant store tracking. |
| 802 | ResetRegPool(); |
| 803 | ResetDefTracking(); |
| 804 | ClobberAllRegs(); |
| 805 | |
| 806 | GenSpecialCase(bb, mir, special_case); |
| 807 | } |
| 808 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 809 | void Mir2Lir::MethodMIR2LIR() { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 810 | // Hold the labels of each block. |
| 811 | block_label_list_ = |
Mathieu Chartier | f6c4b3b | 2013-08-24 16:11:37 -0700 | [diff] [blame] | 812 | static_cast<LIR*>(arena_->Alloc(sizeof(LIR) * mir_graph_->GetNumBlocks(), |
| 813 | ArenaAllocator::kAllocLIR)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 814 | |
buzbee | 56c7178 | 2013-09-05 17:13:19 -0700 | [diff] [blame] | 815 | PreOrderDfsIterator iter(mir_graph_); |
buzbee | 252254b | 2013-09-08 16:20:53 -0700 | [diff] [blame] | 816 | BasicBlock* curr_bb = iter.Next(); |
| 817 | BasicBlock* next_bb = iter.Next(); |
| 818 | while (curr_bb != NULL) { |
| 819 | MethodBlockCodeGen(curr_bb); |
| 820 | // If the fall_through block is no longer laid out consecutively, drop in a branch. |
| 821 | if ((curr_bb->fall_through != NULL) && (curr_bb->fall_through != next_bb)) { |
| 822 | OpUnconditionalBranch(&block_label_list_[curr_bb->fall_through->id]); |
| 823 | } |
| 824 | curr_bb = next_bb; |
| 825 | do { |
| 826 | next_bb = iter.Next(); |
| 827 | } while ((next_bb != NULL) && (next_bb->block_type == kDead)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 828 | } |
| 829 | |
| 830 | HandleSuspendLaunchPads(); |
| 831 | |
| 832 | HandleThrowLaunchPads(); |
| 833 | |
| 834 | HandleIntrinsicLaunchPads(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 835 | } |
| 836 | |
| 837 | } // namespace art |