buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include "compiler_internals.h" |
| 18 | #include "local_value_numbering.h" |
Ian Rogers | 8d3a117 | 2013-06-04 01:13:28 -0700 | [diff] [blame] | 19 | #include "dataflow_iterator-inl.h" |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 20 | |
| 21 | namespace art { |
| 22 | |
| 23 | /* |
| 24 | * Main table containing data flow attributes for each bytecode. The |
| 25 | * first kNumPackedOpcodes entries are for Dalvik bytecode |
| 26 | * instructions, where extended opcode at the MIR level are appended |
| 27 | * afterwards. |
| 28 | * |
| 29 | * TODO - many optimization flags are incomplete - they will only limit the |
| 30 | * scope of optimizations but will not cause mis-optimizations. |
| 31 | */ |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 32 | const uint64_t MIRGraph::oat_data_flow_attributes_[kMirOpLast] = { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 33 | // 00 NOP |
| 34 | DF_NOP, |
| 35 | |
| 36 | // 01 MOVE vA, vB |
| 37 | DF_DA | DF_UB | DF_IS_MOVE, |
| 38 | |
| 39 | // 02 MOVE_FROM16 vAA, vBBBB |
| 40 | DF_DA | DF_UB | DF_IS_MOVE, |
| 41 | |
| 42 | // 03 MOVE_16 vAAAA, vBBBB |
| 43 | DF_DA | DF_UB | DF_IS_MOVE, |
| 44 | |
| 45 | // 04 MOVE_WIDE vA, vB |
| 46 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE, |
| 47 | |
| 48 | // 05 MOVE_WIDE_FROM16 vAA, vBBBB |
| 49 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE, |
| 50 | |
| 51 | // 06 MOVE_WIDE_16 vAAAA, vBBBB |
| 52 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE, |
| 53 | |
| 54 | // 07 MOVE_OBJECT vA, vB |
| 55 | DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B, |
| 56 | |
| 57 | // 08 MOVE_OBJECT_FROM16 vAA, vBBBB |
| 58 | DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B, |
| 59 | |
| 60 | // 09 MOVE_OBJECT_16 vAAAA, vBBBB |
| 61 | DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B, |
| 62 | |
| 63 | // 0A MOVE_RESULT vAA |
| 64 | DF_DA, |
| 65 | |
| 66 | // 0B MOVE_RESULT_WIDE vAA |
| 67 | DF_DA | DF_A_WIDE, |
| 68 | |
| 69 | // 0C MOVE_RESULT_OBJECT vAA |
| 70 | DF_DA | DF_REF_A, |
| 71 | |
| 72 | // 0D MOVE_EXCEPTION vAA |
Ian Rogers | fa7809f | 2013-06-13 11:15:15 -0700 | [diff] [blame] | 73 | DF_DA | DF_REF_A | DF_NON_NULL_DST, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 74 | |
| 75 | // 0E RETURN_VOID |
| 76 | DF_NOP, |
| 77 | |
| 78 | // 0F RETURN vAA |
| 79 | DF_UA, |
| 80 | |
| 81 | // 10 RETURN_WIDE vAA |
| 82 | DF_UA | DF_A_WIDE, |
| 83 | |
| 84 | // 11 RETURN_OBJECT vAA |
| 85 | DF_UA | DF_REF_A, |
| 86 | |
| 87 | // 12 CONST_4 vA, #+B |
| 88 | DF_DA | DF_SETS_CONST, |
| 89 | |
| 90 | // 13 CONST_16 vAA, #+BBBB |
| 91 | DF_DA | DF_SETS_CONST, |
| 92 | |
| 93 | // 14 CONST vAA, #+BBBBBBBB |
| 94 | DF_DA | DF_SETS_CONST, |
| 95 | |
| 96 | // 15 CONST_HIGH16 VAA, #+BBBB0000 |
| 97 | DF_DA | DF_SETS_CONST, |
| 98 | |
| 99 | // 16 CONST_WIDE_16 vAA, #+BBBB |
| 100 | DF_DA | DF_A_WIDE | DF_SETS_CONST, |
| 101 | |
| 102 | // 17 CONST_WIDE_32 vAA, #+BBBBBBBB |
| 103 | DF_DA | DF_A_WIDE | DF_SETS_CONST, |
| 104 | |
| 105 | // 18 CONST_WIDE vAA, #+BBBBBBBBBBBBBBBB |
| 106 | DF_DA | DF_A_WIDE | DF_SETS_CONST, |
| 107 | |
| 108 | // 19 CONST_WIDE_HIGH16 vAA, #+BBBB000000000000 |
| 109 | DF_DA | DF_A_WIDE | DF_SETS_CONST, |
| 110 | |
| 111 | // 1A CONST_STRING vAA, string@BBBB |
Ian Rogers | fa7809f | 2013-06-13 11:15:15 -0700 | [diff] [blame] | 112 | DF_DA | DF_REF_A | DF_NON_NULL_DST, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 113 | |
| 114 | // 1B CONST_STRING_JUMBO vAA, string@BBBBBBBB |
Ian Rogers | fa7809f | 2013-06-13 11:15:15 -0700 | [diff] [blame] | 115 | DF_DA | DF_REF_A | DF_NON_NULL_DST, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 116 | |
| 117 | // 1C CONST_CLASS vAA, type@BBBB |
Ian Rogers | fa7809f | 2013-06-13 11:15:15 -0700 | [diff] [blame] | 118 | DF_DA | DF_REF_A | DF_NON_NULL_DST, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 119 | |
| 120 | // 1D MONITOR_ENTER vAA |
| 121 | DF_UA | DF_NULL_CHK_0 | DF_REF_A, |
| 122 | |
| 123 | // 1E MONITOR_EXIT vAA |
| 124 | DF_UA | DF_NULL_CHK_0 | DF_REF_A, |
| 125 | |
| 126 | // 1F CHK_CAST vAA, type@BBBB |
| 127 | DF_UA | DF_REF_A | DF_UMS, |
| 128 | |
| 129 | // 20 INSTANCE_OF vA, vB, type@CCCC |
| 130 | DF_DA | DF_UB | DF_CORE_A | DF_REF_B | DF_UMS, |
| 131 | |
| 132 | // 21 ARRAY_LENGTH vA, vB |
| 133 | DF_DA | DF_UB | DF_NULL_CHK_0 | DF_CORE_A | DF_REF_B, |
| 134 | |
| 135 | // 22 NEW_INSTANCE vAA, type@BBBB |
| 136 | DF_DA | DF_NON_NULL_DST | DF_REF_A | DF_UMS, |
| 137 | |
| 138 | // 23 NEW_ARRAY vA, vB, type@CCCC |
| 139 | DF_DA | DF_UB | DF_NON_NULL_DST | DF_REF_A | DF_CORE_B | DF_UMS, |
| 140 | |
| 141 | // 24 FILLED_NEW_ARRAY {vD, vE, vF, vG, vA} |
| 142 | DF_FORMAT_35C | DF_NON_NULL_RET | DF_UMS, |
| 143 | |
| 144 | // 25 FILLED_NEW_ARRAY_RANGE {vCCCC .. vNNNN}, type@BBBB |
| 145 | DF_FORMAT_3RC | DF_NON_NULL_RET | DF_UMS, |
| 146 | |
| 147 | // 26 FILL_ARRAY_DATA vAA, +BBBBBBBB |
| 148 | DF_UA | DF_REF_A | DF_UMS, |
| 149 | |
| 150 | // 27 THROW vAA |
| 151 | DF_UA | DF_REF_A | DF_UMS, |
| 152 | |
| 153 | // 28 GOTO |
| 154 | DF_NOP, |
| 155 | |
| 156 | // 29 GOTO_16 |
| 157 | DF_NOP, |
| 158 | |
| 159 | // 2A GOTO_32 |
| 160 | DF_NOP, |
| 161 | |
| 162 | // 2B PACKED_SWITCH vAA, +BBBBBBBB |
| 163 | DF_UA, |
| 164 | |
| 165 | // 2C SPARSE_SWITCH vAA, +BBBBBBBB |
| 166 | DF_UA, |
| 167 | |
| 168 | // 2D CMPL_FLOAT vAA, vBB, vCC |
| 169 | DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A, |
| 170 | |
| 171 | // 2E CMPG_FLOAT vAA, vBB, vCC |
| 172 | DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A, |
| 173 | |
| 174 | // 2F CMPL_DOUBLE vAA, vBB, vCC |
| 175 | DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A, |
| 176 | |
| 177 | // 30 CMPG_DOUBLE vAA, vBB, vCC |
| 178 | DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A, |
| 179 | |
| 180 | // 31 CMP_LONG vAA, vBB, vCC |
| 181 | DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 182 | |
| 183 | // 32 IF_EQ vA, vB, +CCCC |
| 184 | DF_UA | DF_UB, |
| 185 | |
| 186 | // 33 IF_NE vA, vB, +CCCC |
| 187 | DF_UA | DF_UB, |
| 188 | |
| 189 | // 34 IF_LT vA, vB, +CCCC |
| 190 | DF_UA | DF_UB, |
| 191 | |
| 192 | // 35 IF_GE vA, vB, +CCCC |
| 193 | DF_UA | DF_UB, |
| 194 | |
| 195 | // 36 IF_GT vA, vB, +CCCC |
| 196 | DF_UA | DF_UB, |
| 197 | |
| 198 | // 37 IF_LE vA, vB, +CCCC |
| 199 | DF_UA | DF_UB, |
| 200 | |
| 201 | // 38 IF_EQZ vAA, +BBBB |
| 202 | DF_UA, |
| 203 | |
| 204 | // 39 IF_NEZ vAA, +BBBB |
| 205 | DF_UA, |
| 206 | |
| 207 | // 3A IF_LTZ vAA, +BBBB |
| 208 | DF_UA, |
| 209 | |
| 210 | // 3B IF_GEZ vAA, +BBBB |
| 211 | DF_UA, |
| 212 | |
| 213 | // 3C IF_GTZ vAA, +BBBB |
| 214 | DF_UA, |
| 215 | |
| 216 | // 3D IF_LEZ vAA, +BBBB |
| 217 | DF_UA, |
| 218 | |
| 219 | // 3E UNUSED_3E |
| 220 | DF_NOP, |
| 221 | |
| 222 | // 3F UNUSED_3F |
| 223 | DF_NOP, |
| 224 | |
| 225 | // 40 UNUSED_40 |
| 226 | DF_NOP, |
| 227 | |
| 228 | // 41 UNUSED_41 |
| 229 | DF_NOP, |
| 230 | |
| 231 | // 42 UNUSED_42 |
| 232 | DF_NOP, |
| 233 | |
| 234 | // 43 UNUSED_43 |
| 235 | DF_NOP, |
| 236 | |
| 237 | // 44 AGET vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 238 | DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 239 | |
| 240 | // 45 AGET_WIDE vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 241 | DF_DA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 242 | |
| 243 | // 46 AGET_OBJECT vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 244 | DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_A | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 245 | |
| 246 | // 47 AGET_BOOLEAN vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 247 | DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 248 | |
| 249 | // 48 AGET_BYTE vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 250 | DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 251 | |
| 252 | // 49 AGET_CHAR vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 253 | DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 254 | |
| 255 | // 4A AGET_SHORT vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 256 | DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 257 | |
| 258 | // 4B APUT vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 259 | DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 260 | |
| 261 | // 4C APUT_WIDE vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 262 | DF_UA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_2 | DF_RANGE_CHK_3 | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 263 | |
| 264 | // 4D APUT_OBJECT vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 265 | DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_A | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 266 | |
| 267 | // 4E APUT_BOOLEAN vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 268 | DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 269 | |
| 270 | // 4F APUT_BYTE vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 271 | DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 272 | |
| 273 | // 50 APUT_CHAR vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 274 | DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 275 | |
| 276 | // 51 APUT_SHORT vAA, vBB, vCC |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 277 | DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 278 | |
| 279 | // 52 IGET vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 280 | DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 281 | |
| 282 | // 53 IGET_WIDE vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 283 | DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 284 | |
| 285 | // 54 IGET_OBJECT vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 286 | DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 287 | |
| 288 | // 55 IGET_BOOLEAN vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 289 | DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 290 | |
| 291 | // 56 IGET_BYTE vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 292 | DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 293 | |
| 294 | // 57 IGET_CHAR vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 295 | DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 296 | |
| 297 | // 58 IGET_SHORT vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 298 | DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 299 | |
| 300 | // 59 IPUT vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 301 | DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 302 | |
| 303 | // 5A IPUT_WIDE vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 304 | DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 305 | |
| 306 | // 5B IPUT_OBJECT vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 307 | DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 308 | |
| 309 | // 5C IPUT_BOOLEAN vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 310 | DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 311 | |
| 312 | // 5D IPUT_BYTE vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 313 | DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 314 | |
| 315 | // 5E IPUT_CHAR vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 316 | DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 317 | |
| 318 | // 5F IPUT_SHORT vA, vB, field@CCCC |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 319 | DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 320 | |
| 321 | // 60 SGET vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 322 | DF_DA | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 323 | |
| 324 | // 61 SGET_WIDE vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 325 | DF_DA | DF_A_WIDE | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 326 | |
| 327 | // 62 SGET_OBJECT vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 328 | DF_DA | DF_REF_A | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 329 | |
| 330 | // 63 SGET_BOOLEAN vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 331 | DF_DA | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 332 | |
| 333 | // 64 SGET_BYTE vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 334 | DF_DA | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 335 | |
| 336 | // 65 SGET_CHAR vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 337 | DF_DA | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 338 | |
| 339 | // 66 SGET_SHORT vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 340 | DF_DA | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 341 | |
| 342 | // 67 SPUT vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 343 | DF_UA | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 344 | |
| 345 | // 68 SPUT_WIDE vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 346 | DF_UA | DF_A_WIDE | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 347 | |
| 348 | // 69 SPUT_OBJECT vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 349 | DF_UA | DF_REF_A | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 350 | |
| 351 | // 6A SPUT_BOOLEAN vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 352 | DF_UA | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 353 | |
| 354 | // 6B SPUT_BYTE vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 355 | DF_UA | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 356 | |
| 357 | // 6C SPUT_CHAR vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 358 | DF_UA | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 359 | |
| 360 | // 6D SPUT_SHORT vAA, field@BBBB |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 361 | DF_UA | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 362 | |
| 363 | // 6E INVOKE_VIRTUAL {vD, vE, vF, vG, vA} |
| 364 | DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS, |
| 365 | |
| 366 | // 6F INVOKE_SUPER {vD, vE, vF, vG, vA} |
| 367 | DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS, |
| 368 | |
| 369 | // 70 INVOKE_DIRECT {vD, vE, vF, vG, vA} |
| 370 | DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS, |
| 371 | |
| 372 | // 71 INVOKE_STATIC {vD, vE, vF, vG, vA} |
| 373 | DF_FORMAT_35C | DF_UMS, |
| 374 | |
| 375 | // 72 INVOKE_INTERFACE {vD, vE, vF, vG, vA} |
Sebastien Hertz | 67ce9b0 | 2013-07-11 14:31:18 +0200 | [diff] [blame] | 376 | DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 377 | |
| 378 | // 73 UNUSED_73 |
| 379 | DF_NOP, |
| 380 | |
| 381 | // 74 INVOKE_VIRTUAL_RANGE {vCCCC .. vNNNN} |
| 382 | DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS, |
| 383 | |
| 384 | // 75 INVOKE_SUPER_RANGE {vCCCC .. vNNNN} |
| 385 | DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS, |
| 386 | |
| 387 | // 76 INVOKE_DIRECT_RANGE {vCCCC .. vNNNN} |
| 388 | DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS, |
| 389 | |
| 390 | // 77 INVOKE_STATIC_RANGE {vCCCC .. vNNNN} |
| 391 | DF_FORMAT_3RC | DF_UMS, |
| 392 | |
| 393 | // 78 INVOKE_INTERFACE_RANGE {vCCCC .. vNNNN} |
Sebastien Hertz | 67ce9b0 | 2013-07-11 14:31:18 +0200 | [diff] [blame] | 394 | DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 395 | |
| 396 | // 79 UNUSED_79 |
| 397 | DF_NOP, |
| 398 | |
| 399 | // 7A UNUSED_7A |
| 400 | DF_NOP, |
| 401 | |
| 402 | // 7B NEG_INT vA, vB |
| 403 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 404 | |
| 405 | // 7C NOT_INT vA, vB |
| 406 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 407 | |
| 408 | // 7D NEG_LONG vA, vB |
| 409 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B, |
| 410 | |
| 411 | // 7E NOT_LONG vA, vB |
| 412 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B, |
| 413 | |
| 414 | // 7F NEG_FLOAT vA, vB |
| 415 | DF_DA | DF_UB | DF_FP_A | DF_FP_B, |
| 416 | |
| 417 | // 80 NEG_DOUBLE vA, vB |
| 418 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B, |
| 419 | |
| 420 | // 81 INT_TO_LONG vA, vB |
| 421 | DF_DA | DF_A_WIDE | DF_UB | DF_CORE_A | DF_CORE_B, |
| 422 | |
| 423 | // 82 INT_TO_FLOAT vA, vB |
| 424 | DF_DA | DF_UB | DF_FP_A | DF_CORE_B, |
| 425 | |
| 426 | // 83 INT_TO_DOUBLE vA, vB |
| 427 | DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_CORE_B, |
| 428 | |
| 429 | // 84 LONG_TO_INT vA, vB |
| 430 | DF_DA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B, |
| 431 | |
| 432 | // 85 LONG_TO_FLOAT vA, vB |
| 433 | DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B, |
| 434 | |
| 435 | // 86 LONG_TO_DOUBLE vA, vB |
| 436 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B, |
| 437 | |
| 438 | // 87 FLOAT_TO_INT vA, vB |
| 439 | DF_DA | DF_UB | DF_FP_B | DF_CORE_A, |
| 440 | |
| 441 | // 88 FLOAT_TO_LONG vA, vB |
| 442 | DF_DA | DF_A_WIDE | DF_UB | DF_FP_B | DF_CORE_A, |
| 443 | |
| 444 | // 89 FLOAT_TO_DOUBLE vA, vB |
| 445 | DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_FP_B, |
| 446 | |
| 447 | // 8A DOUBLE_TO_INT vA, vB |
| 448 | DF_DA | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A, |
| 449 | |
| 450 | // 8B DOUBLE_TO_LONG vA, vB |
| 451 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A, |
| 452 | |
| 453 | // 8C DOUBLE_TO_FLOAT vA, vB |
| 454 | DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B, |
| 455 | |
| 456 | // 8D INT_TO_BYTE vA, vB |
| 457 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 458 | |
| 459 | // 8E INT_TO_CHAR vA, vB |
| 460 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 461 | |
| 462 | // 8F INT_TO_SHORT vA, vB |
| 463 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 464 | |
| 465 | // 90 ADD_INT vAA, vBB, vCC |
| 466 | DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 467 | |
| 468 | // 91 SUB_INT vAA, vBB, vCC |
| 469 | DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 470 | |
| 471 | // 92 MUL_INT vAA, vBB, vCC |
| 472 | DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 473 | |
| 474 | // 93 DIV_INT vAA, vBB, vCC |
| 475 | DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 476 | |
| 477 | // 94 REM_INT vAA, vBB, vCC |
| 478 | DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 479 | |
| 480 | // 95 AND_INT vAA, vBB, vCC |
| 481 | DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 482 | |
| 483 | // 96 OR_INT vAA, vBB, vCC |
| 484 | DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 485 | |
| 486 | // 97 XOR_INT vAA, vBB, vCC |
| 487 | DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 488 | |
| 489 | // 98 SHL_INT vAA, vBB, vCC |
| 490 | DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 491 | |
| 492 | // 99 SHR_INT vAA, vBB, vCC |
| 493 | DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 494 | |
| 495 | // 9A USHR_INT vAA, vBB, vCC |
| 496 | DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 497 | |
| 498 | // 9B ADD_LONG vAA, vBB, vCC |
| 499 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 500 | |
| 501 | // 9C SUB_LONG vAA, vBB, vCC |
| 502 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 503 | |
| 504 | // 9D MUL_LONG vAA, vBB, vCC |
| 505 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 506 | |
| 507 | // 9E DIV_LONG vAA, vBB, vCC |
| 508 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 509 | |
| 510 | // 9F REM_LONG vAA, vBB, vCC |
| 511 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 512 | |
| 513 | // A0 AND_LONG vAA, vBB, vCC |
| 514 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 515 | |
| 516 | // A1 OR_LONG vAA, vBB, vCC |
| 517 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 518 | |
| 519 | // A2 XOR_LONG vAA, vBB, vCC |
| 520 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 521 | |
| 522 | // A3 SHL_LONG vAA, vBB, vCC |
| 523 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 524 | |
| 525 | // A4 SHR_LONG vAA, vBB, vCC |
| 526 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 527 | |
| 528 | // A5 USHR_LONG vAA, vBB, vCC |
| 529 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C, |
| 530 | |
| 531 | // A6 ADD_FLOAT vAA, vBB, vCC |
| 532 | DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C, |
| 533 | |
| 534 | // A7 SUB_FLOAT vAA, vBB, vCC |
| 535 | DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C, |
| 536 | |
| 537 | // A8 MUL_FLOAT vAA, vBB, vCC |
| 538 | DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C, |
| 539 | |
| 540 | // A9 DIV_FLOAT vAA, vBB, vCC |
| 541 | DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C, |
| 542 | |
| 543 | // AA REM_FLOAT vAA, vBB, vCC |
| 544 | DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C, |
| 545 | |
| 546 | // AB ADD_DOUBLE vAA, vBB, vCC |
| 547 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C, |
| 548 | |
| 549 | // AC SUB_DOUBLE vAA, vBB, vCC |
| 550 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C, |
| 551 | |
| 552 | // AD MUL_DOUBLE vAA, vBB, vCC |
| 553 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C, |
| 554 | |
| 555 | // AE DIV_DOUBLE vAA, vBB, vCC |
| 556 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C, |
| 557 | |
| 558 | // AF REM_DOUBLE vAA, vBB, vCC |
| 559 | DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C, |
| 560 | |
| 561 | // B0 ADD_INT_2ADDR vA, vB |
| 562 | DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 563 | |
| 564 | // B1 SUB_INT_2ADDR vA, vB |
| 565 | DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 566 | |
| 567 | // B2 MUL_INT_2ADDR vA, vB |
| 568 | DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 569 | |
| 570 | // B3 DIV_INT_2ADDR vA, vB |
| 571 | DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 572 | |
| 573 | // B4 REM_INT_2ADDR vA, vB |
| 574 | DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 575 | |
| 576 | // B5 AND_INT_2ADDR vA, vB |
| 577 | DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 578 | |
| 579 | // B6 OR_INT_2ADDR vA, vB |
| 580 | DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 581 | |
| 582 | // B7 XOR_INT_2ADDR vA, vB |
| 583 | DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 584 | |
| 585 | // B8 SHL_INT_2ADDR vA, vB |
| 586 | DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 587 | |
| 588 | // B9 SHR_INT_2ADDR vA, vB |
| 589 | DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 590 | |
| 591 | // BA USHR_INT_2ADDR vA, vB |
| 592 | DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 593 | |
| 594 | // BB ADD_LONG_2ADDR vA, vB |
| 595 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B, |
| 596 | |
| 597 | // BC SUB_LONG_2ADDR vA, vB |
| 598 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B, |
| 599 | |
| 600 | // BD MUL_LONG_2ADDR vA, vB |
| 601 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B, |
| 602 | |
| 603 | // BE DIV_LONG_2ADDR vA, vB |
| 604 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B, |
| 605 | |
| 606 | // BF REM_LONG_2ADDR vA, vB |
| 607 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B, |
| 608 | |
| 609 | // C0 AND_LONG_2ADDR vA, vB |
| 610 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B, |
| 611 | |
| 612 | // C1 OR_LONG_2ADDR vA, vB |
| 613 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B, |
| 614 | |
| 615 | // C2 XOR_LONG_2ADDR vA, vB |
| 616 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B, |
| 617 | |
| 618 | // C3 SHL_LONG_2ADDR vA, vB |
| 619 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 620 | |
| 621 | // C4 SHR_LONG_2ADDR vA, vB |
| 622 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 623 | |
| 624 | // C5 USHR_LONG_2ADDR vA, vB |
| 625 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 626 | |
| 627 | // C6 ADD_FLOAT_2ADDR vA, vB |
| 628 | DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B, |
| 629 | |
| 630 | // C7 SUB_FLOAT_2ADDR vA, vB |
| 631 | DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B, |
| 632 | |
| 633 | // C8 MUL_FLOAT_2ADDR vA, vB |
| 634 | DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B, |
| 635 | |
| 636 | // C9 DIV_FLOAT_2ADDR vA, vB |
| 637 | DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B, |
| 638 | |
| 639 | // CA REM_FLOAT_2ADDR vA, vB |
| 640 | DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B, |
| 641 | |
| 642 | // CB ADD_DOUBLE_2ADDR vA, vB |
| 643 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B, |
| 644 | |
| 645 | // CC SUB_DOUBLE_2ADDR vA, vB |
| 646 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B, |
| 647 | |
| 648 | // CD MUL_DOUBLE_2ADDR vA, vB |
| 649 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B, |
| 650 | |
| 651 | // CE DIV_DOUBLE_2ADDR vA, vB |
| 652 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B, |
| 653 | |
| 654 | // CF REM_DOUBLE_2ADDR vA, vB |
| 655 | DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B, |
| 656 | |
| 657 | // D0 ADD_INT_LIT16 vA, vB, #+CCCC |
| 658 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 659 | |
| 660 | // D1 RSUB_INT vA, vB, #+CCCC |
| 661 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 662 | |
| 663 | // D2 MUL_INT_LIT16 vA, vB, #+CCCC |
| 664 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 665 | |
| 666 | // D3 DIV_INT_LIT16 vA, vB, #+CCCC |
| 667 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 668 | |
| 669 | // D4 REM_INT_LIT16 vA, vB, #+CCCC |
| 670 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 671 | |
| 672 | // D5 AND_INT_LIT16 vA, vB, #+CCCC |
| 673 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 674 | |
| 675 | // D6 OR_INT_LIT16 vA, vB, #+CCCC |
| 676 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 677 | |
| 678 | // D7 XOR_INT_LIT16 vA, vB, #+CCCC |
| 679 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 680 | |
| 681 | // D8 ADD_INT_LIT8 vAA, vBB, #+CC |
| 682 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 683 | |
| 684 | // D9 RSUB_INT_LIT8 vAA, vBB, #+CC |
| 685 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 686 | |
| 687 | // DA MUL_INT_LIT8 vAA, vBB, #+CC |
| 688 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 689 | |
| 690 | // DB DIV_INT_LIT8 vAA, vBB, #+CC |
| 691 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 692 | |
| 693 | // DC REM_INT_LIT8 vAA, vBB, #+CC |
| 694 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 695 | |
| 696 | // DD AND_INT_LIT8 vAA, vBB, #+CC |
| 697 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 698 | |
| 699 | // DE OR_INT_LIT8 vAA, vBB, #+CC |
| 700 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 701 | |
| 702 | // DF XOR_INT_LIT8 vAA, vBB, #+CC |
| 703 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 704 | |
| 705 | // E0 SHL_INT_LIT8 vAA, vBB, #+CC |
| 706 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 707 | |
| 708 | // E1 SHR_INT_LIT8 vAA, vBB, #+CC |
| 709 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 710 | |
| 711 | // E2 USHR_INT_LIT8 vAA, vBB, #+CC |
| 712 | DF_DA | DF_UB | DF_CORE_A | DF_CORE_B, |
| 713 | |
| 714 | // E3 IGET_VOLATILE |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 715 | DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 716 | |
| 717 | // E4 IPUT_VOLATILE |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 718 | DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 719 | |
| 720 | // E5 SGET_VOLATILE |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 721 | DF_DA | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 722 | |
| 723 | // E6 SPUT_VOLATILE |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 724 | DF_UA | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 725 | |
| 726 | // E7 IGET_OBJECT_VOLATILE |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 727 | DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 728 | |
| 729 | // E8 IGET_WIDE_VOLATILE |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 730 | DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 731 | |
| 732 | // E9 IPUT_WIDE_VOLATILE |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 733 | DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 734 | |
| 735 | // EA SGET_WIDE_VOLATILE |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 736 | DF_DA | DF_A_WIDE | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 737 | |
| 738 | // EB SPUT_WIDE_VOLATILE |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 739 | DF_UA | DF_A_WIDE | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 740 | |
| 741 | // EC BREAKPOINT |
| 742 | DF_NOP, |
| 743 | |
| 744 | // ED THROW_VERIFICATION_ERROR |
| 745 | DF_NOP | DF_UMS, |
| 746 | |
| 747 | // EE EXECUTE_INLINE |
| 748 | DF_FORMAT_35C, |
| 749 | |
| 750 | // EF EXECUTE_INLINE_RANGE |
| 751 | DF_FORMAT_3RC, |
| 752 | |
| 753 | // F0 INVOKE_OBJECT_INIT_RANGE |
| 754 | DF_NOP | DF_NULL_CHK_0, |
| 755 | |
| 756 | // F1 RETURN_VOID_BARRIER |
| 757 | DF_NOP, |
| 758 | |
| 759 | // F2 IGET_QUICK |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 760 | DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 761 | |
| 762 | // F3 IGET_WIDE_QUICK |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 763 | DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 764 | |
| 765 | // F4 IGET_OBJECT_QUICK |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 766 | DF_DA | DF_UB | DF_NULL_CHK_0 | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 767 | |
| 768 | // F5 IPUT_QUICK |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 769 | DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 770 | |
| 771 | // F6 IPUT_WIDE_QUICK |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 772 | DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 773 | |
| 774 | // F7 IPUT_OBJECT_QUICK |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 775 | DF_UA | DF_UB | DF_NULL_CHK_1 | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 776 | |
| 777 | // F8 INVOKE_VIRTUAL_QUICK |
| 778 | DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS, |
| 779 | |
| 780 | // F9 INVOKE_VIRTUAL_QUICK_RANGE |
| 781 | DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS, |
| 782 | |
| 783 | // FA INVOKE_SUPER_QUICK |
| 784 | DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS, |
| 785 | |
| 786 | // FB INVOKE_SUPER_QUICK_RANGE |
| 787 | DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS, |
| 788 | |
| 789 | // FC IPUT_OBJECT_VOLATILE |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 790 | DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B | DF_IFIELD | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 791 | |
| 792 | // FD SGET_OBJECT_VOLATILE |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 793 | DF_DA | DF_REF_A | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 794 | |
| 795 | // FE SPUT_OBJECT_VOLATILE |
Vladimir Marko | 3d73ba2 | 2014-03-06 15:18:04 +0000 | [diff] [blame] | 796 | DF_UA | DF_REF_A | DF_SFIELD | DF_UMS, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 797 | |
| 798 | // FF UNUSED_FF |
| 799 | DF_NOP, |
| 800 | |
| 801 | // Beginning of extended MIR opcodes |
| 802 | // 100 MIR_PHI |
| 803 | DF_DA | DF_NULL_TRANSFER_N, |
| 804 | |
| 805 | // 101 MIR_COPY |
| 806 | DF_DA | DF_UB | DF_IS_MOVE, |
| 807 | |
| 808 | // 102 MIR_FUSED_CMPL_FLOAT |
| 809 | DF_UA | DF_UB | DF_FP_A | DF_FP_B, |
| 810 | |
| 811 | // 103 MIR_FUSED_CMPG_FLOAT |
| 812 | DF_UA | DF_UB | DF_FP_A | DF_FP_B, |
| 813 | |
| 814 | // 104 MIR_FUSED_CMPL_DOUBLE |
| 815 | DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B, |
| 816 | |
| 817 | // 105 MIR_FUSED_CMPG_DOUBLE |
| 818 | DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B, |
| 819 | |
| 820 | // 106 MIR_FUSED_CMP_LONG |
| 821 | DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B, |
| 822 | |
| 823 | // 107 MIR_NOP |
| 824 | DF_NOP, |
| 825 | |
| 826 | // 108 MIR_NULL_CHECK |
Razvan A Lupusoru | 7642324 | 2014-08-04 09:38:46 -0700 | [diff] [blame] | 827 | DF_UA | DF_REF_A | DF_NULL_CHK_0 | DF_LVN, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 828 | |
| 829 | // 109 MIR_RANGE_CHECK |
| 830 | 0, |
| 831 | |
| 832 | // 110 MIR_DIV_ZERO_CHECK |
| 833 | 0, |
| 834 | |
| 835 | // 111 MIR_CHECK |
| 836 | 0, |
| 837 | |
| 838 | // 112 MIR_CHECKPART2 |
| 839 | 0, |
| 840 | |
| 841 | // 113 MIR_SELECT |
| 842 | DF_DA | DF_UB, |
Udayan Banerji | 60bfe7b | 2014-07-08 19:59:43 -0700 | [diff] [blame] | 843 | |
| 844 | // 114 MirOpConstVector |
| 845 | DF_DA, |
| 846 | |
| 847 | // 115 MirOpMoveVector |
| 848 | 0, |
| 849 | |
| 850 | // 116 MirOpPackedMultiply |
| 851 | 0, |
| 852 | |
| 853 | // 117 MirOpPackedAddition |
| 854 | 0, |
| 855 | |
| 856 | // 118 MirOpPackedSubtract |
| 857 | 0, |
| 858 | |
| 859 | // 119 MirOpPackedShiftLeft |
| 860 | 0, |
| 861 | |
| 862 | // 120 MirOpPackedSignedShiftRight |
| 863 | 0, |
| 864 | |
| 865 | // 121 MirOpPackedUnsignedShiftRight |
| 866 | 0, |
| 867 | |
| 868 | // 122 MirOpPackedAnd |
| 869 | 0, |
| 870 | |
| 871 | // 123 MirOpPackedOr |
| 872 | 0, |
| 873 | |
| 874 | // 124 MirOpPackedXor |
| 875 | 0, |
| 876 | |
| 877 | // 125 MirOpPackedAddReduce |
| 878 | DF_DA | DF_UA, |
| 879 | |
| 880 | // 126 MirOpPackedReduce |
| 881 | DF_DA, |
| 882 | |
| 883 | // 127 MirOpPackedSet |
| 884 | DF_UB, |
| 885 | |
| 886 | // 128 MirOpReserveVectorRegisters |
| 887 | 0, |
| 888 | |
| 889 | // 129 MirOpReturnVectorRegisters |
| 890 | 0, |
Jean Christophe Beyler | b5bce7c | 2014-07-25 12:32:18 -0700 | [diff] [blame^] | 891 | |
| 892 | // 130 MirOpMemBarrier |
| 893 | 0, |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 894 | }; |
| 895 | |
| 896 | /* Return the base virtual register for a SSA name */ |
Ian Rogers | 71fe267 | 2013-03-19 20:45:02 -0700 | [diff] [blame] | 897 | int MIRGraph::SRegToVReg(int ssa_reg) const { |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 898 | return ssa_base_vregs_->Get(ssa_reg); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 899 | } |
| 900 | |
| 901 | /* Any register that is used before being defined is considered live-in */ |
| 902 | void MIRGraph::HandleLiveInUse(ArenaBitVector* use_v, ArenaBitVector* def_v, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 903 | ArenaBitVector* live_in_v, int dalvik_reg_id) { |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 904 | use_v->SetBit(dalvik_reg_id); |
| 905 | if (!def_v->IsBitSet(dalvik_reg_id)) { |
| 906 | live_in_v->SetBit(dalvik_reg_id); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 907 | } |
| 908 | } |
| 909 | |
| 910 | /* Mark a reg as being defined */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 911 | void MIRGraph::HandleDef(ArenaBitVector* def_v, int dalvik_reg_id) { |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 912 | def_v->SetBit(dalvik_reg_id); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 913 | } |
| 914 | |
Udayan Banerji | f2466a7 | 2014-07-09 19:14:53 -0700 | [diff] [blame] | 915 | void MIRGraph::HandleExtended(ArenaBitVector* use_v, ArenaBitVector* def_v, |
| 916 | ArenaBitVector* live_in_v, |
| 917 | const MIR::DecodedInstruction& d_insn) { |
| 918 | switch (static_cast<int>(d_insn.opcode)) { |
| 919 | default: |
| 920 | LOG(ERROR) << "Unexpected Extended Opcode " << d_insn.opcode; |
| 921 | break; |
| 922 | } |
| 923 | } |
| 924 | |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 925 | /* |
| 926 | * Find out live-in variables for natural loops. Variables that are live-in in |
| 927 | * the main loop body are considered to be defined in the entry block. |
| 928 | */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 929 | bool MIRGraph::FindLocalLiveIn(BasicBlock* bb) { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 930 | MIR* mir; |
| 931 | ArenaBitVector *use_v, *def_v, *live_in_v; |
| 932 | |
| 933 | if (bb->data_flow_info == NULL) return false; |
| 934 | |
| 935 | use_v = bb->data_flow_info->use_v = |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 936 | new (arena_) ArenaBitVector(arena_, cu_->num_dalvik_registers, false, kBitMapUse); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 937 | def_v = bb->data_flow_info->def_v = |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 938 | new (arena_) ArenaBitVector(arena_, cu_->num_dalvik_registers, false, kBitMapDef); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 939 | live_in_v = bb->data_flow_info->live_in_v = |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 940 | new (arena_) ArenaBitVector(arena_, cu_->num_dalvik_registers, false, kBitMapLiveIn); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 941 | |
| 942 | for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { |
Jean Christophe Beyler | cc794c3 | 2014-05-02 09:34:13 -0700 | [diff] [blame] | 943 | uint64_t df_attributes = GetDataFlowAttributes(mir); |
Ian Rogers | 29a2648 | 2014-05-02 15:27:29 -0700 | [diff] [blame] | 944 | MIR::DecodedInstruction* d_insn = &mir->dalvikInsn; |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 945 | |
| 946 | if (df_attributes & DF_HAS_USES) { |
| 947 | if (df_attributes & DF_UA) { |
| 948 | HandleLiveInUse(use_v, def_v, live_in_v, d_insn->vA); |
| 949 | if (df_attributes & DF_A_WIDE) { |
| 950 | HandleLiveInUse(use_v, def_v, live_in_v, d_insn->vA+1); |
| 951 | } |
| 952 | } |
| 953 | if (df_attributes & DF_UB) { |
| 954 | HandleLiveInUse(use_v, def_v, live_in_v, d_insn->vB); |
| 955 | if (df_attributes & DF_B_WIDE) { |
| 956 | HandleLiveInUse(use_v, def_v, live_in_v, d_insn->vB+1); |
| 957 | } |
| 958 | } |
| 959 | if (df_attributes & DF_UC) { |
| 960 | HandleLiveInUse(use_v, def_v, live_in_v, d_insn->vC); |
| 961 | if (df_attributes & DF_C_WIDE) { |
| 962 | HandleLiveInUse(use_v, def_v, live_in_v, d_insn->vC+1); |
| 963 | } |
| 964 | } |
| 965 | } |
| 966 | if (df_attributes & DF_FORMAT_35C) { |
| 967 | for (unsigned int i = 0; i < d_insn->vA; i++) { |
| 968 | HandleLiveInUse(use_v, def_v, live_in_v, d_insn->arg[i]); |
| 969 | } |
| 970 | } |
| 971 | if (df_attributes & DF_FORMAT_3RC) { |
| 972 | for (unsigned int i = 0; i < d_insn->vA; i++) { |
| 973 | HandleLiveInUse(use_v, def_v, live_in_v, d_insn->vC+i); |
| 974 | } |
| 975 | } |
| 976 | if (df_attributes & DF_HAS_DEFS) { |
| 977 | HandleDef(def_v, d_insn->vA); |
| 978 | if (df_attributes & DF_A_WIDE) { |
| 979 | HandleDef(def_v, d_insn->vA+1); |
| 980 | } |
| 981 | } |
Udayan Banerji | f2466a7 | 2014-07-09 19:14:53 -0700 | [diff] [blame] | 982 | if (df_attributes & DF_FORMAT_EXTENDED) { |
| 983 | HandleExtended(use_v, def_v, live_in_v, mir->dalvikInsn); |
| 984 | } |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 985 | } |
| 986 | return true; |
| 987 | } |
| 988 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 989 | int MIRGraph::AddNewSReg(int v_reg) { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 990 | // Compiler temps always have a subscript of 0 |
| 991 | int subscript = (v_reg < 0) ? 0 : ++ssa_last_defs_[v_reg]; |
Mark Mendell | 0add77a | 2014-05-05 22:28:55 -0400 | [diff] [blame] | 992 | uint32_t ssa_reg = GetNumSSARegs(); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 993 | SetNumSSARegs(ssa_reg + 1); |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 994 | ssa_base_vregs_->Insert(v_reg); |
| 995 | ssa_subscripts_->Insert(subscript); |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 996 | DCHECK_EQ(ssa_base_vregs_->Size(), ssa_subscripts_->Size()); |
Mark Mendell | 0add77a | 2014-05-05 22:28:55 -0400 | [diff] [blame] | 997 | // If we are expanding very late, update use counts too. |
| 998 | if (ssa_reg > 0 && use_counts_.Size() == ssa_reg) { |
| 999 | // Need to expand the counts. |
| 1000 | use_counts_.Insert(0); |
| 1001 | raw_use_counts_.Insert(0); |
| 1002 | } |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1003 | return ssa_reg; |
| 1004 | } |
| 1005 | |
| 1006 | /* Find out the latest SSA register for a given Dalvik register */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1007 | void MIRGraph::HandleSSAUse(int* uses, int dalvik_reg, int reg_index) { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1008 | DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu_->num_dalvik_registers)); |
| 1009 | uses[reg_index] = vreg_to_ssa_map_[dalvik_reg]; |
| 1010 | } |
| 1011 | |
| 1012 | /* Setup a new SSA register for a given Dalvik register */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1013 | void MIRGraph::HandleSSADef(int* defs, int dalvik_reg, int reg_index) { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1014 | DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu_->num_dalvik_registers)); |
| 1015 | int ssa_reg = AddNewSReg(dalvik_reg); |
| 1016 | vreg_to_ssa_map_[dalvik_reg] = ssa_reg; |
| 1017 | defs[reg_index] = ssa_reg; |
| 1018 | } |
| 1019 | |
Jean Christophe Beyler | 4896d7b | 2014-05-01 15:36:22 -0700 | [diff] [blame] | 1020 | void MIRGraph::AllocateSSAUseData(MIR *mir, int num_uses) { |
| 1021 | mir->ssa_rep->num_uses = num_uses; |
| 1022 | |
| 1023 | if (mir->ssa_rep->num_uses_allocated < num_uses) { |
| 1024 | mir->ssa_rep->uses = static_cast<int*>(arena_->Alloc(sizeof(int) * num_uses, kArenaAllocDFInfo)); |
| 1025 | // NOTE: will be filled in during type & size inference pass |
| 1026 | mir->ssa_rep->fp_use = static_cast<bool*>(arena_->Alloc(sizeof(bool) * num_uses, kArenaAllocDFInfo)); |
| 1027 | } |
| 1028 | } |
| 1029 | |
| 1030 | void MIRGraph::AllocateSSADefData(MIR *mir, int num_defs) { |
| 1031 | mir->ssa_rep->num_defs = num_defs; |
| 1032 | |
| 1033 | if (mir->ssa_rep->num_defs_allocated < num_defs) { |
| 1034 | mir->ssa_rep->defs = static_cast<int*>(arena_->Alloc(sizeof(int) * num_defs, |
| 1035 | kArenaAllocDFInfo)); |
| 1036 | mir->ssa_rep->fp_def = static_cast<bool*>(arena_->Alloc(sizeof(bool) * num_defs, |
| 1037 | kArenaAllocDFInfo)); |
| 1038 | } |
| 1039 | } |
| 1040 | |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1041 | /* Look up new SSA names for format_35c instructions */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1042 | void MIRGraph::DataFlowSSAFormat35C(MIR* mir) { |
Ian Rogers | 29a2648 | 2014-05-02 15:27:29 -0700 | [diff] [blame] | 1043 | MIR::DecodedInstruction* d_insn = &mir->dalvikInsn; |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1044 | int num_uses = d_insn->vA; |
| 1045 | int i; |
| 1046 | |
Jean Christophe Beyler | 4896d7b | 2014-05-01 15:36:22 -0700 | [diff] [blame] | 1047 | AllocateSSAUseData(mir, num_uses); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1048 | |
| 1049 | for (i = 0; i < num_uses; i++) { |
| 1050 | HandleSSAUse(mir->ssa_rep->uses, d_insn->arg[i], i); |
| 1051 | } |
| 1052 | } |
| 1053 | |
| 1054 | /* Look up new SSA names for format_3rc instructions */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1055 | void MIRGraph::DataFlowSSAFormat3RC(MIR* mir) { |
Ian Rogers | 29a2648 | 2014-05-02 15:27:29 -0700 | [diff] [blame] | 1056 | MIR::DecodedInstruction* d_insn = &mir->dalvikInsn; |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1057 | int num_uses = d_insn->vA; |
| 1058 | int i; |
| 1059 | |
Jean Christophe Beyler | 4896d7b | 2014-05-01 15:36:22 -0700 | [diff] [blame] | 1060 | AllocateSSAUseData(mir, num_uses); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1061 | |
| 1062 | for (i = 0; i < num_uses; i++) { |
| 1063 | HandleSSAUse(mir->ssa_rep->uses, d_insn->vC+i, i); |
| 1064 | } |
| 1065 | } |
| 1066 | |
Udayan Banerji | f2466a7 | 2014-07-09 19:14:53 -0700 | [diff] [blame] | 1067 | void MIRGraph::DataFlowSSAFormatExtended(MIR* mir) { |
| 1068 | switch (static_cast<int>(mir->dalvikInsn.opcode)) { |
| 1069 | default: |
| 1070 | LOG(ERROR) << "Missing case for extended MIR: " << mir->dalvikInsn.opcode; |
| 1071 | break; |
| 1072 | } |
| 1073 | } |
| 1074 | |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1075 | /* Entry function to convert a block into SSA representation */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1076 | bool MIRGraph::DoSSAConversion(BasicBlock* bb) { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1077 | MIR* mir; |
| 1078 | |
| 1079 | if (bb->data_flow_info == NULL) return false; |
| 1080 | |
| 1081 | for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 1082 | mir->ssa_rep = |
Mathieu Chartier | f6c4b3b | 2013-08-24 16:11:37 -0700 | [diff] [blame] | 1083 | static_cast<struct SSARepresentation *>(arena_->Alloc(sizeof(SSARepresentation), |
Vladimir Marko | 83cc7ae | 2014-02-12 18:02:05 +0000 | [diff] [blame] | 1084 | kArenaAllocDFInfo)); |
Jean Christophe Beyler | 4896d7b | 2014-05-01 15:36:22 -0700 | [diff] [blame] | 1085 | memset(mir->ssa_rep, 0, sizeof(*mir->ssa_rep)); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1086 | |
Jean Christophe Beyler | cc794c3 | 2014-05-02 09:34:13 -0700 | [diff] [blame] | 1087 | uint64_t df_attributes = GetDataFlowAttributes(mir); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1088 | |
| 1089 | // If not a pseudo-op, note non-leaf or can throw |
Jean Christophe Beyler | 2ab40eb | 2014-06-02 09:03:14 -0700 | [diff] [blame] | 1090 | if (!MIR::DecodedInstruction::IsPseudoMirOp(mir->dalvikInsn.opcode)) { |
Jean Christophe Beyler | fb0ea2d | 2014-07-29 13:20:42 -0700 | [diff] [blame] | 1091 | int flags = mir->dalvikInsn.FlagsOf(); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1092 | |
Vladimir Marko | 9820b7c | 2014-01-02 16:40:37 +0000 | [diff] [blame] | 1093 | if ((flags & Instruction::kInvoke) != 0 && (mir->optimization_flags & MIR_INLINED) == 0) { |
buzbee | 1fd3346 | 2013-03-25 13:40:45 -0700 | [diff] [blame] | 1094 | attributes_ &= ~METHOD_IS_LEAF; |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1095 | } |
| 1096 | } |
| 1097 | |
| 1098 | int num_uses = 0; |
| 1099 | |
| 1100 | if (df_attributes & DF_FORMAT_35C) { |
| 1101 | DataFlowSSAFormat35C(mir); |
| 1102 | continue; |
| 1103 | } |
| 1104 | |
| 1105 | if (df_attributes & DF_FORMAT_3RC) { |
| 1106 | DataFlowSSAFormat3RC(mir); |
| 1107 | continue; |
| 1108 | } |
| 1109 | |
Udayan Banerji | f2466a7 | 2014-07-09 19:14:53 -0700 | [diff] [blame] | 1110 | if (df_attributes & DF_FORMAT_EXTENDED) { |
| 1111 | DataFlowSSAFormatExtended(mir); |
| 1112 | continue; |
| 1113 | } |
| 1114 | |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1115 | if (df_attributes & DF_HAS_USES) { |
| 1116 | if (df_attributes & DF_UA) { |
| 1117 | num_uses++; |
| 1118 | if (df_attributes & DF_A_WIDE) { |
Brian Carlstrom | 38f85e4 | 2013-07-18 14:45:22 -0700 | [diff] [blame] | 1119 | num_uses++; |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1120 | } |
| 1121 | } |
| 1122 | if (df_attributes & DF_UB) { |
| 1123 | num_uses++; |
| 1124 | if (df_attributes & DF_B_WIDE) { |
Brian Carlstrom | 38f85e4 | 2013-07-18 14:45:22 -0700 | [diff] [blame] | 1125 | num_uses++; |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1126 | } |
| 1127 | } |
| 1128 | if (df_attributes & DF_UC) { |
| 1129 | num_uses++; |
| 1130 | if (df_attributes & DF_C_WIDE) { |
Brian Carlstrom | 38f85e4 | 2013-07-18 14:45:22 -0700 | [diff] [blame] | 1131 | num_uses++; |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1132 | } |
| 1133 | } |
| 1134 | } |
| 1135 | |
Jean Christophe Beyler | 4896d7b | 2014-05-01 15:36:22 -0700 | [diff] [blame] | 1136 | AllocateSSAUseData(mir, num_uses); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1137 | |
| 1138 | int num_defs = 0; |
| 1139 | |
| 1140 | if (df_attributes & DF_HAS_DEFS) { |
| 1141 | num_defs++; |
| 1142 | if (df_attributes & DF_A_WIDE) { |
| 1143 | num_defs++; |
| 1144 | } |
| 1145 | } |
| 1146 | |
Jean Christophe Beyler | 4896d7b | 2014-05-01 15:36:22 -0700 | [diff] [blame] | 1147 | AllocateSSADefData(mir, num_defs); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1148 | |
Ian Rogers | 29a2648 | 2014-05-02 15:27:29 -0700 | [diff] [blame] | 1149 | MIR::DecodedInstruction* d_insn = &mir->dalvikInsn; |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1150 | |
| 1151 | if (df_attributes & DF_HAS_USES) { |
| 1152 | num_uses = 0; |
| 1153 | if (df_attributes & DF_UA) { |
| 1154 | mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A; |
| 1155 | HandleSSAUse(mir->ssa_rep->uses, d_insn->vA, num_uses++); |
| 1156 | if (df_attributes & DF_A_WIDE) { |
| 1157 | mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A; |
| 1158 | HandleSSAUse(mir->ssa_rep->uses, d_insn->vA+1, num_uses++); |
| 1159 | } |
| 1160 | } |
| 1161 | if (df_attributes & DF_UB) { |
| 1162 | mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B; |
| 1163 | HandleSSAUse(mir->ssa_rep->uses, d_insn->vB, num_uses++); |
| 1164 | if (df_attributes & DF_B_WIDE) { |
| 1165 | mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B; |
| 1166 | HandleSSAUse(mir->ssa_rep->uses, d_insn->vB+1, num_uses++); |
| 1167 | } |
| 1168 | } |
| 1169 | if (df_attributes & DF_UC) { |
| 1170 | mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C; |
| 1171 | HandleSSAUse(mir->ssa_rep->uses, d_insn->vC, num_uses++); |
| 1172 | if (df_attributes & DF_C_WIDE) { |
| 1173 | mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C; |
| 1174 | HandleSSAUse(mir->ssa_rep->uses, d_insn->vC+1, num_uses++); |
| 1175 | } |
| 1176 | } |
| 1177 | } |
| 1178 | if (df_attributes & DF_HAS_DEFS) { |
| 1179 | mir->ssa_rep->fp_def[0] = df_attributes & DF_FP_A; |
| 1180 | HandleSSADef(mir->ssa_rep->defs, d_insn->vA, 0); |
| 1181 | if (df_attributes & DF_A_WIDE) { |
| 1182 | mir->ssa_rep->fp_def[1] = df_attributes & DF_FP_A; |
| 1183 | HandleSSADef(mir->ssa_rep->defs, d_insn->vA+1, 1); |
| 1184 | } |
| 1185 | } |
| 1186 | } |
| 1187 | |
buzbee | 1fd3346 | 2013-03-25 13:40:45 -0700 | [diff] [blame] | 1188 | /* |
| 1189 | * Take a snapshot of Dalvik->SSA mapping at the end of each block. The |
| 1190 | * input to PHI nodes can be derived from the snapshot of all |
| 1191 | * predecessor blocks. |
| 1192 | */ |
Jean Christophe Beyler | 4896d7b | 2014-05-01 15:36:22 -0700 | [diff] [blame] | 1193 | bb->data_flow_info->vreg_to_ssa_map_exit = |
Mathieu Chartier | f6c4b3b | 2013-08-24 16:11:37 -0700 | [diff] [blame] | 1194 | static_cast<int*>(arena_->Alloc(sizeof(int) * cu_->num_dalvik_registers, |
Vladimir Marko | 83cc7ae | 2014-02-12 18:02:05 +0000 | [diff] [blame] | 1195 | kArenaAllocDFInfo)); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1196 | |
Jean Christophe Beyler | 4896d7b | 2014-05-01 15:36:22 -0700 | [diff] [blame] | 1197 | memcpy(bb->data_flow_info->vreg_to_ssa_map_exit, vreg_to_ssa_map_, |
buzbee | 1fd3346 | 2013-03-25 13:40:45 -0700 | [diff] [blame] | 1198 | sizeof(int) * cu_->num_dalvik_registers); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1199 | return true; |
| 1200 | } |
| 1201 | |
| 1202 | /* Setup the basic data structures for SSA conversion */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1203 | void MIRGraph::CompilerInitializeSSAConversion() { |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 1204 | size_t num_dalvik_reg = cu_->num_dalvik_registers; |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1205 | |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 1206 | ssa_base_vregs_ = new (arena_) GrowableArray<int>(arena_, num_dalvik_reg + GetDefCount() + 128, |
Brian Carlstrom | df62950 | 2013-07-17 22:39:56 -0700 | [diff] [blame] | 1207 | kGrowableArraySSAtoDalvikMap); |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 1208 | ssa_subscripts_ = new (arena_) GrowableArray<int>(arena_, num_dalvik_reg + GetDefCount() + 128, |
Brian Carlstrom | df62950 | 2013-07-17 22:39:56 -0700 | [diff] [blame] | 1209 | kGrowableArraySSAtoDalvikMap); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1210 | /* |
| 1211 | * Initial number of SSA registers is equal to the number of Dalvik |
| 1212 | * registers. |
| 1213 | */ |
| 1214 | SetNumSSARegs(num_dalvik_reg); |
| 1215 | |
| 1216 | /* |
| 1217 | * Initialize the SSA2Dalvik map list. For the first num_dalvik_reg elements, |
| 1218 | * the subscript is 0 so we use the ENCODE_REG_SUB macro to encode the value |
| 1219 | * into "(0 << 16) | i" |
| 1220 | */ |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 1221 | for (unsigned int i = 0; i < num_dalvik_reg; i++) { |
| 1222 | ssa_base_vregs_->Insert(i); |
| 1223 | ssa_subscripts_->Insert(0); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1224 | } |
| 1225 | |
| 1226 | /* |
| 1227 | * Initialize the DalvikToSSAMap map. There is one entry for each |
| 1228 | * Dalvik register, and the SSA names for those are the same. |
| 1229 | */ |
| 1230 | vreg_to_ssa_map_ = |
Mathieu Chartier | f6c4b3b | 2013-08-24 16:11:37 -0700 | [diff] [blame] | 1231 | static_cast<int*>(arena_->Alloc(sizeof(int) * num_dalvik_reg, |
Vladimir Marko | 83cc7ae | 2014-02-12 18:02:05 +0000 | [diff] [blame] | 1232 | kArenaAllocDFInfo)); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1233 | /* Keep track of the higest def for each dalvik reg */ |
| 1234 | ssa_last_defs_ = |
Mathieu Chartier | f6c4b3b | 2013-08-24 16:11:37 -0700 | [diff] [blame] | 1235 | static_cast<int*>(arena_->Alloc(sizeof(int) * num_dalvik_reg, |
Vladimir Marko | 83cc7ae | 2014-02-12 18:02:05 +0000 | [diff] [blame] | 1236 | kArenaAllocDFInfo)); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1237 | |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 1238 | for (unsigned int i = 0; i < num_dalvik_reg; i++) { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1239 | vreg_to_ssa_map_[i] = i; |
| 1240 | ssa_last_defs_[i] = 0; |
| 1241 | } |
| 1242 | |
Razvan A Lupusoru | da7a69b | 2014-01-08 15:09:50 -0800 | [diff] [blame] | 1243 | // Create a compiler temporary for Method*. This is done after SSA initialization. |
| 1244 | GetNewCompilerTemp(kCompilerTempSpecialMethodPtr, false); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1245 | |
| 1246 | /* |
| 1247 | * Allocate the BasicBlockDataFlow structure for the entry and code blocks |
| 1248 | */ |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 1249 | GrowableArray<BasicBlock*>::Iterator iterator(&block_list_); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1250 | |
| 1251 | while (true) { |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 1252 | BasicBlock* bb = iterator.Next(); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1253 | if (bb == NULL) break; |
| 1254 | if (bb->hidden == true) continue; |
| 1255 | if (bb->block_type == kDalvikByteCode || |
| 1256 | bb->block_type == kEntryBlock || |
| 1257 | bb->block_type == kExitBlock) { |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 1258 | bb->data_flow_info = |
Mathieu Chartier | f6c4b3b | 2013-08-24 16:11:37 -0700 | [diff] [blame] | 1259 | static_cast<BasicBlockDataFlow*>(arena_->Alloc(sizeof(BasicBlockDataFlow), |
Vladimir Marko | 83cc7ae | 2014-02-12 18:02:05 +0000 | [diff] [blame] | 1260 | kArenaAllocDFInfo)); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1261 | } |
| 1262 | } |
| 1263 | } |
| 1264 | |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1265 | /* |
| 1266 | * This function will make a best guess at whether the invoke will |
| 1267 | * end up using Method*. It isn't critical to get it exactly right, |
| 1268 | * and attempting to do would involve more complexity than it's |
| 1269 | * worth. |
| 1270 | */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1271 | bool MIRGraph::InvokeUsesMethodStar(MIR* mir) { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1272 | InvokeType type; |
| 1273 | Instruction::Code opcode = mir->dalvikInsn.opcode; |
| 1274 | switch (opcode) { |
| 1275 | case Instruction::INVOKE_STATIC: |
| 1276 | case Instruction::INVOKE_STATIC_RANGE: |
| 1277 | type = kStatic; |
| 1278 | break; |
| 1279 | case Instruction::INVOKE_DIRECT: |
| 1280 | case Instruction::INVOKE_DIRECT_RANGE: |
| 1281 | type = kDirect; |
| 1282 | break; |
| 1283 | case Instruction::INVOKE_VIRTUAL: |
| 1284 | case Instruction::INVOKE_VIRTUAL_RANGE: |
| 1285 | type = kVirtual; |
| 1286 | break; |
| 1287 | case Instruction::INVOKE_INTERFACE: |
| 1288 | case Instruction::INVOKE_INTERFACE_RANGE: |
| 1289 | return false; |
| 1290 | case Instruction::INVOKE_SUPER_RANGE: |
| 1291 | case Instruction::INVOKE_SUPER: |
| 1292 | type = kSuper; |
| 1293 | break; |
| 1294 | default: |
| 1295 | LOG(WARNING) << "Unexpected invoke op: " << opcode; |
| 1296 | return false; |
| 1297 | } |
| 1298 | DexCompilationUnit m_unit(cu_); |
Brian Carlstrom | 51c2467 | 2013-07-11 16:00:56 -0700 | [diff] [blame] | 1299 | MethodReference target_method(cu_->dex_file, mir->dalvikInsn.vB); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1300 | int vtable_idx; |
| 1301 | uintptr_t direct_code; |
| 1302 | uintptr_t direct_method; |
Sameer Abu Asal | 02c4223 | 2013-04-30 12:09:45 -0700 | [diff] [blame] | 1303 | uint32_t current_offset = static_cast<uint32_t>(current_offset_); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1304 | bool fast_path = |
Ian Rogers | e3cd2f0 | 2013-05-24 15:32:56 -0700 | [diff] [blame] | 1305 | cu_->compiler_driver->ComputeInvokeInfo(&m_unit, current_offset, |
Ian Rogers | 65ec92c | 2013-09-06 10:49:58 -0700 | [diff] [blame] | 1306 | false, true, |
| 1307 | &type, &target_method, |
| 1308 | &vtable_idx, |
| 1309 | &direct_code, &direct_method) && |
Sameer Abu Asal | 02c4223 | 2013-04-30 12:09:45 -0700 | [diff] [blame] | 1310 | !(cu_->enable_debug & (1 << kDebugSlowInvokePath)); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1311 | return (((type == kDirect) || (type == kStatic)) && |
| 1312 | fast_path && ((direct_code == 0) || (direct_method == 0))); |
| 1313 | } |
| 1314 | |
| 1315 | /* |
| 1316 | * Count uses, weighting by loop nesting depth. This code only |
| 1317 | * counts explicitly used s_regs. A later phase will add implicit |
| 1318 | * counts for things such as Method*, null-checked references, etc. |
| 1319 | */ |
Jean Christophe Beyler | 4e97c53 | 2014-01-07 10:07:18 -0800 | [diff] [blame] | 1320 | void MIRGraph::CountUses(struct BasicBlock* bb) { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1321 | if (bb->block_type != kDalvikByteCode) { |
Jean Christophe Beyler | 4e97c53 | 2014-01-07 10:07:18 -0800 | [diff] [blame] | 1322 | return; |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1323 | } |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 1324 | // Each level of nesting adds *100 to count, up to 3 levels deep. |
| 1325 | uint32_t depth = std::min(3U, static_cast<uint32_t>(bb->nesting_depth)); |
| 1326 | uint32_t weight = std::max(1U, depth * 100); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1327 | for (MIR* mir = bb->first_mir_insn; (mir != NULL); mir = mir->next) { |
| 1328 | if (mir->ssa_rep == NULL) { |
| 1329 | continue; |
| 1330 | } |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1331 | for (int i = 0; i < mir->ssa_rep->num_uses; i++) { |
| 1332 | int s_reg = mir->ssa_rep->uses[i]; |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 1333 | raw_use_counts_.Increment(s_reg); |
buzbee | 17189ac | 2013-11-08 11:07:02 -0800 | [diff] [blame] | 1334 | use_counts_.Put(s_reg, use_counts_.Get(s_reg) + weight); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1335 | } |
| 1336 | if (!(cu_->disable_opt & (1 << kPromoteCompilerTemps))) { |
Jean Christophe Beyler | cc794c3 | 2014-05-02 09:34:13 -0700 | [diff] [blame] | 1337 | uint64_t df_attributes = GetDataFlowAttributes(mir); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1338 | // Implicit use of Method* ? */ |
| 1339 | if (df_attributes & DF_UMS) { |
| 1340 | /* |
| 1341 | * Some invokes will not use Method* - need to perform test similar |
| 1342 | * to that found in GenInvoke() to decide whether to count refs |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 1343 | * for Method* on invoke-class opcodes. This is a relatively expensive |
| 1344 | * operation, so should only be done once. |
| 1345 | * TODO: refactor InvokeUsesMethodStar() to perform check at parse time, |
| 1346 | * and save results for both here and GenInvoke. For now, go ahead |
| 1347 | * and assume all invokes use method*. |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1348 | */ |
buzbee | 1da1e2f | 2013-11-15 13:37:01 -0800 | [diff] [blame] | 1349 | raw_use_counts_.Increment(method_sreg_); |
| 1350 | use_counts_.Put(method_sreg_, use_counts_.Get(method_sreg_) + weight); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1351 | } |
| 1352 | } |
| 1353 | } |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1354 | } |
| 1355 | |
| 1356 | /* Verify if all the successor is connected with all the claimed predecessors */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1357 | bool MIRGraph::VerifyPredInfo(BasicBlock* bb) { |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 1358 | GrowableArray<BasicBlockId>::Iterator iter(bb->predecessors); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1359 | |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1360 | while (true) { |
Jean Christophe Beyler | 2469e60 | 2014-05-06 20:36:55 -0700 | [diff] [blame] | 1361 | BasicBlock* pred_bb = GetBasicBlock(iter.Next()); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1362 | if (!pred_bb) break; |
| 1363 | bool found = false; |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 1364 | if (pred_bb->taken == bb->id) { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1365 | found = true; |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 1366 | } else if (pred_bb->fall_through == bb->id) { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1367 | found = true; |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 1368 | } else if (pred_bb->successor_block_list_type != kNotUsed) { |
| 1369 | GrowableArray<SuccessorBlockInfo*>::Iterator iterator(pred_bb->successor_blocks); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1370 | while (true) { |
buzbee | 862a760 | 2013-04-05 10:58:54 -0700 | [diff] [blame] | 1371 | SuccessorBlockInfo *successor_block_info = iterator.Next(); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1372 | if (successor_block_info == NULL) break; |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 1373 | BasicBlockId succ_bb = successor_block_info->block; |
| 1374 | if (succ_bb == bb->id) { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1375 | found = true; |
| 1376 | break; |
| 1377 | } |
| 1378 | } |
| 1379 | } |
| 1380 | if (found == false) { |
| 1381 | char block_name1[BLOCK_NAME_LEN], block_name2[BLOCK_NAME_LEN]; |
| 1382 | GetBlockName(bb, block_name1); |
| 1383 | GetBlockName(pred_bb, block_name2); |
| 1384 | DumpCFG("/sdcard/cfg/", false); |
| 1385 | LOG(FATAL) << "Successor " << block_name1 << "not found from " |
| 1386 | << block_name2; |
| 1387 | } |
| 1388 | } |
| 1389 | return true; |
| 1390 | } |
| 1391 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1392 | void MIRGraph::VerifyDataflow() { |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1393 | /* Verify if all blocks are connected as claimed */ |
buzbee | 56c7178 | 2013-09-05 17:13:19 -0700 | [diff] [blame] | 1394 | AllNodesIterator iter(this); |
buzbee | 311ca16 | 2013-02-28 15:56:43 -0800 | [diff] [blame] | 1395 | for (BasicBlock* bb = iter.Next(); bb != NULL; bb = iter.Next()) { |
| 1396 | VerifyPredInfo(bb); |
| 1397 | } |
| 1398 | } |
| 1399 | |
| 1400 | } // namespace art |