blob: 70a3d38c133c31234e76f6f501e22451854901ca [file] [log] [blame]
Anton Kirilov5ec62182016-10-13 20:16:02 +01001/*
2 * Copyright (C) 2016 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "intrinsics_arm_vixl.h"
18
19#include "arch/arm/instruction_set_features_arm.h"
20#include "code_generator_arm_vixl.h"
21#include "common_arm.h"
22#include "lock_word.h"
23#include "mirror/array-inl.h"
24
25#include "aarch32/constants-aarch32.h"
26
27namespace art {
28namespace arm {
29
30#define __ assembler->GetVIXLAssembler()->
31
32using helpers::DRegisterFrom;
33using helpers::HighRegisterFrom;
34using helpers::InputDRegisterAt;
35using helpers::InputRegisterAt;
36using helpers::InputSRegisterAt;
37using helpers::InputVRegisterAt;
38using helpers::Int32ConstantFrom;
39using helpers::LocationFrom;
40using helpers::LowRegisterFrom;
41using helpers::LowSRegisterFrom;
42using helpers::OutputDRegister;
xueliang.zhongc032e742016-03-28 16:44:32 +010043using helpers::OutputSRegister;
Anton Kirilov5ec62182016-10-13 20:16:02 +010044using helpers::OutputRegister;
45using helpers::OutputVRegister;
46using helpers::RegisterFrom;
47using helpers::SRegisterFrom;
xueliang.zhongc032e742016-03-28 16:44:32 +010048using helpers::DRegisterFromS;
Anton Kirilov5ec62182016-10-13 20:16:02 +010049
50using namespace vixl::aarch32; // NOLINT(build/namespaces)
51
Artem Serov0fb37192016-12-06 18:13:40 +000052using vixl::ExactAssemblyScope;
53using vixl::CodeBufferCheckScope;
54
Anton Kirilov5ec62182016-10-13 20:16:02 +010055ArmVIXLAssembler* IntrinsicCodeGeneratorARMVIXL::GetAssembler() {
56 return codegen_->GetAssembler();
57}
58
59ArenaAllocator* IntrinsicCodeGeneratorARMVIXL::GetAllocator() {
60 return codegen_->GetGraph()->GetArena();
61}
62
63// Default slow-path for fallback (calling the managed code to handle the intrinsic) in an
64// intrinsified call. This will copy the arguments into the positions for a regular call.
65//
66// Note: The actual parameters are required to be in the locations given by the invoke's location
67// summary. If an intrinsic modifies those locations before a slowpath call, they must be
68// restored!
69//
70// Note: If an invoke wasn't sharpened, we will put down an invoke-virtual here. That's potentially
71// sub-optimal (compared to a direct pointer call), but this is a slow-path.
72
73class IntrinsicSlowPathARMVIXL : public SlowPathCodeARMVIXL {
74 public:
75 explicit IntrinsicSlowPathARMVIXL(HInvoke* invoke)
76 : SlowPathCodeARMVIXL(invoke), invoke_(invoke) {}
77
78 Location MoveArguments(CodeGenerator* codegen) {
Artem Serovd4cc5b22016-11-04 11:19:09 +000079 InvokeDexCallingConventionVisitorARMVIXL calling_convention_visitor;
Anton Kirilov5ec62182016-10-13 20:16:02 +010080 IntrinsicVisitor::MoveArguments(invoke_, codegen, &calling_convention_visitor);
81 return calling_convention_visitor.GetMethodLocation();
82 }
83
84 void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
85 ArmVIXLAssembler* assembler = down_cast<ArmVIXLAssembler*>(codegen->GetAssembler());
86 __ Bind(GetEntryLabel());
87
88 SaveLiveRegisters(codegen, invoke_->GetLocations());
89
90 Location method_loc = MoveArguments(codegen);
91
92 if (invoke_->IsInvokeStaticOrDirect()) {
93 codegen->GenerateStaticOrDirectCall(invoke_->AsInvokeStaticOrDirect(), method_loc);
94 } else {
95 codegen->GenerateVirtualCall(invoke_->AsInvokeVirtual(), method_loc);
96 }
97 codegen->RecordPcInfo(invoke_, invoke_->GetDexPc(), this);
98
99 // Copy the result back to the expected output.
100 Location out = invoke_->GetLocations()->Out();
101 if (out.IsValid()) {
102 DCHECK(out.IsRegister()); // TODO: Replace this when we support output in memory.
103 DCHECK(!invoke_->GetLocations()->GetLiveRegisters()->ContainsCoreRegister(out.reg()));
104 codegen->MoveFromReturnRegister(out, invoke_->GetType());
105 }
106
107 RestoreLiveRegisters(codegen, invoke_->GetLocations());
108 __ B(GetExitLabel());
109 }
110
111 const char* GetDescription() const OVERRIDE { return "IntrinsicSlowPath"; }
112
113 private:
114 // The instruction where this slow path is happening.
115 HInvoke* const invoke_;
116
117 DISALLOW_COPY_AND_ASSIGN(IntrinsicSlowPathARMVIXL);
118};
119
120// Slow path implementing the SystemArrayCopy intrinsic copy loop with read barriers.
121class ReadBarrierSystemArrayCopySlowPathARMVIXL : public SlowPathCodeARMVIXL {
122 public:
123 explicit ReadBarrierSystemArrayCopySlowPathARMVIXL(HInstruction* instruction)
124 : SlowPathCodeARMVIXL(instruction) {
125 DCHECK(kEmitCompilerReadBarrier);
126 DCHECK(kUseBakerReadBarrier);
127 }
128
129 void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
130 CodeGeneratorARMVIXL* arm_codegen = down_cast<CodeGeneratorARMVIXL*>(codegen);
131 ArmVIXLAssembler* assembler = arm_codegen->GetAssembler();
132 LocationSummary* locations = instruction_->GetLocations();
133 DCHECK(locations->CanCall());
134 DCHECK(instruction_->IsInvokeStaticOrDirect())
135 << "Unexpected instruction in read barrier arraycopy slow path: "
136 << instruction_->DebugName();
137 DCHECK(instruction_->GetLocations()->Intrinsified());
138 DCHECK_EQ(instruction_->AsInvoke()->GetIntrinsic(), Intrinsics::kSystemArrayCopy);
139
140 int32_t element_size = Primitive::ComponentSize(Primitive::kPrimNot);
141 uint32_t element_size_shift = Primitive::ComponentSizeShift(Primitive::kPrimNot);
142 uint32_t offset = mirror::Array::DataOffset(element_size).Uint32Value();
143
144 vixl32::Register dest = InputRegisterAt(instruction_, 2);
145 Location dest_pos = locations->InAt(3);
146 vixl32::Register src_curr_addr = RegisterFrom(locations->GetTemp(0));
147 vixl32::Register dst_curr_addr = RegisterFrom(locations->GetTemp(1));
148 vixl32::Register src_stop_addr = RegisterFrom(locations->GetTemp(2));
149 vixl32::Register tmp = RegisterFrom(locations->GetTemp(3));
150
151 __ Bind(GetEntryLabel());
152 // Compute the base destination address in `dst_curr_addr`.
153 if (dest_pos.IsConstant()) {
154 int32_t constant = Int32ConstantFrom(dest_pos);
155 __ Add(dst_curr_addr, dest, element_size * constant + offset);
156 } else {
157 __ Add(dst_curr_addr,
158 dest,
159 Operand(RegisterFrom(dest_pos), vixl32::LSL, element_size_shift));
160 __ Add(dst_curr_addr, dst_curr_addr, offset);
161 }
162
163 vixl32::Label loop;
164 __ Bind(&loop);
165 __ Ldr(tmp, MemOperand(src_curr_addr, element_size, PostIndex));
166 assembler->MaybeUnpoisonHeapReference(tmp);
167 // TODO: Inline the mark bit check before calling the runtime?
168 // tmp = ReadBarrier::Mark(tmp);
169 // No need to save live registers; it's taken care of by the
170 // entrypoint. Also, there is no need to update the stack mask,
171 // as this runtime call will not trigger a garbage collection.
172 // (See ReadBarrierMarkSlowPathARM::EmitNativeCode for more
173 // explanations.)
174 DCHECK(!tmp.IsSP());
175 DCHECK(!tmp.IsLR());
176 DCHECK(!tmp.IsPC());
177 // IP is used internally by the ReadBarrierMarkRegX entry point
178 // as a temporary (and not preserved). It thus cannot be used by
179 // any live register in this slow path.
180 DCHECK(!src_curr_addr.Is(ip));
181 DCHECK(!dst_curr_addr.Is(ip));
182 DCHECK(!src_stop_addr.Is(ip));
183 DCHECK(!tmp.Is(ip));
184 DCHECK(tmp.IsRegister()) << tmp;
185 int32_t entry_point_offset =
186 CodeGenerator::GetReadBarrierMarkEntryPointsOffset<kArmPointerSize>(tmp.GetCode());
187 // This runtime call does not require a stack map.
188 arm_codegen->InvokeRuntimeWithoutRecordingPcInfo(entry_point_offset, instruction_, this);
189 assembler->MaybePoisonHeapReference(tmp);
190 __ Str(tmp, MemOperand(dst_curr_addr, element_size, PostIndex));
191 __ Cmp(src_curr_addr, src_stop_addr);
Artem Serov517d9f62016-12-12 15:51:15 +0000192 __ B(ne, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100193 __ B(GetExitLabel());
194 }
195
196 const char* GetDescription() const OVERRIDE {
197 return "ReadBarrierSystemArrayCopySlowPathARMVIXL";
198 }
199
200 private:
201 DISALLOW_COPY_AND_ASSIGN(ReadBarrierSystemArrayCopySlowPathARMVIXL);
202};
203
204IntrinsicLocationsBuilderARMVIXL::IntrinsicLocationsBuilderARMVIXL(CodeGeneratorARMVIXL* codegen)
205 : arena_(codegen->GetGraph()->GetArena()),
206 assembler_(codegen->GetAssembler()),
207 features_(codegen->GetInstructionSetFeatures()) {}
208
209bool IntrinsicLocationsBuilderARMVIXL::TryDispatch(HInvoke* invoke) {
210 Dispatch(invoke);
211 LocationSummary* res = invoke->GetLocations();
212 if (res == nullptr) {
213 return false;
214 }
215 return res->Intrinsified();
216}
217
218static void CreateFPToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
219 LocationSummary* locations = new (arena) LocationSummary(invoke,
220 LocationSummary::kNoCall,
221 kIntrinsified);
222 locations->SetInAt(0, Location::RequiresFpuRegister());
223 locations->SetOut(Location::RequiresRegister());
224}
225
226static void CreateIntToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
227 LocationSummary* locations = new (arena) LocationSummary(invoke,
228 LocationSummary::kNoCall,
229 kIntrinsified);
230 locations->SetInAt(0, Location::RequiresRegister());
231 locations->SetOut(Location::RequiresFpuRegister());
232}
233
234static void MoveFPToInt(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) {
235 Location input = locations->InAt(0);
236 Location output = locations->Out();
237 if (is64bit) {
238 __ Vmov(LowRegisterFrom(output), HighRegisterFrom(output), DRegisterFrom(input));
239 } else {
240 __ Vmov(RegisterFrom(output), SRegisterFrom(input));
241 }
242}
243
244static void MoveIntToFP(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) {
245 Location input = locations->InAt(0);
246 Location output = locations->Out();
247 if (is64bit) {
248 __ Vmov(DRegisterFrom(output), LowRegisterFrom(input), HighRegisterFrom(input));
249 } else {
250 __ Vmov(SRegisterFrom(output), RegisterFrom(input));
251 }
252}
253
254void IntrinsicLocationsBuilderARMVIXL::VisitDoubleDoubleToRawLongBits(HInvoke* invoke) {
255 CreateFPToIntLocations(arena_, invoke);
256}
257void IntrinsicLocationsBuilderARMVIXL::VisitDoubleLongBitsToDouble(HInvoke* invoke) {
258 CreateIntToFPLocations(arena_, invoke);
259}
260
261void IntrinsicCodeGeneratorARMVIXL::VisitDoubleDoubleToRawLongBits(HInvoke* invoke) {
262 MoveFPToInt(invoke->GetLocations(), /* is64bit */ true, GetAssembler());
263}
264void IntrinsicCodeGeneratorARMVIXL::VisitDoubleLongBitsToDouble(HInvoke* invoke) {
265 MoveIntToFP(invoke->GetLocations(), /* is64bit */ true, GetAssembler());
266}
267
268void IntrinsicLocationsBuilderARMVIXL::VisitFloatFloatToRawIntBits(HInvoke* invoke) {
269 CreateFPToIntLocations(arena_, invoke);
270}
271void IntrinsicLocationsBuilderARMVIXL::VisitFloatIntBitsToFloat(HInvoke* invoke) {
272 CreateIntToFPLocations(arena_, invoke);
273}
274
275void IntrinsicCodeGeneratorARMVIXL::VisitFloatFloatToRawIntBits(HInvoke* invoke) {
276 MoveFPToInt(invoke->GetLocations(), /* is64bit */ false, GetAssembler());
277}
278void IntrinsicCodeGeneratorARMVIXL::VisitFloatIntBitsToFloat(HInvoke* invoke) {
279 MoveIntToFP(invoke->GetLocations(), /* is64bit */ false, GetAssembler());
280}
281
282static void CreateIntToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
283 LocationSummary* locations = new (arena) LocationSummary(invoke,
284 LocationSummary::kNoCall,
285 kIntrinsified);
286 locations->SetInAt(0, Location::RequiresRegister());
287 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
288}
289
290static void CreateFPToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
291 LocationSummary* locations = new (arena) LocationSummary(invoke,
292 LocationSummary::kNoCall,
293 kIntrinsified);
294 locations->SetInAt(0, Location::RequiresFpuRegister());
295 locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
296}
297
298static void GenNumberOfLeadingZeros(LocationSummary* locations,
299 Primitive::Type type,
300 ArmVIXLAssembler* assembler) {
301 Location in = locations->InAt(0);
302 vixl32::Register out = RegisterFrom(locations->Out());
303
304 DCHECK((type == Primitive::kPrimInt) || (type == Primitive::kPrimLong));
305
306 if (type == Primitive::kPrimLong) {
307 vixl32::Register in_reg_lo = LowRegisterFrom(in);
308 vixl32::Register in_reg_hi = HighRegisterFrom(in);
309 vixl32::Label end;
310 __ Clz(out, in_reg_hi);
xueliang.zhongf51bc622016-11-04 09:23:32 +0000311 __ CompareAndBranchIfNonZero(in_reg_hi, &end, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100312 __ Clz(out, in_reg_lo);
313 __ Add(out, out, 32);
314 __ Bind(&end);
315 } else {
316 __ Clz(out, RegisterFrom(in));
317 }
318}
319
320void IntrinsicLocationsBuilderARMVIXL::VisitIntegerNumberOfLeadingZeros(HInvoke* invoke) {
321 CreateIntToIntLocations(arena_, invoke);
322}
323
324void IntrinsicCodeGeneratorARMVIXL::VisitIntegerNumberOfLeadingZeros(HInvoke* invoke) {
325 GenNumberOfLeadingZeros(invoke->GetLocations(), Primitive::kPrimInt, GetAssembler());
326}
327
328void IntrinsicLocationsBuilderARMVIXL::VisitLongNumberOfLeadingZeros(HInvoke* invoke) {
329 LocationSummary* locations = new (arena_) LocationSummary(invoke,
330 LocationSummary::kNoCall,
331 kIntrinsified);
332 locations->SetInAt(0, Location::RequiresRegister());
333 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
334}
335
336void IntrinsicCodeGeneratorARMVIXL::VisitLongNumberOfLeadingZeros(HInvoke* invoke) {
337 GenNumberOfLeadingZeros(invoke->GetLocations(), Primitive::kPrimLong, GetAssembler());
338}
339
340static void GenNumberOfTrailingZeros(LocationSummary* locations,
341 Primitive::Type type,
342 ArmVIXLAssembler* assembler) {
343 DCHECK((type == Primitive::kPrimInt) || (type == Primitive::kPrimLong));
344
345 vixl32::Register out = RegisterFrom(locations->Out());
346
347 if (type == Primitive::kPrimLong) {
348 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0));
349 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0));
350 vixl32::Label end;
351 __ Rbit(out, in_reg_lo);
352 __ Clz(out, out);
xueliang.zhongf51bc622016-11-04 09:23:32 +0000353 __ CompareAndBranchIfNonZero(in_reg_lo, &end, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100354 __ Rbit(out, in_reg_hi);
355 __ Clz(out, out);
356 __ Add(out, out, 32);
357 __ Bind(&end);
358 } else {
359 vixl32::Register in = RegisterFrom(locations->InAt(0));
360 __ Rbit(out, in);
361 __ Clz(out, out);
362 }
363}
364
365void IntrinsicLocationsBuilderARMVIXL::VisitIntegerNumberOfTrailingZeros(HInvoke* invoke) {
366 LocationSummary* locations = new (arena_) LocationSummary(invoke,
367 LocationSummary::kNoCall,
368 kIntrinsified);
369 locations->SetInAt(0, Location::RequiresRegister());
370 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
371}
372
373void IntrinsicCodeGeneratorARMVIXL::VisitIntegerNumberOfTrailingZeros(HInvoke* invoke) {
374 GenNumberOfTrailingZeros(invoke->GetLocations(), Primitive::kPrimInt, GetAssembler());
375}
376
377void IntrinsicLocationsBuilderARMVIXL::VisitLongNumberOfTrailingZeros(HInvoke* invoke) {
378 LocationSummary* locations = new (arena_) LocationSummary(invoke,
379 LocationSummary::kNoCall,
380 kIntrinsified);
381 locations->SetInAt(0, Location::RequiresRegister());
382 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
383}
384
385void IntrinsicCodeGeneratorARMVIXL::VisitLongNumberOfTrailingZeros(HInvoke* invoke) {
386 GenNumberOfTrailingZeros(invoke->GetLocations(), Primitive::kPrimLong, GetAssembler());
387}
388
389static void MathAbsFP(HInvoke* invoke, ArmVIXLAssembler* assembler) {
390 __ Vabs(OutputVRegister(invoke), InputVRegisterAt(invoke, 0));
391}
392
393void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsDouble(HInvoke* invoke) {
394 CreateFPToFPLocations(arena_, invoke);
395}
396
397void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsDouble(HInvoke* invoke) {
398 MathAbsFP(invoke, GetAssembler());
399}
400
401void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsFloat(HInvoke* invoke) {
402 CreateFPToFPLocations(arena_, invoke);
403}
404
405void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsFloat(HInvoke* invoke) {
406 MathAbsFP(invoke, GetAssembler());
407}
408
409static void CreateIntToIntPlusTemp(ArenaAllocator* arena, HInvoke* invoke) {
410 LocationSummary* locations = new (arena) LocationSummary(invoke,
411 LocationSummary::kNoCall,
412 kIntrinsified);
413 locations->SetInAt(0, Location::RequiresRegister());
414 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
415
416 locations->AddTemp(Location::RequiresRegister());
417}
418
419static void GenAbsInteger(LocationSummary* locations,
420 bool is64bit,
421 ArmVIXLAssembler* assembler) {
422 Location in = locations->InAt(0);
423 Location output = locations->Out();
424
425 vixl32::Register mask = RegisterFrom(locations->GetTemp(0));
426
427 if (is64bit) {
428 vixl32::Register in_reg_lo = LowRegisterFrom(in);
429 vixl32::Register in_reg_hi = HighRegisterFrom(in);
430 vixl32::Register out_reg_lo = LowRegisterFrom(output);
431 vixl32::Register out_reg_hi = HighRegisterFrom(output);
432
433 DCHECK(!out_reg_lo.Is(in_reg_hi)) << "Diagonal overlap unexpected.";
434
435 __ Asr(mask, in_reg_hi, 31);
436 __ Adds(out_reg_lo, in_reg_lo, mask);
437 __ Adc(out_reg_hi, in_reg_hi, mask);
438 __ Eor(out_reg_lo, mask, out_reg_lo);
439 __ Eor(out_reg_hi, mask, out_reg_hi);
440 } else {
441 vixl32::Register in_reg = RegisterFrom(in);
442 vixl32::Register out_reg = RegisterFrom(output);
443
444 __ Asr(mask, in_reg, 31);
445 __ Add(out_reg, in_reg, mask);
446 __ Eor(out_reg, mask, out_reg);
447 }
448}
449
450void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsInt(HInvoke* invoke) {
451 CreateIntToIntPlusTemp(arena_, invoke);
452}
453
454void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsInt(HInvoke* invoke) {
455 GenAbsInteger(invoke->GetLocations(), /* is64bit */ false, GetAssembler());
456}
457
458
459void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsLong(HInvoke* invoke) {
460 CreateIntToIntPlusTemp(arena_, invoke);
461}
462
463void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsLong(HInvoke* invoke) {
464 GenAbsInteger(invoke->GetLocations(), /* is64bit */ true, GetAssembler());
465}
466
xueliang.zhongc032e742016-03-28 16:44:32 +0100467static void GenMinMaxFloat(HInvoke* invoke, bool is_min, ArmVIXLAssembler* assembler) {
468 Location op1_loc = invoke->GetLocations()->InAt(0);
469 Location op2_loc = invoke->GetLocations()->InAt(1);
470 Location out_loc = invoke->GetLocations()->Out();
471
472 // Optimization: don't generate any code if inputs are the same.
473 if (op1_loc.Equals(op2_loc)) {
474 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in location builder.
475 return;
476 }
477
478 vixl32::SRegister op1 = SRegisterFrom(op1_loc);
479 vixl32::SRegister op2 = SRegisterFrom(op2_loc);
480 vixl32::SRegister out = OutputSRegister(invoke);
481 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
482 const vixl32::Register temp1 = temps.Acquire();
483 vixl32::Register temp2 = RegisterFrom(invoke->GetLocations()->GetTemp(0));
484 vixl32::Label nan, done;
485
486 DCHECK(op1.Is(out));
487
488 __ Vcmp(op1, op2);
489 __ Vmrs(RegisterOrAPSR_nzcv(kPcCode), FPSCR);
490 __ B(vs, &nan, /* far_target */ false); // if un-ordered, go to NaN handling.
491
492 // op1 <> op2
493 vixl32::ConditionType cond = is_min ? gt : lt;
494 {
495 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
496 2 * kMaxInstructionSizeInBytes,
497 CodeBufferCheckScope::kMaximumSize);
498 __ it(cond);
499 __ vmov(cond, F32, out, op2);
500 }
501 __ B(ne, &done, /* far_target */ false); // for <>(not equal), we've done min/max calculation.
502
503 // handle op1 == op2, max(+0.0,-0.0), min(+0.0,-0.0).
504 __ Vmov(temp1, op1);
505 __ Vmov(temp2, op2);
506 if (is_min) {
507 __ Orr(temp1, temp1, temp2);
508 } else {
509 __ And(temp1, temp1, temp2);
510 }
511 __ Vmov(out, temp1);
512 __ B(&done);
513
514 // handle NaN input.
515 __ Bind(&nan);
516 __ Movt(temp1, High16Bits(kNanFloat)); // 0x7FC0xxxx is a NaN.
517 __ Vmov(out, temp1);
518
519 __ Bind(&done);
520}
521
522static void CreateFPFPToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
523 LocationSummary* locations = new (arena) LocationSummary(invoke,
524 LocationSummary::kNoCall,
525 kIntrinsified);
526 locations->SetInAt(0, Location::RequiresFpuRegister());
527 locations->SetInAt(1, Location::RequiresFpuRegister());
528 locations->SetOut(Location::SameAsFirstInput());
529}
530
531void IntrinsicLocationsBuilderARMVIXL::VisitMathMinFloatFloat(HInvoke* invoke) {
532 CreateFPFPToFPLocations(arena_, invoke);
533 invoke->GetLocations()->AddTemp(Location::RequiresRegister());
534}
535
536void IntrinsicCodeGeneratorARMVIXL::VisitMathMinFloatFloat(HInvoke* invoke) {
537 GenMinMaxFloat(invoke, /* is_min */ true, GetAssembler());
538}
539
540void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxFloatFloat(HInvoke* invoke) {
541 CreateFPFPToFPLocations(arena_, invoke);
542 invoke->GetLocations()->AddTemp(Location::RequiresRegister());
543}
544
545void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxFloatFloat(HInvoke* invoke) {
546 GenMinMaxFloat(invoke, /* is_min */ false, GetAssembler());
547}
548
549static void GenMinMaxDouble(HInvoke* invoke, bool is_min, ArmVIXLAssembler* assembler) {
550 Location op1_loc = invoke->GetLocations()->InAt(0);
551 Location op2_loc = invoke->GetLocations()->InAt(1);
552 Location out_loc = invoke->GetLocations()->Out();
553
554 // Optimization: don't generate any code if inputs are the same.
555 if (op1_loc.Equals(op2_loc)) {
556 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in.
557 return;
558 }
559
560 vixl32::DRegister op1 = DRegisterFrom(op1_loc);
561 vixl32::DRegister op2 = DRegisterFrom(op2_loc);
562 vixl32::DRegister out = OutputDRegister(invoke);
563 vixl32::Label handle_nan_eq, done;
564
565 DCHECK(op1.Is(out));
566
567 __ Vcmp(op1, op2);
568 __ Vmrs(RegisterOrAPSR_nzcv(kPcCode), FPSCR);
569 __ B(vs, &handle_nan_eq, /* far_target */ false); // if un-ordered, go to NaN handling.
570
571 // op1 <> op2
572 vixl32::ConditionType cond = is_min ? gt : lt;
573 {
574 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
575 2 * kMaxInstructionSizeInBytes,
576 CodeBufferCheckScope::kMaximumSize);
577 __ it(cond);
578 __ vmov(cond, F64, out, op2);
579 }
580 __ B(ne, &done, /* far_target */ false); // for <>(not equal), we've done min/max calculation.
581
582 // handle op1 == op2, max(+0.0,-0.0).
583 if (!is_min) {
584 __ Vand(F64, out, op1, op2);
585 __ B(&done);
586 }
587
588 // handle op1 == op2, min(+0.0,-0.0), NaN input.
589 __ Bind(&handle_nan_eq);
590 __ Vorr(F64, out, op1, op2); // assemble op1/-0.0/NaN.
591
592 __ Bind(&done);
593}
594
595void IntrinsicLocationsBuilderARMVIXL::VisitMathMinDoubleDouble(HInvoke* invoke) {
596 CreateFPFPToFPLocations(arena_, invoke);
597}
598
599void IntrinsicCodeGeneratorARMVIXL::VisitMathMinDoubleDouble(HInvoke* invoke) {
600 GenMinMaxDouble(invoke, /* is_min */ true , GetAssembler());
601}
602
603void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxDoubleDouble(HInvoke* invoke) {
604 CreateFPFPToFPLocations(arena_, invoke);
605}
606
607void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxDoubleDouble(HInvoke* invoke) {
608 GenMinMaxDouble(invoke, /* is_min */ false, GetAssembler());
609}
610
611static void GenMinMaxLong(HInvoke* invoke, bool is_min, ArmVIXLAssembler* assembler) {
612 Location op1_loc = invoke->GetLocations()->InAt(0);
613 Location op2_loc = invoke->GetLocations()->InAt(1);
614 Location out_loc = invoke->GetLocations()->Out();
615
616 // Optimization: don't generate any code if inputs are the same.
617 if (op1_loc.Equals(op2_loc)) {
618 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in location builder.
619 return;
620 }
621
622 vixl32::Register op1_lo = LowRegisterFrom(op1_loc);
623 vixl32::Register op1_hi = HighRegisterFrom(op1_loc);
624 vixl32::Register op2_lo = LowRegisterFrom(op2_loc);
625 vixl32::Register op2_hi = HighRegisterFrom(op2_loc);
626 vixl32::Register out_lo = LowRegisterFrom(out_loc);
627 vixl32::Register out_hi = HighRegisterFrom(out_loc);
628 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
629 const vixl32::Register temp = temps.Acquire();
630
631 DCHECK(op1_lo.Is(out_lo));
632 DCHECK(op1_hi.Is(out_hi));
633
634 // Compare op1 >= op2, or op1 < op2.
635 __ Cmp(out_lo, op2_lo);
636 __ Sbcs(temp, out_hi, op2_hi);
637
638 // Now GE/LT condition code is correct for the long comparison.
639 {
640 vixl32::ConditionType cond = is_min ? ge : lt;
641 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
642 3 * kMaxInstructionSizeInBytes,
643 CodeBufferCheckScope::kMaximumSize);
644 __ itt(cond);
645 __ mov(cond, out_lo, op2_lo);
646 __ mov(cond, out_hi, op2_hi);
647 }
648}
649
650static void CreateLongLongToLongLocations(ArenaAllocator* arena, HInvoke* invoke) {
651 LocationSummary* locations = new (arena) LocationSummary(invoke,
652 LocationSummary::kNoCall,
653 kIntrinsified);
654 locations->SetInAt(0, Location::RequiresRegister());
655 locations->SetInAt(1, Location::RequiresRegister());
656 locations->SetOut(Location::SameAsFirstInput());
657}
658
659void IntrinsicLocationsBuilderARMVIXL::VisitMathMinLongLong(HInvoke* invoke) {
660 CreateLongLongToLongLocations(arena_, invoke);
661}
662
663void IntrinsicCodeGeneratorARMVIXL::VisitMathMinLongLong(HInvoke* invoke) {
664 GenMinMaxLong(invoke, /* is_min */ true, GetAssembler());
665}
666
667void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxLongLong(HInvoke* invoke) {
668 CreateLongLongToLongLocations(arena_, invoke);
669}
670
671void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxLongLong(HInvoke* invoke) {
672 GenMinMaxLong(invoke, /* is_min */ false, GetAssembler());
673}
674
Anton Kirilov5ec62182016-10-13 20:16:02 +0100675static void GenMinMax(HInvoke* invoke, bool is_min, ArmVIXLAssembler* assembler) {
676 vixl32::Register op1 = InputRegisterAt(invoke, 0);
677 vixl32::Register op2 = InputRegisterAt(invoke, 1);
678 vixl32::Register out = OutputRegister(invoke);
679
680 __ Cmp(op1, op2);
681
682 {
Artem Serov0fb37192016-12-06 18:13:40 +0000683 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
684 3 * kMaxInstructionSizeInBytes,
685 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100686
687 __ ite(is_min ? lt : gt);
688 __ mov(is_min ? lt : gt, out, op1);
689 __ mov(is_min ? ge : le, out, op2);
690 }
691}
692
693static void CreateIntIntToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
694 LocationSummary* locations = new (arena) LocationSummary(invoke,
695 LocationSummary::kNoCall,
696 kIntrinsified);
697 locations->SetInAt(0, Location::RequiresRegister());
698 locations->SetInAt(1, Location::RequiresRegister());
699 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
700}
701
702void IntrinsicLocationsBuilderARMVIXL::VisitMathMinIntInt(HInvoke* invoke) {
703 CreateIntIntToIntLocations(arena_, invoke);
704}
705
706void IntrinsicCodeGeneratorARMVIXL::VisitMathMinIntInt(HInvoke* invoke) {
707 GenMinMax(invoke, /* is_min */ true, GetAssembler());
708}
709
710void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxIntInt(HInvoke* invoke) {
711 CreateIntIntToIntLocations(arena_, invoke);
712}
713
714void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxIntInt(HInvoke* invoke) {
715 GenMinMax(invoke, /* is_min */ false, GetAssembler());
716}
717
718void IntrinsicLocationsBuilderARMVIXL::VisitMathSqrt(HInvoke* invoke) {
719 CreateFPToFPLocations(arena_, invoke);
720}
721
722void IntrinsicCodeGeneratorARMVIXL::VisitMathSqrt(HInvoke* invoke) {
723 ArmVIXLAssembler* assembler = GetAssembler();
724 __ Vsqrt(OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
725}
726
xueliang.zhong6099d5e2016-04-20 18:44:56 +0100727void IntrinsicLocationsBuilderARMVIXL::VisitMathRint(HInvoke* invoke) {
728 if (features_.HasARMv8AInstructions()) {
729 CreateFPToFPLocations(arena_, invoke);
730 }
731}
732
733void IntrinsicCodeGeneratorARMVIXL::VisitMathRint(HInvoke* invoke) {
734 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
735 ArmVIXLAssembler* assembler = GetAssembler();
736 __ Vrintn(F64, F64, OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
737}
738
Anton Kirilov5ec62182016-10-13 20:16:02 +0100739void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekByte(HInvoke* invoke) {
740 CreateIntToIntLocations(arena_, invoke);
741}
742
743void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekByte(HInvoke* invoke) {
744 ArmVIXLAssembler* assembler = GetAssembler();
745 // Ignore upper 4B of long address.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000746 __ Ldrsb(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100747}
748
749void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekIntNative(HInvoke* invoke) {
750 CreateIntToIntLocations(arena_, invoke);
751}
752
753void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekIntNative(HInvoke* invoke) {
754 ArmVIXLAssembler* assembler = GetAssembler();
755 // Ignore upper 4B of long address.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000756 __ Ldr(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100757}
758
759void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekLongNative(HInvoke* invoke) {
760 CreateIntToIntLocations(arena_, invoke);
761}
762
763void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekLongNative(HInvoke* invoke) {
764 ArmVIXLAssembler* assembler = GetAssembler();
765 // Ignore upper 4B of long address.
766 vixl32::Register addr = LowRegisterFrom(invoke->GetLocations()->InAt(0));
767 // Worst case: Control register bit SCTLR.A = 0. Then unaligned accesses throw a processor
768 // exception. So we can't use ldrd as addr may be unaligned.
769 vixl32::Register lo = LowRegisterFrom(invoke->GetLocations()->Out());
770 vixl32::Register hi = HighRegisterFrom(invoke->GetLocations()->Out());
771 if (addr.Is(lo)) {
772 __ Ldr(hi, MemOperand(addr, 4));
Scott Wakelingb77051e2016-11-21 19:46:00 +0000773 __ Ldr(lo, MemOperand(addr));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100774 } else {
Scott Wakelingb77051e2016-11-21 19:46:00 +0000775 __ Ldr(lo, MemOperand(addr));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100776 __ Ldr(hi, MemOperand(addr, 4));
777 }
778}
779
780void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekShortNative(HInvoke* invoke) {
781 CreateIntToIntLocations(arena_, invoke);
782}
783
784void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekShortNative(HInvoke* invoke) {
785 ArmVIXLAssembler* assembler = GetAssembler();
786 // Ignore upper 4B of long address.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000787 __ Ldrsh(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100788}
789
790static void CreateIntIntToVoidLocations(ArenaAllocator* arena, HInvoke* invoke) {
791 LocationSummary* locations = new (arena) LocationSummary(invoke,
792 LocationSummary::kNoCall,
793 kIntrinsified);
794 locations->SetInAt(0, Location::RequiresRegister());
795 locations->SetInAt(1, Location::RequiresRegister());
796}
797
798void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeByte(HInvoke* invoke) {
799 CreateIntIntToVoidLocations(arena_, invoke);
800}
801
802void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeByte(HInvoke* invoke) {
803 ArmVIXLAssembler* assembler = GetAssembler();
Scott Wakelingb77051e2016-11-21 19:46:00 +0000804 __ Strb(InputRegisterAt(invoke, 1), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100805}
806
807void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeIntNative(HInvoke* invoke) {
808 CreateIntIntToVoidLocations(arena_, invoke);
809}
810
811void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeIntNative(HInvoke* invoke) {
812 ArmVIXLAssembler* assembler = GetAssembler();
Scott Wakelingb77051e2016-11-21 19:46:00 +0000813 __ Str(InputRegisterAt(invoke, 1), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100814}
815
816void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeLongNative(HInvoke* invoke) {
817 CreateIntIntToVoidLocations(arena_, invoke);
818}
819
820void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeLongNative(HInvoke* invoke) {
821 ArmVIXLAssembler* assembler = GetAssembler();
822 // Ignore upper 4B of long address.
823 vixl32::Register addr = LowRegisterFrom(invoke->GetLocations()->InAt(0));
824 // Worst case: Control register bit SCTLR.A = 0. Then unaligned accesses throw a processor
825 // exception. So we can't use ldrd as addr may be unaligned.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000826 __ Str(LowRegisterFrom(invoke->GetLocations()->InAt(1)), MemOperand(addr));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100827 __ Str(HighRegisterFrom(invoke->GetLocations()->InAt(1)), MemOperand(addr, 4));
828}
829
830void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeShortNative(HInvoke* invoke) {
831 CreateIntIntToVoidLocations(arena_, invoke);
832}
833
834void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeShortNative(HInvoke* invoke) {
835 ArmVIXLAssembler* assembler = GetAssembler();
Scott Wakelingb77051e2016-11-21 19:46:00 +0000836 __ Strh(InputRegisterAt(invoke, 1), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100837}
838
839void IntrinsicLocationsBuilderARMVIXL::VisitThreadCurrentThread(HInvoke* invoke) {
840 LocationSummary* locations = new (arena_) LocationSummary(invoke,
841 LocationSummary::kNoCall,
842 kIntrinsified);
843 locations->SetOut(Location::RequiresRegister());
844}
845
846void IntrinsicCodeGeneratorARMVIXL::VisitThreadCurrentThread(HInvoke* invoke) {
847 ArmVIXLAssembler* assembler = GetAssembler();
848 __ Ldr(OutputRegister(invoke),
849 MemOperand(tr, Thread::PeerOffset<kArmPointerSize>().Int32Value()));
850}
851
852static void GenUnsafeGet(HInvoke* invoke,
853 Primitive::Type type,
854 bool is_volatile,
855 CodeGeneratorARMVIXL* codegen) {
856 LocationSummary* locations = invoke->GetLocations();
857 ArmVIXLAssembler* assembler = codegen->GetAssembler();
858 Location base_loc = locations->InAt(1);
859 vixl32::Register base = InputRegisterAt(invoke, 1); // Object pointer.
860 Location offset_loc = locations->InAt(2);
861 vixl32::Register offset = LowRegisterFrom(offset_loc); // Long offset, lo part only.
862 Location trg_loc = locations->Out();
863
864 switch (type) {
865 case Primitive::kPrimInt: {
866 vixl32::Register trg = RegisterFrom(trg_loc);
867 __ Ldr(trg, MemOperand(base, offset));
868 if (is_volatile) {
869 __ Dmb(vixl32::ISH);
870 }
871 break;
872 }
873
874 case Primitive::kPrimNot: {
875 vixl32::Register trg = RegisterFrom(trg_loc);
876 if (kEmitCompilerReadBarrier) {
877 if (kUseBakerReadBarrier) {
878 Location temp = locations->GetTemp(0);
879 codegen->GenerateReferenceLoadWithBakerReadBarrier(
880 invoke, trg_loc, base, 0U, offset_loc, TIMES_1, temp, /* needs_null_check */ false);
881 if (is_volatile) {
882 __ Dmb(vixl32::ISH);
883 }
884 } else {
885 __ Ldr(trg, MemOperand(base, offset));
886 if (is_volatile) {
887 __ Dmb(vixl32::ISH);
888 }
889 codegen->GenerateReadBarrierSlow(invoke, trg_loc, trg_loc, base_loc, 0U, offset_loc);
890 }
891 } else {
892 __ Ldr(trg, MemOperand(base, offset));
893 if (is_volatile) {
894 __ Dmb(vixl32::ISH);
895 }
896 assembler->MaybeUnpoisonHeapReference(trg);
897 }
898 break;
899 }
900
901 case Primitive::kPrimLong: {
902 vixl32::Register trg_lo = LowRegisterFrom(trg_loc);
903 vixl32::Register trg_hi = HighRegisterFrom(trg_loc);
904 if (is_volatile && !codegen->GetInstructionSetFeatures().HasAtomicLdrdAndStrd()) {
Artem Serov657022c2016-11-23 14:19:38 +0000905 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
906 const vixl32::Register temp_reg = temps.Acquire();
907 __ Add(temp_reg, base, offset);
908 __ Ldrexd(trg_lo, trg_hi, MemOperand(temp_reg));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100909 } else {
910 __ Ldrd(trg_lo, trg_hi, MemOperand(base, offset));
911 }
912 if (is_volatile) {
913 __ Dmb(vixl32::ISH);
914 }
915 break;
916 }
917
918 default:
919 LOG(FATAL) << "Unexpected type " << type;
920 UNREACHABLE();
921 }
922}
923
924static void CreateIntIntIntToIntLocations(ArenaAllocator* arena,
925 HInvoke* invoke,
926 Primitive::Type type) {
927 bool can_call = kEmitCompilerReadBarrier &&
928 (invoke->GetIntrinsic() == Intrinsics::kUnsafeGetObject ||
929 invoke->GetIntrinsic() == Intrinsics::kUnsafeGetObjectVolatile);
930 LocationSummary* locations = new (arena) LocationSummary(invoke,
931 (can_call
932 ? LocationSummary::kCallOnSlowPath
933 : LocationSummary::kNoCall),
934 kIntrinsified);
935 if (can_call && kUseBakerReadBarrier) {
936 locations->SetCustomSlowPathCallerSaves(RegisterSet::Empty()); // No caller-save registers.
937 }
938 locations->SetInAt(0, Location::NoLocation()); // Unused receiver.
939 locations->SetInAt(1, Location::RequiresRegister());
940 locations->SetInAt(2, Location::RequiresRegister());
941 locations->SetOut(Location::RequiresRegister(),
942 (can_call ? Location::kOutputOverlap : Location::kNoOutputOverlap));
943 if (type == Primitive::kPrimNot && kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
944 // We need a temporary register for the read barrier marking slow
945 // path in InstructionCodeGeneratorARM::GenerateReferenceLoadWithBakerReadBarrier.
946 locations->AddTemp(Location::RequiresRegister());
947 }
948}
949
950void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGet(HInvoke* invoke) {
951 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimInt);
952}
953void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetVolatile(HInvoke* invoke) {
954 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimInt);
955}
956void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetLong(HInvoke* invoke) {
957 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimLong);
958}
959void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetLongVolatile(HInvoke* invoke) {
960 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimLong);
961}
962void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetObject(HInvoke* invoke) {
963 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimNot);
964}
965void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetObjectVolatile(HInvoke* invoke) {
966 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimNot);
967}
968
969void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGet(HInvoke* invoke) {
970 GenUnsafeGet(invoke, Primitive::kPrimInt, /* is_volatile */ false, codegen_);
971}
972void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetVolatile(HInvoke* invoke) {
973 GenUnsafeGet(invoke, Primitive::kPrimInt, /* is_volatile */ true, codegen_);
974}
975void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetLong(HInvoke* invoke) {
976 GenUnsafeGet(invoke, Primitive::kPrimLong, /* is_volatile */ false, codegen_);
977}
978void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetLongVolatile(HInvoke* invoke) {
979 GenUnsafeGet(invoke, Primitive::kPrimLong, /* is_volatile */ true, codegen_);
980}
981void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetObject(HInvoke* invoke) {
982 GenUnsafeGet(invoke, Primitive::kPrimNot, /* is_volatile */ false, codegen_);
983}
984void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetObjectVolatile(HInvoke* invoke) {
985 GenUnsafeGet(invoke, Primitive::kPrimNot, /* is_volatile */ true, codegen_);
986}
987
988static void CreateIntIntIntIntToVoid(ArenaAllocator* arena,
989 const ArmInstructionSetFeatures& features,
990 Primitive::Type type,
991 bool is_volatile,
992 HInvoke* invoke) {
993 LocationSummary* locations = new (arena) LocationSummary(invoke,
994 LocationSummary::kNoCall,
995 kIntrinsified);
996 locations->SetInAt(0, Location::NoLocation()); // Unused receiver.
997 locations->SetInAt(1, Location::RequiresRegister());
998 locations->SetInAt(2, Location::RequiresRegister());
999 locations->SetInAt(3, Location::RequiresRegister());
1000
1001 if (type == Primitive::kPrimLong) {
1002 // Potentially need temps for ldrexd-strexd loop.
1003 if (is_volatile && !features.HasAtomicLdrdAndStrd()) {
1004 locations->AddTemp(Location::RequiresRegister()); // Temp_lo.
1005 locations->AddTemp(Location::RequiresRegister()); // Temp_hi.
1006 }
1007 } else if (type == Primitive::kPrimNot) {
1008 // Temps for card-marking.
1009 locations->AddTemp(Location::RequiresRegister()); // Temp.
1010 locations->AddTemp(Location::RequiresRegister()); // Card.
1011 }
1012}
1013
1014void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePut(HInvoke* invoke) {
1015 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimInt, /* is_volatile */ false, invoke);
1016}
1017void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutOrdered(HInvoke* invoke) {
1018 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimInt, /* is_volatile */ false, invoke);
1019}
1020void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutVolatile(HInvoke* invoke) {
1021 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimInt, /* is_volatile */ true, invoke);
1022}
1023void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutObject(HInvoke* invoke) {
1024 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimNot, /* is_volatile */ false, invoke);
1025}
1026void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutObjectOrdered(HInvoke* invoke) {
1027 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimNot, /* is_volatile */ false, invoke);
1028}
1029void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutObjectVolatile(HInvoke* invoke) {
1030 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimNot, /* is_volatile */ true, invoke);
1031}
1032void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutLong(HInvoke* invoke) {
1033 CreateIntIntIntIntToVoid(
1034 arena_, features_, Primitive::kPrimLong, /* is_volatile */ false, invoke);
1035}
1036void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutLongOrdered(HInvoke* invoke) {
1037 CreateIntIntIntIntToVoid(
1038 arena_, features_, Primitive::kPrimLong, /* is_volatile */ false, invoke);
1039}
1040void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutLongVolatile(HInvoke* invoke) {
1041 CreateIntIntIntIntToVoid(
1042 arena_, features_, Primitive::kPrimLong, /* is_volatile */ true, invoke);
1043}
1044
1045static void GenUnsafePut(LocationSummary* locations,
1046 Primitive::Type type,
1047 bool is_volatile,
1048 bool is_ordered,
1049 CodeGeneratorARMVIXL* codegen) {
1050 ArmVIXLAssembler* assembler = codegen->GetAssembler();
1051
1052 vixl32::Register base = RegisterFrom(locations->InAt(1)); // Object pointer.
1053 vixl32::Register offset = LowRegisterFrom(locations->InAt(2)); // Long offset, lo part only.
1054 vixl32::Register value;
1055
1056 if (is_volatile || is_ordered) {
1057 __ Dmb(vixl32::ISH);
1058 }
1059
1060 if (type == Primitive::kPrimLong) {
1061 vixl32::Register value_lo = LowRegisterFrom(locations->InAt(3));
1062 vixl32::Register value_hi = HighRegisterFrom(locations->InAt(3));
1063 value = value_lo;
1064 if (is_volatile && !codegen->GetInstructionSetFeatures().HasAtomicLdrdAndStrd()) {
1065 vixl32::Register temp_lo = RegisterFrom(locations->GetTemp(0));
1066 vixl32::Register temp_hi = RegisterFrom(locations->GetTemp(1));
1067 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
1068 const vixl32::Register temp_reg = temps.Acquire();
1069
1070 __ Add(temp_reg, base, offset);
1071 vixl32::Label loop_head;
1072 __ Bind(&loop_head);
Scott Wakelingb77051e2016-11-21 19:46:00 +00001073 __ Ldrexd(temp_lo, temp_hi, MemOperand(temp_reg));
1074 __ Strexd(temp_lo, value_lo, value_hi, MemOperand(temp_reg));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001075 __ Cmp(temp_lo, 0);
Artem Serov517d9f62016-12-12 15:51:15 +00001076 __ B(ne, &loop_head, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001077 } else {
1078 __ Strd(value_lo, value_hi, MemOperand(base, offset));
1079 }
1080 } else {
1081 value = RegisterFrom(locations->InAt(3));
1082 vixl32::Register source = value;
1083 if (kPoisonHeapReferences && type == Primitive::kPrimNot) {
1084 vixl32::Register temp = RegisterFrom(locations->GetTemp(0));
1085 __ Mov(temp, value);
1086 assembler->PoisonHeapReference(temp);
1087 source = temp;
1088 }
1089 __ Str(source, MemOperand(base, offset));
1090 }
1091
1092 if (is_volatile) {
1093 __ Dmb(vixl32::ISH);
1094 }
1095
1096 if (type == Primitive::kPrimNot) {
1097 vixl32::Register temp = RegisterFrom(locations->GetTemp(0));
1098 vixl32::Register card = RegisterFrom(locations->GetTemp(1));
1099 bool value_can_be_null = true; // TODO: Worth finding out this information?
1100 codegen->MarkGCCard(temp, card, base, value, value_can_be_null);
1101 }
1102}
1103
1104void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePut(HInvoke* invoke) {
1105 GenUnsafePut(invoke->GetLocations(),
1106 Primitive::kPrimInt,
1107 /* is_volatile */ false,
1108 /* is_ordered */ false,
1109 codegen_);
1110}
1111void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutOrdered(HInvoke* invoke) {
1112 GenUnsafePut(invoke->GetLocations(),
1113 Primitive::kPrimInt,
1114 /* is_volatile */ false,
1115 /* is_ordered */ true,
1116 codegen_);
1117}
1118void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutVolatile(HInvoke* invoke) {
1119 GenUnsafePut(invoke->GetLocations(),
1120 Primitive::kPrimInt,
1121 /* is_volatile */ true,
1122 /* is_ordered */ false,
1123 codegen_);
1124}
1125void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutObject(HInvoke* invoke) {
1126 GenUnsafePut(invoke->GetLocations(),
1127 Primitive::kPrimNot,
1128 /* is_volatile */ false,
1129 /* is_ordered */ false,
1130 codegen_);
1131}
1132void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutObjectOrdered(HInvoke* invoke) {
1133 GenUnsafePut(invoke->GetLocations(),
1134 Primitive::kPrimNot,
1135 /* is_volatile */ false,
1136 /* is_ordered */ true,
1137 codegen_);
1138}
1139void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutObjectVolatile(HInvoke* invoke) {
1140 GenUnsafePut(invoke->GetLocations(),
1141 Primitive::kPrimNot,
1142 /* is_volatile */ true,
1143 /* is_ordered */ false,
1144 codegen_);
1145}
1146void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutLong(HInvoke* invoke) {
1147 GenUnsafePut(invoke->GetLocations(),
1148 Primitive::kPrimLong,
1149 /* is_volatile */ false,
1150 /* is_ordered */ false,
1151 codegen_);
1152}
1153void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutLongOrdered(HInvoke* invoke) {
1154 GenUnsafePut(invoke->GetLocations(),
1155 Primitive::kPrimLong,
1156 /* is_volatile */ false,
1157 /* is_ordered */ true,
1158 codegen_);
1159}
1160void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutLongVolatile(HInvoke* invoke) {
1161 GenUnsafePut(invoke->GetLocations(),
1162 Primitive::kPrimLong,
1163 /* is_volatile */ true,
1164 /* is_ordered */ false,
1165 codegen_);
1166}
1167
1168static void CreateIntIntIntIntIntToIntPlusTemps(ArenaAllocator* arena,
1169 HInvoke* invoke,
1170 Primitive::Type type) {
1171 bool can_call = kEmitCompilerReadBarrier &&
1172 kUseBakerReadBarrier &&
1173 (invoke->GetIntrinsic() == Intrinsics::kUnsafeCASObject);
1174 LocationSummary* locations = new (arena) LocationSummary(invoke,
1175 (can_call
1176 ? LocationSummary::kCallOnSlowPath
1177 : LocationSummary::kNoCall),
1178 kIntrinsified);
1179 locations->SetInAt(0, Location::NoLocation()); // Unused receiver.
1180 locations->SetInAt(1, Location::RequiresRegister());
1181 locations->SetInAt(2, Location::RequiresRegister());
1182 locations->SetInAt(3, Location::RequiresRegister());
1183 locations->SetInAt(4, Location::RequiresRegister());
1184
1185 // If heap poisoning is enabled, we don't want the unpoisoning
1186 // operations to potentially clobber the output. Likewise when
1187 // emitting a (Baker) read barrier, which may call.
1188 Location::OutputOverlap overlaps =
1189 ((kPoisonHeapReferences && type == Primitive::kPrimNot) || can_call)
1190 ? Location::kOutputOverlap
1191 : Location::kNoOutputOverlap;
1192 locations->SetOut(Location::RequiresRegister(), overlaps);
1193
1194 // Temporary registers used in CAS. In the object case
1195 // (UnsafeCASObject intrinsic), these are also used for
1196 // card-marking, and possibly for (Baker) read barrier.
1197 locations->AddTemp(Location::RequiresRegister()); // Pointer.
1198 locations->AddTemp(Location::RequiresRegister()); // Temp 1.
1199}
1200
1201static void GenCas(HInvoke* invoke, Primitive::Type type, CodeGeneratorARMVIXL* codegen) {
1202 DCHECK_NE(type, Primitive::kPrimLong);
1203
1204 ArmVIXLAssembler* assembler = codegen->GetAssembler();
1205 LocationSummary* locations = invoke->GetLocations();
1206
1207 Location out_loc = locations->Out();
1208 vixl32::Register out = OutputRegister(invoke); // Boolean result.
1209
1210 vixl32::Register base = InputRegisterAt(invoke, 1); // Object pointer.
1211 Location offset_loc = locations->InAt(2);
1212 vixl32::Register offset = LowRegisterFrom(offset_loc); // Offset (discard high 4B).
1213 vixl32::Register expected = InputRegisterAt(invoke, 3); // Expected.
1214 vixl32::Register value = InputRegisterAt(invoke, 4); // Value.
1215
1216 Location tmp_ptr_loc = locations->GetTemp(0);
1217 vixl32::Register tmp_ptr = RegisterFrom(tmp_ptr_loc); // Pointer to actual memory.
1218 vixl32::Register tmp = RegisterFrom(locations->GetTemp(1)); // Value in memory.
1219
1220 if (type == Primitive::kPrimNot) {
1221 // The only read barrier implementation supporting the
1222 // UnsafeCASObject intrinsic is the Baker-style read barriers.
1223 DCHECK(!kEmitCompilerReadBarrier || kUseBakerReadBarrier);
1224
1225 // Mark card for object assuming new value is stored. Worst case we will mark an unchanged
1226 // object and scan the receiver at the next GC for nothing.
1227 bool value_can_be_null = true; // TODO: Worth finding out this information?
1228 codegen->MarkGCCard(tmp_ptr, tmp, base, value, value_can_be_null);
1229
1230 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
1231 // Need to make sure the reference stored in the field is a to-space
1232 // one before attempting the CAS or the CAS could fail incorrectly.
1233 codegen->GenerateReferenceLoadWithBakerReadBarrier(
1234 invoke,
1235 out_loc, // Unused, used only as a "temporary" within the read barrier.
1236 base,
1237 /* offset */ 0u,
1238 /* index */ offset_loc,
1239 ScaleFactor::TIMES_1,
1240 tmp_ptr_loc,
1241 /* needs_null_check */ false,
1242 /* always_update_field */ true,
1243 &tmp);
1244 }
1245 }
1246
1247 // Prevent reordering with prior memory operations.
1248 // Emit a DMB ISH instruction instead of an DMB ISHST one, as the
1249 // latter allows a preceding load to be delayed past the STXR
1250 // instruction below.
1251 __ Dmb(vixl32::ISH);
1252
1253 __ Add(tmp_ptr, base, offset);
1254
1255 if (kPoisonHeapReferences && type == Primitive::kPrimNot) {
1256 codegen->GetAssembler()->PoisonHeapReference(expected);
1257 if (value.Is(expected)) {
1258 // Do not poison `value`, as it is the same register as
1259 // `expected`, which has just been poisoned.
1260 } else {
1261 codegen->GetAssembler()->PoisonHeapReference(value);
1262 }
1263 }
1264
1265 // do {
1266 // tmp = [r_ptr] - expected;
1267 // } while (tmp == 0 && failure([r_ptr] <- r_new_value));
1268 // result = tmp != 0;
1269
1270 vixl32::Label loop_head;
1271 __ Bind(&loop_head);
1272
Scott Wakelingb77051e2016-11-21 19:46:00 +00001273 __ Ldrex(tmp, MemOperand(tmp_ptr));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001274
1275 __ Subs(tmp, tmp, expected);
1276
1277 {
Artem Serov0fb37192016-12-06 18:13:40 +00001278 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1279 3 * kMaxInstructionSizeInBytes,
1280 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001281
1282 __ itt(eq);
Scott Wakelingb77051e2016-11-21 19:46:00 +00001283 __ strex(eq, tmp, value, MemOperand(tmp_ptr));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001284 __ cmp(eq, tmp, 1);
1285 }
1286
Artem Serov517d9f62016-12-12 15:51:15 +00001287 __ B(eq, &loop_head, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001288
1289 __ Dmb(vixl32::ISH);
1290
1291 __ Rsbs(out, tmp, 1);
1292
1293 {
Artem Serov0fb37192016-12-06 18:13:40 +00001294 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1295 2 * kMaxInstructionSizeInBytes,
1296 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001297
1298 __ it(cc);
1299 __ mov(cc, out, 0);
1300 }
1301
1302 if (kPoisonHeapReferences && type == Primitive::kPrimNot) {
1303 codegen->GetAssembler()->UnpoisonHeapReference(expected);
1304 if (value.Is(expected)) {
1305 // Do not unpoison `value`, as it is the same register as
1306 // `expected`, which has just been unpoisoned.
1307 } else {
1308 codegen->GetAssembler()->UnpoisonHeapReference(value);
1309 }
1310 }
1311}
1312
1313void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeCASInt(HInvoke* invoke) {
1314 CreateIntIntIntIntIntToIntPlusTemps(arena_, invoke, Primitive::kPrimInt);
1315}
1316void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeCASObject(HInvoke* invoke) {
1317 // The only read barrier implementation supporting the
1318 // UnsafeCASObject intrinsic is the Baker-style read barriers.
1319 if (kEmitCompilerReadBarrier && !kUseBakerReadBarrier) {
1320 return;
1321 }
1322
1323 CreateIntIntIntIntIntToIntPlusTemps(arena_, invoke, Primitive::kPrimNot);
1324}
1325void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeCASInt(HInvoke* invoke) {
1326 GenCas(invoke, Primitive::kPrimInt, codegen_);
1327}
1328void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeCASObject(HInvoke* invoke) {
1329 // The only read barrier implementation supporting the
1330 // UnsafeCASObject intrinsic is the Baker-style read barriers.
1331 DCHECK(!kEmitCompilerReadBarrier || kUseBakerReadBarrier);
1332
1333 GenCas(invoke, Primitive::kPrimNot, codegen_);
1334}
1335
1336void IntrinsicLocationsBuilderARMVIXL::VisitStringCompareTo(HInvoke* invoke) {
1337 // The inputs plus one temp.
1338 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1339 invoke->InputAt(1)->CanBeNull()
1340 ? LocationSummary::kCallOnSlowPath
1341 : LocationSummary::kNoCall,
1342 kIntrinsified);
1343 locations->SetInAt(0, Location::RequiresRegister());
1344 locations->SetInAt(1, Location::RequiresRegister());
1345 locations->AddTemp(Location::RequiresRegister());
1346 locations->AddTemp(Location::RequiresRegister());
1347 locations->AddTemp(Location::RequiresRegister());
1348 // Need temporary registers for String compression's feature.
1349 if (mirror::kUseStringCompression) {
1350 locations->AddTemp(Location::RequiresRegister());
Anton Kirilov5ec62182016-10-13 20:16:02 +01001351 }
1352 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
1353}
1354
1355void IntrinsicCodeGeneratorARMVIXL::VisitStringCompareTo(HInvoke* invoke) {
1356 ArmVIXLAssembler* assembler = GetAssembler();
1357 LocationSummary* locations = invoke->GetLocations();
1358
1359 vixl32::Register str = InputRegisterAt(invoke, 0);
1360 vixl32::Register arg = InputRegisterAt(invoke, 1);
1361 vixl32::Register out = OutputRegister(invoke);
1362
1363 vixl32::Register temp0 = RegisterFrom(locations->GetTemp(0));
1364 vixl32::Register temp1 = RegisterFrom(locations->GetTemp(1));
1365 vixl32::Register temp2 = RegisterFrom(locations->GetTemp(2));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001366 vixl32::Register temp3;
Anton Kirilov5ec62182016-10-13 20:16:02 +01001367 if (mirror::kUseStringCompression) {
1368 temp3 = RegisterFrom(locations->GetTemp(3));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001369 }
1370
1371 vixl32::Label loop;
1372 vixl32::Label find_char_diff;
1373 vixl32::Label end;
1374 vixl32::Label different_compression;
1375
1376 // Get offsets of count and value fields within a string object.
1377 const int32_t count_offset = mirror::String::CountOffset().Int32Value();
1378 const int32_t value_offset = mirror::String::ValueOffset().Int32Value();
1379
1380 // Note that the null check must have been done earlier.
1381 DCHECK(!invoke->CanDoImplicitNullCheckOn(invoke->InputAt(0)));
1382
1383 // Take slow path and throw if input can be and is null.
1384 SlowPathCodeARMVIXL* slow_path = nullptr;
1385 const bool can_slow_path = invoke->InputAt(1)->CanBeNull();
1386 if (can_slow_path) {
1387 slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
1388 codegen_->AddSlowPath(slow_path);
xueliang.zhongf51bc622016-11-04 09:23:32 +00001389 __ CompareAndBranchIfZero(arg, slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01001390 }
1391
1392 // Reference equality check, return 0 if same reference.
1393 __ Subs(out, str, arg);
1394 __ B(eq, &end);
1395
Anton Kirilov5ec62182016-10-13 20:16:02 +01001396 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001397 // Load `count` fields of this and argument strings.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001398 __ Ldr(temp3, MemOperand(str, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001399 __ Ldr(temp2, MemOperand(arg, count_offset));
1400 // Extract lengths from the `count` fields.
1401 __ Lsr(temp0, temp3, 1u);
1402 __ Lsr(temp1, temp2, 1u);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001403 } else {
1404 // Load lengths of this and argument strings.
1405 __ Ldr(temp0, MemOperand(str, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001406 __ Ldr(temp1, MemOperand(arg, count_offset));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001407 }
1408 // out = length diff.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001409 __ Subs(out, temp0, temp1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001410 // temp0 = min(len(str), len(arg)).
1411
1412 {
Artem Serov0fb37192016-12-06 18:13:40 +00001413 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1414 2 * kMaxInstructionSizeInBytes,
1415 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001416
1417 __ it(gt);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001418 __ mov(gt, temp0, temp1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001419 }
1420
Anton Kirilov5ec62182016-10-13 20:16:02 +01001421 // Shorter string is empty?
xueliang.zhongf51bc622016-11-04 09:23:32 +00001422 // Note that mirror::kUseStringCompression==true introduces lots of instructions,
1423 // which makes &end label far away from this branch and makes it not 'CBZ-encodable'.
1424 __ CompareAndBranchIfZero(temp0, &end, mirror::kUseStringCompression);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001425
1426 if (mirror::kUseStringCompression) {
1427 // Check if both strings using same compression style to use this comparison loop.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001428 __ Eors(temp2, temp2, temp3);
1429 __ Lsrs(temp2, temp2, 1u);
1430 __ B(cs, &different_compression);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001431 // For string compression, calculate the number of bytes to compare (not chars).
1432 // This could in theory exceed INT32_MAX, so treat temp0 as unsigned.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001433 __ Lsls(temp3, temp3, 31u); // Extract purely the compression flag.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001434
Artem Serov0fb37192016-12-06 18:13:40 +00001435 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1436 2 * kMaxInstructionSizeInBytes,
1437 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001438
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001439 __ it(ne);
1440 __ add(ne, temp0, temp0, temp0);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001441 }
1442
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001443 // Store offset of string value in preparation for comparison loop.
1444 __ Mov(temp1, value_offset);
1445
Anton Kirilov5ec62182016-10-13 20:16:02 +01001446 // Assertions that must hold in order to compare multiple characters at a time.
1447 CHECK_ALIGNED(value_offset, 8);
1448 static_assert(IsAligned<8>(kObjectAlignment),
1449 "String data must be 8-byte aligned for unrolled CompareTo loop.");
1450
Scott Wakelingb77051e2016-11-21 19:46:00 +00001451 const unsigned char_size = Primitive::ComponentSize(Primitive::kPrimChar);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001452 DCHECK_EQ(char_size, 2u);
1453
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001454 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
1455
Anton Kirilov5ec62182016-10-13 20:16:02 +01001456 vixl32::Label find_char_diff_2nd_cmp;
1457 // Unrolled loop comparing 4x16-bit chars per iteration (ok because of string data alignment).
1458 __ Bind(&loop);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001459 vixl32::Register temp_reg = temps.Acquire();
Anton Kirilov5ec62182016-10-13 20:16:02 +01001460 __ Ldr(temp_reg, MemOperand(str, temp1));
1461 __ Ldr(temp2, MemOperand(arg, temp1));
1462 __ Cmp(temp_reg, temp2);
Artem Serov517d9f62016-12-12 15:51:15 +00001463 __ B(ne, &find_char_diff, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001464 __ Add(temp1, temp1, char_size * 2);
1465
1466 __ Ldr(temp_reg, MemOperand(str, temp1));
1467 __ Ldr(temp2, MemOperand(arg, temp1));
1468 __ Cmp(temp_reg, temp2);
Artem Serov517d9f62016-12-12 15:51:15 +00001469 __ B(ne, &find_char_diff_2nd_cmp, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001470 __ Add(temp1, temp1, char_size * 2);
1471 // With string compression, we have compared 8 bytes, otherwise 4 chars.
1472 __ Subs(temp0, temp0, (mirror::kUseStringCompression ? 8 : 4));
Artem Serov517d9f62016-12-12 15:51:15 +00001473 __ B(hi, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001474 __ B(&end);
1475
1476 __ Bind(&find_char_diff_2nd_cmp);
1477 if (mirror::kUseStringCompression) {
1478 __ Subs(temp0, temp0, 4); // 4 bytes previously compared.
Artem Serov517d9f62016-12-12 15:51:15 +00001479 __ B(ls, &end, /* far_target */ false); // Was the second comparison fully beyond the end?
Anton Kirilov5ec62182016-10-13 20:16:02 +01001480 } else {
1481 // Without string compression, we can start treating temp0 as signed
1482 // and rely on the signed comparison below.
1483 __ Sub(temp0, temp0, 2);
1484 }
1485
1486 // Find the single character difference.
1487 __ Bind(&find_char_diff);
1488 // Get the bit position of the first character that differs.
1489 __ Eor(temp1, temp2, temp_reg);
1490 __ Rbit(temp1, temp1);
1491 __ Clz(temp1, temp1);
1492
1493 // temp0 = number of characters remaining to compare.
1494 // (Without string compression, it could be < 1 if a difference is found by the second CMP
1495 // in the comparison loop, and after the end of the shorter string data).
1496
1497 // Without string compression (temp1 >> 4) = character where difference occurs between the last
1498 // two words compared, in the interval [0,1].
1499 // (0 for low half-word different, 1 for high half-word different).
1500 // With string compression, (temp1 << 3) = byte where the difference occurs,
1501 // in the interval [0,3].
1502
1503 // If temp0 <= (temp1 >> (kUseStringCompression ? 3 : 4)), the difference occurs outside
1504 // the remaining string data, so just return length diff (out).
1505 // The comparison is unsigned for string compression, otherwise signed.
1506 __ Cmp(temp0, Operand(temp1, vixl32::LSR, (mirror::kUseStringCompression ? 3 : 4)));
Artem Serov517d9f62016-12-12 15:51:15 +00001507 __ B((mirror::kUseStringCompression ? ls : le), &end, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001508
Anton Kirilov5ec62182016-10-13 20:16:02 +01001509 // Extract the characters and calculate the difference.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001510 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001511 // For compressed strings we need to clear 0x7 from temp1, for uncompressed we need to clear
1512 // 0xf. We also need to prepare the character extraction mask `uncompressed ? 0xffffu : 0xffu`.
1513 // The compression flag is now in the highest bit of temp3, so let's play some tricks.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001514 __ Orr(temp3, temp3, 0xffu << 23); // uncompressed ? 0xff800000u : 0x7ff80000u
1515 __ Bic(temp1, temp1, Operand(temp3, vixl32::LSR, 31 - 3)); // &= ~(uncompressed ? 0xfu : 0x7u)
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001516 __ Asr(temp3, temp3, 7u); // uncompressed ? 0xffff0000u : 0xff0000u.
1517 __ Lsr(temp2, temp2, temp1); // Extract second character.
1518 __ Lsr(temp3, temp3, 16u); // uncompressed ? 0xffffu : 0xffu
1519 __ Lsr(out, temp_reg, temp1); // Extract first character.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001520 __ And(temp2, temp2, temp3);
1521 __ And(out, out, temp3);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001522 } else {
Anton Kirilovb88c4842016-11-14 14:37:00 +00001523 __ Bic(temp1, temp1, 0xf);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001524 __ Lsr(temp2, temp2, temp1);
1525 __ Lsr(out, temp_reg, temp1);
Anton Kirilovb88c4842016-11-14 14:37:00 +00001526 __ Movt(temp2, 0);
1527 __ Movt(out, 0);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001528 }
Anton Kirilov5ec62182016-10-13 20:16:02 +01001529
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001530 __ Sub(out, out, temp2);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001531 temps.Release(temp_reg);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001532
1533 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001534 __ B(&end);
1535 __ Bind(&different_compression);
1536
1537 // Comparison for different compression style.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001538 const size_t c_char_size = Primitive::ComponentSize(Primitive::kPrimByte);
1539 DCHECK_EQ(c_char_size, 1u);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001540
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001541 // We want to free up the temp3, currently holding `str.count`, for comparison.
1542 // So, we move it to the bottom bit of the iteration count `temp0` which we tnen
1543 // need to treat as unsigned. Start by freeing the bit with an ADD and continue
1544 // further down by a LSRS+SBC which will flip the meaning of the flag but allow
1545 // `subs temp0, #2; bhi different_compression_loop` to serve as the loop condition.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001546 __ Add(temp0, temp0, temp0); // Unlike LSL, this ADD is always 16-bit.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001547 // `temp1` will hold the compressed data pointer, `temp2` the uncompressed data pointer.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001548 __ Mov(temp1, str);
1549 __ Mov(temp2, arg);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001550 __ Lsrs(temp3, temp3, 1u); // Continue the move of the compression flag.
1551 {
Artem Serov0fb37192016-12-06 18:13:40 +00001552 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1553 3 * kMaxInstructionSizeInBytes,
1554 CodeBufferCheckScope::kMaximumSize);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001555 __ itt(cs); // Interleave with selection of temp1 and temp2.
1556 __ mov(cs, temp1, arg); // Preserves flags.
1557 __ mov(cs, temp2, str); // Preserves flags.
1558 }
Anton Kirilovb88c4842016-11-14 14:37:00 +00001559 __ Sbc(temp0, temp0, 0); // Complete the move of the compression flag.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001560
1561 // Adjust temp1 and temp2 from string pointers to data pointers.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001562 __ Add(temp1, temp1, value_offset);
1563 __ Add(temp2, temp2, value_offset);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001564
1565 vixl32::Label different_compression_loop;
1566 vixl32::Label different_compression_diff;
1567
1568 // Main loop for different compression.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001569 temp_reg = temps.Acquire();
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001570 __ Bind(&different_compression_loop);
1571 __ Ldrb(temp_reg, MemOperand(temp1, c_char_size, PostIndex));
1572 __ Ldrh(temp3, MemOperand(temp2, char_size, PostIndex));
Anton Kirilovb88c4842016-11-14 14:37:00 +00001573 __ Cmp(temp_reg, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00001574 __ B(ne, &different_compression_diff, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001575 __ Subs(temp0, temp0, 2);
Artem Serov517d9f62016-12-12 15:51:15 +00001576 __ B(hi, &different_compression_loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001577 __ B(&end);
1578
1579 // Calculate the difference.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001580 __ Bind(&different_compression_diff);
1581 __ Sub(out, temp_reg, temp3);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001582 temps.Release(temp_reg);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001583 // Flip the difference if the `arg` is compressed.
1584 // `temp0` contains inverted `str` compression flag, i.e the same as `arg` compression flag.
1585 __ Lsrs(temp0, temp0, 1u);
1586 static_assert(static_cast<uint32_t>(mirror::StringCompressionFlag::kCompressed) == 0u,
1587 "Expecting 0=compressed, 1=uncompressed");
1588
Artem Serov0fb37192016-12-06 18:13:40 +00001589 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1590 2 * kMaxInstructionSizeInBytes,
1591 CodeBufferCheckScope::kMaximumSize);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001592 __ it(cc);
1593 __ rsb(cc, out, out, 0);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001594 }
1595
1596 __ Bind(&end);
1597
1598 if (can_slow_path) {
1599 __ Bind(slow_path->GetExitLabel());
1600 }
1601}
1602
1603void IntrinsicLocationsBuilderARMVIXL::VisitStringEquals(HInvoke* invoke) {
1604 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1605 LocationSummary::kNoCall,
1606 kIntrinsified);
1607 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1608 locations->SetInAt(0, Location::RequiresRegister());
1609 locations->SetInAt(1, Location::RequiresRegister());
1610 // Temporary registers to store lengths of strings and for calculations.
1611 // Using instruction cbz requires a low register, so explicitly set a temp to be R0.
1612 locations->AddTemp(LocationFrom(r0));
1613 locations->AddTemp(Location::RequiresRegister());
1614 locations->AddTemp(Location::RequiresRegister());
1615
1616 locations->SetOut(Location::RequiresRegister());
1617}
1618
1619void IntrinsicCodeGeneratorARMVIXL::VisitStringEquals(HInvoke* invoke) {
1620 ArmVIXLAssembler* assembler = GetAssembler();
1621 LocationSummary* locations = invoke->GetLocations();
1622
1623 vixl32::Register str = InputRegisterAt(invoke, 0);
1624 vixl32::Register arg = InputRegisterAt(invoke, 1);
1625 vixl32::Register out = OutputRegister(invoke);
1626
1627 vixl32::Register temp = RegisterFrom(locations->GetTemp(0));
1628 vixl32::Register temp1 = RegisterFrom(locations->GetTemp(1));
1629 vixl32::Register temp2 = RegisterFrom(locations->GetTemp(2));
1630
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001631 vixl32::Label loop;
Anton Kirilov5ec62182016-10-13 20:16:02 +01001632 vixl32::Label end;
1633 vixl32::Label return_true;
1634 vixl32::Label return_false;
1635
1636 // Get offsets of count, value, and class fields within a string object.
1637 const uint32_t count_offset = mirror::String::CountOffset().Uint32Value();
1638 const uint32_t value_offset = mirror::String::ValueOffset().Uint32Value();
1639 const uint32_t class_offset = mirror::Object::ClassOffset().Uint32Value();
1640
1641 // Note that the null check must have been done earlier.
1642 DCHECK(!invoke->CanDoImplicitNullCheckOn(invoke->InputAt(0)));
1643
1644 StringEqualsOptimizations optimizations(invoke);
1645 if (!optimizations.GetArgumentNotNull()) {
1646 // Check if input is null, return false if it is.
xueliang.zhongf51bc622016-11-04 09:23:32 +00001647 __ CompareAndBranchIfZero(arg, &return_false, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001648 }
1649
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001650 // Reference equality check, return true if same reference.
1651 __ Cmp(str, arg);
Artem Serov517d9f62016-12-12 15:51:15 +00001652 __ B(eq, &return_true, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001653
Anton Kirilov5ec62182016-10-13 20:16:02 +01001654 if (!optimizations.GetArgumentIsString()) {
1655 // Instanceof check for the argument by comparing class fields.
1656 // All string objects must have the same type since String cannot be subclassed.
1657 // Receiver must be a string object, so its class field is equal to all strings' class fields.
1658 // If the argument is a string object, its class field must be equal to receiver's class field.
1659 __ Ldr(temp, MemOperand(str, class_offset));
1660 __ Ldr(temp1, MemOperand(arg, class_offset));
1661 __ Cmp(temp, temp1);
Artem Serov517d9f62016-12-12 15:51:15 +00001662 __ B(ne, &return_false, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001663 }
1664
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001665 // Load `count` fields of this and argument strings.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001666 __ Ldr(temp, MemOperand(str, count_offset));
1667 __ Ldr(temp1, MemOperand(arg, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001668 // Check if `count` fields are equal, return false if they're not.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001669 // Also compares the compression style, if differs return false.
1670 __ Cmp(temp, temp1);
Artem Serov517d9f62016-12-12 15:51:15 +00001671 __ B(ne, &return_false, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001672 // Return true if both strings are empty. Even with string compression `count == 0` means empty.
1673 static_assert(static_cast<uint32_t>(mirror::StringCompressionFlag::kCompressed) == 0u,
1674 "Expecting 0=compressed, 1=uncompressed");
xueliang.zhongf51bc622016-11-04 09:23:32 +00001675 __ CompareAndBranchIfZero(temp, &return_true, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001676
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001677 // Assertions that must hold in order to compare strings 4 bytes at a time.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001678 DCHECK_ALIGNED(value_offset, 4);
1679 static_assert(IsAligned<4>(kObjectAlignment), "String data must be aligned for fast compare.");
1680
1681 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001682 // For string compression, calculate the number of bytes to compare (not chars).
1683 // This could in theory exceed INT32_MAX, so treat temp as unsigned.
1684 __ Lsrs(temp, temp, 1u); // Extract length and check compression flag.
Artem Serov0fb37192016-12-06 18:13:40 +00001685 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1686 2 * kMaxInstructionSizeInBytes,
1687 CodeBufferCheckScope::kMaximumSize);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001688 __ it(cs); // If uncompressed,
1689 __ add(cs, temp, temp, temp); // double the byte count.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001690 }
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001691
1692 // Store offset of string value in preparation for comparison loop.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001693 __ Mov(temp1, value_offset);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001694
1695 // Loop to compare strings 4 bytes at a time starting at the front of the string.
1696 // Ok to do this because strings are zero-padded to kObjectAlignment.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001697 __ Bind(&loop);
1698 __ Ldr(out, MemOperand(str, temp1));
1699 __ Ldr(temp2, MemOperand(arg, temp1));
Scott Wakelingb77051e2016-11-21 19:46:00 +00001700 __ Add(temp1, temp1, Operand::From(sizeof(uint32_t)));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001701 __ Cmp(out, temp2);
Artem Serov517d9f62016-12-12 15:51:15 +00001702 __ B(ne, &return_false, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001703 // With string compression, we have compared 4 bytes, otherwise 2 chars.
1704 __ Subs(temp, temp, mirror::kUseStringCompression ? 4 : 2);
Artem Serov517d9f62016-12-12 15:51:15 +00001705 __ B(hi, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001706
1707 // Return true and exit the function.
1708 // If loop does not result in returning false, we return true.
1709 __ Bind(&return_true);
1710 __ Mov(out, 1);
1711 __ B(&end);
1712
1713 // Return false and exit the function.
1714 __ Bind(&return_false);
1715 __ Mov(out, 0);
1716 __ Bind(&end);
1717}
1718
1719static void GenerateVisitStringIndexOf(HInvoke* invoke,
1720 ArmVIXLAssembler* assembler,
1721 CodeGeneratorARMVIXL* codegen,
1722 ArenaAllocator* allocator,
1723 bool start_at_zero) {
1724 LocationSummary* locations = invoke->GetLocations();
1725
1726 // Note that the null check must have been done earlier.
1727 DCHECK(!invoke->CanDoImplicitNullCheckOn(invoke->InputAt(0)));
1728
1729 // Check for code points > 0xFFFF. Either a slow-path check when we don't know statically,
1730 // or directly dispatch for a large constant, or omit slow-path for a small constant or a char.
1731 SlowPathCodeARMVIXL* slow_path = nullptr;
1732 HInstruction* code_point = invoke->InputAt(1);
1733 if (code_point->IsIntConstant()) {
Anton Kirilov644032c2016-12-06 17:51:43 +00001734 if (static_cast<uint32_t>(Int32ConstantFrom(code_point)) >
Anton Kirilov5ec62182016-10-13 20:16:02 +01001735 std::numeric_limits<uint16_t>::max()) {
1736 // Always needs the slow-path. We could directly dispatch to it, but this case should be
1737 // rare, so for simplicity just put the full slow-path down and branch unconditionally.
1738 slow_path = new (allocator) IntrinsicSlowPathARMVIXL(invoke);
1739 codegen->AddSlowPath(slow_path);
1740 __ B(slow_path->GetEntryLabel());
1741 __ Bind(slow_path->GetExitLabel());
1742 return;
1743 }
1744 } else if (code_point->GetType() != Primitive::kPrimChar) {
1745 vixl32::Register char_reg = InputRegisterAt(invoke, 1);
1746 // 0xffff is not modified immediate but 0x10000 is, so use `>= 0x10000` instead of `> 0xffff`.
1747 __ Cmp(char_reg, static_cast<uint32_t>(std::numeric_limits<uint16_t>::max()) + 1);
1748 slow_path = new (allocator) IntrinsicSlowPathARMVIXL(invoke);
1749 codegen->AddSlowPath(slow_path);
1750 __ B(hs, slow_path->GetEntryLabel());
1751 }
1752
1753 if (start_at_zero) {
1754 vixl32::Register tmp_reg = RegisterFrom(locations->GetTemp(0));
1755 DCHECK(tmp_reg.Is(r2));
1756 // Start-index = 0.
1757 __ Mov(tmp_reg, 0);
1758 }
1759
1760 codegen->InvokeRuntime(kQuickIndexOf, invoke, invoke->GetDexPc(), slow_path);
1761 CheckEntrypointTypes<kQuickIndexOf, int32_t, void*, uint32_t, uint32_t>();
1762
1763 if (slow_path != nullptr) {
1764 __ Bind(slow_path->GetExitLabel());
1765 }
1766}
1767
1768void IntrinsicLocationsBuilderARMVIXL::VisitStringIndexOf(HInvoke* invoke) {
1769 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1770 LocationSummary::kCallOnMainAndSlowPath,
1771 kIntrinsified);
1772 // We have a hand-crafted assembly stub that follows the runtime calling convention. So it's
1773 // best to align the inputs accordingly.
1774 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1775 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1776 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1777 locations->SetOut(LocationFrom(r0));
1778
1779 // Need to send start-index=0.
1780 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(2)));
1781}
1782
1783void IntrinsicCodeGeneratorARMVIXL::VisitStringIndexOf(HInvoke* invoke) {
1784 GenerateVisitStringIndexOf(
1785 invoke, GetAssembler(), codegen_, GetAllocator(), /* start_at_zero */ true);
1786}
1787
1788void IntrinsicLocationsBuilderARMVIXL::VisitStringIndexOfAfter(HInvoke* invoke) {
1789 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1790 LocationSummary::kCallOnMainAndSlowPath,
1791 kIntrinsified);
1792 // We have a hand-crafted assembly stub that follows the runtime calling convention. So it's
1793 // best to align the inputs accordingly.
1794 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1795 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1796 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1797 locations->SetInAt(2, LocationFrom(calling_convention.GetRegisterAt(2)));
1798 locations->SetOut(LocationFrom(r0));
1799}
1800
1801void IntrinsicCodeGeneratorARMVIXL::VisitStringIndexOfAfter(HInvoke* invoke) {
1802 GenerateVisitStringIndexOf(
1803 invoke, GetAssembler(), codegen_, GetAllocator(), /* start_at_zero */ false);
1804}
1805
1806void IntrinsicLocationsBuilderARMVIXL::VisitStringNewStringFromBytes(HInvoke* invoke) {
1807 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1808 LocationSummary::kCallOnMainAndSlowPath,
1809 kIntrinsified);
1810 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1811 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1812 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1813 locations->SetInAt(2, LocationFrom(calling_convention.GetRegisterAt(2)));
1814 locations->SetInAt(3, LocationFrom(calling_convention.GetRegisterAt(3)));
1815 locations->SetOut(LocationFrom(r0));
1816}
1817
1818void IntrinsicCodeGeneratorARMVIXL::VisitStringNewStringFromBytes(HInvoke* invoke) {
1819 ArmVIXLAssembler* assembler = GetAssembler();
1820 vixl32::Register byte_array = InputRegisterAt(invoke, 0);
1821 __ Cmp(byte_array, 0);
1822 SlowPathCodeARMVIXL* slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
1823 codegen_->AddSlowPath(slow_path);
1824 __ B(eq, slow_path->GetEntryLabel());
1825
1826 codegen_->InvokeRuntime(kQuickAllocStringFromBytes, invoke, invoke->GetDexPc(), slow_path);
1827 CheckEntrypointTypes<kQuickAllocStringFromBytes, void*, void*, int32_t, int32_t, int32_t>();
1828 __ Bind(slow_path->GetExitLabel());
1829}
1830
1831void IntrinsicLocationsBuilderARMVIXL::VisitStringNewStringFromChars(HInvoke* invoke) {
1832 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1833 LocationSummary::kCallOnMainOnly,
1834 kIntrinsified);
1835 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1836 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1837 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1838 locations->SetInAt(2, LocationFrom(calling_convention.GetRegisterAt(2)));
1839 locations->SetOut(LocationFrom(r0));
1840}
1841
1842void IntrinsicCodeGeneratorARMVIXL::VisitStringNewStringFromChars(HInvoke* invoke) {
1843 // No need to emit code checking whether `locations->InAt(2)` is a null
1844 // pointer, as callers of the native method
1845 //
1846 // java.lang.StringFactory.newStringFromChars(int offset, int charCount, char[] data)
1847 //
1848 // all include a null check on `data` before calling that method.
1849 codegen_->InvokeRuntime(kQuickAllocStringFromChars, invoke, invoke->GetDexPc());
1850 CheckEntrypointTypes<kQuickAllocStringFromChars, void*, int32_t, int32_t, void*>();
1851}
1852
1853void IntrinsicLocationsBuilderARMVIXL::VisitStringNewStringFromString(HInvoke* invoke) {
1854 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1855 LocationSummary::kCallOnMainAndSlowPath,
1856 kIntrinsified);
1857 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1858 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1859 locations->SetOut(LocationFrom(r0));
1860}
1861
1862void IntrinsicCodeGeneratorARMVIXL::VisitStringNewStringFromString(HInvoke* invoke) {
1863 ArmVIXLAssembler* assembler = GetAssembler();
1864 vixl32::Register string_to_copy = InputRegisterAt(invoke, 0);
1865 __ Cmp(string_to_copy, 0);
1866 SlowPathCodeARMVIXL* slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
1867 codegen_->AddSlowPath(slow_path);
1868 __ B(eq, slow_path->GetEntryLabel());
1869
1870 codegen_->InvokeRuntime(kQuickAllocStringFromString, invoke, invoke->GetDexPc(), slow_path);
1871 CheckEntrypointTypes<kQuickAllocStringFromString, void*, void*>();
1872
1873 __ Bind(slow_path->GetExitLabel());
1874}
1875
1876void IntrinsicLocationsBuilderARMVIXL::VisitSystemArrayCopy(HInvoke* invoke) {
1877 // The only read barrier implementation supporting the
1878 // SystemArrayCopy intrinsic is the Baker-style read barriers.
1879 if (kEmitCompilerReadBarrier && !kUseBakerReadBarrier) {
1880 return;
1881 }
1882
1883 CodeGenerator::CreateSystemArrayCopyLocationSummary(invoke);
1884 LocationSummary* locations = invoke->GetLocations();
1885 if (locations == nullptr) {
1886 return;
1887 }
1888
1889 HIntConstant* src_pos = invoke->InputAt(1)->AsIntConstant();
1890 HIntConstant* dest_pos = invoke->InputAt(3)->AsIntConstant();
1891 HIntConstant* length = invoke->InputAt(4)->AsIntConstant();
1892
1893 if (src_pos != nullptr && !assembler_->ShifterOperandCanAlwaysHold(src_pos->GetValue())) {
1894 locations->SetInAt(1, Location::RequiresRegister());
1895 }
1896 if (dest_pos != nullptr && !assembler_->ShifterOperandCanAlwaysHold(dest_pos->GetValue())) {
1897 locations->SetInAt(3, Location::RequiresRegister());
1898 }
1899 if (length != nullptr && !assembler_->ShifterOperandCanAlwaysHold(length->GetValue())) {
1900 locations->SetInAt(4, Location::RequiresRegister());
1901 }
1902 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
1903 // Temporary register IP cannot be used in
1904 // ReadBarrierSystemArrayCopySlowPathARM (because that register
1905 // is clobbered by ReadBarrierMarkRegX entry points). Get an extra
1906 // temporary register from the register allocator.
1907 locations->AddTemp(Location::RequiresRegister());
1908 }
1909}
1910
1911static void CheckPosition(ArmVIXLAssembler* assembler,
1912 Location pos,
1913 vixl32::Register input,
1914 Location length,
1915 SlowPathCodeARMVIXL* slow_path,
1916 vixl32::Register temp,
1917 bool length_is_input_length = false) {
1918 // Where is the length in the Array?
1919 const uint32_t length_offset = mirror::Array::LengthOffset().Uint32Value();
1920
1921 if (pos.IsConstant()) {
1922 int32_t pos_const = Int32ConstantFrom(pos);
1923 if (pos_const == 0) {
1924 if (!length_is_input_length) {
1925 // Check that length(input) >= length.
1926 __ Ldr(temp, MemOperand(input, length_offset));
1927 if (length.IsConstant()) {
1928 __ Cmp(temp, Int32ConstantFrom(length));
1929 } else {
1930 __ Cmp(temp, RegisterFrom(length));
1931 }
1932 __ B(lt, slow_path->GetEntryLabel());
1933 }
1934 } else {
1935 // Check that length(input) >= pos.
1936 __ Ldr(temp, MemOperand(input, length_offset));
1937 __ Subs(temp, temp, pos_const);
1938 __ B(lt, slow_path->GetEntryLabel());
1939
1940 // Check that (length(input) - pos) >= length.
1941 if (length.IsConstant()) {
1942 __ Cmp(temp, Int32ConstantFrom(length));
1943 } else {
1944 __ Cmp(temp, RegisterFrom(length));
1945 }
1946 __ B(lt, slow_path->GetEntryLabel());
1947 }
1948 } else if (length_is_input_length) {
1949 // The only way the copy can succeed is if pos is zero.
1950 vixl32::Register pos_reg = RegisterFrom(pos);
xueliang.zhongf51bc622016-11-04 09:23:32 +00001951 __ CompareAndBranchIfNonZero(pos_reg, slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01001952 } else {
1953 // Check that pos >= 0.
1954 vixl32::Register pos_reg = RegisterFrom(pos);
1955 __ Cmp(pos_reg, 0);
1956 __ B(lt, slow_path->GetEntryLabel());
1957
1958 // Check that pos <= length(input).
1959 __ Ldr(temp, MemOperand(input, length_offset));
1960 __ Subs(temp, temp, pos_reg);
1961 __ B(lt, slow_path->GetEntryLabel());
1962
1963 // Check that (length(input) - pos) >= length.
1964 if (length.IsConstant()) {
1965 __ Cmp(temp, Int32ConstantFrom(length));
1966 } else {
1967 __ Cmp(temp, RegisterFrom(length));
1968 }
1969 __ B(lt, slow_path->GetEntryLabel());
1970 }
1971}
1972
1973void IntrinsicCodeGeneratorARMVIXL::VisitSystemArrayCopy(HInvoke* invoke) {
1974 // The only read barrier implementation supporting the
1975 // SystemArrayCopy intrinsic is the Baker-style read barriers.
1976 DCHECK(!kEmitCompilerReadBarrier || kUseBakerReadBarrier);
1977
1978 ArmVIXLAssembler* assembler = GetAssembler();
1979 LocationSummary* locations = invoke->GetLocations();
1980
1981 uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
1982 uint32_t super_offset = mirror::Class::SuperClassOffset().Int32Value();
1983 uint32_t component_offset = mirror::Class::ComponentTypeOffset().Int32Value();
1984 uint32_t primitive_offset = mirror::Class::PrimitiveTypeOffset().Int32Value();
1985 uint32_t monitor_offset = mirror::Object::MonitorOffset().Int32Value();
1986
1987 vixl32::Register src = InputRegisterAt(invoke, 0);
1988 Location src_pos = locations->InAt(1);
1989 vixl32::Register dest = InputRegisterAt(invoke, 2);
1990 Location dest_pos = locations->InAt(3);
1991 Location length = locations->InAt(4);
1992 Location temp1_loc = locations->GetTemp(0);
1993 vixl32::Register temp1 = RegisterFrom(temp1_loc);
1994 Location temp2_loc = locations->GetTemp(1);
1995 vixl32::Register temp2 = RegisterFrom(temp2_loc);
1996 Location temp3_loc = locations->GetTemp(2);
1997 vixl32::Register temp3 = RegisterFrom(temp3_loc);
1998
1999 SlowPathCodeARMVIXL* intrinsic_slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
2000 codegen_->AddSlowPath(intrinsic_slow_path);
2001
2002 vixl32::Label conditions_on_positions_validated;
2003 SystemArrayCopyOptimizations optimizations(invoke);
2004
2005 // If source and destination are the same, we go to slow path if we need to do
2006 // forward copying.
2007 if (src_pos.IsConstant()) {
2008 int32_t src_pos_constant = Int32ConstantFrom(src_pos);
2009 if (dest_pos.IsConstant()) {
2010 int32_t dest_pos_constant = Int32ConstantFrom(dest_pos);
2011 if (optimizations.GetDestinationIsSource()) {
2012 // Checked when building locations.
2013 DCHECK_GE(src_pos_constant, dest_pos_constant);
2014 } else if (src_pos_constant < dest_pos_constant) {
2015 __ Cmp(src, dest);
2016 __ B(eq, intrinsic_slow_path->GetEntryLabel());
2017 }
2018
2019 // Checked when building locations.
2020 DCHECK(!optimizations.GetDestinationIsSource()
2021 || (src_pos_constant >= Int32ConstantFrom(dest_pos)));
2022 } else {
2023 if (!optimizations.GetDestinationIsSource()) {
2024 __ Cmp(src, dest);
Artem Serov517d9f62016-12-12 15:51:15 +00002025 __ B(ne, &conditions_on_positions_validated, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002026 }
2027 __ Cmp(RegisterFrom(dest_pos), src_pos_constant);
2028 __ B(gt, intrinsic_slow_path->GetEntryLabel());
2029 }
2030 } else {
2031 if (!optimizations.GetDestinationIsSource()) {
2032 __ Cmp(src, dest);
Artem Serov517d9f62016-12-12 15:51:15 +00002033 __ B(ne, &conditions_on_positions_validated, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002034 }
2035 if (dest_pos.IsConstant()) {
2036 int32_t dest_pos_constant = Int32ConstantFrom(dest_pos);
2037 __ Cmp(RegisterFrom(src_pos), dest_pos_constant);
2038 } else {
2039 __ Cmp(RegisterFrom(src_pos), RegisterFrom(dest_pos));
2040 }
2041 __ B(lt, intrinsic_slow_path->GetEntryLabel());
2042 }
2043
2044 __ Bind(&conditions_on_positions_validated);
2045
2046 if (!optimizations.GetSourceIsNotNull()) {
2047 // Bail out if the source is null.
xueliang.zhongf51bc622016-11-04 09:23:32 +00002048 __ CompareAndBranchIfZero(src, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002049 }
2050
2051 if (!optimizations.GetDestinationIsNotNull() && !optimizations.GetDestinationIsSource()) {
2052 // Bail out if the destination is null.
xueliang.zhongf51bc622016-11-04 09:23:32 +00002053 __ CompareAndBranchIfZero(dest, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002054 }
2055
2056 // If the length is negative, bail out.
2057 // We have already checked in the LocationsBuilder for the constant case.
2058 if (!length.IsConstant() &&
2059 !optimizations.GetCountIsSourceLength() &&
2060 !optimizations.GetCountIsDestinationLength()) {
2061 __ Cmp(RegisterFrom(length), 0);
2062 __ B(lt, intrinsic_slow_path->GetEntryLabel());
2063 }
2064
2065 // Validity checks: source.
2066 CheckPosition(assembler,
2067 src_pos,
2068 src,
2069 length,
2070 intrinsic_slow_path,
2071 temp1,
2072 optimizations.GetCountIsSourceLength());
2073
2074 // Validity checks: dest.
2075 CheckPosition(assembler,
2076 dest_pos,
2077 dest,
2078 length,
2079 intrinsic_slow_path,
2080 temp1,
2081 optimizations.GetCountIsDestinationLength());
2082
2083 if (!optimizations.GetDoesNotNeedTypeCheck()) {
2084 // Check whether all elements of the source array are assignable to the component
2085 // type of the destination array. We do two checks: the classes are the same,
2086 // or the destination is Object[]. If none of these checks succeed, we go to the
2087 // slow path.
2088
2089 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
2090 if (!optimizations.GetSourceIsNonPrimitiveArray()) {
2091 // /* HeapReference<Class> */ temp1 = src->klass_
2092 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2093 invoke, temp1_loc, src, class_offset, temp2_loc, /* needs_null_check */ false);
2094 // Bail out if the source is not a non primitive array.
2095 // /* HeapReference<Class> */ temp1 = temp1->component_type_
2096 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2097 invoke, temp1_loc, temp1, component_offset, temp2_loc, /* needs_null_check */ false);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002098 __ CompareAndBranchIfZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002099 // If heap poisoning is enabled, `temp1` has been unpoisoned
2100 // by the the previous call to GenerateFieldLoadWithBakerReadBarrier.
2101 // /* uint16_t */ temp1 = static_cast<uint16>(temp1->primitive_type_);
2102 __ Ldrh(temp1, MemOperand(temp1, primitive_offset));
2103 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002104 __ CompareAndBranchIfNonZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002105 }
2106
2107 // /* HeapReference<Class> */ temp1 = dest->klass_
2108 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2109 invoke, temp1_loc, dest, class_offset, temp2_loc, /* needs_null_check */ false);
2110
2111 if (!optimizations.GetDestinationIsNonPrimitiveArray()) {
2112 // Bail out if the destination is not a non primitive array.
2113 //
2114 // Register `temp1` is not trashed by the read barrier emitted
2115 // by GenerateFieldLoadWithBakerReadBarrier below, as that
2116 // method produces a call to a ReadBarrierMarkRegX entry point,
2117 // which saves all potentially live registers, including
2118 // temporaries such a `temp1`.
2119 // /* HeapReference<Class> */ temp2 = temp1->component_type_
2120 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2121 invoke, temp2_loc, temp1, component_offset, temp3_loc, /* needs_null_check */ false);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002122 __ CompareAndBranchIfZero(temp2, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002123 // If heap poisoning is enabled, `temp2` has been unpoisoned
2124 // by the the previous call to GenerateFieldLoadWithBakerReadBarrier.
2125 // /* uint16_t */ temp2 = static_cast<uint16>(temp2->primitive_type_);
2126 __ Ldrh(temp2, MemOperand(temp2, primitive_offset));
2127 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002128 __ CompareAndBranchIfNonZero(temp2, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002129 }
2130
2131 // For the same reason given earlier, `temp1` is not trashed by the
2132 // read barrier emitted by GenerateFieldLoadWithBakerReadBarrier below.
2133 // /* HeapReference<Class> */ temp2 = src->klass_
2134 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2135 invoke, temp2_loc, src, class_offset, temp3_loc, /* needs_null_check */ false);
2136 // Note: if heap poisoning is on, we are comparing two unpoisoned references here.
2137 __ Cmp(temp1, temp2);
2138
2139 if (optimizations.GetDestinationIsTypedObjectArray()) {
2140 vixl32::Label do_copy;
Artem Serov517d9f62016-12-12 15:51:15 +00002141 __ B(eq, &do_copy, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002142 // /* HeapReference<Class> */ temp1 = temp1->component_type_
2143 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2144 invoke, temp1_loc, temp1, component_offset, temp2_loc, /* needs_null_check */ false);
2145 // /* HeapReference<Class> */ temp1 = temp1->super_class_
2146 // We do not need to emit a read barrier for the following
2147 // heap reference load, as `temp1` is only used in a
2148 // comparison with null below, and this reference is not
2149 // kept afterwards.
2150 __ Ldr(temp1, MemOperand(temp1, super_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002151 __ CompareAndBranchIfNonZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002152 __ Bind(&do_copy);
2153 } else {
2154 __ B(ne, intrinsic_slow_path->GetEntryLabel());
2155 }
2156 } else {
2157 // Non read barrier code.
2158
2159 // /* HeapReference<Class> */ temp1 = dest->klass_
2160 __ Ldr(temp1, MemOperand(dest, class_offset));
2161 // /* HeapReference<Class> */ temp2 = src->klass_
2162 __ Ldr(temp2, MemOperand(src, class_offset));
2163 bool did_unpoison = false;
2164 if (!optimizations.GetDestinationIsNonPrimitiveArray() ||
2165 !optimizations.GetSourceIsNonPrimitiveArray()) {
2166 // One or two of the references need to be unpoisoned. Unpoison them
2167 // both to make the identity check valid.
2168 assembler->MaybeUnpoisonHeapReference(temp1);
2169 assembler->MaybeUnpoisonHeapReference(temp2);
2170 did_unpoison = true;
2171 }
2172
2173 if (!optimizations.GetDestinationIsNonPrimitiveArray()) {
2174 // Bail out if the destination is not a non primitive array.
2175 // /* HeapReference<Class> */ temp3 = temp1->component_type_
2176 __ Ldr(temp3, MemOperand(temp1, component_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002177 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002178 assembler->MaybeUnpoisonHeapReference(temp3);
2179 // /* uint16_t */ temp3 = static_cast<uint16>(temp3->primitive_type_);
2180 __ Ldrh(temp3, MemOperand(temp3, primitive_offset));
2181 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002182 __ CompareAndBranchIfNonZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002183 }
2184
2185 if (!optimizations.GetSourceIsNonPrimitiveArray()) {
2186 // Bail out if the source is not a non primitive array.
2187 // /* HeapReference<Class> */ temp3 = temp2->component_type_
2188 __ Ldr(temp3, MemOperand(temp2, component_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002189 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002190 assembler->MaybeUnpoisonHeapReference(temp3);
2191 // /* uint16_t */ temp3 = static_cast<uint16>(temp3->primitive_type_);
2192 __ Ldrh(temp3, MemOperand(temp3, primitive_offset));
2193 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002194 __ CompareAndBranchIfNonZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002195 }
2196
2197 __ Cmp(temp1, temp2);
2198
2199 if (optimizations.GetDestinationIsTypedObjectArray()) {
2200 vixl32::Label do_copy;
Artem Serov517d9f62016-12-12 15:51:15 +00002201 __ B(eq, &do_copy, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002202 if (!did_unpoison) {
2203 assembler->MaybeUnpoisonHeapReference(temp1);
2204 }
2205 // /* HeapReference<Class> */ temp1 = temp1->component_type_
2206 __ Ldr(temp1, MemOperand(temp1, component_offset));
2207 assembler->MaybeUnpoisonHeapReference(temp1);
2208 // /* HeapReference<Class> */ temp1 = temp1->super_class_
2209 __ Ldr(temp1, MemOperand(temp1, super_offset));
2210 // No need to unpoison the result, we're comparing against null.
xueliang.zhongf51bc622016-11-04 09:23:32 +00002211 __ CompareAndBranchIfNonZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002212 __ Bind(&do_copy);
2213 } else {
2214 __ B(ne, intrinsic_slow_path->GetEntryLabel());
2215 }
2216 }
2217 } else if (!optimizations.GetSourceIsNonPrimitiveArray()) {
2218 DCHECK(optimizations.GetDestinationIsNonPrimitiveArray());
2219 // Bail out if the source is not a non primitive array.
2220 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
2221 // /* HeapReference<Class> */ temp1 = src->klass_
2222 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2223 invoke, temp1_loc, src, class_offset, temp2_loc, /* needs_null_check */ false);
2224 // /* HeapReference<Class> */ temp3 = temp1->component_type_
2225 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2226 invoke, temp3_loc, temp1, component_offset, temp2_loc, /* needs_null_check */ false);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002227 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002228 // If heap poisoning is enabled, `temp3` has been unpoisoned
2229 // by the the previous call to GenerateFieldLoadWithBakerReadBarrier.
2230 } else {
2231 // /* HeapReference<Class> */ temp1 = src->klass_
2232 __ Ldr(temp1, MemOperand(src, class_offset));
2233 assembler->MaybeUnpoisonHeapReference(temp1);
2234 // /* HeapReference<Class> */ temp3 = temp1->component_type_
2235 __ Ldr(temp3, MemOperand(temp1, component_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002236 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002237 assembler->MaybeUnpoisonHeapReference(temp3);
2238 }
2239 // /* uint16_t */ temp3 = static_cast<uint16>(temp3->primitive_type_);
2240 __ Ldrh(temp3, MemOperand(temp3, primitive_offset));
2241 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002242 __ CompareAndBranchIfNonZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002243 }
2244
2245 int32_t element_size = Primitive::ComponentSize(Primitive::kPrimNot);
2246 uint32_t element_size_shift = Primitive::ComponentSizeShift(Primitive::kPrimNot);
2247 uint32_t offset = mirror::Array::DataOffset(element_size).Uint32Value();
2248
2249 // Compute the base source address in `temp1`.
2250 if (src_pos.IsConstant()) {
2251 int32_t constant = Int32ConstantFrom(src_pos);
2252 __ Add(temp1, src, element_size * constant + offset);
2253 } else {
2254 __ Add(temp1, src, Operand(RegisterFrom(src_pos), vixl32::LSL, element_size_shift));
2255 __ Add(temp1, temp1, offset);
2256 }
2257
2258 // Compute the end source address in `temp3`.
2259 if (length.IsConstant()) {
2260 int32_t constant = Int32ConstantFrom(length);
2261 __ Add(temp3, temp1, element_size * constant);
2262 } else {
2263 __ Add(temp3, temp1, Operand(RegisterFrom(length), vixl32::LSL, element_size_shift));
2264 }
2265
2266 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
2267 // The base destination address is computed later, as `temp2` is
2268 // used for intermediate computations.
2269
2270 // SystemArrayCopy implementation for Baker read barriers (see
2271 // also CodeGeneratorARM::GenerateReferenceLoadWithBakerReadBarrier):
2272 //
2273 // if (src_ptr != end_ptr) {
2274 // uint32_t rb_state = Lockword(src->monitor_).ReadBarrierState();
2275 // lfence; // Load fence or artificial data dependency to prevent load-load reordering
Roland Levillain4bbca2a2016-11-03 18:09:18 +00002276 // bool is_gray = (rb_state == ReadBarrier::GrayState());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002277 // if (is_gray) {
2278 // // Slow-path copy.
2279 // do {
2280 // *dest_ptr++ = MaybePoison(ReadBarrier::Mark(MaybeUnpoison(*src_ptr++)));
2281 // } while (src_ptr != end_ptr)
2282 // } else {
2283 // // Fast-path copy.
2284 // do {
2285 // *dest_ptr++ = *src_ptr++;
2286 // } while (src_ptr != end_ptr)
2287 // }
2288 // }
2289
2290 vixl32::Label loop, done;
2291
2292 // Don't enter copy loop if `length == 0`.
2293 __ Cmp(temp1, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00002294 __ B(eq, &done, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002295
2296 // /* int32_t */ monitor = src->monitor_
2297 __ Ldr(temp2, MemOperand(src, monitor_offset));
2298 // /* LockWord */ lock_word = LockWord(monitor)
2299 static_assert(sizeof(LockWord) == sizeof(int32_t),
2300 "art::LockWord and int32_t have different sizes.");
2301
2302 // Introduce a dependency on the lock_word including the rb_state,
2303 // which shall prevent load-load reordering without using
2304 // a memory barrier (which would be more expensive).
2305 // `src` is unchanged by this operation, but its value now depends
2306 // on `temp2`.
2307 __ Add(src, src, Operand(temp2, vixl32::LSR, 32));
2308
2309 // Slow path used to copy array when `src` is gray.
2310 SlowPathCodeARMVIXL* read_barrier_slow_path =
2311 new (GetAllocator()) ReadBarrierSystemArrayCopySlowPathARMVIXL(invoke);
2312 codegen_->AddSlowPath(read_barrier_slow_path);
2313
2314 // Given the numeric representation, it's enough to check the low bit of the
2315 // rb_state. We do that by shifting the bit out of the lock word with LSRS
2316 // which can be a 16-bit instruction unlike the TST immediate.
Roland Levillain4bbca2a2016-11-03 18:09:18 +00002317 static_assert(ReadBarrier::WhiteState() == 0, "Expecting white to have value 0");
2318 static_assert(ReadBarrier::GrayState() == 1, "Expecting gray to have value 1");
Anton Kirilov5ec62182016-10-13 20:16:02 +01002319 __ Lsrs(temp2, temp2, LockWord::kReadBarrierStateShift + 1);
2320 // Carry flag is the last bit shifted out by LSRS.
2321 __ B(cs, read_barrier_slow_path->GetEntryLabel());
2322
2323 // Fast-path copy.
2324
2325 // Compute the base destination address in `temp2`.
2326 if (dest_pos.IsConstant()) {
2327 int32_t constant = Int32ConstantFrom(dest_pos);
2328 __ Add(temp2, dest, element_size * constant + offset);
2329 } else {
2330 __ Add(temp2, dest, Operand(RegisterFrom(dest_pos), vixl32::LSL, element_size_shift));
2331 __ Add(temp2, temp2, offset);
2332 }
2333
2334 // Iterate over the arrays and do a raw copy of the objects. We don't need to
2335 // poison/unpoison.
2336 __ Bind(&loop);
2337
2338 {
2339 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2340 const vixl32::Register temp_reg = temps.Acquire();
2341
2342 __ Ldr(temp_reg, MemOperand(temp1, element_size, PostIndex));
2343 __ Str(temp_reg, MemOperand(temp2, element_size, PostIndex));
2344 }
2345
2346 __ Cmp(temp1, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00002347 __ B(ne, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002348
2349 __ Bind(read_barrier_slow_path->GetExitLabel());
2350 __ Bind(&done);
2351 } else {
2352 // Non read barrier code.
2353
2354 // Compute the base destination address in `temp2`.
2355 if (dest_pos.IsConstant()) {
2356 int32_t constant = Int32ConstantFrom(dest_pos);
2357 __ Add(temp2, dest, element_size * constant + offset);
2358 } else {
2359 __ Add(temp2, dest, Operand(RegisterFrom(dest_pos), vixl32::LSL, element_size_shift));
2360 __ Add(temp2, temp2, offset);
2361 }
2362
2363 // Iterate over the arrays and do a raw copy of the objects. We don't need to
2364 // poison/unpoison.
2365 vixl32::Label loop, done;
2366 __ Cmp(temp1, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00002367 __ B(eq, &done, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002368 __ Bind(&loop);
2369
2370 {
2371 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2372 const vixl32::Register temp_reg = temps.Acquire();
2373
2374 __ Ldr(temp_reg, MemOperand(temp1, element_size, PostIndex));
2375 __ Str(temp_reg, MemOperand(temp2, element_size, PostIndex));
2376 }
2377
2378 __ Cmp(temp1, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00002379 __ B(ne, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002380 __ Bind(&done);
2381 }
2382
2383 // We only need one card marking on the destination array.
2384 codegen_->MarkGCCard(temp1, temp2, dest, NoReg, /* value_can_be_null */ false);
2385
2386 __ Bind(intrinsic_slow_path->GetExitLabel());
2387}
2388
2389static void CreateFPToFPCallLocations(ArenaAllocator* arena, HInvoke* invoke) {
2390 // If the graph is debuggable, all callee-saved floating-point registers are blocked by
2391 // the code generator. Furthermore, the register allocator creates fixed live intervals
2392 // for all caller-saved registers because we are doing a function call. As a result, if
2393 // the input and output locations are unallocated, the register allocator runs out of
2394 // registers and fails; however, a debuggable graph is not the common case.
2395 if (invoke->GetBlock()->GetGraph()->IsDebuggable()) {
2396 return;
2397 }
2398
2399 DCHECK_EQ(invoke->GetNumberOfArguments(), 1U);
2400 DCHECK_EQ(invoke->InputAt(0)->GetType(), Primitive::kPrimDouble);
2401 DCHECK_EQ(invoke->GetType(), Primitive::kPrimDouble);
2402
2403 LocationSummary* const locations = new (arena) LocationSummary(invoke,
2404 LocationSummary::kCallOnMainOnly,
2405 kIntrinsified);
2406 const InvokeRuntimeCallingConventionARMVIXL calling_convention;
2407
2408 locations->SetInAt(0, Location::RequiresFpuRegister());
2409 locations->SetOut(Location::RequiresFpuRegister());
2410 // Native code uses the soft float ABI.
2411 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(0)));
2412 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(1)));
2413}
2414
2415static void CreateFPFPToFPCallLocations(ArenaAllocator* arena, HInvoke* invoke) {
2416 // If the graph is debuggable, all callee-saved floating-point registers are blocked by
2417 // the code generator. Furthermore, the register allocator creates fixed live intervals
2418 // for all caller-saved registers because we are doing a function call. As a result, if
2419 // the input and output locations are unallocated, the register allocator runs out of
2420 // registers and fails; however, a debuggable graph is not the common case.
2421 if (invoke->GetBlock()->GetGraph()->IsDebuggable()) {
2422 return;
2423 }
2424
2425 DCHECK_EQ(invoke->GetNumberOfArguments(), 2U);
2426 DCHECK_EQ(invoke->InputAt(0)->GetType(), Primitive::kPrimDouble);
2427 DCHECK_EQ(invoke->InputAt(1)->GetType(), Primitive::kPrimDouble);
2428 DCHECK_EQ(invoke->GetType(), Primitive::kPrimDouble);
2429
2430 LocationSummary* const locations = new (arena) LocationSummary(invoke,
2431 LocationSummary::kCallOnMainOnly,
2432 kIntrinsified);
2433 const InvokeRuntimeCallingConventionARMVIXL calling_convention;
2434
2435 locations->SetInAt(0, Location::RequiresFpuRegister());
2436 locations->SetInAt(1, Location::RequiresFpuRegister());
2437 locations->SetOut(Location::RequiresFpuRegister());
2438 // Native code uses the soft float ABI.
2439 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(0)));
2440 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(1)));
2441 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(2)));
2442 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(3)));
2443}
2444
2445static void GenFPToFPCall(HInvoke* invoke,
2446 ArmVIXLAssembler* assembler,
2447 CodeGeneratorARMVIXL* codegen,
2448 QuickEntrypointEnum entry) {
2449 LocationSummary* const locations = invoke->GetLocations();
2450
2451 DCHECK_EQ(invoke->GetNumberOfArguments(), 1U);
2452 DCHECK(locations->WillCall() && locations->Intrinsified());
2453
2454 // Native code uses the soft float ABI.
2455 __ Vmov(RegisterFrom(locations->GetTemp(0)),
2456 RegisterFrom(locations->GetTemp(1)),
2457 InputDRegisterAt(invoke, 0));
2458 codegen->InvokeRuntime(entry, invoke, invoke->GetDexPc());
2459 __ Vmov(OutputDRegister(invoke),
2460 RegisterFrom(locations->GetTemp(0)),
2461 RegisterFrom(locations->GetTemp(1)));
2462}
2463
2464static void GenFPFPToFPCall(HInvoke* invoke,
2465 ArmVIXLAssembler* assembler,
2466 CodeGeneratorARMVIXL* codegen,
2467 QuickEntrypointEnum entry) {
2468 LocationSummary* const locations = invoke->GetLocations();
2469
2470 DCHECK_EQ(invoke->GetNumberOfArguments(), 2U);
2471 DCHECK(locations->WillCall() && locations->Intrinsified());
2472
2473 // Native code uses the soft float ABI.
2474 __ Vmov(RegisterFrom(locations->GetTemp(0)),
2475 RegisterFrom(locations->GetTemp(1)),
2476 InputDRegisterAt(invoke, 0));
2477 __ Vmov(RegisterFrom(locations->GetTemp(2)),
2478 RegisterFrom(locations->GetTemp(3)),
2479 InputDRegisterAt(invoke, 1));
2480 codegen->InvokeRuntime(entry, invoke, invoke->GetDexPc());
2481 __ Vmov(OutputDRegister(invoke),
2482 RegisterFrom(locations->GetTemp(0)),
2483 RegisterFrom(locations->GetTemp(1)));
2484}
2485
2486void IntrinsicLocationsBuilderARMVIXL::VisitMathCos(HInvoke* invoke) {
2487 CreateFPToFPCallLocations(arena_, invoke);
2488}
2489
2490void IntrinsicCodeGeneratorARMVIXL::VisitMathCos(HInvoke* invoke) {
2491 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickCos);
2492}
2493
2494void IntrinsicLocationsBuilderARMVIXL::VisitMathSin(HInvoke* invoke) {
2495 CreateFPToFPCallLocations(arena_, invoke);
2496}
2497
2498void IntrinsicCodeGeneratorARMVIXL::VisitMathSin(HInvoke* invoke) {
2499 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickSin);
2500}
2501
2502void IntrinsicLocationsBuilderARMVIXL::VisitMathAcos(HInvoke* invoke) {
2503 CreateFPToFPCallLocations(arena_, invoke);
2504}
2505
2506void IntrinsicCodeGeneratorARMVIXL::VisitMathAcos(HInvoke* invoke) {
2507 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAcos);
2508}
2509
2510void IntrinsicLocationsBuilderARMVIXL::VisitMathAsin(HInvoke* invoke) {
2511 CreateFPToFPCallLocations(arena_, invoke);
2512}
2513
2514void IntrinsicCodeGeneratorARMVIXL::VisitMathAsin(HInvoke* invoke) {
2515 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAsin);
2516}
2517
2518void IntrinsicLocationsBuilderARMVIXL::VisitMathAtan(HInvoke* invoke) {
2519 CreateFPToFPCallLocations(arena_, invoke);
2520}
2521
2522void IntrinsicCodeGeneratorARMVIXL::VisitMathAtan(HInvoke* invoke) {
2523 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAtan);
2524}
2525
2526void IntrinsicLocationsBuilderARMVIXL::VisitMathCbrt(HInvoke* invoke) {
2527 CreateFPToFPCallLocations(arena_, invoke);
2528}
2529
2530void IntrinsicCodeGeneratorARMVIXL::VisitMathCbrt(HInvoke* invoke) {
2531 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickCbrt);
2532}
2533
2534void IntrinsicLocationsBuilderARMVIXL::VisitMathCosh(HInvoke* invoke) {
2535 CreateFPToFPCallLocations(arena_, invoke);
2536}
2537
2538void IntrinsicCodeGeneratorARMVIXL::VisitMathCosh(HInvoke* invoke) {
2539 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickCosh);
2540}
2541
2542void IntrinsicLocationsBuilderARMVIXL::VisitMathExp(HInvoke* invoke) {
2543 CreateFPToFPCallLocations(arena_, invoke);
2544}
2545
2546void IntrinsicCodeGeneratorARMVIXL::VisitMathExp(HInvoke* invoke) {
2547 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickExp);
2548}
2549
2550void IntrinsicLocationsBuilderARMVIXL::VisitMathExpm1(HInvoke* invoke) {
2551 CreateFPToFPCallLocations(arena_, invoke);
2552}
2553
2554void IntrinsicCodeGeneratorARMVIXL::VisitMathExpm1(HInvoke* invoke) {
2555 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickExpm1);
2556}
2557
2558void IntrinsicLocationsBuilderARMVIXL::VisitMathLog(HInvoke* invoke) {
2559 CreateFPToFPCallLocations(arena_, invoke);
2560}
2561
2562void IntrinsicCodeGeneratorARMVIXL::VisitMathLog(HInvoke* invoke) {
2563 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickLog);
2564}
2565
2566void IntrinsicLocationsBuilderARMVIXL::VisitMathLog10(HInvoke* invoke) {
2567 CreateFPToFPCallLocations(arena_, invoke);
2568}
2569
2570void IntrinsicCodeGeneratorARMVIXL::VisitMathLog10(HInvoke* invoke) {
2571 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickLog10);
2572}
2573
2574void IntrinsicLocationsBuilderARMVIXL::VisitMathSinh(HInvoke* invoke) {
2575 CreateFPToFPCallLocations(arena_, invoke);
2576}
2577
2578void IntrinsicCodeGeneratorARMVIXL::VisitMathSinh(HInvoke* invoke) {
2579 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickSinh);
2580}
2581
2582void IntrinsicLocationsBuilderARMVIXL::VisitMathTan(HInvoke* invoke) {
2583 CreateFPToFPCallLocations(arena_, invoke);
2584}
2585
2586void IntrinsicCodeGeneratorARMVIXL::VisitMathTan(HInvoke* invoke) {
2587 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickTan);
2588}
2589
2590void IntrinsicLocationsBuilderARMVIXL::VisitMathTanh(HInvoke* invoke) {
2591 CreateFPToFPCallLocations(arena_, invoke);
2592}
2593
2594void IntrinsicCodeGeneratorARMVIXL::VisitMathTanh(HInvoke* invoke) {
2595 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickTanh);
2596}
2597
2598void IntrinsicLocationsBuilderARMVIXL::VisitMathAtan2(HInvoke* invoke) {
2599 CreateFPFPToFPCallLocations(arena_, invoke);
2600}
2601
2602void IntrinsicCodeGeneratorARMVIXL::VisitMathAtan2(HInvoke* invoke) {
2603 GenFPFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAtan2);
2604}
2605
2606void IntrinsicLocationsBuilderARMVIXL::VisitMathHypot(HInvoke* invoke) {
2607 CreateFPFPToFPCallLocations(arena_, invoke);
2608}
2609
2610void IntrinsicCodeGeneratorARMVIXL::VisitMathHypot(HInvoke* invoke) {
2611 GenFPFPToFPCall(invoke, GetAssembler(), codegen_, kQuickHypot);
2612}
2613
2614void IntrinsicLocationsBuilderARMVIXL::VisitMathNextAfter(HInvoke* invoke) {
2615 CreateFPFPToFPCallLocations(arena_, invoke);
2616}
2617
2618void IntrinsicCodeGeneratorARMVIXL::VisitMathNextAfter(HInvoke* invoke) {
2619 GenFPFPToFPCall(invoke, GetAssembler(), codegen_, kQuickNextAfter);
2620}
2621
2622void IntrinsicLocationsBuilderARMVIXL::VisitIntegerReverse(HInvoke* invoke) {
2623 CreateIntToIntLocations(arena_, invoke);
2624}
2625
2626void IntrinsicCodeGeneratorARMVIXL::VisitIntegerReverse(HInvoke* invoke) {
2627 ArmVIXLAssembler* assembler = GetAssembler();
2628 __ Rbit(OutputRegister(invoke), InputRegisterAt(invoke, 0));
2629}
2630
2631void IntrinsicLocationsBuilderARMVIXL::VisitLongReverse(HInvoke* invoke) {
2632 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2633 LocationSummary::kNoCall,
2634 kIntrinsified);
2635 locations->SetInAt(0, Location::RequiresRegister());
2636 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
2637}
2638
2639void IntrinsicCodeGeneratorARMVIXL::VisitLongReverse(HInvoke* invoke) {
2640 ArmVIXLAssembler* assembler = GetAssembler();
2641 LocationSummary* locations = invoke->GetLocations();
2642
2643 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0));
2644 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0));
2645 vixl32::Register out_reg_lo = LowRegisterFrom(locations->Out());
2646 vixl32::Register out_reg_hi = HighRegisterFrom(locations->Out());
2647
2648 __ Rbit(out_reg_lo, in_reg_hi);
2649 __ Rbit(out_reg_hi, in_reg_lo);
2650}
2651
2652void IntrinsicLocationsBuilderARMVIXL::VisitIntegerReverseBytes(HInvoke* invoke) {
2653 CreateIntToIntLocations(arena_, invoke);
2654}
2655
2656void IntrinsicCodeGeneratorARMVIXL::VisitIntegerReverseBytes(HInvoke* invoke) {
2657 ArmVIXLAssembler* assembler = GetAssembler();
2658 __ Rev(OutputRegister(invoke), InputRegisterAt(invoke, 0));
2659}
2660
2661void IntrinsicLocationsBuilderARMVIXL::VisitLongReverseBytes(HInvoke* invoke) {
2662 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2663 LocationSummary::kNoCall,
2664 kIntrinsified);
2665 locations->SetInAt(0, Location::RequiresRegister());
2666 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
2667}
2668
2669void IntrinsicCodeGeneratorARMVIXL::VisitLongReverseBytes(HInvoke* invoke) {
2670 ArmVIXLAssembler* assembler = GetAssembler();
2671 LocationSummary* locations = invoke->GetLocations();
2672
2673 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0));
2674 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0));
2675 vixl32::Register out_reg_lo = LowRegisterFrom(locations->Out());
2676 vixl32::Register out_reg_hi = HighRegisterFrom(locations->Out());
2677
2678 __ Rev(out_reg_lo, in_reg_hi);
2679 __ Rev(out_reg_hi, in_reg_lo);
2680}
2681
2682void IntrinsicLocationsBuilderARMVIXL::VisitShortReverseBytes(HInvoke* invoke) {
2683 CreateIntToIntLocations(arena_, invoke);
2684}
2685
2686void IntrinsicCodeGeneratorARMVIXL::VisitShortReverseBytes(HInvoke* invoke) {
2687 ArmVIXLAssembler* assembler = GetAssembler();
2688 __ Revsh(OutputRegister(invoke), InputRegisterAt(invoke, 0));
2689}
2690
2691static void GenBitCount(HInvoke* instr, Primitive::Type type, ArmVIXLAssembler* assembler) {
2692 DCHECK(Primitive::IsIntOrLongType(type)) << type;
2693 DCHECK_EQ(instr->GetType(), Primitive::kPrimInt);
2694 DCHECK_EQ(Primitive::PrimitiveKind(instr->InputAt(0)->GetType()), type);
2695
2696 bool is_long = type == Primitive::kPrimLong;
2697 LocationSummary* locations = instr->GetLocations();
2698 Location in = locations->InAt(0);
2699 vixl32::Register src_0 = is_long ? LowRegisterFrom(in) : RegisterFrom(in);
2700 vixl32::Register src_1 = is_long ? HighRegisterFrom(in) : src_0;
2701 vixl32::SRegister tmp_s = LowSRegisterFrom(locations->GetTemp(0));
2702 vixl32::DRegister tmp_d = DRegisterFrom(locations->GetTemp(0));
2703 vixl32::Register out_r = OutputRegister(instr);
2704
2705 // Move data from core register(s) to temp D-reg for bit count calculation, then move back.
2706 // According to Cortex A57 and A72 optimization guides, compared to transferring to full D-reg,
2707 // transferring data from core reg to upper or lower half of vfp D-reg requires extra latency,
2708 // That's why for integer bit count, we use 'vmov d0, r0, r0' instead of 'vmov d0[0], r0'.
2709 __ Vmov(tmp_d, src_1, src_0); // Temp DReg |--src_1|--src_0|
2710 __ Vcnt(Untyped8, tmp_d, tmp_d); // Temp DReg |c|c|c|c|c|c|c|c|
2711 __ Vpaddl(U8, tmp_d, tmp_d); // Temp DReg |--c|--c|--c|--c|
2712 __ Vpaddl(U16, tmp_d, tmp_d); // Temp DReg |------c|------c|
2713 if (is_long) {
2714 __ Vpaddl(U32, tmp_d, tmp_d); // Temp DReg |--------------c|
2715 }
2716 __ Vmov(out_r, tmp_s);
2717}
2718
2719void IntrinsicLocationsBuilderARMVIXL::VisitIntegerBitCount(HInvoke* invoke) {
2720 CreateIntToIntLocations(arena_, invoke);
2721 invoke->GetLocations()->AddTemp(Location::RequiresFpuRegister());
2722}
2723
2724void IntrinsicCodeGeneratorARMVIXL::VisitIntegerBitCount(HInvoke* invoke) {
2725 GenBitCount(invoke, Primitive::kPrimInt, GetAssembler());
2726}
2727
2728void IntrinsicLocationsBuilderARMVIXL::VisitLongBitCount(HInvoke* invoke) {
2729 VisitIntegerBitCount(invoke);
2730}
2731
2732void IntrinsicCodeGeneratorARMVIXL::VisitLongBitCount(HInvoke* invoke) {
2733 GenBitCount(invoke, Primitive::kPrimLong, GetAssembler());
2734}
2735
2736void IntrinsicLocationsBuilderARMVIXL::VisitStringGetCharsNoCheck(HInvoke* invoke) {
2737 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2738 LocationSummary::kNoCall,
2739 kIntrinsified);
2740 locations->SetInAt(0, Location::RequiresRegister());
2741 locations->SetInAt(1, Location::RequiresRegister());
2742 locations->SetInAt(2, Location::RequiresRegister());
2743 locations->SetInAt(3, Location::RequiresRegister());
2744 locations->SetInAt(4, Location::RequiresRegister());
2745
2746 // Temporary registers to store lengths of strings and for calculations.
2747 locations->AddTemp(Location::RequiresRegister());
2748 locations->AddTemp(Location::RequiresRegister());
2749 locations->AddTemp(Location::RequiresRegister());
2750}
2751
2752void IntrinsicCodeGeneratorARMVIXL::VisitStringGetCharsNoCheck(HInvoke* invoke) {
2753 ArmVIXLAssembler* assembler = GetAssembler();
2754 LocationSummary* locations = invoke->GetLocations();
2755
2756 // Check assumption that sizeof(Char) is 2 (used in scaling below).
2757 const size_t char_size = Primitive::ComponentSize(Primitive::kPrimChar);
2758 DCHECK_EQ(char_size, 2u);
2759
2760 // Location of data in char array buffer.
2761 const uint32_t data_offset = mirror::Array::DataOffset(char_size).Uint32Value();
2762
2763 // Location of char array data in string.
2764 const uint32_t value_offset = mirror::String::ValueOffset().Uint32Value();
2765
2766 // void getCharsNoCheck(int srcBegin, int srcEnd, char[] dst, int dstBegin);
2767 // Since getChars() calls getCharsNoCheck() - we use registers rather than constants.
2768 vixl32::Register srcObj = InputRegisterAt(invoke, 0);
2769 vixl32::Register srcBegin = InputRegisterAt(invoke, 1);
2770 vixl32::Register srcEnd = InputRegisterAt(invoke, 2);
2771 vixl32::Register dstObj = InputRegisterAt(invoke, 3);
2772 vixl32::Register dstBegin = InputRegisterAt(invoke, 4);
2773
2774 vixl32::Register num_chr = RegisterFrom(locations->GetTemp(0));
2775 vixl32::Register src_ptr = RegisterFrom(locations->GetTemp(1));
2776 vixl32::Register dst_ptr = RegisterFrom(locations->GetTemp(2));
2777
2778 vixl32::Label done, compressed_string_loop;
2779 // dst to be copied.
2780 __ Add(dst_ptr, dstObj, data_offset);
2781 __ Add(dst_ptr, dst_ptr, Operand(dstBegin, vixl32::LSL, 1));
2782
2783 __ Subs(num_chr, srcEnd, srcBegin);
2784 // Early out for valid zero-length retrievals.
Artem Serov517d9f62016-12-12 15:51:15 +00002785 __ B(eq, &done, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002786
2787 // src range to copy.
2788 __ Add(src_ptr, srcObj, value_offset);
2789
2790 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2791 vixl32::Register temp;
2792 vixl32::Label compressed_string_preloop;
2793 if (mirror::kUseStringCompression) {
2794 // Location of count in string.
2795 const uint32_t count_offset = mirror::String::CountOffset().Uint32Value();
2796 temp = temps.Acquire();
2797 // String's length.
2798 __ Ldr(temp, MemOperand(srcObj, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01002799 __ Tst(temp, 1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002800 temps.Release(temp);
Artem Serov517d9f62016-12-12 15:51:15 +00002801 __ B(eq, &compressed_string_preloop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002802 }
2803 __ Add(src_ptr, src_ptr, Operand(srcBegin, vixl32::LSL, 1));
2804
2805 // Do the copy.
2806 vixl32::Label loop, remainder;
2807
2808 temp = temps.Acquire();
2809 // Save repairing the value of num_chr on the < 4 character path.
2810 __ Subs(temp, num_chr, 4);
Artem Serov517d9f62016-12-12 15:51:15 +00002811 __ B(lt, &remainder, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002812
2813 // Keep the result of the earlier subs, we are going to fetch at least 4 characters.
2814 __ Mov(num_chr, temp);
2815
2816 // Main loop used for longer fetches loads and stores 4x16-bit characters at a time.
2817 // (LDRD/STRD fault on unaligned addresses and it's not worth inlining extra code
2818 // to rectify these everywhere this intrinsic applies.)
2819 __ Bind(&loop);
2820 __ Ldr(temp, MemOperand(src_ptr, char_size * 2));
2821 __ Subs(num_chr, num_chr, 4);
2822 __ Str(temp, MemOperand(dst_ptr, char_size * 2));
2823 __ Ldr(temp, MemOperand(src_ptr, char_size * 4, PostIndex));
2824 __ Str(temp, MemOperand(dst_ptr, char_size * 4, PostIndex));
2825 temps.Release(temp);
Artem Serov517d9f62016-12-12 15:51:15 +00002826 __ B(ge, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002827
2828 __ Adds(num_chr, num_chr, 4);
Artem Serov517d9f62016-12-12 15:51:15 +00002829 __ B(eq, &done, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002830
2831 // Main loop for < 4 character case and remainder handling. Loads and stores one
2832 // 16-bit Java character at a time.
2833 __ Bind(&remainder);
2834 temp = temps.Acquire();
2835 __ Ldrh(temp, MemOperand(src_ptr, char_size, PostIndex));
2836 __ Subs(num_chr, num_chr, 1);
2837 __ Strh(temp, MemOperand(dst_ptr, char_size, PostIndex));
2838 temps.Release(temp);
Artem Serov517d9f62016-12-12 15:51:15 +00002839 __ B(gt, &remainder, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002840
2841 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01002842 __ B(&done);
2843
Anton Kirilov5ec62182016-10-13 20:16:02 +01002844 const size_t c_char_size = Primitive::ComponentSize(Primitive::kPrimByte);
2845 DCHECK_EQ(c_char_size, 1u);
2846 // Copy loop for compressed src, copying 1 character (8-bit) to (16-bit) at a time.
2847 __ Bind(&compressed_string_preloop);
2848 __ Add(src_ptr, src_ptr, srcBegin);
2849 __ Bind(&compressed_string_loop);
2850 temp = temps.Acquire();
2851 __ Ldrb(temp, MemOperand(src_ptr, c_char_size, PostIndex));
2852 __ Strh(temp, MemOperand(dst_ptr, char_size, PostIndex));
2853 temps.Release(temp);
2854 __ Subs(num_chr, num_chr, 1);
Artem Serov517d9f62016-12-12 15:51:15 +00002855 __ B(gt, &compressed_string_loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002856 }
2857
2858 __ Bind(&done);
2859}
2860
2861void IntrinsicLocationsBuilderARMVIXL::VisitFloatIsInfinite(HInvoke* invoke) {
2862 CreateFPToIntLocations(arena_, invoke);
2863}
2864
2865void IntrinsicCodeGeneratorARMVIXL::VisitFloatIsInfinite(HInvoke* invoke) {
2866 ArmVIXLAssembler* const assembler = GetAssembler();
2867 const vixl32::Register out = OutputRegister(invoke);
2868 // Shifting left by 1 bit makes the value encodable as an immediate operand;
2869 // we don't care about the sign bit anyway.
2870 constexpr uint32_t infinity = kPositiveInfinityFloat << 1U;
2871
2872 __ Vmov(out, InputSRegisterAt(invoke, 0));
2873 // We don't care about the sign bit, so shift left.
2874 __ Lsl(out, out, 1);
2875 __ Eor(out, out, infinity);
2876 // If the result is 0, then it has 32 leading zeros, and less than that otherwise.
2877 __ Clz(out, out);
2878 // Any number less than 32 logically shifted right by 5 bits results in 0;
2879 // the same operation on 32 yields 1.
2880 __ Lsr(out, out, 5);
2881}
2882
2883void IntrinsicLocationsBuilderARMVIXL::VisitDoubleIsInfinite(HInvoke* invoke) {
2884 CreateFPToIntLocations(arena_, invoke);
2885}
2886
2887void IntrinsicCodeGeneratorARMVIXL::VisitDoubleIsInfinite(HInvoke* invoke) {
2888 ArmVIXLAssembler* const assembler = GetAssembler();
2889 const vixl32::Register out = OutputRegister(invoke);
2890 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2891 const vixl32::Register temp = temps.Acquire();
2892 // The highest 32 bits of double precision positive infinity separated into
2893 // two constants encodable as immediate operands.
2894 constexpr uint32_t infinity_high = 0x7f000000U;
2895 constexpr uint32_t infinity_high2 = 0x00f00000U;
2896
2897 static_assert((infinity_high | infinity_high2) ==
2898 static_cast<uint32_t>(kPositiveInfinityDouble >> 32U),
2899 "The constants do not add up to the high 32 bits of double "
2900 "precision positive infinity.");
2901 __ Vmov(temp, out, InputDRegisterAt(invoke, 0));
2902 __ Eor(out, out, infinity_high);
2903 __ Eor(out, out, infinity_high2);
2904 // We don't care about the sign bit, so shift left.
2905 __ Orr(out, temp, Operand(out, vixl32::LSL, 1));
2906 // If the result is 0, then it has 32 leading zeros, and less than that otherwise.
2907 __ Clz(out, out);
2908 // Any number less than 32 logically shifted right by 5 bits results in 0;
2909 // the same operation on 32 yields 1.
2910 __ Lsr(out, out, 5);
2911}
2912
TatWai Chongd8c052a2016-11-02 16:12:48 +08002913void IntrinsicLocationsBuilderARMVIXL::VisitReferenceGetReferent(HInvoke* invoke) {
2914 if (kEmitCompilerReadBarrier) {
2915 // Do not intrinsify this call with the read barrier configuration.
2916 return;
2917 }
2918 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2919 LocationSummary::kCallOnSlowPath,
2920 kIntrinsified);
2921 locations->SetInAt(0, Location::RequiresRegister());
2922 locations->SetOut(Location::SameAsFirstInput());
2923 locations->AddTemp(Location::RequiresRegister());
2924}
2925
2926void IntrinsicCodeGeneratorARMVIXL::VisitReferenceGetReferent(HInvoke* invoke) {
2927 DCHECK(!kEmitCompilerReadBarrier);
2928 ArmVIXLAssembler* assembler = GetAssembler();
2929 LocationSummary* locations = invoke->GetLocations();
2930
2931 vixl32::Register obj = InputRegisterAt(invoke, 0);
2932 vixl32::Register out = OutputRegister(invoke);
2933
2934 SlowPathCodeARMVIXL* slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
2935 codegen_->AddSlowPath(slow_path);
2936
2937 // Load ArtMethod first.
2938 HInvokeStaticOrDirect* invoke_direct = invoke->AsInvokeStaticOrDirect();
2939 DCHECK(invoke_direct != nullptr);
2940 vixl32::Register temp0 = RegisterFrom(codegen_->GenerateCalleeMethodStaticOrDirectCall(
2941 invoke_direct, locations->GetTemp(0)));
2942
2943 // Now get declaring class.
2944 __ Ldr(temp0, MemOperand(temp0, ArtMethod::DeclaringClassOffset().Int32Value()));
2945
2946 uint32_t slow_path_flag_offset = codegen_->GetReferenceSlowFlagOffset();
2947 uint32_t disable_flag_offset = codegen_->GetReferenceDisableFlagOffset();
2948 DCHECK_NE(slow_path_flag_offset, 0u);
2949 DCHECK_NE(disable_flag_offset, 0u);
2950 DCHECK_NE(slow_path_flag_offset, disable_flag_offset);
2951
2952 // Check static flags that prevent using intrinsic.
2953 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2954 vixl32::Register temp1 = temps.Acquire();
2955 __ Ldr(temp1, MemOperand(temp0, disable_flag_offset));
2956 __ Ldr(temp0, MemOperand(temp0, slow_path_flag_offset));
2957 __ Orr(temp0, temp1, temp0);
2958 __ CompareAndBranchIfNonZero(temp0, slow_path->GetEntryLabel());
2959
2960 // Fast path.
2961 __ Ldr(out, MemOperand(obj, mirror::Reference::ReferentOffset().Int32Value()));
2962 codegen_->MaybeRecordImplicitNullCheck(invoke);
2963 assembler->MaybeUnpoisonHeapReference(out);
2964 __ Bind(slow_path->GetExitLabel());
2965}
2966
Artem Serov9aee2d42017-01-06 15:58:31 +00002967void IntrinsicLocationsBuilderARMVIXL::VisitMathCeil(HInvoke* invoke) {
2968 if (features_.HasARMv8AInstructions()) {
2969 CreateFPToFPLocations(arena_, invoke);
2970 }
2971}
2972
2973void IntrinsicCodeGeneratorARMVIXL::VisitMathCeil(HInvoke* invoke) {
2974 ArmVIXLAssembler* assembler = GetAssembler();
2975 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
2976 __ Vrintp(F64, F64, OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
2977}
2978
2979void IntrinsicLocationsBuilderARMVIXL::VisitMathFloor(HInvoke* invoke) {
2980 if (features_.HasARMv8AInstructions()) {
2981 CreateFPToFPLocations(arena_, invoke);
2982 }
2983}
2984
2985void IntrinsicCodeGeneratorARMVIXL::VisitMathFloor(HInvoke* invoke) {
2986 ArmVIXLAssembler* assembler = GetAssembler();
2987 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
2988 __ Vrintm(F64, F64, OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
2989}
2990
Anton Kirilov5ec62182016-10-13 20:16:02 +01002991UNIMPLEMENTED_INTRINSIC(ARMVIXL, MathRoundDouble) // Could be done by changing rounding mode, maybe?
2992UNIMPLEMENTED_INTRINSIC(ARMVIXL, MathRoundFloat) // Could be done by changing rounding mode, maybe?
2993UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeCASLong) // High register pressure.
2994UNIMPLEMENTED_INTRINSIC(ARMVIXL, SystemArrayCopyChar)
Anton Kirilov5ec62182016-10-13 20:16:02 +01002995UNIMPLEMENTED_INTRINSIC(ARMVIXL, IntegerHighestOneBit)
2996UNIMPLEMENTED_INTRINSIC(ARMVIXL, LongHighestOneBit)
2997UNIMPLEMENTED_INTRINSIC(ARMVIXL, IntegerLowestOneBit)
2998UNIMPLEMENTED_INTRINSIC(ARMVIXL, LongLowestOneBit)
2999
Aart Bikff7d89c2016-11-07 08:49:28 -08003000UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringStringIndexOf);
3001UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringStringIndexOfAfter);
Aart Bik71bf7b42016-11-16 10:17:46 -08003002UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBufferAppend);
3003UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBufferLength);
3004UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBufferToString);
3005UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBuilderAppend);
3006UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBuilderLength);
3007UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBuilderToString);
Aart Bikff7d89c2016-11-07 08:49:28 -08003008
Anton Kirilov5ec62182016-10-13 20:16:02 +01003009// 1.8.
3010UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndAddInt)
3011UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndAddLong)
3012UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndSetInt)
3013UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndSetLong)
3014UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndSetObject)
3015
3016UNREACHABLE_INTRINSICS(ARMVIXL)
3017
3018#undef __
3019
3020} // namespace arm
3021} // namespace art