Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_ |
| 18 | #define ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_ |
| 19 | |
| 20 | #include <vector> |
| 21 | |
| 22 | #include "base/logging.h" |
| 23 | #include "constants_arm.h" |
| 24 | #include "utils/arm/managed_register_arm.h" |
| 25 | #include "utils/arm/assembler_arm.h" |
| 26 | #include "offsets.h" |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 27 | |
| 28 | namespace art { |
| 29 | namespace arm { |
| 30 | |
| 31 | class Arm32Assembler FINAL : public ArmAssembler { |
| 32 | public: |
Vladimir Marko | 93205e3 | 2016-04-13 11:59:46 +0100 | [diff] [blame] | 33 | explicit Arm32Assembler(ArenaAllocator* arena) : ArmAssembler(arena) {} |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 34 | virtual ~Arm32Assembler() {} |
| 35 | |
| 36 | bool IsThumb() const OVERRIDE { |
| 37 | return false; |
| 38 | } |
| 39 | |
| 40 | // Data-processing instructions. |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 41 | virtual void and_(Register rd, Register rn, const ShifterOperand& so, |
| 42 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 43 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 44 | virtual void eor(Register rd, Register rn, const ShifterOperand& so, |
| 45 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 46 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 47 | virtual void sub(Register rd, Register rn, const ShifterOperand& so, |
| 48 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 49 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 50 | virtual void rsb(Register rd, Register rn, const ShifterOperand& so, |
| 51 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 52 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 53 | virtual void add(Register rd, Register rn, const ShifterOperand& so, |
| 54 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 55 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 56 | virtual void adc(Register rd, Register rn, const ShifterOperand& so, |
| 57 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 58 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 59 | virtual void sbc(Register rd, Register rn, const ShifterOperand& so, |
| 60 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 61 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 62 | virtual void rsc(Register rd, Register rn, const ShifterOperand& so, |
| 63 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 64 | |
| 65 | void tst(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; |
| 66 | |
| 67 | void teq(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; |
| 68 | |
| 69 | void cmp(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; |
| 70 | |
| 71 | void cmn(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; |
| 72 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 73 | virtual void orr(Register rd, Register rn, const ShifterOperand& so, |
| 74 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 75 | |
Vladimir Marko | d2b4ca2 | 2015-09-14 15:13:26 +0100 | [diff] [blame] | 76 | virtual void orn(Register rd, Register rn, const ShifterOperand& so, |
| 77 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 78 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 79 | virtual void mov(Register rd, const ShifterOperand& so, |
| 80 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 81 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 82 | virtual void bic(Register rd, Register rn, const ShifterOperand& so, |
| 83 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 84 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 85 | virtual void mvn(Register rd, const ShifterOperand& so, |
| 86 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 87 | |
| 88 | // Miscellaneous data-processing instructions. |
| 89 | void clz(Register rd, Register rm, Condition cond = AL) OVERRIDE; |
| 90 | void movw(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE; |
| 91 | void movt(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE; |
Scott Wakeling | 9ee23f4 | 2015-07-23 10:44:35 +0100 | [diff] [blame] | 92 | void rbit(Register rd, Register rm, Condition cond = AL) OVERRIDE; |
Artem Serov | c257da7 | 2016-02-02 13:49:43 +0000 | [diff] [blame] | 93 | void rev(Register rd, Register rm, Condition cond = AL) OVERRIDE; |
| 94 | void rev16(Register rd, Register rm, Condition cond = AL) OVERRIDE; |
| 95 | void revsh(Register rd, Register rm, Condition cond = AL) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 96 | |
| 97 | // Multiply instructions. |
| 98 | void mul(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE; |
| 99 | void mla(Register rd, Register rn, Register rm, Register ra, |
| 100 | Condition cond = AL) OVERRIDE; |
| 101 | void mls(Register rd, Register rn, Register rm, Register ra, |
| 102 | Condition cond = AL) OVERRIDE; |
Zheng Xu | c666710 | 2015-05-15 16:08:45 +0800 | [diff] [blame] | 103 | void smull(Register rd_lo, Register rd_hi, Register rn, Register rm, |
| 104 | Condition cond = AL) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 105 | void umull(Register rd_lo, Register rd_hi, Register rn, Register rm, |
| 106 | Condition cond = AL) OVERRIDE; |
| 107 | |
| 108 | void sdiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE; |
| 109 | void udiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE; |
| 110 | |
Roland Levillain | 981e454 | 2014-11-14 11:47:14 +0000 | [diff] [blame] | 111 | // Bit field extract instructions. |
Roland Levillain | 51d3fc4 | 2014-11-13 14:11:42 +0000 | [diff] [blame] | 112 | void sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE; |
Roland Levillain | 981e454 | 2014-11-14 11:47:14 +0000 | [diff] [blame] | 113 | void ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE; |
Roland Levillain | 51d3fc4 | 2014-11-13 14:11:42 +0000 | [diff] [blame] | 114 | |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 115 | // Load/store instructions. |
| 116 | void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 117 | void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 118 | |
| 119 | void ldrb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 120 | void strb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 121 | |
| 122 | void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 123 | void strh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 124 | |
| 125 | void ldrsb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 126 | void ldrsh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 127 | |
| 128 | void ldrd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 129 | void strd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 130 | |
| 131 | void ldm(BlockAddressMode am, Register base, |
| 132 | RegList regs, Condition cond = AL) OVERRIDE; |
| 133 | void stm(BlockAddressMode am, Register base, |
| 134 | RegList regs, Condition cond = AL) OVERRIDE; |
| 135 | |
| 136 | void ldrex(Register rd, Register rn, Condition cond = AL) OVERRIDE; |
| 137 | void strex(Register rd, Register rt, Register rn, Condition cond = AL) OVERRIDE; |
Calin Juravle | 52c4896 | 2014-12-16 17:02:57 +0000 | [diff] [blame] | 138 | void ldrexd(Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE; |
| 139 | void strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 140 | |
| 141 | // Miscellaneous instructions. |
| 142 | void clrex(Condition cond = AL) OVERRIDE; |
| 143 | void nop(Condition cond = AL) OVERRIDE; |
| 144 | |
| 145 | // Note that gdb sets breakpoints using the undefined instruction 0xe7f001f0. |
| 146 | void bkpt(uint16_t imm16) OVERRIDE; |
| 147 | void svc(uint32_t imm24) OVERRIDE; |
| 148 | |
| 149 | void cbz(Register rn, Label* target) OVERRIDE; |
| 150 | void cbnz(Register rn, Label* target) OVERRIDE; |
| 151 | |
| 152 | // Floating point instructions (VFPv3-D16 and VFPv3-D32 profiles). |
| 153 | void vmovsr(SRegister sn, Register rt, Condition cond = AL) OVERRIDE; |
| 154 | void vmovrs(Register rt, SRegister sn, Condition cond = AL) OVERRIDE; |
| 155 | void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) OVERRIDE; |
| 156 | void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) OVERRIDE; |
| 157 | void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) OVERRIDE; |
| 158 | void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE; |
| 159 | void vmovs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 160 | void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 161 | |
| 162 | // Returns false if the immediate cannot be encoded. |
| 163 | bool vmovs(SRegister sd, float s_imm, Condition cond = AL) OVERRIDE; |
| 164 | bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE; |
| 165 | |
| 166 | void vldrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 167 | void vstrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 168 | void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 169 | void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 170 | |
| 171 | void vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; |
| 172 | void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; |
| 173 | void vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; |
| 174 | void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; |
| 175 | void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; |
| 176 | void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; |
| 177 | void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; |
| 178 | void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; |
| 179 | void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; |
| 180 | void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; |
| 181 | void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; |
| 182 | void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; |
| 183 | |
| 184 | void vabss(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 185 | void vabsd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 186 | void vnegs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 187 | void vnegd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 188 | void vsqrts(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 189 | void vsqrtd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 190 | |
| 191 | void vcvtsd(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 192 | void vcvtds(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 193 | void vcvtis(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 194 | void vcvtid(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 195 | void vcvtsi(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 196 | void vcvtdi(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 197 | void vcvtus(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 198 | void vcvtud(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 199 | void vcvtsu(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 200 | void vcvtdu(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 201 | |
| 202 | void vcmps(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 203 | void vcmpd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 204 | void vcmpsz(SRegister sd, Condition cond = AL) OVERRIDE; |
| 205 | void vcmpdz(DRegister dd, Condition cond = AL) OVERRIDE; |
| 206 | void vmstat(Condition cond = AL) OVERRIDE; // VMRS APSR_nzcv, FPSCR |
| 207 | |
xueliang.zhong | e652c12 | 2016-06-13 14:42:27 +0100 | [diff] [blame] | 208 | void vcntd(DRegister dd, DRegister dm) OVERRIDE; |
| 209 | void vpaddld(DRegister dd, DRegister dm, int32_t size, bool is_unsigned) OVERRIDE; |
| 210 | |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 211 | void vpushs(SRegister reg, int nregs, Condition cond = AL) OVERRIDE; |
| 212 | void vpushd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE; |
| 213 | void vpops(SRegister reg, int nregs, Condition cond = AL) OVERRIDE; |
| 214 | void vpopd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE; |
Artem Serov | cb3cf4a | 2016-07-15 15:01:13 +0100 | [diff] [blame^] | 215 | void vldmiad(Register base_reg, DRegister reg, int nregs, Condition cond = AL) OVERRIDE; |
| 216 | void vstmiad(Register base_reg, DRegister reg, int nregs, Condition cond = AL) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 217 | |
| 218 | // Branch instructions. |
Nicolas Geoffray | d56376c | 2015-05-21 12:32:34 +0000 | [diff] [blame] | 219 | void b(Label* label, Condition cond = AL) OVERRIDE; |
| 220 | void bl(Label* label, Condition cond = AL) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 221 | void blx(Register rm, Condition cond = AL) OVERRIDE; |
| 222 | void bx(Register rm, Condition cond = AL) OVERRIDE; |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 223 | virtual void Lsl(Register rd, Register rm, uint32_t shift_imm, |
| 224 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 225 | virtual void Lsr(Register rd, Register rm, uint32_t shift_imm, |
| 226 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 227 | virtual void Asr(Register rd, Register rm, uint32_t shift_imm, |
| 228 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 229 | virtual void Ror(Register rd, Register rm, uint32_t shift_imm, |
| 230 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 231 | virtual void Rrx(Register rd, Register rm, |
| 232 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 45fdb93 | 2014-06-25 12:37:10 -0700 | [diff] [blame] | 233 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 234 | virtual void Lsl(Register rd, Register rm, Register rn, |
| 235 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 236 | virtual void Lsr(Register rd, Register rm, Register rn, |
| 237 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 238 | virtual void Asr(Register rd, Register rm, Register rn, |
| 239 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 240 | virtual void Ror(Register rd, Register rm, Register rn, |
| 241 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 242 | |
| 243 | void Push(Register rd, Condition cond = AL) OVERRIDE; |
| 244 | void Pop(Register rd, Condition cond = AL) OVERRIDE; |
| 245 | |
| 246 | void PushList(RegList regs, Condition cond = AL) OVERRIDE; |
| 247 | void PopList(RegList regs, Condition cond = AL) OVERRIDE; |
| 248 | |
| 249 | void Mov(Register rd, Register rm, Condition cond = AL) OVERRIDE; |
| 250 | |
| 251 | void CompareAndBranchIfZero(Register r, Label* label) OVERRIDE; |
| 252 | void CompareAndBranchIfNonZero(Register r, Label* label) OVERRIDE; |
| 253 | |
Nicolas Geoffray | 19a19cf | 2014-10-22 16:07:05 +0100 | [diff] [blame] | 254 | // Memory barriers. |
| 255 | void dmb(DmbOptions flavor) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 256 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 257 | // Get the final position of a label after local fixup based on the old position |
| 258 | // recorded before FinalizeCode(). |
| 259 | uint32_t GetAdjustedPosition(uint32_t old_position) OVERRIDE; |
| 260 | |
| 261 | Literal* NewLiteral(size_t size, const uint8_t* data) OVERRIDE; |
| 262 | void LoadLiteral(Register rt, Literal* literal) OVERRIDE; |
| 263 | void LoadLiteral(Register rt, Register rt2, Literal* literal) OVERRIDE; |
| 264 | void LoadLiteral(SRegister sd, Literal* literal) OVERRIDE; |
| 265 | void LoadLiteral(DRegister dd, Literal* literal) OVERRIDE; |
| 266 | |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 267 | // Add signed constant value to rd. May clobber IP. |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 268 | void AddConstant(Register rd, Register rn, int32_t value, |
Vladimir Marko | 449b109 | 2015-09-08 12:16:45 +0100 | [diff] [blame] | 269 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 270 | |
Andreas Gampe | 7cffc3b | 2015-10-19 21:31:53 -0700 | [diff] [blame] | 271 | void CmpConstant(Register rn, int32_t value, Condition cond = AL) OVERRIDE; |
| 272 | |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 273 | // Load and Store. May clobber IP. |
| 274 | void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE; |
Vladimir Marko | ebdbf4b | 2016-07-07 15:37:02 +0100 | [diff] [blame] | 275 | void LoadDImmediate(DRegister dd, double value, Condition cond = AL) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 276 | void MarkExceptionHandler(Label* label) OVERRIDE; |
| 277 | void LoadFromOffset(LoadOperandType type, |
| 278 | Register reg, |
| 279 | Register base, |
| 280 | int32_t offset, |
| 281 | Condition cond = AL) OVERRIDE; |
| 282 | void StoreToOffset(StoreOperandType type, |
| 283 | Register reg, |
| 284 | Register base, |
| 285 | int32_t offset, |
| 286 | Condition cond = AL) OVERRIDE; |
| 287 | void LoadSFromOffset(SRegister reg, |
| 288 | Register base, |
| 289 | int32_t offset, |
| 290 | Condition cond = AL) OVERRIDE; |
| 291 | void StoreSToOffset(SRegister reg, |
| 292 | Register base, |
| 293 | int32_t offset, |
| 294 | Condition cond = AL) OVERRIDE; |
| 295 | void LoadDFromOffset(DRegister reg, |
| 296 | Register base, |
| 297 | int32_t offset, |
| 298 | Condition cond = AL) OVERRIDE; |
| 299 | void StoreDToOffset(DRegister reg, |
| 300 | Register base, |
| 301 | int32_t offset, |
| 302 | Condition cond = AL) OVERRIDE; |
| 303 | |
Nicolas Geoffray | 3bcc8ea | 2014-11-28 15:00:02 +0000 | [diff] [blame] | 304 | bool ShifterOperandCanHold(Register rd, |
| 305 | Register rn, |
| 306 | Opcode opcode, |
| 307 | uint32_t immediate, |
Vladimir Marko | f5c09c3 | 2015-12-17 12:08:08 +0000 | [diff] [blame] | 308 | SetCc set_cc, |
Nicolas Geoffray | 3bcc8ea | 2014-11-28 15:00:02 +0000 | [diff] [blame] | 309 | ShifterOperand* shifter_op) OVERRIDE; |
Vladimir Marko | f5c09c3 | 2015-12-17 12:08:08 +0000 | [diff] [blame] | 310 | using ArmAssembler::ShifterOperandCanHold; // Don't hide the non-virtual override. |
Nicolas Geoffray | 3bcc8ea | 2014-11-28 15:00:02 +0000 | [diff] [blame] | 311 | |
Nicolas Geoffray | 5bd05a5 | 2015-10-13 09:48:30 +0100 | [diff] [blame] | 312 | bool ShifterOperandCanAlwaysHold(uint32_t immediate) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 313 | |
Ian Rogers | 1373595 | 2014-10-08 12:43:28 -0700 | [diff] [blame] | 314 | static bool IsInstructionForExceptionHandling(uintptr_t pc); |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 315 | |
| 316 | // Emit data (e.g. encoded instruction or immediate) to the |
| 317 | // instruction stream. |
| 318 | void Emit(int32_t value); |
| 319 | void Bind(Label* label) OVERRIDE; |
| 320 | |
Andreas Gampe | 7cffc3b | 2015-10-19 21:31:53 -0700 | [diff] [blame] | 321 | JumpTable* CreateJumpTable(std::vector<Label*>&& labels, Register base_reg) OVERRIDE; |
| 322 | void EmitJumpTableDispatch(JumpTable* jump_table, Register displacement_reg) OVERRIDE; |
| 323 | |
| 324 | void FinalizeCode() OVERRIDE; |
| 325 | |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 326 | private: |
| 327 | void EmitType01(Condition cond, |
| 328 | int type, |
| 329 | Opcode opcode, |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 330 | SetCc set_cc, |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 331 | Register rn, |
| 332 | Register rd, |
| 333 | const ShifterOperand& so); |
| 334 | |
| 335 | void EmitType5(Condition cond, int offset, bool link); |
| 336 | |
| 337 | void EmitMemOp(Condition cond, |
| 338 | bool load, |
| 339 | bool byte, |
| 340 | Register rd, |
| 341 | const Address& ad); |
| 342 | |
| 343 | void EmitMemOpAddressMode3(Condition cond, |
| 344 | int32_t mode, |
| 345 | Register rd, |
| 346 | const Address& ad); |
| 347 | |
| 348 | void EmitMultiMemOp(Condition cond, |
| 349 | BlockAddressMode am, |
| 350 | bool load, |
| 351 | Register base, |
| 352 | RegList regs); |
| 353 | |
| 354 | void EmitShiftImmediate(Condition cond, |
| 355 | Shift opcode, |
| 356 | Register rd, |
| 357 | Register rm, |
| 358 | const ShifterOperand& so); |
| 359 | |
| 360 | void EmitShiftRegister(Condition cond, |
| 361 | Shift opcode, |
| 362 | Register rd, |
| 363 | Register rm, |
| 364 | const ShifterOperand& so); |
| 365 | |
| 366 | void EmitMulOp(Condition cond, |
| 367 | int32_t opcode, |
| 368 | Register rd, |
| 369 | Register rn, |
| 370 | Register rm, |
| 371 | Register rs); |
| 372 | |
| 373 | void EmitVFPsss(Condition cond, |
| 374 | int32_t opcode, |
| 375 | SRegister sd, |
| 376 | SRegister sn, |
| 377 | SRegister sm); |
| 378 | |
| 379 | void EmitVFPddd(Condition cond, |
| 380 | int32_t opcode, |
| 381 | DRegister dd, |
| 382 | DRegister dn, |
| 383 | DRegister dm); |
| 384 | |
| 385 | void EmitVFPsd(Condition cond, |
| 386 | int32_t opcode, |
| 387 | SRegister sd, |
| 388 | DRegister dm); |
| 389 | |
| 390 | void EmitVFPds(Condition cond, |
| 391 | int32_t opcode, |
| 392 | DRegister dd, |
| 393 | SRegister sm); |
| 394 | |
| 395 | void EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond); |
| 396 | |
Artem Serov | c257da7 | 2016-02-02 13:49:43 +0000 | [diff] [blame] | 397 | void EmitMiscellaneous(Condition cond, uint8_t op1, uint8_t op2, |
| 398 | uint32_t a_part, uint32_t rest); |
| 399 | void EmitReverseBytes(Register rd, Register rm, Condition cond, |
| 400 | uint8_t op1, uint8_t op2); |
| 401 | |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 402 | void EmitBranch(Condition cond, Label* label, bool link); |
| 403 | static int32_t EncodeBranchOffset(int offset, int32_t inst); |
| 404 | static int DecodeBranchOffset(int32_t inst); |
Nicolas Geoffray | 3bcc8ea | 2014-11-28 15:00:02 +0000 | [diff] [blame] | 405 | bool ShifterOperandCanHoldArm32(uint32_t immediate, ShifterOperand* shifter_op); |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 406 | }; |
| 407 | |
| 408 | } // namespace arm |
| 409 | } // namespace art |
| 410 | |
| 411 | #endif // ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_ |