Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | /* This file contains codegen for the X86 ISA */ |
| 18 | |
| 19 | #include "codegen_x86.h" |
| 20 | #include "dex/quick/mir_to_lir-inl.h" |
Ian Rogers | 576ca0c | 2014-06-06 15:58:22 -0700 | [diff] [blame] | 21 | #include "gc/accounting/card_table.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 22 | #include "x86_lir.h" |
| 23 | |
| 24 | namespace art { |
| 25 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 26 | /* |
| 27 | * The sparse table in the literal pool is an array of <key,displacement> |
| 28 | * pairs. |
| 29 | */ |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 30 | void X86Mir2Lir::GenSparseSwitch(MIR* mir, DexOffset table_offset, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 31 | RegLocation rl_src) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 32 | const uint16_t* table = cu_->insns + current_dalvik_offset_ + table_offset; |
| 33 | if (cu_->verbose) { |
| 34 | DumpSparseSwitchTable(table); |
| 35 | } |
| 36 | int entries = table[1]; |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 37 | const int32_t* keys = reinterpret_cast<const int32_t*>(&table[2]); |
| 38 | const int32_t* targets = &keys[entries]; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 39 | rl_src = LoadValue(rl_src, kCoreReg); |
| 40 | for (int i = 0; i < entries; i++) { |
| 41 | int key = keys[i]; |
| 42 | BasicBlock* case_block = |
| 43 | mir_graph_->FindBlock(current_dalvik_offset_ + targets[i]); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 44 | OpCmpImmBranch(kCondEq, rl_src.reg, key, &block_label_list_[case_block->id]); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 45 | } |
| 46 | } |
| 47 | |
| 48 | /* |
| 49 | * Code pattern will look something like: |
| 50 | * |
| 51 | * mov r_val, .. |
| 52 | * call 0 |
| 53 | * pop r_start_of_method |
| 54 | * sub r_start_of_method, .. |
| 55 | * mov r_key_reg, r_val |
| 56 | * sub r_key_reg, low_key |
| 57 | * cmp r_key_reg, size-1 ; bound check |
| 58 | * ja done |
| 59 | * mov r_disp, [r_start_of_method + r_key_reg * 4 + table_offset] |
| 60 | * add r_start_of_method, r_disp |
| 61 | * jmp r_start_of_method |
| 62 | * done: |
| 63 | */ |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 64 | void X86Mir2Lir::GenPackedSwitch(MIR* mir, DexOffset table_offset, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 65 | RegLocation rl_src) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 66 | const uint16_t* table = cu_->insns + current_dalvik_offset_ + table_offset; |
| 67 | if (cu_->verbose) { |
| 68 | DumpPackedSwitchTable(table); |
| 69 | } |
| 70 | // Add the table to the list - we'll process it later |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 71 | SwitchTable* tab_rec = |
Vladimir Marko | 83cc7ae | 2014-02-12 18:02:05 +0000 | [diff] [blame] | 72 | static_cast<SwitchTable*>(arena_->Alloc(sizeof(SwitchTable), kArenaAllocData)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 73 | tab_rec->table = table; |
| 74 | tab_rec->vaddr = current_dalvik_offset_; |
| 75 | int size = table[1]; |
Mathieu Chartier | f6c4b3b | 2013-08-24 16:11:37 -0700 | [diff] [blame] | 76 | tab_rec->targets = static_cast<LIR**>(arena_->Alloc(size * sizeof(LIR*), |
Vladimir Marko | 83cc7ae | 2014-02-12 18:02:05 +0000 | [diff] [blame] | 77 | kArenaAllocLIR)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 78 | switch_tables_.Insert(tab_rec); |
| 79 | |
| 80 | // Get the switch value |
| 81 | rl_src = LoadValue(rl_src, kCoreReg); |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 82 | // NewLIR0(kX86Bkpt); |
Mark Mendell | 67c39c4 | 2014-01-31 17:28:00 -0800 | [diff] [blame] | 83 | |
| 84 | // Materialize a pointer to the switch table |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 85 | RegStorage start_of_method_reg; |
Mark Mendell | 67c39c4 | 2014-01-31 17:28:00 -0800 | [diff] [blame] | 86 | if (base_of_code_ != nullptr) { |
| 87 | // We can use the saved value. |
| 88 | RegLocation rl_method = mir_graph_->GetRegLocation(base_of_code_->s_reg_low); |
Chao-ying Fu | e0ccdc0 | 2014-06-06 17:32:37 -0700 | [diff] [blame^] | 89 | if (rl_method.wide) { |
| 90 | rl_method = LoadValueWide(rl_method, kCoreReg); |
| 91 | } else { |
| 92 | rl_method = LoadValue(rl_method, kCoreReg); |
| 93 | } |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 94 | start_of_method_reg = rl_method.reg; |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 95 | store_method_addr_used_ = true; |
Mark Mendell | 67c39c4 | 2014-01-31 17:28:00 -0800 | [diff] [blame] | 96 | } else { |
Chao-ying Fu | e0ccdc0 | 2014-06-06 17:32:37 -0700 | [diff] [blame^] | 97 | if (Gen64Bit()) { |
| 98 | start_of_method_reg = AllocTempWide(); |
| 99 | } else { |
| 100 | start_of_method_reg = AllocTemp(); |
| 101 | } |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 102 | NewLIR1(kX86StartOfMethod, start_of_method_reg.GetReg()); |
Mark Mendell | 67c39c4 | 2014-01-31 17:28:00 -0800 | [diff] [blame] | 103 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 104 | int low_key = s4FromSwitchData(&table[2]); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 105 | RegStorage keyReg; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 106 | // Remove the bias, if necessary |
| 107 | if (low_key == 0) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 108 | keyReg = rl_src.reg; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 109 | } else { |
| 110 | keyReg = AllocTemp(); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 111 | OpRegRegImm(kOpSub, keyReg, rl_src.reg, low_key); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 112 | } |
| 113 | // Bounds check - if < 0 or >= size continue following switch |
| 114 | OpRegImm(kOpCmp, keyReg, size-1); |
| 115 | LIR* branch_over = OpCondBranch(kCondHi, NULL); |
| 116 | |
| 117 | // Load the displacement from the switch table |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 118 | RegStorage disp_reg = AllocTemp(); |
Chao-ying Fu | e0ccdc0 | 2014-06-06 17:32:37 -0700 | [diff] [blame^] | 119 | NewLIR5(kX86PcRelLoadRA, disp_reg.GetReg(), start_of_method_reg.GetReg(), keyReg.GetReg(), |
| 120 | 2, WrapPointer(tab_rec)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 121 | // Add displacement to start of method |
Chao-ying Fu | e0ccdc0 | 2014-06-06 17:32:37 -0700 | [diff] [blame^] | 122 | if (Gen64Bit()) { |
| 123 | NewLIR2(kX86Add64RR, start_of_method_reg.GetReg(), disp_reg.GetReg()); |
| 124 | } else { |
| 125 | OpRegReg(kOpAdd, start_of_method_reg, disp_reg); |
| 126 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 127 | // ..and go! |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 128 | LIR* switch_branch = NewLIR1(kX86JmpR, start_of_method_reg.GetReg()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 129 | tab_rec->anchor = switch_branch; |
| 130 | |
| 131 | /* branch_over target here */ |
| 132 | LIR* target = NewLIR0(kPseudoTargetLabel); |
| 133 | branch_over->target = target; |
| 134 | } |
| 135 | |
| 136 | /* |
| 137 | * Array data table format: |
| 138 | * ushort ident = 0x0300 magic value |
| 139 | * ushort width width of each element in the table |
| 140 | * uint size number of elements in the table |
| 141 | * ubyte data[size*width] table of data values (may contain a single-byte |
| 142 | * padding at the end) |
| 143 | * |
| 144 | * Total size is 4+(width * size + 1)/2 16-bit code units. |
| 145 | */ |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 146 | void X86Mir2Lir::GenFillArrayData(DexOffset table_offset, RegLocation rl_src) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 147 | const uint16_t* table = cu_->insns + current_dalvik_offset_ + table_offset; |
| 148 | // Add the table to the list - we'll process it later |
buzbee | 0d82948 | 2013-10-11 15:24:55 -0700 | [diff] [blame] | 149 | FillArrayData* tab_rec = |
Vladimir Marko | 83cc7ae | 2014-02-12 18:02:05 +0000 | [diff] [blame] | 150 | static_cast<FillArrayData*>(arena_->Alloc(sizeof(FillArrayData), kArenaAllocData)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 151 | tab_rec->table = table; |
| 152 | tab_rec->vaddr = current_dalvik_offset_; |
| 153 | uint16_t width = tab_rec->table[1]; |
| 154 | uint32_t size = tab_rec->table[2] | ((static_cast<uint32_t>(tab_rec->table[3])) << 16); |
| 155 | tab_rec->size = (size * width) + 8; |
| 156 | |
| 157 | fill_array_data_.Insert(tab_rec); |
| 158 | |
| 159 | // Making a call - use explicit registers |
| 160 | FlushAllRegs(); /* Everything to home location */ |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 161 | LoadValueDirectFixed(rl_src, rs_rX86_ARG0); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 162 | // Materialize a pointer to the fill data image |
Mark Mendell | 67c39c4 | 2014-01-31 17:28:00 -0800 | [diff] [blame] | 163 | if (base_of_code_ != nullptr) { |
| 164 | // We can use the saved value. |
| 165 | RegLocation rl_method = mir_graph_->GetRegLocation(base_of_code_->s_reg_low); |
Chao-ying Fu | e0ccdc0 | 2014-06-06 17:32:37 -0700 | [diff] [blame^] | 166 | if (rl_method.wide) { |
| 167 | LoadValueDirectWide(rl_method, rs_rX86_ARG2); |
| 168 | } else { |
| 169 | LoadValueDirect(rl_method, rs_rX86_ARG2); |
| 170 | } |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 171 | store_method_addr_used_ = true; |
Mark Mendell | 67c39c4 | 2014-01-31 17:28:00 -0800 | [diff] [blame] | 172 | } else { |
Chao-ying Fu | e0ccdc0 | 2014-06-06 17:32:37 -0700 | [diff] [blame^] | 173 | // TODO(64) force to be 64-bit |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 174 | NewLIR1(kX86StartOfMethod, rs_rX86_ARG2.GetReg()); |
Mark Mendell | 67c39c4 | 2014-01-31 17:28:00 -0800 | [diff] [blame] | 175 | } |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 176 | NewLIR2(kX86PcRelAdr, rs_rX86_ARG1.GetReg(), WrapPointer(tab_rec)); |
Chao-ying Fu | e0ccdc0 | 2014-06-06 17:32:37 -0700 | [diff] [blame^] | 177 | NewLIR2(Gen64Bit() ? kX86Add64RR : kX86Add32RR, rs_rX86_ARG1.GetReg(), rs_rX86_ARG2.GetReg()); |
Dmitry Petrochenko | 9ee801f | 2014-05-12 11:31:37 +0700 | [diff] [blame] | 178 | if (Is64BitInstructionSet(cu_->instruction_set)) { |
| 179 | CallRuntimeHelperRegReg(QUICK_ENTRYPOINT_OFFSET(8, pHandleFillArrayData), rs_rX86_ARG0, |
| 180 | rs_rX86_ARG1, true); |
| 181 | } else { |
| 182 | CallRuntimeHelperRegReg(QUICK_ENTRYPOINT_OFFSET(4, pHandleFillArrayData), rs_rX86_ARG0, |
| 183 | rs_rX86_ARG1, true); |
| 184 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 185 | } |
| 186 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 187 | void X86Mir2Lir::GenMoveException(RegLocation rl_dest) { |
Andreas Gampe | 2f244e9 | 2014-05-08 03:35:25 -0700 | [diff] [blame] | 188 | int ex_offset = Is64BitInstructionSet(cu_->instruction_set) ? |
| 189 | Thread::ExceptionOffset<8>().Int32Value() : |
| 190 | Thread::ExceptionOffset<4>().Int32Value(); |
buzbee | a0cd2d7 | 2014-06-01 09:33:49 -0700 | [diff] [blame] | 191 | RegLocation rl_result = EvalLoc(rl_dest, kRefReg, true); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 192 | NewLIR2(kX86Mov32RT, rl_result.reg.GetReg(), ex_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 193 | NewLIR2(kX86Mov32TI, ex_offset, 0); |
| 194 | StoreValue(rl_dest, rl_result); |
| 195 | } |
| 196 | |
| 197 | /* |
| 198 | * Mark garbage collection card. Skip if the value we're storing is null. |
| 199 | */ |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 200 | void X86Mir2Lir::MarkGCCard(RegStorage val_reg, RegStorage tgt_addr_reg) { |
| 201 | RegStorage reg_card_base = AllocTemp(); |
| 202 | RegStorage reg_card_no = AllocTemp(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 203 | LIR* branch_over = OpCmpImmBranch(kCondEq, val_reg, 0, NULL); |
Andreas Gampe | 2f244e9 | 2014-05-08 03:35:25 -0700 | [diff] [blame] | 204 | int ct_offset = Is64BitInstructionSet(cu_->instruction_set) ? |
| 205 | Thread::CardTableOffset<8>().Int32Value() : |
| 206 | Thread::CardTableOffset<4>().Int32Value(); |
Dmitry Petrochenko | 9ee801f | 2014-05-12 11:31:37 +0700 | [diff] [blame] | 207 | if (Gen64Bit()) { |
| 208 | NewLIR2(kX86Mov64RT, reg_card_base.GetReg(), ct_offset); |
| 209 | } else { |
| 210 | NewLIR2(kX86Mov32RT, reg_card_base.GetReg(), ct_offset); |
| 211 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 212 | OpRegRegImm(kOpLsr, reg_card_no, tgt_addr_reg, gc::accounting::CardTable::kCardShift); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 213 | StoreBaseIndexed(reg_card_base, reg_card_no, reg_card_base, 0, kUnsignedByte); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 214 | LIR* target = NewLIR0(kPseudoTargetLabel); |
| 215 | branch_over->target = target; |
| 216 | FreeTemp(reg_card_base); |
| 217 | FreeTemp(reg_card_no); |
| 218 | } |
| 219 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 220 | void X86Mir2Lir::GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 221 | /* |
| 222 | * On entry, rX86_ARG0, rX86_ARG1, rX86_ARG2 are live. Let the register |
| 223 | * allocation mechanism know so it doesn't try to use any of them when |
| 224 | * expanding the frame or flushing. This leaves the utility |
| 225 | * code with no spare temps. |
| 226 | */ |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 227 | LockTemp(rs_rX86_ARG0); |
| 228 | LockTemp(rs_rX86_ARG1); |
| 229 | LockTemp(rs_rX86_ARG2); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 230 | |
| 231 | /* Build frame, return address already on stack */ |
Dmitry Petrochenko | 9ee801f | 2014-05-12 11:31:37 +0700 | [diff] [blame] | 232 | stack_decrement_ = OpRegImm(kOpSub, rs_rX86_SP, frame_size_ - GetInstructionSetPointerSize(cu_->instruction_set)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 233 | |
| 234 | /* |
| 235 | * We can safely skip the stack overflow check if we're |
| 236 | * a leaf *and* our frame size < fudge factor. |
| 237 | */ |
Brian Carlstrom | 60d7a65 | 2014-03-13 18:10:08 -0700 | [diff] [blame] | 238 | const bool skip_overflow_check = (mir_graph_->MethodIsLeaf() && |
| 239 | (static_cast<size_t>(frame_size_) < Thread::kStackOverflowReservedBytes)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 240 | NewLIR0(kPseudoMethodEntry); |
| 241 | /* Spill core callee saves */ |
| 242 | SpillCoreRegs(); |
| 243 | /* NOTE: promotion of FP regs currently unsupported, thus no FP spill */ |
| 244 | DCHECK_EQ(num_fp_spills_, 0); |
| 245 | if (!skip_overflow_check) { |
Mathieu Chartier | 0d507d1 | 2014-03-19 10:17:28 -0700 | [diff] [blame] | 246 | class StackOverflowSlowPath : public LIRSlowPath { |
| 247 | public: |
| 248 | StackOverflowSlowPath(Mir2Lir* m2l, LIR* branch, size_t sp_displace) |
| 249 | : LIRSlowPath(m2l, m2l->GetCurrentDexPc(), branch, nullptr), sp_displace_(sp_displace) { |
| 250 | } |
| 251 | void Compile() OVERRIDE { |
| 252 | m2l_->ResetRegPool(); |
| 253 | m2l_->ResetDefTracking(); |
Mingyao Yang | 6ffcfa0 | 2014-04-25 11:06:00 -0700 | [diff] [blame] | 254 | GenerateTargetLabel(kPseudoThrowTarget); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame] | 255 | m2l_->OpRegImm(kOpAdd, rs_rX86_SP, sp_displace_); |
Mathieu Chartier | 0d507d1 | 2014-03-19 10:17:28 -0700 | [diff] [blame] | 256 | m2l_->ClobberCallerSave(); |
Mathieu Chartier | 0d507d1 | 2014-03-19 10:17:28 -0700 | [diff] [blame] | 257 | // Assumes codegen and target are in thumb2 mode. |
Andreas Gampe | 2f244e9 | 2014-05-08 03:35:25 -0700 | [diff] [blame] | 258 | if (Is64BitInstructionSet(cu_->instruction_set)) { |
| 259 | m2l_->CallHelper(RegStorage::InvalidReg(), QUICK_ENTRYPOINT_OFFSET(8, pThrowStackOverflow), |
| 260 | false /* MarkSafepointPC */, false /* UseLink */); |
| 261 | } else { |
| 262 | m2l_->CallHelper(RegStorage::InvalidReg(), QUICK_ENTRYPOINT_OFFSET(4, pThrowStackOverflow), |
Dmitry Petrochenko | 9ee801f | 2014-05-12 11:31:37 +0700 | [diff] [blame] | 263 | false /* MarkSafepointPC */, false /* UseLink */); |
Andreas Gampe | 2f244e9 | 2014-05-08 03:35:25 -0700 | [diff] [blame] | 264 | } |
Mathieu Chartier | 0d507d1 | 2014-03-19 10:17:28 -0700 | [diff] [blame] | 265 | } |
| 266 | |
| 267 | private: |
| 268 | const size_t sp_displace_; |
| 269 | }; |
| 270 | // TODO: for large frames we should do something like: |
| 271 | // spill ebp |
| 272 | // lea ebp, [esp + frame_size] |
| 273 | // cmp ebp, fs:[stack_end_] |
| 274 | // jcc stack_overflow_exception |
| 275 | // mov esp, ebp |
| 276 | // in case a signal comes in that's not using an alternate signal stack and the large frame may |
| 277 | // have moved us outside of the reserved area at the end of the stack. |
Dmitry Petrochenko | 9ee801f | 2014-05-12 11:31:37 +0700 | [diff] [blame] | 278 | // cmp rs_rX86_SP, fs:[stack_end_]; jcc throw_slowpath |
Andreas Gampe | 2f244e9 | 2014-05-08 03:35:25 -0700 | [diff] [blame] | 279 | if (Is64BitInstructionSet(cu_->instruction_set)) { |
| 280 | OpRegThreadMem(kOpCmp, rs_rX86_SP, Thread::StackEndOffset<8>()); |
| 281 | } else { |
| 282 | OpRegThreadMem(kOpCmp, rs_rX86_SP, Thread::StackEndOffset<4>()); |
| 283 | } |
Mathieu Chartier | 0d507d1 | 2014-03-19 10:17:28 -0700 | [diff] [blame] | 284 | LIR* branch = OpCondBranch(kCondUlt, nullptr); |
Chao-ying Fu | e0ccdc0 | 2014-06-06 17:32:37 -0700 | [diff] [blame^] | 285 | AddSlowPath( |
| 286 | new(arena_)StackOverflowSlowPath(this, branch, |
| 287 | frame_size_ - |
| 288 | GetInstructionSetPointerSize(cu_->instruction_set))); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 289 | } |
| 290 | |
| 291 | FlushIns(ArgLocs, rl_method); |
| 292 | |
Mark Mendell | 67c39c4 | 2014-01-31 17:28:00 -0800 | [diff] [blame] | 293 | if (base_of_code_ != nullptr) { |
| 294 | // We have been asked to save the address of the method start for later use. |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 295 | setup_method_address_[0] = NewLIR1(kX86StartOfMethod, rs_rX86_ARG0.GetReg()); |
Mark Mendell | 67c39c4 | 2014-01-31 17:28:00 -0800 | [diff] [blame] | 296 | int displacement = SRegOffset(base_of_code_->s_reg_low); |
buzbee | 695d13a | 2014-04-19 13:32:20 -0700 | [diff] [blame] | 297 | // Native pointer - must be natural word size. |
Chao-ying Fu | e0ccdc0 | 2014-06-06 17:32:37 -0700 | [diff] [blame^] | 298 | setup_method_address_[1] = StoreBaseDisp(rs_rX86_SP, displacement, rs_rX86_ARG0, Gen64Bit() ? k64 : k32); |
Mark Mendell | 67c39c4 | 2014-01-31 17:28:00 -0800 | [diff] [blame] | 299 | } |
| 300 | |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 301 | FreeTemp(rs_rX86_ARG0); |
| 302 | FreeTemp(rs_rX86_ARG1); |
| 303 | FreeTemp(rs_rX86_ARG2); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 304 | } |
| 305 | |
| 306 | void X86Mir2Lir::GenExitSequence() { |
| 307 | /* |
| 308 | * In the exit path, rX86_RET0/rX86_RET1 are live - make sure they aren't |
| 309 | * allocated by the register utilities as temps. |
| 310 | */ |
buzbee | 091cc40 | 2014-03-31 10:14:40 -0700 | [diff] [blame] | 311 | LockTemp(rs_rX86_RET0); |
| 312 | LockTemp(rs_rX86_RET1); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 313 | |
| 314 | NewLIR0(kPseudoMethodExit); |
| 315 | UnSpillCoreRegs(); |
| 316 | /* Remove frame except for return address */ |
Dmitry Petrochenko | 9ee801f | 2014-05-12 11:31:37 +0700 | [diff] [blame] | 317 | stack_increment_ = OpRegImm(kOpAdd, rs_rX86_SP, frame_size_ - GetInstructionSetPointerSize(cu_->instruction_set)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 318 | NewLIR0(kX86Ret); |
| 319 | } |
| 320 | |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 321 | void X86Mir2Lir::GenSpecialExitSequence() { |
| 322 | NewLIR0(kX86Ret); |
| 323 | } |
| 324 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 325 | } // namespace art |