1. 5c5676b ART: Add div/rem zero check elimination flag by Razvan A Lupusoru · 10 years ago
  2. 832336b Don't copy fill array data to quick literal pool. by Ian Rogers · 10 years ago
  3. 7c2ad5a Implement method calls using relative BL on ARM64. by Vladimir Marko · 10 years ago
  4. 4163c53 AArch64: address some outstanding TODOs. by Matteo Franchin · 10 years ago
  5. 8d0d03e ART: Change temporaries to positive names by Razvan A Lupusoru · 10 years ago
  6. 53c913b ART: Clean up compiler by Andreas Gampe · 10 years ago
  7. 9a8a506 AArch64: Improve MIR to LIR translation for abs by Martyn Capewell · 10 years ago
  8. 947717a Add arraycopy intrinsic for arm and arm64. by Zheng Xu · 10 years ago
  9. 48971b3 ART: Generate chained compare-and-branch for short switches by Andreas Gampe · 10 years ago
  10. c76c614 ART: Refactor long ops in quick compiler by Andreas Gampe · 10 years ago
  11. c763e35 AArch64: Implement InexpensiveConstant methods. by Matteo Franchin · 10 years ago
  12. 2eba1fa AArch64: Add inlining support for ceil(), floor(), rint(), round() by Serban Constantinescu · 10 years ago
  13. 77a5b50 Merge "AArch64: Remove unnecessary work around for sp." by Andreas Gampe · 10 years ago
  14. cedee47 AArch64: Remove unnecessary work around for sp. by Zheng Xu · 10 years ago
  15. 7906b25 Merge "ART: Rework ARM64 entry sequence" by Andreas Gampe · 10 years ago
  16. f29ecd6 ART: Rework ARM64 entry sequence by Andreas Gampe · 10 years ago
  17. 6399968 Revert "Revert "Enable Load Store Elimination for ARM and ARM64"" by Serban Constantinescu · 10 years ago
  18. 9843059 ART: Rework quick entrypoint code in Mir2Lir, cleanup by Andreas Gampe · 10 years ago
  19. c32447b Revert "Enable Load Store Elimination for ARM and ARM64" by Bill Buzbee · 10 years ago
  20. fcc36ba Enable Load Store Elimination for ARM and ARM64 by Serban Constantinescu · 10 years ago
  21. 5030d3e Use vabs/fabs on arm/arm64 for intrinsic abs(). by Vladimir Marko · 10 years ago
  22. fb8a07b Merge "ART: Refactor GenSelect, refactor gen_common accordingly" by Andreas Gampe · 10 years ago
  23. 90969af ART: Refactor GenSelect, refactor gen_common accordingly by Andreas Gampe · 10 years ago
  24. 9791bb4 Merge "Fix art test failures for Mips." by Jeff Hao · 10 years ago
  25. 69dfe51 Revert "Revert "Revert "Revert "Add implicit null and stack checks for x86"""" by Dave Allison · 10 years ago
  26. d9cb8ae Fix art test failures for Mips. by Douglas Leung · 10 years ago
  27. ed7a0f2 AArch64: improve usage of TargetReg() and friends. by Matteo Franchin · 10 years ago
  28. 6ef2aa6 Merge "ART: Rework TargetReg(symbolic_reg, wide)" by Andreas Gampe · 10 years ago
  29. ccc6026 ART: Rework TargetReg(symbolic_reg, wide) by Andreas Gampe · 10 years ago
  30. 7c6c2ac Aarch64: easy division and remainder for long ints. by Matteo Franchin · 10 years ago
  31. 59a42af Update counting VR for promotion by Serguei Katkov · 10 years ago
  32. 0025a86 Revert "Revert "Revert "Add implicit null and stack checks for x86""" by Nicolas Geoffray · 10 years ago
  33. 7fb36de Revert "Revert "Add implicit null and stack checks for x86"" by Dave Allison · 10 years ago
  34. 3d14eb6 Revert "Add implicit null and stack checks for x86" by Dave Allison · 10 years ago
  35. 34e826c Add implicit null and stack checks for x86 by Dave Allison · 10 years ago
  36. 255e014 Aarch64: fix references handling in Load*Indexed. by Matteo Franchin · 10 years ago
  37. 63fe93d AArch64: Enable Inlining. by Serban Constantinescu · 10 years ago
  38. 23abec9 AArch64: Add few more inline functions by Serban Constantinescu · 10 years ago
  39. a77ee51 x86_64: TargetReg update for x86 by Chao-ying Fu · 10 years ago
  40. b5860fb Register promotion support for 64-bit targets by buzbee · 10 years ago
  41. 4b537a8 ART: Quick compiler: More size checks, add TargetReg variants by Andreas Gampe · 10 years ago
  42. 949cd97 AArch64: Enable GenSpecialCase. by Zheng Xu · 10 years ago
  43. a64d728 Merge "AArch64: implement easy division and reminder." by Bill Buzbee · 10 years ago
  44. 3c12c51 Revert "Revert "ART: Split out more cases of Load/StoreRef, volatile as parameter"" by Andreas Gampe · 10 years ago
  45. de68676 Revert "ART: Split out more cases of Load/StoreRef, volatile as parameter" by Andreas Gampe · 10 years ago
  46. 2689fba ART: Split out more cases of Load/StoreRef, volatile as parameter by Andreas Gampe · 10 years ago
  47. c61b3c9 AArch64: implement easy division and reminder. by Matteo Franchin · 10 years ago
  48. 47b31aa ART: Start implementation of OpRegRegRegExtend for ARM64 by Andreas Gampe · 10 years ago
  49. 7c1c263 AArch64: Fix OpCmpMemImmBranch. by Zheng Xu · 10 years ago
  50. c41e6dc AArch64: improve 64-bit immediates loads. by Matteo Franchin · 10 years ago
  51. 33ae558 Arm64 hard-float by buzbee · 10 years ago
  52. 5aa6e04 Tidy x86 assembler. by Ian Rogers · 10 years ago
  53. 169489b AArch64: Add support for inlined methods by Serban Constantinescu · 10 years ago
  54. e2eb29e AArch64: Enable MOVE_*, some CONST_*, CMP_*. by Zheng Xu · 10 years ago
  55. c0090a4 Merge "Rewrite use/def masks to support 128 bits." by Vladimir Marko · 10 years ago
  56. 8dea81c Rewrite use/def masks to support 128 bits. by Vladimir Marko · 10 years ago
  57. f8ec48e ART: arm64 explicit stack overflow checks by Stuart Monteith · 10 years ago
  58. 5acc8b0 AArch64: fix and enable sparse- and packed-switch. by Matteo Franchin · 10 years ago
  59. a0cd2d7 Quick compiler: reference cleanup by buzbee · 10 years ago
  60. 05e27ff AArch64: Enable extended MIR by Serban Constantinescu · 10 years ago
  61. ed65c5e AArch64: Enable LONG_* and INT_* opcodes. by Serban Constantinescu · 10 years ago
  62. b01bf15 64-bit temp register support. by buzbee · 10 years ago
  63. 214eee4 Merge "AArch64: fixes in A64 code generation." by Bill Buzbee · 10 years ago
  64. 082833c Quick compiler, out of registers fix by buzbee · 10 years ago
  65. bc6d197 AArch64: fixes in A64 code generation. by Matteo Franchin · 10 years ago
  66. b14329f ART: Fix MonitorExit code on ARM by Andreas Gampe · 10 years ago
  67. 2f244e9 ART: Add more ThreadOffset in Mir2Lir and backends by Andreas Gampe · 10 years ago
  68. 674744e Use atomic load/store for volatile IGET/IPUT/SGET/SPUT. by Vladimir Marko · 10 years ago
  69. e45fb9e AArch64: Change arm64 backend to produce A64 code. by Matteo Franchin · 10 years ago
  70. 3bf7c60 Cleanup ARM load/store wide and remove unused param s_reg. by Vladimir Marko · 10 years ago
  71. 455759b Remove LoadBaseDispWide and StoreBaseDispWide. by Vladimir Marko · 10 years ago
  72. 43ec873 AArch64: Added arm64 quick backend as an arm clone. by Matteo Franchin · 11 years ago